Level switching test method and system for full-bridge sub-module

Abstract

The invention belongs to the field of full-bridge sub-module performance tests, and particularly relates to a level switching test method and system for a full-bridge sub-module. According to the method, a full-bridge sub-module control panel is configured to execute one-time negative input operation in each power frequency period after receiving a positive and negative level switching enabling instruction, so that a level switching test is carried out on a full-bridge sub-module corresponding to the control panel; the negative input operation comprises the steps that a pulse instruction issued by the valve control system to the control panel at the current moment is detected; if the pulse instruction at the current moment is a positive input instruction, switching the full-bridge sub-module after the switching time is set to be negative input and keeping the full-bridge sub-module unchanged in the set holding time, and then normally receiving and executing the pulse instruction in the power frequency period; if the instruction is the removal instruction, normally receiving and executing the pulse instruction in the power frequency period; the set switching time and the set maintaining time are both smaller than the power frequency period and are both integer multiples of the period that the valve control system issues the pulse instruction to the control panel.

Description

Technical Field

[0001] The invention belongs to the field of full-bridge submodule performance testing, and in particular relates to a level switching test method and system for a full-bridge submodule. Background Art

[0002] The high voltage direct current transmission technology based on voltage source converter (VSC-HVDC) is gaining more and more attention. Modular multilevel converter (MMC) is a type of voltage source converter in flexible direct current transmission system applications. This type of converter is widely used in flexible direct current transmission and large-scale new energy access systems due to its significant advantages.

[0003] Most of the MMC-HVDC projects that have been put into operation are half-bridge sub-modules. The topology based on full half-bridge hybrid sub-modules has been successfully applied in the Wudongde DC project. All large-scale new energy flexible direct current transmission that needs to be planned in the future will adopt full half-bridge hybrid sub-module topology. Compared with the pure half-bridge sub-module topology, the full half-bridge sub-module topology is more flexible and has the ability to ride through DC faults.

[0004] The half-bridge submodule has two output states: positive level and zero level; the full-bridge submodule has three output states, namely positive level, zero level and negative level. Compared with the half-bridge submodule, the full-bridge submodule has one more output state, so it is more flexible in control. However, because the full-bridge submodule outputs three levels, the impact of du / dt generated when the three levels are switched on other key components must be considered during the submodule design stage; Among them, positive level-zero level and zero level-negative level are both one-level changes, which are no different from the du / dt of the half-bridge submodule; when the full-bridge submodule switches from positive level to negative level or from negative level to positive level, it is two-level changes at this time, and du / dt becomes larger. It is necessary to consider the tolerance of other key components such as thyristor du / dt and bypass switch under this condition.

[0005] In fact, the full-bridge submodule may only output a negative level when facing certain extreme conditions or specific application scenarios. These extreme conditions may include but are not limited to system failures, abnormal input signals, or to meet the needs of certain special control strategies. Therefore, under normal operating conditions, it is often difficult to achieve the positive and negative level switching process of the full-bridge submodule, making it difficult to verify the stress characteristics of the key components of the full-bridge submodule under the working conditions of positive and negative level switching. Summary of the invention

[0006] The purpose of the present invention is to provide a level switching test method and system for a full-bridge sub-module, which is used to solve the problem in the prior art that it is often difficult to achieve the positive and negative level switching process of the full-bridge sub-module under the normal operating state of the converter valve, resulting in difficulty in verifying the stress characteristics of key components of the full-bridge sub-module under the working conditions of positive and negative level switching.

[0007] In order to achieve the above-mentioned object, the present invention provides a level switching test method for a full-bridge submodule, wherein the method configures a full-bridge submodule control board to perform a negative input operation once per power frequency cycle after receiving a positive and negative level switching enable instruction, so as to perform a level switching test on the full-bridge submodule corresponding to the control board; the negative input operation includes: detecting a pulse instruction issued by a valve control system to the control board at the current moment; If the pulse instruction at the current moment is a positive input instruction, the full-bridge submodule after the set switching time is switched to negative input and maintained unchanged for the set maintenance time, and then the pulse instruction is normally received and executed within the power frequency cycle; if it is a removal instruction, the pulse instruction is normally received and executed within the power frequency cycle; The set switching time and the set maintaining time are both shorter than the power frequency cycle, and are both integer multiples of the cycle of the pulse command sent by the valve control system to the control board.

[0008] Beneficial effect: The present invention provides a new level switching test method for a full-bridge submodule. The method uses the positive and negative level switching enable command issued by the full-bridge submodule control board as a sign of the start of the test. In each power frequency cycle, if the full-bridge submodule control board detects that the pulse command is a positive input command, the pulse command of the next set switching time is switched to a positive input command, and the negative input command is maintained unchanged within the set maintenance time; that is, a negative input of a set duration is performed once in each power frequency cycle to simulate the situation of outputting a negative level under extreme conditions or specific application scenarios. The set switching time and the set maintenance time of the positive and negative input switching are both less than the power frequency cycle, and then the positive input continues. Always respond to valve control instructions to avoid damage and impact on the full-bridge sub-module, and ensure that the moment of switching between positive and negative inputs (controlled by setting the switching time) and the moment of ending the negative input (controlled by setting the maintenance time) are consistent with the clock cycle of the valve control system sending pulse instructions to the control board, so as to avoid affecting the clock cycle of normal valve control instructions, so as to provide a test environment for the positive and negative level switching process of the full-bridge sub-module under the premise that the full-bridge sub-module can basically operate normally. That is, this method can provide a basis for verifying the positive and negative level switching process of the full-bridge sub-module, thereby achieving the effect of verifying the stress characteristics of key components of the full-bridge sub-module under the working conditions of positive and negative level switching.

[0009] Furthermore, except for the full-bridge sub-module control board corresponding to the full-bridge sub-module that needs to perform the level switching test, other sub-module control boards are configured not to respond to the positive and negative level switching enable instructions.

[0010] Furthermore, the set switching time is greater than 0.25% of the entire power frequency cycle length and less than 1% of the entire power frequency cycle length.

[0011] Furthermore, the set maintenance time is greater than 0.5% of the entire power frequency cycle length and less than 2.5% of the entire power frequency cycle length.

[0012] Furthermore, when the test system runs stably, a positive and negative level switching enable instruction is issued through the control background corresponding to the test.

[0013] The present invention also provides a level switching test system for a full-bridge submodule, comprising a processor for executing a computer program to implement the steps of the level switching test method for the full-bridge submodule.

[0014] The level switching test system of the full-bridge submodule can achieve the same beneficial effects as the above-mentioned level switching test method of the full-bridge submodule. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is an example diagram of a process of performing a level switching test on a full-bridge submodule in an embodiment of a level switching test method for a full-bridge submodule of the present invention; Figure 2 This is a connection example diagram of a full-bridge submodule performing a level switching test in an embodiment of a level switching test method of a full-bridge submodule of the present invention; Figure 3 This is a connection example diagram of a full-bridge module in a certain component for performing a level switching test in an embodiment of a level switching test method for a full-bridge submodule of the present invention; Figure 4 A waveform diagram of positive and negative level switching in an embodiment of a level switching test method for a full-bridge submodule of the present invention; Figure 5 It is a du / dt waveform diagram of positive and negative level switching in the embodiment of the level switching test method of the full-bridge submodule of the present invention; Figure 6 A simulation waveform diagram of a level switching test of a full-bridge sub-module in an embodiment of a level switching test method of a full-bridge sub-module of the present invention. DETAILED DESCRIPTION

[0016] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention is further described in detail below with reference to the accompanying drawings and embodiments.

[0017] Embodiment of the level switching test method of the full bridge submodule The present embodiment provides a technical solution for a level switching test method of a full-bridge sub-module. The solution controls the full-bridge sub-module control board to not respond to the positive input instruction issued by the valve control system by setting a switching time in each power frequency cycle, but instead performs a negative input operation and maintains the negative input for a set maintenance time. After the set maintenance time ends, it recovers to a normal state of receiving pulse instructions issued by the valve control system to simulate the situation of outputting a negative level under extreme conditions or specific application scenarios, that is, to provide a basis for implementing the positive and negative level switching process of the full-bridge sub-module.

[0018] The level switching test method of the full-bridge submodule provided in this embodiment is not only applicable to the MMC converter valve based on the full-half-bridge hybrid submodule, but also applicable to the MMC converter valve composed of the full-bridge submodule and the clamping submodule. The level switching test method of the full-bridge submodule is specifically as follows: the full-bridge submodule control board is configured to perform a negative input operation once per power frequency cycle after receiving the positive and negative level switching enable instruction, so as to perform a level switching test on the full-bridge submodule corresponding to the control board; the negative input operation includes: detecting the pulse instruction issued by the valve control system to the control board at the current moment; If the pulse instruction at the current moment is a positive input instruction, the full-bridge submodule after the set switching time is switched to negative input and maintained unchanged for the set holding time, and then the pulse instruction is normally received and executed within the power frequency cycle; if it is a cut-off instruction, the pulse instruction is normally received and executed within the power frequency cycle; The above-mentioned set switching time and set maintaining time are both shorter than the power frequency cycle, and are both integer multiples of the cycle of the valve control system sending pulse instructions to the control board.

[0019] Specifically, it is not only applicable to the MMC converter valve operation test device based on the full-half-bridge hybrid submodule, but also applicable to the MMC converter valve operation test device composed of the full-bridge submodule and the clamped submodule. Figure 1 As shown, after the system is normally unlocked and stably operates, the full-bridge sub-module control board receives the positive and negative level switching enable instruction; when the full-bridge sub-module control board receives the instruction, it autonomously cycles through the negative input operation in each power frequency cycle T (i.e., the cycle corresponding to the voltage reference frequency of 50Hz), and executes the negative input operation once in each cycle. The negative input operation is specifically to use the sub-module control board to detect the pulse instruction at the current moment (i.e., the pulse instruction sent by the valve control system to the control board).

[0020] like Figure 2 , Figure 3As shown, taking the full-bridge module control board in a certain component receiving the instruction as an example, if the pulse instruction is a positive input instruction (i.e., T1, T4 is turned on; T2, T3 is turned off), the positive input instruction is defined as 1; then the full-bridge sub-module control board switches the full-bridge sub-module to negative input (i.e., T1, T4 is turned off; T2, T3 is turned on) after the set switching time t (the set switching time t is less than the power frequency cycle T, and is an integer multiple of the cycle of the pulse instruction sent by the valve control system to the control board) and maintains it unchanged within the set maintenance time t1 (the set maintenance time t1 is less than the power frequency cycle T, and is an integer multiple of the cycle of the pulse instruction sent by the valve control system to the control board), and after the set maintenance time t1, the pulse instruction sent by the valve control system is received and executed normally again within the power frequency cycle T; If the pulse instruction is a cut-off instruction (i.e., T1, T3 are turned on; T2T4 are turned off or T1, T3 are turned off; T2T4 are turned on), the full-bridge sub-module control board normally receives and executes the switching pulse instruction issued by the valve control system within the power frequency cycle T, that is, the full-bridge sub-module control board normally responds to the pulse instruction issued by the valve control system and does not autonomously perform negative input operations.

[0021] like Figure 4 The waveform shown is the experimental waveform of the positive and negative level switching of the full-bridge sub-module port voltage, which shows the voltage change of the full-bridge sub-module port when performing negative input operation in a certain cycle; Figure 5 The waveform shown is the du / dt test waveform of the positive and negative level switching of the full-bridge sub-module port voltage. The waveform shows the change of the du / dt of the full-bridge sub-module port voltage performing a negative input operation in a certain cycle.

[0022] Figure 6 The figure shows the simulation waveform of the level switching test of the full-bridge submodule. The operation corresponding to the full-bridge module port voltage of +2000V is positive input; the operation corresponding to the full-bridge module port voltage of -2000V is negative input with a set maintenance time t1; the operation corresponding to the full-bridge module port voltage of 0V is removal.

[0023] In this embodiment, except for the full-bridge sub-module control board corresponding to the full-bridge sub-module that needs to perform the level switching test, other sub-module control boards are configured not to respond to the positive and negative level switching enable instructions.

[0024] Specifically, except for the full-bridge sub-module control board corresponding to the full-bridge sub-module that needs to perform a level switching test, the remaining sub-module control boards including the half-bridge sub-module control board are configured to normally receive the switching pulse instructions issued by the valve control system, and do not respond to the above-mentioned positive and negative level switching enable instructions.

[0025] In this embodiment, the set switching time is greater than 0.25% of the entire power frequency cycle and less than 1% of the entire power frequency cycle.

[0026] Specifically, the above-mentioned set switching time t not only needs to satisfy t<T, but also needs to satisfy T*0.25%<t<T*1% (that is, greater than 0.25% of the entire power frequency cycle length and less than 1% of the entire power frequency cycle length); since the power frequency cycle T is 20ms, the value range of the set switching time t calculated according to the above ratio in this embodiment is 50us-200us; in other embodiments, the upper and lower limits of the set switching time t can also be adjusted according to specific needs.

[0027] In this embodiment, the above setting maintenance time is greater than 0.5% of the entire power frequency cycle duration and less than 2.5% of the entire power frequency cycle duration.

[0028] Specifically, the above-mentioned setting maintenance time t1 not only needs to satisfy t1<T, but also needs to satisfy T*0.5%<t1<T*2.5% (that is, greater than 0.5% of the entire power frequency cycle and less than 2.5% of the entire power frequency cycle). Since the power frequency cycle T is 20ms, the value range of the setting maintenance time t1 calculated according to the above ratio in this embodiment is 100us-500us; in other embodiments, the upper and lower limits of the setting maintenance time t1 can also be adjusted according to specific needs.

[0029] In this embodiment, when the test system runs stably, a positive and negative level switching enable instruction is issued through the control background corresponding to the test.

[0030] Specifically, when the test system is running stably, the above-mentioned positive and negative level switching enable instructions are issued through the test system control background (i.e., the control background corresponding to the test), that is, the control background first sets the modulation wave amplitude (no negative pressure) and phase remote adjustment parameter value of the two valve groups respectively; the amplitude and phase difference of the two valve groups are adjusted through the control background to obtain the AC and DC current components, and make them run continuously according to the current required by the system.

[0031] Embodiment of the level switching test system of the full bridge submodule The present embodiment provides a technical solution for a level switching test system of a full-bridge sub-module. The present embodiment provides a level switching test system of a full-bridge sub-module, the system includes a processor, and the processor stores executable program instructions. The executable program instructions are used to implement the level switching test method of the full-bridge sub-module in the above-mentioned embodiment of the level switching test method of the full-bridge sub-module.

[0032] Since the specific working mode and working principle of the level switching test system of the full-bridge sub-module of this embodiment have been described in detail in the above-mentioned embodiment of the level switching test method of the full-bridge sub-module, they will not be repeated here.

[0033] It should be understood that the above specific embodiments of the present invention are only used to illustrate or explain the principles of the present invention, but do not constitute a limitation to the present invention.

Claims

1. A level switching test method for a full-bridge submodule, characterized in that: The full-bridge submodule control board is configured to perform a negative input operation once per power frequency cycle after receiving a positive-negative level switching enable instruction, so as to perform a level switching test on the full-bridge submodule corresponding to the control board; The negative input operation includes: detecting the pulse instruction sent by the valve control system to the control board at the current moment; If the pulse instruction at the current moment is a positive input instruction, the full-bridge submodule after the set switching time is switched to negative input and maintained unchanged for the set maintenance time, and then the pulse instruction is normally received and executed within the power frequency cycle; if it is a removal instruction, the pulse instruction is normally received and executed within the power frequency cycle; The set switching time and the set maintaining time are both shorter than the power frequency cycle, and are both integer multiples of the cycle of the pulse command sent by the valve control system to the control board.

2. The level switching test method of the full-bridge submodule according to claim 1, characterized in that: Except for the full-bridge sub-module control board corresponding to the full-bridge sub-module that needs to perform the level switching test, other sub-module control boards are configured not to respond to the positive and negative level switching enable instructions.

3. The level switching test method of the full-bridge submodule according to claim 1, characterized in that: The set switching time is greater than 0.25% of the entire power frequency cycle length and less than 1% of the entire power frequency cycle length.

4. The level switching test method of the full-bridge submodule according to claim 1, characterized in that: The set maintenance time is greater than 0.5% of the entire power frequency cycle time and less than 2.5% of the entire power frequency cycle time.

5. The level switching test method of the full-bridge submodule according to claim 1, characterized in that: When the test system runs stably, the positive and negative level switching enable command is issued through the control background corresponding to the test.

6. A level switching test system for a full-bridge submodule, comprising a processor, characterized in that: The processor is used to execute a computer program to implement the steps of the level switching test method of the full-bridge submodule according to any one of claims 1 to 5.

Images