Joint structure

Abstract

A joint structure is provided. The bonding structure includes a seed layer and a conductive structure. The conductive structure includes a via portion over the seed layer and a plurality of conductive lines protruding from the via portion.

Description

Technical Field

[0001] The present disclosure generally relates to a joint structure. Background Art

[0002] Devices or semiconductor wafers can be bonded to each other by various hybrid bonding techniques. Currently, devices and / or semiconductor wafers are bonded after a chemical mechanical polishing (CMP) process is performed on the device and / or semiconductor wafer. The CMP process may cause the bonding surface on the device and / or semiconductor wafer to be uneven, thereby causing a reduction in bonding strength and, therefore, reducing the reliability of the device. Summary of the invention

[0003] In one or more configurations, the bonding structure includes a seed layer and a conductive structure, wherein the conductive structure includes a via portion on the seed layer and a plurality of conductive lines protruding from the via portion.

[0004] In one or more configurations, the bonding structure includes a conductive structure and a seed layer structure. The conductive structure includes a conductive via and a plurality of conductive lines extending from the conductive via. The seed layer structure is on a side of the conductive via and includes a first material that is different from a second material of the plurality of conductive lines.

[0005] In one or more configurations, a structure includes a first conductive structure, a second conductive structure, and a first dielectric layer. The first conductive structure includes a first via portion and a plurality of first conductive lines extending from the first via portion. The second conductive structure is above the first conductive structure and is electrically connected to the first conductive structure via the first conductive line. The first dielectric layer laterally covers the plurality of first conductive lines and includes a first portion contacting a portion of a side of one of the plurality of first conductive lines. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Aspects of the present disclosure will be better understood from the following detailed description when read in conjunction with the accompanying drawings.It should be noted that various features may not be drawn to scale and that the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.

[0007] Figure 1A is a cross-section of a package structure according to some configurations of the present disclosure.

[0008] Figure 1B is a cross-section of a portion of a package structure according to some configurations of the present disclosure.

[0009] Figure 1C is a cross-section of a portion of a package structure according to some configurations of the present disclosure.

[0010] Figure 2A is a cross-section of a package structure according to some configurations of the present disclosure.

[0011] Figure 2B is a cross-section of a package structure according to some configurations of the present disclosure.

[0012] Figure 2C is a cross-section of a package structure according to some configurations of the present disclosure.

[0013] Figure 2D is a cross-section of a package structure according to some configurations of the present disclosure.

[0014] Figure 3A is a cross-section of a portion of a package structure according to some configurations of the present disclosure.

[0015] Figure 3B is a cross-section of a portion of a package structure according to some configurations of the present disclosure.

[0016] Figure 4A , Figure 4B , Figure 4C , Figure 4D , Figure 4E , Figure 4F , Figure 4G , Figure 4H , Fig. 4I , Figure 4J and Figure 4K Various stages of an example of a method for manufacturing a package structure according to some configurations of the present disclosure are shown.

[0017] Figure 5A , Figure 5B , Figure 5C , Figure 5D , Figure 5E , Fig. 5F , Figure 5G , Figure 5H , Fig.5I and Figure 5J Various stages of an example of a method for manufacturing a package structure according to some configurations of the present disclosure are shown.

[0018] Common reference numbers are used throughout the drawings and detailed description to refer to the same or like elements. DETAILED DESCRIPTION

[0019] Figure 1A is a cross section of a package structure 1 according to some configurations of the present disclosure. Figure 1B is a cross-section of a portion of a package structure 1 according to some configurations of the present disclosure. Figure 1C is a cross-section of a portion of a package structure 1 according to some configurations of the present disclosure. In some configurations, Figure 1B Show Figure 1A The portion 1B of the package structure 1 shown in FIG. Figure 1C Show Figure 1B1C of a package structure 1 is shown in FIG. The package structure 1 may include substrates 10 and 20 and a hybrid bond structure 50 .

[0020] The substrate 10 may include, for example, a printed circuit board, such as a paper-based copper foil laminate, a composite copper foil laminate, or a copper foil laminate based on polymer-impregnated glass fiber. The substrate 10 may include an interconnect structure, which may include, for example, a plurality of conductive traces and / or a plurality of conductive vias. The interconnect structure may include a redistribution layer (RDL) and / or a grounding element. In some configurations, the substrate 10 may include an organic substrate or a lead frame. In some configurations, the substrate 10 includes a ceramic material or a metal plate. In some configurations, the substrate 10 may include a double-layer substrate, which includes a core layer and a conductive material and / or structure disposed on the upper and bottom surfaces of the substrate 10. The substrate 10 may include a semiconductor wafer or an electronic component. The electronic component may be a chip or a bare die including a semiconductor substrate, one or more integrated circuit devices, and one or more overlying interconnect structures. The integrated circuit device may include active devices such as transistors and / or passive devices such as resistors, capacitors, inductors, or a combination thereof. The substrate 10 may be referred to as a wiring structure, a circuit structure, a conductive structure, or a conductive carrier. In some configurations, substrate 10 includes one or more conductive elements, surfaces, contacts, or pads (eg, conductive layers 110 and 120 ).

[0021] Substrate 20 may be disposed on substrate 10. Substrate 20 may be connected or electrically connected to substrate 10. Substrate 20 may include, for example, a printed circuit board, such as a paper-based copper foil laminate, a composite copper foil laminate, or a copper foil laminate based on polymer-impregnated glass fiber. Substrate 20 may include an interconnect structure, which may include a plurality of conductive traces and / or a plurality of conductive vias. The interconnect structure may include RDL and / or grounding elements. In some configurations, substrate 20 may include, for example, an organic substrate or a lead frame. In some configurations, substrate 20 includes a ceramic material or a metal plate. In some configurations, substrate 20 may include a double-layer substrate, which includes a core layer and a conductive material and / or structure disposed on the upper and bottom surfaces of substrate 20. Substrate 20 may include a semiconductor wafer or an electronic component. The electronic component may be a chip or a bare die including a semiconductor substrate, one or more integrated circuit devices, and one or more overlying interconnect structures. The integrated circuit device may include active devices such as transistors and / or passive devices such as resistors, capacitors, inductors, or a combination thereof. Substrate 10 may be referred to as a wiring structure, a circuit structure, a conductive structure, or a conductive carrier. In some configurations, substrate 20 includes one or more conductive elements, surfaces, contacts, or pads (eg, conductive layers 210 and 220).

[0022] The hybrid bonding structure 50 may include one or more conductive structures (e.g., conductive structures 31, 32, 33, 34, 41, 42, 43, and 44), a dielectric layer 60 around, surrounding, or between the one or more conductive structures, and one or more seed layer structures (e.g., seed layer structures 310, 320, 330, 340, 410, 420, 430, and 440). The seed layer structures 310, 320, 330, 340, 410, 420, 430, and 440 may be referred to as “seed layers”. In some configurations, the substrate 20 is connected or electrically connected to the substrate 10 via the hybrid bonding structure 50. The conductive structure may include a conductive material, such as a metal or a metal alloy, such as gold (Au), silver (Ag), aluminum (Al), copper (Cu), or an alloy thereof. The seed layer structure may include, for example, titanium (Ti), Cu, nickel (Ni), another metal, or an alloy such as titanium-tungsten alloy (TiW).

[0023] In some configurations, the conductive structure 31 is above the conductive layer 110. The conductive structure 31 may be referred to as a hybrid bonding pad. The conductive structure 31 may be referred to as a pre-bonding layer. That is, the conductive structure 31 may be configured as a pre-bonding layer in a hybrid bonding operation. In some instances, the "pre-bonding layer" used herein refers to a layer or pad in a hybrid bonding structure that is bonded or connected to each other before bonding or connecting to other elements. For example, the conductive structure 31 (or pre-bonding layer) may first be bonded to a corresponding conductive structure or conductive pad (e.g., conductive structure 41), and then bonded to a dielectric material or layer surrounding the bonded conductive structure or pad.

[0024] In some configurations, the conductive structure 31 includes a through-hole portion 31v (also referred to as a "conductive through-hole") and a wire bundle portion 31w (also referred to as a "wire bundle structure"). The conductive structure 31 may be above a seed layer structure 310 (or seed layer). In some configurations, the wire bundle portion 31w extends from the through-hole portion 31v. In some configurations, there is no seed layer between the through-hole portion 31v and the wire bundle portion 31w. In some configurations, no interface is formed between the through-hole portion 31v and the wire bundle portion 31w. The term "interface" used hereinafter indicates an interface formed between different materials or parts formed by different operations, and can be observed through a microscope photograph, such as an SEM photograph. In some configurations, the through-hole portion 31v is integrally formed with the wire bundle portion 31w. In some configurations, the through-hole portion 31v and the wire bundle portion 31w are integrally formed into a monolithic bonding pad (i.e., the conductive structure 31). In some configurations, the conductive structure 31 (or the combination of the through-hole portion 31v and the wire bundle portion 31w) is an integral or single-piece hybrid bonding pad. In some configurations, the wire bundle portion 31w includes a plurality of wires (e.g., nanowires). The wires may be above the through-hole portion 31v and protrude from the through-hole portion 31v. In some configurations, a region above the central region of the through-hole portion 31v or a portion located in the aforementioned region (e.g., a wire in the wire bundle portion 31w) of the plurality of wires may be spaced apart from the dielectric layer 60 by a distance that is longer than a region above the central region of the through-hole portion 31v or another portion located in the aforementioned region (e.g., other wires of the wire bundle portion 31w) of the plurality of wires that is away from the central region different from the through-hole portion 31v may be spaced apart from the dielectric layer 60. The wires in the wire bundle portion 31w may extend from the through-hole portion 31v. The dielectric layer 60 may laterally encapsulate or surround the through-hole portion 31v. In some configurations, dielectric layer 60 directly contacts the side of the wire in wire bundle part 31w. In some configurations, dielectric layer 60 directly contacts a part of the side of the wire in wire bundle part 31w. In some configurations, wire bundle part 31w comprises a plurality of wires in a configuration entangled with each other, or comprises another suitable configuration, for example, is configured to be close to each other. In some configurations, wire bundle part 31w is provided or configured as a pre-bonding layer. In some configurations, through hole part 31v has a surface 31va (or top surface) connected to wire bundle part 31w and a surface 31vb (or bottom surface) opposite to surface 31va. Surface 31va is inclined relative to surface 31vb.For example, the distance between surfaces 31va and 31vb measured along a longitudinal axis perpendicular to a reference surface varies along surfaces 31va and 31vb, where the reference surface is, for example, surface 31va, surface 31vb, surface 110a of conductive layer 110 contacting seed layer structure 310, or a surface of seed layer structure 310 contacting conductive layer 110. In some configurations, via portion 31v tapers in a horizontal direction or transverse axis parallel to the reference surface, for example, surface 31vb, surface 110a of conductive layer 110 contacting seed layer structure 310, or a surface of seed layer structure 310 contacting conductive layer 110.

[0025] In some configurations, the seed layer structure 310 includes one or more seed layers (e.g., seed layers 311, 312, and 313). The seed layers 311, 312, and 313 may have end portions (e.g., top portions) at different elevations relative to a reference surface, such as the surface 31va, the surface 31vb, the surface 110a of the conductive layer 110 contacting the seed layer structure 310, or the surface of the seed layer structure 310 contacting the conductive layer 110. In some configurations, the elevations of the end portions of the seed layers 311, 312, and 313 relative to the reference surface gradually decrease in a direction toward the through-hole portion 31v. In some configurations, the seed layer structure 310 is between the through-hole portion 31v and the conductive layer 110. In some configurations, the seed layer structure 310 contacts the through-hole portion 31v and extends across the side of the through-hole portion 31v. The seed layer structure 310 may be on the side of the through-hole portion 31v and spaced apart from the conductive wire (e.g., the conductive wire in the conductive wire bundle portion 31w) by the through-hole portion 31v. The seed layer structure 310 may cover or surround the outside of the through-hole portion 31v. The seed layer structure 310 may cover or surround the through-hole portion 31v laterally. At least an end portion of the seed layer structure 310 may be outside the vertical projection of the conductive wire (e.g., the conductive wire in the conductive wire bundle portion 31w), wherein the vertical projection is along an axis perpendicular to a reference surface, such as the surface 31va, the surface 31vb, the surface 110a of the conductive layer 110 contacting the seed layer structure 310, or the surface of the seed layer structure 310 contacting the conductive layer 110. In some configurations, at least one wire in the wire bundle portion 31w includes an end portion connected to the via portion 31v, the elevation of the end portion relative to a reference surface being higher than the elevation of the end portion (or top portion) of the seed layer structure 310 relative to the reference surface, wherein the reference surface is, for example, the surface 31va, the surface 31vb, the surface 110a of the conductive layer 110 contacting the seed layer structure 310, or the surface of the seed layer structure 310 contacting the conductive layer 110. In some configurations, the elevation of the end portion of the seed layer structure 310 relative to the reference surface is lower than the elevation of the top surface 31va of the via portion 31v relative to the reference surface. The dielectric layer 60 may extend toward a region or space above a portion of the seed layer structure 310. A portion of the dielectric layer 60 may vertically overlap with a portion of the seed layer structure 310 along a longitudinal axis perpendicular to a reference surface, where the reference surface is, for example, surface 31va, surface 31vb, surface 110a of the conductive layer 110 contacting the seed layer structure 310, or a surface of the seed layer structure 310 contacting the conductive layer 110.

[0026] In some configurations, a portion of the seed layer 311 (also referred to as an "auxiliary seed layer") is between the dielectric layer 60 and the through-hole portion 31v. In some configurations, the seed layer 311 is around or surrounds the through-hole portion 31v. In some configurations, the seed layer 311 and the wire bundle portion 31w include different materials. In some configurations, the seed layer 311 and the through-hole portion 31v include different materials. For example, the seed layer 311 may include Ti and the through-hole portion 31v may include Cu. In some configurations, the seed layer 311 has a relatively high etching selectivity relative to the through-hole portion 31v. The term "high etching selectivity" used hereinafter indicates that the two materials are etched away at significantly different rates. The term "etching selectivity" used hereinafter indicates the ratio of the etching rate of the first material to the etching rate of the second material. In some configurations, the etching rate of the seed layer 311 and the etching rate of the through-hole portion 31v are significantly different relative to the same etching solution. In some configurations, the seed layer 311 has an etching selectivity of higher than about 2, 3, 5, 8, or 10 with respect to the through hole portion 31v. In some configurations, the seed layer 311 has a relatively high etching selectivity with respect to the wire bundle portion 31w. In some configurations, the seed layer 311 has an etching selectivity of higher than about 2, 3, 5, 8, or 10 with respect to the wire bundle portion 31w. In some configurations, the seed layer 311 (e.g., its surface) contacts the through hole portion 31v. In some configurations, the seed layer 311 (or the auxiliary seed layer) is between the conductive layer 110 and the through hole portion 31v, and is configured to define a predetermined pattern of the wire bundle portion 31w. For example, the predetermined pattern of the wire bundle portion 31w may be defined by the seed layer 311 and the through hole portion 31v comprising different materials, and the detailed reasons are described below. The seed layer 311 may be or include Ti.

[0027] In some configurations, the seed layer 311 includes two end portions (e.g., a first end portion and a second end portion) on opposite sides of the via portion 31v, and one or both top surfaces in the end portions (also referred to as “end surfaces”, such as surfaces 311a and 311a′) may have an elevation relative to a reference surface that is lower than an elevation of a top surface 31va of the via portion 31v relative to the reference surface, wherein the reference surface is, for example, surface 31va, surface 31vb, a surface 110a of the conductive layer 110 contacting the seed layer structure 310, or a surface of the seed layer structure 310 contacting the conductive layer 110. In some configurations, the top surfaces 311a and 311a′ of the end portions of the seed layer 311 are at different elevations relative to the reference surface. In some configurations, a first end portion (or a first end portion) of the seed layer 311 is recessed by a distance D1 from a top surface 31va of the via portion 31v toward a reference surface (e.g., surface 31vb, surface 110a of the conductive layer 110 contacting the seed layer structure 310, or a surface of the seed layer structure 310 contacting the conductive layer 110) along a direction or axis perpendicular to the reference surface. A second end portion (or a second end portion) of the seed layer 311 is recessed by a distance D2 from a top surface 31va of the via portion 31v toward a reference surface (e.g., surface 31vb, surface 110a of the conductive layer 110 contacting the seed layer structure 310, or a surface of the seed layer structure 310 contacting the conductive layer 110) along a direction or axis perpendicular to the reference surface. D2 is different from the distance D1. In some configurations, the thickness T1 of the seed layer 311 may be equal to or less than about

[0028] In some configurations, a portion of the seed layer 312 is between the conductive layer 110 and the seed layer 311. In some configurations, the seed layer 311 and the seed layer 312 include different materials. In some configurations, the seed layer 312 has a relatively high etch selectivity relative to the seed layer 311. In some configurations, the etch selectivity of the seed layer 312 relative to the seed layer 311 is greater than about 2, 3, 5, 8, or 10. In some configurations, the thickness T2 of the seed layer 312 may be equal to or greater than about For example, about In some configurations, the thickness T1 of the end portion of the seed layer 311 is substantially equal to or less than the thickness T2 of the seed layer 312. In some configurations, the seed layer 312 includes two end portions (e.g., a first end portion and a second end portion) on opposite sides of the via portion 31v, and one or both top surfaces (e.g., surfaces 312a and 312a′) in the end portions may have an elevation lower than an elevation of the top surface 31va of the via portion 31v relative to the reference surface, wherein the reference surface is, for example, the surface 31va, the surface 31vb, the surface 110a of the conductive layer 110 contacting the seed layer structure 310, or the surface of the seed layer structure 310 contacting the conductive layer 110. In some configurations, the top surfaces 312a and 312a′ of the end portions of the seed layer 312 are at different elevations relative to the reference surface. In some configurations, the first end (or first end portion) of the seed layer 312 and the second end (or second end portion) of the seed layer 312 are respectively recessed by the same or different distances from the top surface 31va of the via portion 31v toward the reference surface (e.g., surface 31vb, surface 110a of the conductive layer 110 contacting the seed layer structure 310, or a surface of the seed layer structure 310 contacting the conductive layer 110) along a direction or axis perpendicular to the reference surface. In some configurations, the surface 311a is recessed from the surface 312a toward the reference surface, and the surface 311a' is recessed from the surface 312a' toward the reference surface. The seed layer 312 may be or include Cu. In some configurations, an end portion of the seed layer 311 is closer to the through-hole portion 31v than an end portion of the seed layer 312, and an elevation of the end portion of the seed layer 311 relative to a reference surface is lower than an elevation of the end portion of the seed layer 312 relative to the reference surface, where the reference surface is, for example, surface 31va, surface 31vb, surface 110a of the conductive layer 110 contacting the seed layer structure 310, or a surface of the seed layer structure 310 contacting the conductive layer 110.

[0029] In some configurations, a portion of the seed layer 313 is between the conductive layer 110 and the seed layer 312. In some configurations, the seed layer 312 and the seed layer 313 include different materials. In some configurations, the seed layer 313 has a relatively high etch selectivity relative to the seed layer 312. In some configurations, the etch selectivity of the seed layer 313 relative to the seed layer 312 is greater than about 2, 3, 5, 8, or 10. In some configurations, the thickness T3 of the seed layer 313 can be equal to or less than about In some configurations, the thickness T3 of the seed layer 313 is substantially equal to or less than the thickness T2 of the seed layer 312. In some configurations, the seed layer 313 includes two end portions (e.g., a first end portion and a second end portion) on opposite sides of the via portion 31v, and one or both top surfaces (e.g., surfaces 313a and 313a') in the end portions may have an elevation lower than an elevation of a top surface 31va of the via portion 31v relative to a reference surface, wherein the reference surface is, for example, the surface 31va, the surface 31vb, the surface 110a of the conductive layer 110 contacting the seed layer structure 310, or the surface of the seed layer structure 310 contacting the conductive layer 110. In some configurations, the top surfaces 313a and 313a' of the end portions of the seed layer 313 are at different elevations relative to the reference surface. In some configurations, the first end (or first end portion) of the seed layer 313 and the second end (or second end portion) of the seed layer 313 are respectively recessed by the same or different distances from the top surface 31va of the through hole portion 31v toward the reference surface (e.g., surface 31vb, surface 110a of the conductive layer 110 contacting the seed layer structure 310, or a surface of the seed layer structure 310 contacting the conductive layer 110) along a direction or axis perpendicular to the reference surface. In some configurations, the surface 311a is recessed from the surface 313a toward the reference surface, and the surface 311a' is recessed from the surface 313a' toward the reference surface. In some configurations, the surface 312a is substantially aligned or coplanar with the surface 313a, and the surface 312a' is substantially aligned or coplanar with the surface 313a'. The seed layer 313 may be or include Ti. The seed layer structure 310 may include a material (also referred to as a "first material") different from a material (also referred to as a "second material") of the conductive wires (e.g., the conductive wires in the conductive wire bundle portion 31w). For example, the seed layers 311 and 313 of the seed layer structure 310 include Ti, and the conductive wires include Cu.

[0030] In some configurations, the conductive structure 32 is adjacent to the conductive structure 31. In some configurations, the conductive structure 32 is above the conductive layer 110. The conductive structure 32 may be referred to as a "hybrid bonding pad". The conductive structure 32 may be referred to as a "pre-bonding layer". That is, the conductive structure 32 may be configured as a pre-bonding layer in a hybrid bonding operation. For example, the conductive structure 32 (or pre-bonding layer) may first be bonded to a corresponding conductive structure or conductive pad (e.g., conductive structure 42), and then bonded to a dielectric material or layer surrounding the bonded conductive structure or pad.

[0031] In some configurations, the conductive structure 32 includes a through-hole portion 32v (also referred to as a "conductive through-hole") and a wire bundle portion 32w (also referred to as a "wire bundle structure"). In some configurations, the wire bundle portion 32w extends from the through-hole portion 32v. In some configurations, there is no seed layer between the through-hole portion 32v and the wire bundle portion 32w. In some configurations, no interface is formed between the through-hole portion 32v and the wire bundle portion 32w. In some configurations, the through-hole portion 32v is formed integrally with the wire bundle portion 32w. In some configurations, the through-hole portion 32v and the wire bundle portion 32w are integrally formed into a monolithic bonding pad (e.g., the conductive structure 32). In some configurations, the conductive structure 32 (or a combination of the through-hole portion 32v and the wire bundle portion 32w) is an integral or one-piece hybrid bonding pad. In some configurations, the wire bundle portion 32w includes a plurality of wires (e.g., nanowires). In some configurations, the wire bundle portion 32w includes a plurality of wires in a certain configuration, including being entangled with each other or another suitable configuration, for example, being configured to be close to each other. In some configurations, the wire bundle portion 32w is configured as a pre-bonding layer. In some configurations, the through-hole portion 32v has a top surface connected to the wire bundle portion 32w and a bottom surface opposite to the top surface. The top surface is inclined relative to the bottom surface of the through-hole portion 32v. For example, the distance between the top surface and the bottom surface of the through-hole portion 32v measured along the longitudinal axis perpendicular to the reference surface varies along the top surface and the bottom surface of the through-hole portion 32v, wherein the reference surface is, for example, the top surface and the bottom surface of the through-hole portion 32v, the surface 110a of the conductive layer 110 contacting the seed layer structure 320, or the surface of the seed layer structure 320 contacting the conductive layer 110. In some configurations, the via portion 32v tapers in a horizontal direction or transverse axis parallel to a reference surface, such as the top and bottom surfaces of the via portion 32v, the surface 110a of the conductive layer 110 contacting the seed layer structure 320, or the surface of the seed layer structure 320 contacting the conductive layer 110. In some configurations, as shown, the via portion 31v and the via portion 32v taper toward opposite directions.

[0032] In some configurations, the seed layer structure 320 includes one or more seed layers. In some configurations, the structures of the seed layers in the seed layer structure 320 are similar to those of the seed layer structure 310 (e.g., seed layers 311, 312, and 313), and their description is omitted below. In some configurations, the seed layer structure 320 is between the via portion 32v and the conductive layer 110. In some configurations, the seed layer structure 320 contacts the via portion 32v and extends across the side of the via portion 32v.

[0033] In some configurations, the conductive structure 41 is below the conductive layer 210. In some configurations, the conductive structure 41 is above the conductive structure 31. In some configurations, the conductive structure 41 is connected to or electrically connected to the conductive structure 31. The conductive structure 41 can be electrically connected to the conductive structure 31 via a wire (e.g., a wire in the wire bundle portion 31w). The conductive structure 41 can be referred to as a hybrid bonding pad. The conductive structure 41 can be referred to as a pre-bonding layer. That is, the conductive structure 41 can be configured as a pre-bonding layer in a hybrid bonding operation. For example, the conductive structure 41 (or the pre-bonding layer) can first be bonded to a corresponding conductive structure or conductive pad (e.g., the conductive structure 31), and then bonded to a dielectric material or layer around the bonded conductive structure or pad.

[0034] In some configurations, the conductive structure 41 includes a through-hole portion 41v (also referred to as a "conductive through-hole") and a wire bundle portion 41w (also referred to as a "wire bundle structure"). In some configurations, the wire bundle portion 41w extends from the through-hole portion 41v. In some configurations, there is no seed layer between the through-hole portion 41v and the wire bundle portion 41w. In some configurations, no interface is formed between the through-hole portion 41v and the wire bundle portion 41w. In some configurations, the through-hole portion 41v is formed integrally with the wire bundle portion 41w. In some configurations, the through-hole portion 41v and the wire bundle portion 41w are integrally formed into a monolithic bonding pad (i.e., the conductive structure 41). In some configurations, the conductive structure 41 (or a combination of the through-hole portion 41v and the wire bundle portion 41w) is a monolithic or one-piece hybrid bonding pad. In some configurations, the wire bundle portion 41w includes a plurality of wires (e.g., nanowires). In some configurations, a portion of dielectric layer 60 vertically overlaps the wires in wire bundle portion 31w and / or wires in wire bundle portion 41w along a longitudinal axis perpendicular to a reference surface, wherein the reference surface is, for example, surface 31va, surface 31vb, surface 110a of conductive layer 110 contacting seed layer structure 310, surface of seed layer structure 310 contacting conductive layer 110, surface 41va, surface 41vb, surface of conductive layer 210 contacting seed layer structure 410, or surface of seed layer structure 410 contacting conductive layer 210. In some configurations, wire bundle portion 41w includes a plurality of wires in a configuration, including being entangled with each other or in another suitable configuration, such as being configured to be close to each other. In some configurations, wire bundle portion 41w is configured as a pre-bonding layer. In some configurations, via portion 41v has surface 41va (or bottom surface) connected to wire bundle portion 41w and surface 41vb (or top surface) opposite surface 41va. Surface 41va is inclined relative to surface 41vb. For example, a distance between surfaces 41vb and 41va of via portion 41v measured along a longitudinal axis perpendicular to a reference surface varies along surfaces 41vb and 41va, wherein the reference surface is, for example, surface 41va, surface 41vb, a surface of conductive layer 210 contacting seed layer structure 410, or a surface of seed layer structure 410 contacting conductive layer 210. In some configurations, via portion 41v tapers in a horizontal direction or transverse axis parallel to a reference surface, for example, surface 41va, surface 41vb, a surface of conductive layer 210 contacting seed layer structure 410, or a surface of seed layer structure 410 contacting conductive layer 210. In some configurations, wire bundle portion 41w is connected or coupled to wire bundle portion 31w. In some configurations, wires in wire bundle portion 41w are entangled with wires in wire bundle portion 31w.

[0035] In some configurations, the seed layer structure 410 includes one or more seed layers (e.g., seed layers 411, 412, and 413). In some configurations, the seed layer structure 410 is between the via portion 41v and the conductive layer 210. In some configurations, the seed layer structure 410 contacts the via portion 41v and extends across the side of the via portion 41v.

[0036] In some configurations, a portion of the seed layer 411 (also referred to as an "auxiliary seed layer") is between the dielectric layer 60 and the through-hole portion 41v. In some configurations, the seed layer 411 is around or surrounds the through-hole portion 41v. In some configurations, the seed layer 411 and the wire bundle portion 41w include different materials. In some configurations, the seed layer 411 and the through-hole portion 41v include different materials. In some configurations, the seed layer 411 has a relatively high etch selectivity relative to the through-hole portion 41v. In some configurations, the etch selectivity of the seed layer 411 relative to the through-hole portion 41v is higher than about 2, 3, 5, 8, or 10. In some configurations, the seed layer 411 has a relatively high etch selectivity relative to the wire bundle portion 41w. In some configurations, the etch selectivity of the seed layer 411 relative to the wire bundle portion 41w is higher than about 2, 3, 5, 8, or 10. In some configurations, the seed layer 411 (eg, its surface) contacts the via portion 41v. In some configurations, the seed layer 411 (or auxiliary seed layer) is between the conductive layer 210 and the via portion 41v and is configured to define a predetermined pattern of the wire bundle portion 41w, similar to that described with respect to the seed layer 311.

[0037] In some configurations, the seed layer 411 includes two end portions (e.g., a first end portion and a second end portion) on opposite sides of the through hole portion 41v, and one or both end surfaces (e.g., surfaces 411a and 411a') in the end portions may be recessed from a surface 41va (or a bottom surface) of the through hole portion 41v toward a reference surface (e.g., surface 41vb, a surface of the conductive layer 210 contacting the seed layer structure 410, or a surface of the seed layer structure 410 contacting the conductive layer 210) along a direction or axis perpendicular to the reference surface. In some configurations, the surfaces 411a and 411a' of the end portions of the seed layer 411 are at different elevations relative to the reference surface. In some configurations, the first end (or first end portion) of the seed layer 411 and the second end (or second end portion) of the seed layer 411 are recessed by the same or different distances from the surface 41va of the through-hole portion 41v toward the reference surface (e.g., the surface 41vb, the surface of the conductive layer 210 contacting the seed layer structure 410, or the surface of the seed layer structure 410 contacting the conductive layer 210) along a direction or axis perpendicular to the reference surface. In some configurations, the thickness of the seed layer 411 may be equal to or less than about In some configurations, the central axis (eg, axis C31 ) of the seed layer 311 is not aligned with the central axis (eg, axis C41 ) of the seed layer 411 .

[0038] In some configurations, a portion of seed layer 412 is between conductive layer 210 and seed layer 411. In some configurations, seed layer 411 and seed layer 412 include different materials. In some configurations, seed layer 412 has a relatively high etch selectivity relative to seed layer 411. In some configurations, the etch selectivity of seed layer 412 relative to seed layer 411 is greater than about 2, 3, 5, 8, or 10. In some configurations, the thickness of seed layer 412 may be equal to or greater than about For example, about In some configurations, the thickness of the seed layer 411 is substantially equal to or less than the thickness of the seed layer 412. In some configurations, the seed layer 412 includes two end portions (e.g., a first end portion and a second end portion) on opposite sides of the via portion 41v, and one or both end surfaces (e.g., surfaces 412a and 412a') in the end portions may be recessed along a direction or axis perpendicular to the reference surface from the surface 41va of the via portion 41v toward the reference surface (e.g., surface 41vb, a surface of the conductive layer 210 contacting the seed layer structure 410, or a surface of the seed layer structure 410 contacting the conductive layer 210). In some configurations, the surfaces 412a and 412a' of the end portions of the seed layer 412 are at different elevations relative to the reference surface. In some configurations, the first end (or first end portion) of the seed layer 412 and the second end (or second end portion) of the seed layer 412 are recessed by the same or different distances from the surface 41va of the via portion 41v toward the reference surface (e.g., the surface 41vb, the surface of the conductive layer 210 contacting the seed layer structure 410, or the surface of the seed layer structure 410 contacting the conductive layer 210) along a direction or axis perpendicular to the reference surface. In some configurations, the surface 411a is recessed from the surface 412a toward the reference surface, and the surface 411a' is recessed from the surface 412a' toward the reference surface.

[0039] In some configurations, seed layer 413 is between conductive layer 210 and seed layer 412. In some configurations, seed layer 412 and seed layer 413 comprise different materials. In some configurations, seed layer 413 has a relatively high etch selectivity relative to seed layer 412. In some configurations, the etch selectivity of seed layer 413 relative to seed layer 412 is greater than about 2, 3, 5, 8, or 10. In some configurations, the thickness of seed layer 413 may be equal to or less than about In some configurations, the thickness of the seed layer 413 is substantially equal to or less than the thickness of the seed layer 412. In some configurations, the seed layer 413 includes two end portions (e.g., a first end portion and a second end portion) on opposite sides of the via portion 41v, and one or both end surfaces (e.g., surfaces 413a and 413a') in the end portions may be recessed along a direction or axis perpendicular to the reference surface from the surface 41va of the via portion 41v toward the reference surface (e.g., surface 41vb, a surface of the conductive layer 210 contacting the seed layer structure 410, or a surface of the seed layer structure 410 contacting the conductive layer 210). In some configurations, the surfaces 413a and 413a' of the end portions of the seed layer 413 are at different elevations relative to the reference surface. In some configurations, the first end (or first end portion) of the seed layer 413 and the second end (or second end portion) of the seed layer 413 are respectively recessed by the same or different distances from the surface 41va of the through-hole portion 41v toward the reference surface (e.g., the surface 41vb, the surface of the conductive layer 210 contacting the seed layer structure 410, or the surface of the seed layer structure 410 contacting the conductive layer 210) along a direction or axis perpendicular to the reference surface. In some configurations, the surface 411a is recessed from the surface 413a toward the reference surface, and the surface 411a' is recessed from the surface 413a' toward the reference surface. In some configurations, the surface 412a is substantially aligned or coplanar with the surface 413a, and the surface 412a' is substantially aligned or coplanar with the surface 413a'.

[0040] In some configurations, conductive structure 42 is adjacent to conductive structure 41. In some configurations, conductive structure 42 is above conductive layer 210. Conductive structure 42 may be referred to as a hybrid bonding pad. Conductive structure 42 may be referred to as a pre-bonding layer. That is, conductive structure 42 may be configured as a pre-bonding layer in a hybrid bonding operation. For example, conductive structure 42 (or pre-bonding layer) may first be bonded to a corresponding conductive structure or conductive pad (e.g., conductive structure 32), and then bonded to a dielectric material or layer surrounding the bonded conductive structure or pad.

[0041] In some configurations, the conductive structure 42 includes a through-hole portion 42v (also referred to as a "conductive through-hole") and a wire bundle portion 42w (also referred to as a "wire bundle structure"). In some configurations, the wire bundle portion 42w extends from the through-hole portion 42v. In some configurations, there is no seed layer between the through-hole portion 42v and the wire bundle portion 42w. In some configurations, no interface is formed between the through-hole portion 42v and the wire bundle portion 42w. In some configurations, the through-hole portion 42v is formed integrally with the wire bundle portion 42w. In some configurations, the through-hole portion 42v and the wire bundle portion 42w are integrally formed into a monolithic bonding pad (e.g., the conductive structure 42). In some configurations, the conductive structure 42 (or a combination of the through-hole portion 42v and the wire bundle portion 42w) is an integral or one-piece hybrid bonding hybrid pad. In some configurations, the wire bundle portion 42w includes a plurality of wires (e.g., nanowires). In some configurations, the wire bundle portion 42w includes a plurality of wires in a certain configuration, including being entangled with each other or another suitable configuration, such as being configured to be close to each other. In some configurations, the wire bundle portion 42w is configured as a pre-bonding layer. In some configurations, the through-hole portion 42v has a bottom surface connected to the wire bundle portion 42w and a top surface opposite to the bottom surface, and the bottom surface is inclined relative to the top surface of the through-hole portion 42v. For example, the distance between the top surface and the bottom surface of the through-hole portion 42v measured along a longitudinal axis perpendicular to a reference surface varies along the top surface and the bottom surface of the through-hole portion 42v, wherein the reference surface is, for example, the top surface and the bottom surface of the through-hole portion 42v, the surface of the conductive layer 210 contacting the seed layer structure 420, or the surface of the seed layer structure 420 contacting the conductive layer 210. In some configurations, the via portion 42v tapers in a horizontal direction or lateral axis parallel to a reference surface, such as the top and bottom surfaces of the via portion 42v, the surface of the conductive layer 210 contacting the seed layer structure 420, or the surface of the seed layer structure 420 contacting the conductive layer 210. In some configurations, as shown, the via portion 41v and the via portion 42v taper toward opposite directions.

[0042] In some configurations, the seed layer structure 420 includes one or more seed layers. In some configurations, the structure of the seed layer in the seed layer structure 420 is similar to that of the seed layer structure 410 (e.g., seed layers 411, 412, and 413), and its description is omitted below. In some configurations, the seed layer structure 420 is between the via portion 42v and the conductive layer 210. In some configurations, the seed layer structure 420 contacts the via portion 42v and extends across the side of the via portion 42v. In some configurations, the central axis (e.g., axis C32) of the seed layer structure 320 is not aligned with the central axis (e.g., axis C42) of the seed layer structure 420.

[0043] In some configurations, the structures of the conductive structures 33 and 34 are similar to those of the conductive structures 31 and 32, the structures of the conductive structures 43 and 44 are similar to those of the conductive structures 41 and 42, the structures of the seed layer structures 330 and 340 are similar to those of the seed layer structures 310 and 310, and the structures of the seed layer structures 430 and 440 are similar to those of the seed layer structures 410 and 410, and their descriptions are omitted below. In some configurations, the distance d1 between the conductive structure 31 and the conductive structure 32 is different from the distance d2 between the conductive structure 33 and the conductive structure 34. The distance d1 is the shortest distance between two closest points on the surface 313a' of the seed layer structure 310 and the surface 313a of the seed layer structure 310. The distance d2 is the shortest distance between two closest points on the surface 313 a ′ of the seed layer structure 330 (similar to the surface 313 a of the seed layer structure 310 ) and the surface 313 a of the seed layer structure 340 (similar to the surface 313 a of the seed layer structure 310 ).

[0044] In some configurations, the dielectric layer 60 is around or surrounds the conductive structures 31, 32, 33, 34, 41, 42, 43, and 44. In some configurations, the dielectric layer 60 is around or surrounds one or more of the via portions 31v, 32v, 33v, 34v, 41v, 42v, 43v, and 44v. In some configurations, the dielectric layer 60 contacts one or more outsides of the wire bundle portions 31w, 32w, 33w, 34w, 41w, 42w, 43w, and 44w. In some configurations, the dielectric layer 60 does not extend between the wires of a single wire bundle portion. In some configurations, dielectric layer 60 does not extend into the spaces between the wires of a single wire bundle portion. In some configurations, dielectric layer 60 contacts at least one wire in wire bundle portion 31w and at least one wire in wire bundle portion 41w. In some configurations, dielectric layer 60 comprises a dielectric material having a coefficient of thermal expansion (CTE) greater than the coefficient of thermal expansion of conductive structure 31. Dielectric layer 60 may comprise an organic dielectric material having a glass transition temperature (Tg) less than about 180°C, for example, from about 160°C to about 170°C. Dielectric layer 60 may comprise polyimide.

[0045] In some configurations, the dielectric layer 60 contacts a portion of the wire bundle portion 31w and defines a gap v1 (also referred to as a "space") between the conductive structure 31 and the dielectric layer 60. In some configurations, a portion of the side of the via portion 31v is exposed through the seed layer structure 310. In some configurations, the dielectric layer 60 includes a portion (also referred to as a "first portion") that contacts a portion of the side of one of the wires in the wire bundle portion 31w. In some configurations, the dielectric layer 60 further includes another portion (also referred to as a "second portion") that does not contact the one wire. The second portion of the dielectric layer 60 may be spaced apart from the wire. A point in the second portion of the dielectric layer 60 may be closer to the via portion 31v than a point in the first portion of the dielectric layer 60. The second portion of the dielectric layer 60 may be exposed to the gap v1. In the configuration, an end or portion of the seed layer 311 (e.g., an end portion having a surface 311a) is exposed to the gap v1. In some configurations, an end or portion of the seed layer 312 (e.g., an end portion having a surface 312a) is exposed to the void v1. In some configurations, a portion of the side of the through-hole portion 31v is exposed to the void v1 (or the space). In some configurations, an end or portion of the seed layer 313 (e.g., an end portion having a surface 313a) is exposed to the void v1. In some configurations, the dielectric layer 60 further contacts a portion of the wire bundle portion 41w and defines a void v2 between the conductive structure 41 and the dielectric layer 60. In the configuration, an end or portion of the seed layer 411 (e.g., an end portion having a surface 411a) is exposed to the void v2. In the configuration, an end or portion of the seed layer 412 (e.g., an end portion having a surface 412a) is exposed to the void v2. In the configuration, an end or portion of the seed layer 413 (e.g., an end portion having a surface 413a) is exposed to the void v2. In some configurations, void v1 is separated from void v2 by a portion of dielectric layer 60 , as shown in the cross-sectional view.

[0046] In some configurations, the dielectric layer 60 further contacts a portion of the wire bundle portion 31w and defines a gap v3 between the conductive structure 31 and the dielectric layer 60. In the configuration, an end or portion of the seed layer 311 (e.g., an end portion having a surface 311a') is exposed to the gap v3. In some configurations, an end or portion of the seed layer 312 (e.g., an end portion having a surface 312a') is exposed to the gap v3. In some configurations, an end or portion of the seed layer 313 (e.g., an end portion having a surface 313a') is exposed to the gap v3. In some configurations, the dielectric layer 60 further contacts a portion of the wire bundle portion 41w and defines a gap v4 between the conductive structure 41 and the dielectric layer 60. In the configuration, an end or portion of the seed layer 411 (e.g., an end portion having a surface 411a') is exposed to the gap v4. In the configuration, an end or portion of the seed layer 412 (e.g., an end portion having surface 412a') is exposed to the void v4. In the configuration, an end or portion of the seed layer 413 (e.g., an end portion having surface 413a') is exposed to the void v4. In some configurations, the void v3 is separated from the void v4 by a portion of the dielectric layer 60, as shown in the cross-sectional view. In some configurations, the void v1 and the void v3 are on opposite sides of the conductive structure 31. In some configurations, the void v2 and the void v4 are on opposite sides of the conductive structure 41. In some examples, the voids v1, v2, v3, and v4 can be filled with air or one or more gases.

[0047] In some cases where a dielectric layer (e.g., a silicon oxide layer) is used as a pre-bonding layer in a hybrid bonding structure, in order to provide sufficient Van der Waals interaction between the dielectric layers, the bonding surface of the dielectric layer is required to have a relatively low surface roughness (e.g., less than 0.5 nm), and therefore it is necessary to perform a CMP operation on them before the dielectric layers are bonded to each other. In addition, depression of the conductive pad may occur after the CMP operation, and the bonding between the conductive pads is adversely affected. Therefore, it is necessary to pay extra attention to reducing the depression of the conductive pad (e.g., less than about 3 nm). According to some configurations of the present disclosure, a wire bundle portion is used as a pre-bonding layer, which includes wires configured relative to each other (e.g., entangled with each other) so as to provide sufficient bonding strength and fix the relative position of the substrate, and the dielectric layer does not act as a pre-bonding layer, so it is not necessary to have a low surface roughness. Therefore, the CMP operation can be omitted, the manufacturing operation can be simplified, and the cost can also be reduced.

[0048] In addition, according to some configurations of the present disclosure, the dielectric layer 60 may include one or more organic dielectric materials having a Tg lower than about 180° C., and the organic materials of the substrates 10 and 20 arranged opposite to each other may soften and expand when heated to connect to each other, thereby bonding the substrates 10 and 20. Although the softened organic material may cause an alignment shift between the substrates 10 and 20, the wires are used as a pre-bonding layer and entangled with each other to provide sufficient bonding strength and fix the relative positions of the substrates 10 and 20, thereby preventing the relative position shift. Therefore, by bonding the substrates 10 and 20 with the dielectric layer 60 and the wires, not only the CMP operation is omitted, the manufacturing process is simplified, and the cost is reduced, but also the relative position shift of the substrates 10 and 20 during the manufacturing process can be further reduced or prevented. Therefore, the manufacturing yield can be improved.

[0049] Figure 2A is a cross-section of a package structure 2A according to some configurations of the present disclosure. Figure 2A The structure shown in is similar to Figure 1A The differences between them are described below.

[0050] In some configurations, the seed layer structure 310 of the package structure 2A includes seed layers 311 and 312. In some configurations, the thickness of the seed layer 312 is greater than the thickness of the seed layer 311. In some configurations, the seed layer structure 310 does not include a third seed layer (e.g., Figure 1A In some configurations, the seed layer structure 410 of the package structure 2A includes seed layers 411 and 412. In some configurations, the thickness of the seed layer 412 is greater than the thickness of the seed layer 411. In some configurations, the seed layer structure 410 does not include a third seed layer (e.g., Figure 1A Seed layer 413 shown in FIG.

[0051] In some configurations, the structures of the seed layer structures 320 , 330 , and 340 are similar to the structure of the seed layer structure 310 , the structures of the seed layer structures 420 , 430 , and 440 are similar to the structure of the seed layer structure 410 , and descriptions thereof are omitted hereinafter.

[0052] In some configurations, the via portion 41v has a substantially constant thickness, and a surface 41va of the via portion 41v is tilted relative to the surface 31va of the via portion 31v. For example, a distance between a top surface and a bottom surface of the via portion 41v measured along a longitudinal axis perpendicular to a reference surface remains constant along the top and bottom surfaces of the via portion 41v, where the reference surface is, for example, the top and bottom surfaces of the via portion 41v, a surface of the conductive layer 110 contacting the seed layer structure 310, or a surface of the seed layer structure 310 contacting the conductive layer 110. For example, a distance between surfaces 41va and 31va measured along a longitudinal axis perpendicular to the reference surface varies along surfaces 41va and 31va. Similarly, in some configurations, the via portion 42v has a substantially constant thickness, and a surface 42va of the via portion 42v is tilted relative to the surface 32va of the via portion 32v. Similarly, in some configurations, the via portion 43v has a substantially constant thickness, and the surface 43va of the via portion 43v is inclined relative to the surface 33va of the via portion 33v. Similarly, in some configurations, the via portion 44v has a substantially constant thickness, and the surface 44va of the via portion 44v is inclined relative to the surface 34va of the via portion 34v.

[0053] Figure 2B is a cross-section of a package structure 2B according to some configurations of the present disclosure. Figure 2B The structure shown in is similar to Figure 1A The differences between them are described below.

[0054] In some configurations, the seed layer structure 310 of the package structure 2B includes a single seed layer 311. In some configurations, the thickness of the seed layer 311 is equal to or greater than about In some configurations, the seed layer structure 310 does not include the second seed layer and the third seed layer (eg, Figure 1A In some configurations, the seed layer structure 410 of the package structure 2B includes a single seed layer 411. In some configurations, the thickness of the seed layer 411 is equal to or greater than about In some configurations, the seed layer structure 410 does not include the second seed layer and the third seed layer (eg, Figure 1A Seed layers 412 and 413 shown in FIG.

[0055] In some configurations, the structures of the seed layer structures 320 , 330 , and 340 are similar to the structure of the seed layer structure 310 , the structures of the seed layer structures 420 , 430 , and 440 are similar to the structure of the seed layer structure 410 , and descriptions thereof are omitted hereinafter.

[0056] Figure 2Cis a cross-section of a package structure 2C according to some configurations of the present disclosure. Figure 2C The structure shown in is similar to Figure 1A However, the distance d1 between the conductive structure 31 and the conductive structure 32 is substantially the same as the distance d2 between the conductive structure 33 and the conductive structure 34.

[0057] Figure 2D is a cross-section of a package structure 2D according to some configurations of the present disclosure. Figure 2D The structure shown in is similar to Figure 1A The differences between them are described below.

[0058] In some configurations, dielectric layer 60 includes a portion 610 encapsulating conductive structures 41, 42, 43, and 44 and a portion 620 encapsulating conductive structures 31, 32, 33, and 34, and an interface 60F between portion 610 and portion 620. In some examples, interface 60F includes an irregular surface adjacent to conductive structures 31, 32, 33, 34, 41, 42, 43, and 44. In some configurations, interface 60F includes multiple portions having different elevations relative to one or more horizontal surfaces, as described herein. In some configurations, portion 620 (also referred to as a "first dielectric layer") laterally covers the wires in wire bundle portions 31w, 32w, 33w, and 34w. In some configurations, portion 610 further laterally covers the wires in wire bundle portions 41w, 42w, 43w, and 44w. In some configurations, portion 610 (also referred to as “second dielectric layer”) laterally encapsulates a portion of conductive structures 41 , 42 , 43 , and 44 .

[0059] Figure 3A is a cross-section of a portion of a package structure according to some configurations of the present disclosure. In some configurations, Figure 3A yes Figure 1A A cross section of a portion of the package structure 1 is shown in FIG.

[0060] In some configurations, surface 311a is recessed from surface 312a along a direction or axis perpendicular to a reference surface (e.g., surface 31vb, a surface of conductive layer 110 contacting seed layer structure 310, or a surface of seed layer structure 310 contacting conductive layer 110), and surface 311a' is recessed from surface 312a' along a direction or axis perpendicular to the reference surface. In some configurations, surface 313a is recessed from surfaces 311a and 312a along a direction or axis perpendicular to the reference surface, and surface 313a' is recessed from surfaces 311a' and 312a' along a direction or axis perpendicular to the reference surface. In some configurations, surface 411a is recessed from surfaces 412a and 413a along a direction or axis perpendicular to a reference surface (e.g., surface 41vb, a surface of conductive layer 210 contacting seed layer structure 410, or a surface of seed layer structure 410 contacting conductive layer 210), and surface 411a is recessed from surfaces 412a′ and 413a′ along a direction or axis perpendicular to the reference surface. In some configurations, surface 412a is recessed from surface 413a along a direction or axis perpendicular to the reference surface, and surface 412a′ is recessed from surface 413a′ along a direction or axis perpendicular to the reference surface.

[0061] Figures 1A-1C One or more seed layer structures in the package structure 1 shown in FIG. 1 may be modified to include other features described herein, including Figure 3A The structure of the seed layer structure 310 and / or the structure of the seed layer structure 410 shown in FIG. 4 can be modified to produce additional configurations of the present disclosure.

[0062] Figure 3B is a cross-section of a portion of a package structure according to some configurations of the present disclosure. In some configurations, Figure 3B yes Figure 1A A cross section of a portion of the package structure 1 is shown in FIG.

[0063] In some configurations, surface 313a is recessed from surfaces 311a and 312a along a direction axis perpendicular to a reference surface (e.g., surface 31vb, a surface of conductive layer 110 contacting seed layer structure 310, or a surface of seed layer structure 310 contacting conductive layer 110), and surface 313a' is recessed from surfaces 311a' and 312a' along a direction or axis perpendicular to the reference surface. In some configurations, surface 311a is substantially aligned or coplanar with surface 312a, and surface 311a' is substantially aligned or coplanar with surface 312a'. In some configurations, surface 413a is recessed from surfaces 411a and 412a along a direction or axis perpendicular to a reference surface (e.g., surface 41vb, a surface of conductive layer 210 contacting seed layer structure 410, or a surface of seed layer structure 410 contacting conductive layer 210), and surface 413a' is recessed from surfaces 411a' and 412a' along a direction or axis perpendicular to the reference surface. In some configurations, surface 412a is recessed from surface 411a, and surface 412a' is recessed relative to surface 411a' along a direction or axis perpendicular to the reference surface.

[0064] Figures 1A-1C One or more seed layer structures in the package structure 1 shown in FIG. 1 may be modified to include other features described herein, including Figure 3B The structure of the seed layer structure 310 and / or the structure of the seed layer structure 410 shown in FIG. 4 can be modified to produce additional configurations of the present disclosure.

[0065] Figure 4A , Figure 4B , Figure 4C , Figure 4D , Figure 4E , Figure 4F , Figure 4G , Figure 4H , Fig. 4I , Figure 4J and Figure 4K Various stages of an example of a method for manufacturing a package structure 2C according to some configurations of the present disclosure are shown.

[0066] refer to Figure 4A , a substrate 10 including conductive layers 110 and 120 may be provided, and a dielectric material layer 600 may be formed on the substrate 10. In some configurations, the conductive layers 110 and 120 may be formed on the surface 10a of the substrate 10. The conductive layers 110 and 120 may be formed by sputtering. In some configurations, the dielectric material layer 600 may be conformally formed on the surfaces 110a and 120a of the conductive layers 110 and 120 and the surface 10a of the substrate 10 to form a non-planar top surface 600a of the dielectric material layer 600. The dielectric material layer 600 may be formed by coating.

[0067] refer to Figure 4B , portions of the dielectric material layer 600 may be removed to form openings 600A and 600B in the dielectric material layer 600', and the openings 600A and 600B may expose the conductive layers 110 and 120, respectively. In some configurations, the openings 600A and 600B are formed in the dielectric material layer 600' without performing any planarization operation (e.g., a chemical mechanical polishing operation) on the top surface 600a of the dielectric material layer 600. In some configurations, the opening 600A has a depth that increases from the sidewall 6001 toward the sidewall 6002. In some configurations, the opening 600A has a depth T4 adjacent to the sidewall 6001 and a depth T5 adjacent to the sidewall 6002.

[0068] refer to Figure 4C , a seed layer structure may be formed on the top surface 600a of the dielectric material layer 600' and in the openings 600A and 600B. In some configurations, the seed layer structure is conformally formed on the top surface 600a, the sidewalls of the openings 600A and 600B, and the exposed surfaces 110a and 120a. The seed layer structure may include seed layers 311A, 312A, and 313A. The seed layers 311A, 312A, and 313A may be formed by sputtering.

[0069] refer to Figure 4D , a template 800 including a plurality of holes 800p may be disposed on the surface 600a and the openings 600A and 600B of the dielectric material layer 600'. In some configurations, the holes 800p are nanoholes in the template 800 extending from one side of the template 800 to the other side. In some configurations, the holes 800p pass through the template 800. In some configurations, some holes 800p are connected to the openings 600A and 600B, and some holes 800p expose portions of the seed layer 311A ​​above the surface 600a.

[0070] refer to Figure 4E, a wire can be formed in the hole of the template 800, and a through hole portion (or through hole) can be formed in the openings 600A and 600B. The wire may include a wire 810 on the surface 600a and a wire constituting a wire bundle portion 31w-34w on the openings 600A and 600B. In some configurations, the wire and the through hole portion are formed by the same operation. In some configurations, a plating operation or a deposition operation can be performed to form the wire and the through hole portion. In some configurations, the thickness T7 of the wire 810 can be substantially equal to the thickness of the through hole portion (e.g., through hole portion 31v, 32v, 33v and 34v) and the thickness of the wire in the wire bundle portion (e.g., wire bundle portion 31w, 32w, 33w and 34w) The total thickness T6. In some configurations, the thickness of the wire in the wire bundle portion is equal to or less than about 200nm. In some configurations, the wire 810 is formed directly on the portion of the hole exposed to the template 800 in the seed layer 311A. In some configurations, via portions 31v, 32v, 33v, and 34v are formed directly on seed layer 311A ​​within openings 600A and 600B, and wires in wire bundle portions 31w, 32w, 33w, and 34w are integrally formed with via portions 31v, 32v, 33v, and 34v.

[0071] refer to Figure 4F , the template 800 can be removed.

[0072] refer to Figure 4G, the portion of the seed layer 311A ​​exposed by the through-hole portions 31v, 32v, 33v and 34v (also referred to as a "first portion") may be removed to form the seed layer 311. In some configurations, the wire 810 on the portion of the seed layer 311A ​​and the removed portion of the seed layer 311A ​​are removed. The portion of the seed layer 311A ​​may be removed by a wet etching operation. The etching solution may have a relatively high etching selectivity for the seed layer 311A ​​relative to the seed layer 312A and the wire. In some configurations, the etching selectivity of the seed layer 311A ​​for the seed layer 312A and the wire is greater than about 2, 3, 5, 8, or 10. According to some configurations of the present disclosure, the seed layer 311A ​​includes a first portion, the first portion of the seed layer 311A ​​is at an elevation substantially the same as the elevation of the through-hole portions 31v, 32v, 33v, and 34v, and the first portion of the seed layer 311A ​​is exposed to the etching solution, and the seed layer 311A ​​further includes a second portion embedded in the dielectric material layer 600', and the second portion of the seed layer 311A ​​is at least partially lower than the through-hole portions 31v, 32v, 33v, and 34v. The first portion of the seed layer 311A ​​is directly exposed to the etching solution, and thus the first portion of the seed layer 311A ​​and the conductive line 810 formed thereon can be removed by a wet etching operation. On the other hand, the second portion of the seed layer 311A ​​is lower than the first portion of the seed layer 311A ​​and the through-hole portions 31v, 32v, 33v, and 34v. Therefore, the second portion of the seed layer 311A ​​is protected by the embedded structure, and thus the second portion of the seed layer 311A ​​and the via portions 31 v , 32 v , 33 v , and 34 v formed thereon are not removed during the wet etching operation.

[0073] refer to Figure 4H , the portion of the seed layer 312A exposed by the through-hole portions 31v, 32v, 33v and 34v can be removed to form the seed layer 312. The portion of the seed layer 312A can be removed by a wet etching operation. Relative to the seed layer 313A, the etching solution may have a relatively high etching selectivity for the seed layer 312A. In some configurations, the etching selectivity of the seed layer 312A relative to the seed layer 313A is higher than about 2, 3, 5, 8 or 10. In some configurations, the ratio of the thickness of the seed layer 312A to the thickness of the wire in the wire bundle portion is equal to or greater than about 10. According to some configurations of the present disclosure, through the above-mentioned design of the thickness of the seed layer 312A and the wire, because the etching time for the relatively thin seed layer 312A is relatively short (e.g., several seconds), the wire with a relatively large thickness is hardly damaged or only slightly damaged, even if the etching solution for the seed layer 312A may etch the wire.

[0074] refer to Fig. 4I, the portion of the seed layer 313A exposed by the through-hole portions 31v, 32v, 33v and 34v can be removed to form the seed layer 313. The portion of the seed layer 313A can be removed by a wet etching operation. Relative to the wire, the etching solution can have a relatively high etching selectivity for the seed layer 313A. In some configurations, the etching selectivity of the seed layer 313A relative to the wire is higher than about 2, 3, 5, 8 or 10. Therefore, the through-hole portions 31v, 32v, 33v and 34v and the wire bundle portions 31w, 32w, 33w and 34w, which collectively act as pre-bonding layers, are formed on the conductive layers 110 and 120 of the substrate 10.

[0075] refer to Figure 4J , a substrate 20 including conductive layers 210 and 220 may be provided. In some configurations, a method similar to Figures 4A-4I , to form a dielectric material layer 600" having a non-planar surface 600a" on the substrate 20. In some configurations, a process similar to that of Figures 4A-4I , to form via portions 41v, 42v, 43v, and 44v and wire bundle portions 41w, 42w, 43w, and 44w that collectively serve as pre-bonding layers on the conductive layers 210 and 220 of the substrate 20. In some configurations, a process similar to Figure 4C-4I The operations shown in are performed to form seed layers 411 , 412 , and 413 .

[0076] refer to Figure 4K , the substrate 20 may be bonded to the substrate 10. In some configurations, the wire bundle portions 41w, 42w, 43w, and 44w (or pre-bonding layers) may be connected to the wire bundle portions 31w, 32w, 33w, and 34w (or pre-bonding layers). The wires in the wire bundle portions extending from the substrate 10 and the substrate 20 may contact and entangle with each other to fix the relative positions of the substrate 10 and the substrate 20 in the vertical direction (e.g., in the direction from the substrate 10 to the substrate 20). As the bonding operation continues, after the wire bundle portions 41w, 42w, 43w, and 44w are connected to the wire bundle portions 31w, 32w, 33w, and 34w, the dielectric material layers 600' and 600" may soften and expand when heated, and the surface 600a of the dielectric material layer 600 and the surface 600a" of the dielectric material layer 600" may approach each other until the dielectric material layers 600' and 600" contact and connect with each other to form the dielectric layer 60. In some configurations, the heating temperature is greater than the glass transition temperature (Tg) of the dielectric material layers 600' and 600". The dielectric material layers 600' and 600" can expand to connect to each other, as described above, because the dielectric material layers and the wire bundle portion have different CTEs. The CTE of the dielectric material layers 600' and 600" is higher than the CTE of the wire bundle portion. Thus, Figure 2CThe package structure shown in 2C.

[0077] In some configurations where the substrate includes multiple pads, a seed layer is formed on the entire surface of the substrate and covers the pads, and then nanowires are formed on the seed layer. Therefore, the nanowires are all electrically connected to each other through the seed layer, so that the pads are all short-circuited due to the nanowires. In order to solve such problems, after the seed layer is formed on the top surface of the pads and the dielectric layer of the substrate, a patterned photoresist can be formed on the substrate to partially cover the seed layer. The patterned photoresist includes an opening that exposes a portion of the seed layer corresponding to the pads of the substrate, and then nanowires are formed on the exposed portion of the seed layer to prevent the pads from short-circuiting. Even if the patterned photoresist and the covering portion of the seed layer are subsequently removed, a conductive material layer has been formed in the opening of the patterned photoresist and between the nanowires and the top surface of the dielectric layer, which creates a gap (or height or elevation difference) between the nanowires and the top surface of the dielectric layer (e.g., a gap greater than about 6 μm). Therefore, dielectric layers from the opposing substrate may not be able to contact and connect to each other when heated due to the relatively large distance therebetween caused by the gaps created by the patterned photoresist.

[0078] According to some configurations of the present disclosure, by designing the seed layer 311A ​​including a material different from that of the via portion and the wire bundle portion, the seed layer 311A ​​can be formed on the entire surface of the conductive layers 110 and 120 and the top surface 600a of the dielectric material layer 600. After the conductive lines are formed on the entire surface of the substrate 10, the conductive lines 810 can be easily removed along with the removal of the portion of the seed layer 311A, while the wire bundle portion remains on the conductive layers 110 and 120. In this way, the separated wire bundle portions will not be short-circuited, the manufacturing process is relatively simplified, and the cost is also reduced.

[0079] In addition, according to some configurations of the present disclosure, when the thickness of the wires in the wire bundle portion is relatively small (e.g., equal to or less than about 200 nm), the dielectric material layers 600' and 600" can easily approach and contact each other. Therefore, a hybrid bonding structure including the dielectric layer 60 and the entangled wires from the wire bundle portion can be formed.

[0080] Figure 5A , Figure 5B , Figure 5C , Figure 5D , Figure 5E , Fig. 5F , Figure 5G , Figure 5H , Fig.5I and Figure 5J Various stages of an example of a method for manufacturing a package structure 5J according to some configurations of the present disclosure are shown.

[0081] refer to Figure 5A, a carrier 510 may be provided, and conductive pads 520 and 520 ′ may be formed or disposed on the carrier 510 .

[0082] refer to Figure 5B , seed layers 531A, 532A, and 533A may be formed on the carrier 510 and the conductive pads 520 and 520'. Materials and operations for forming the seed layers 531A, 532A, and 533A may be the same or similar to those of the seed layers 311A, 312A, and 313A described above, and descriptions thereof are omitted hereinafter.

[0083] refer to Figure 5C , a wire 540 may be formed on the seed layer 531A. The material and operation for forming the wire 540 may be the same as or similar to those of the wire 810 and the wires in the wire bundle parts 31w and 41w described above, and a description thereof is omitted hereinafter.

[0084] refer to Figure 5D , a dielectric material layer 550 may be formed on the conductive line 540. The dielectric material layer 550 may have a non-planar top surface 550a. The materials and operations for forming the dielectric material layer 550 may be the same or similar to those of the dielectric material layer 600 described above, and a description thereof is omitted hereinafter.

[0085] refer to Figure 5E , the carrier 510 may be removed, and portions of the seed layer 531A exposed by the conductive pads 520 and 520' may be removed to form the seed layer 531. Operations for forming the seed layer 531 may be the same or similar to those of the seed layer 311 described above, and descriptions thereof are omitted hereinafter.

[0086] refer to Fig. 5F , portions of the seed layer 532A exposed by the conductive pads 520 and 520' may be removed to form the seed layer 532, and portions of the seed layer 533A exposed by the conductive pads 520 and 520' may be removed to form the seed layer 533. Operations for forming the seed layers 532 and 533 may be the same or similar to those of the seed layers 312 and 313 described above, and descriptions thereof are omitted hereinafter.

[0087] refer to Figure 5G , a portion of the dielectric material layer 550 may be removed to form an opening 550A in the dielectric material layer 550 ′, and the opening 550A may expose the conductive pads 520 and 520 ′.

[0088] refer to Figure 5H , which can be executed similar to Figure 4C-4I The operations shown in FIG. 1 are performed to form seed layer structures 310 and 320, via portions 31v and 32v, and wire bundle portions 31w and 32w.

[0089] refer to Fig.5I , can be done by something like Figures 5A-5H The operations shown in FIG. 5 form a structure including conductive pads 580 and 580', seed layer 530', conductive line 540', dielectric material layer 550', seed layer structures 410 and 420, via portions 41v and 42v, and conductive line bundle portions 41w and 42w.

[0090] refer to Figure 5J , can be done by something like Figure 4K The operations shown in the operation will Fig.5I As the bonding operation continues, after the wire bundle portions 41w and 42w are connected to the wire bundle portions 31w and 32w, the dielectric material layers 550' and 550" may soften and expand when heated, and the surface of the dielectric material layer 550' and the surface of the dielectric material layer 550" may approach each other until the dielectric material layers 550' and 550" contact and connect to each other to form the dielectric layer 55. Thus, the package structure 5J is formed.

[0091] Unless otherwise specified, spatial descriptions such as "above", "below", "up", "left", "right", "lower", "top", "bottom", "vertical", "horizontal", "side", "above", "below", "upper", "above", "below", etc. are indicated relative to the orientation shown in the figure. It should be understood that the spatial descriptions used herein are for illustrative purposes only, and that embodiments of the structures described herein may be spatially configured in any orientation or manner, provided that such actual implementation does not deviate from the present disclosure.

[0092] As used herein, the terms "approximately," "substantially," "substantially," "about," and "approximately" are used to describe and explain minor variations. When used in conjunction with a design, structure, event, or circumstance, the terms may refer to instances where the design, structure, event, or circumstance occurs exactly as well as instances where the design, structure, event, or circumstance occurs very approximately. For example, when used in conjunction with a numerical value, the terms may refer to a range of variation of less than or equal to ±10% of the numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example, a first value may be considered "substantially" the same as or equal to a second value if the first value is within a variation range of less than or equal to ±10% of the second value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example, "substantially" perpendicular may refer to an angular variation range of less than or equal to ±10° relative to 90°, such as less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°.

[0093] If two surfaces are parallel or substantially parallel and the displacement between the two surfaces is no more than 5 μm, no more than 2 μm, no more than 1 μm, or no more than 0.5 μm, then the two surfaces can be considered to be coplanar or substantially coplanar. If the displacement between the highest point of a surface relative to a reference surface and the lowest point of the surface relative to the reference surface does not exceed 5 μm, no more than 2 μm, no more than 1 μm, or no more than 0.5 μm, then the surface can be considered to be substantially flat.

[0094] As used herein, the singular forms "a," "an," and "the" may include plural or plural referents unless the context clearly indicates otherwise.

[0095] As used herein, the terms "conductive," "electrically conductive," and "conductivity" refer to the ability to carry or transfer an electric current. Conductive materials are materials that present little or no resistance to the flow of electric current. One unit of measurement for conductivity is Siemens per meter (S / m). Typically, a conductive material is one that has a conductivity greater than about 10 4 S / m, for example at least 10 5 S / m or at least 10 6S / m of a material. The conductivity of a material sometimes varies with temperature. Unless otherwise specified, the conductivity of a material is measured at room temperature.

[0096] In addition, amounts, ratios and other numerical values ​​are sometimes presented herein in a range format. It should be understood that such a range format is used for the sake of convenience and brevity, and should be flexibly construed to include not only the values ​​explicitly specified as the limits of the range, but also all individual values ​​or sub-ranges encompassed within the range, as if each value and sub-range were explicitly specified.

[0097] As used herein, the term "layer" refers to a portion of a material including a region having a specific thickness. A layer may extend across the entire underlying or superstructure, or may have an extent that is less than the entire extent of the underlying or superstructure. In addition, a layer may be a region of a uniform or non-uniform continuous structure, the thickness of which is less than the thickness of the continuous structure. For example, a layer may be located between the top and bottom surfaces of a continuous structure, or between any pair of horizontal planes therebetween. A layer may extend horizontally, vertically, and / or along a tapered surface. A substrate may be a layer, may contain one or more layers therein, and / or may have one or more layers thereon, above, and / or below. A layer may contain multiple layers. For example, a semiconductor layer may include one or more doped or undoped semiconductor layers, and may be of the same or different materials.

[0098] As used herein, the "elevation" of an element relative to a reference surface refers to the distance of a point of the element (e.g., surface, volume, line, edge, etc.) from the reference surface in a direction or axis perpendicular to the reference surface in a top-to-bottom direction or a bottom-to-top direction, as shown. In some examples, a point of the element corresponds to the shortest distance between the element and the reference surface in any direction or axis perpendicular to the reference surface.

[0099] Although the present disclosure has been described and illustrated with reference to the specific configuration of the present disclosure, these descriptions and illustrations are not restrictive. It should be understood by those skilled in the art that various changes can be made and equivalents can be replaced without departing from the true spirit and scope of the present disclosure as defined by the appended claims. The illustrations may not necessarily be drawn to scale. Due to manufacturing processes and tolerances, there may be differences between the process reproduction in the present disclosure and the actual equipment. There may be other configurations that are not specifically described in the present disclosure. The specification and drawings should be regarded as illustrative rather than restrictive. Modifications may be made to make specific situations, materials, material compositions, methods or processes suitable for the goals, spirit and scope of the present disclosure. All such modifications are deemed to be included within the scope of the appended claims. Although the disclosed method has been described herein with reference to specific operations performed in a specific order, it should be understood that these operations can be combined, subdivided or reordered to form equivalent methods without departing from the teachings of the present disclosure. Therefore, unless specifically indicated herein, the order and grouping of operations are not limitations of the present disclosure.

Claims

1. A bonding structure, comprising: seed layer; as well as A conductive structure includes a through-hole portion above the seed layer and a plurality of conductive lines protruding from the through-hole portion. 2 . The bonding structure according to claim 1 , wherein the seed layer laterally covers at least one side of the through hole portion.

3. The bonding structure according to claim 2, wherein an end portion of the seed layer is outside a vertical projection of the plurality of conductive lines, wherein the vertical projection is along a direction or axis perpendicular to at least one of a surface of the seed layer or a surface of the through-hole portion.

4. The bonding structure according to claim 2, wherein one of the plurality of wires includes an end portion, the end portion is connected to the through-hole portion, and the elevation of the end portion relative to the bottom surface of the through-hole portion is higher than the elevation of the top end portion of the seed layer relative to the bottom surface of the through-hole portion. 5 . The bonding structure of claim 1 , further comprising a dielectric layer laterally encapsulating at least one side of the via portion and at least one side of the plurality of conductive lines. 6 . The bonding structure of claim 5 , wherein a portion of the dielectric layer vertically overlaps a portion of the seed layer along a direction or axis perpendicular to at least one of a surface of the seed layer or a surface of the via portion. The bonding structure according to claim 6 , wherein a space is formed between the dielectric layer and the seed layer. 8 . The bonding structure of claim 6 , wherein the dielectric layer directly contacts a side surface of one of the plurality of conductive lines.

9. A bonding structure comprising: a conductive structure comprising a conductive via and a plurality of conductive lines extending from the conductive via; as well as A seed layer structure on a side of the conductive via, wherein the seed layer structure comprises a first material different from a second material of the plurality of conductive lines. 10 . The bonding structure of claim 9 , wherein a portion of the side surface of the conductive via is exposed through the seed layer structure. 11 . The bonding structure according to claim 9 , wherein the plurality of conductive lines extend from a top surface of the conductive via, and a top end of the seed layer structure is lower than the top surface of the conductive via relative to a bottom surface of the conductive via. 12 . The bonding structure of claim 11 , wherein the seed layer structure comprises a plurality of seed layers, a plurality of end portions of the plurality of seed layers being at different elevations relative to the bottom surface of the conductive via. 13 . The bonding structure according to claim 12 , wherein the plurality of elevations of the plurality of end portions of the plurality of seed layers relative to the bottom surface of the conductive via gradually decrease in a direction toward the conductive via.

14. A bonding structure comprising: a first conductive structure including a first via portion and a plurality of first conductive lines extending from the first via portion; a second conductive structure on the first conductive structure and electrically connected to the first conductive structure via the first conductive line; as well as A first dielectric layer laterally covers the plurality of first conductive lines and includes a first portion contacting a portion of a side surface of one of the plurality of first conductive lines. 15 . The bonding structure of claim 14 , wherein the second conductive structure comprises a plurality of second conductive lines electrically connected to the plurality of first conductive lines, and the first dielectric layer laterally covers the plurality of second conductive lines. 16 . The bonding structure of claim 15 , wherein the first dielectric layer vertically overlaps a portion of the plurality of first conductive lines or a portion of the plurality of second conductive lines. 17 . The bonded structure of claim 15 , further comprising a second dielectric layer laterally encapsulating a portion of the second conductive structure, wherein the second dielectric layer laterally covers the plurality of first conductive lines. 18 . The bonding structure of claim 14 , wherein the first dielectric layer comprises a second portion spaced apart from the plurality of first conductive lines. 19 . The bonding structure of claim 18 , wherein the second portion of the first dielectric layer is closer to the first via portion than the first portion of the first dielectric layer is to the first via portion. 20 . The bonding structure of claim 14 , wherein a portion of the plurality of first conductive lines is in a region above a central region of the first via portion and is spaced apart from the first dielectric layer.

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