Power module

By setting up island copper skins in the power module and optimizing chip unit layout, the problems of electromagnetic interference and control loop miscellaneousness under low-sensitivity packages are solved, and faster response and purer signals are achieved.

CN119447079APending Publication Date: 2025-02-14ZHUZHOU CRRC TIMES SEMICON CO LTD
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Patent Information

Application Number
CN202411582240.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-07
Publication Date
2025-02-14

AI Technical Summary

Technical Problem

In the low-inductance packaging conditions, existing power modules are susceptible to electromagnetic interference and control loop miscellaneousness, resulting in limited signal interference, error control logic and ultimate performance.

Method used

By setting up island copper strips and specific chip unit arrangements in the power module, the layout and connection methods of IGBT and diode chips are optimized, the inductance of the gate control loop is reduced, and electromagnetic interference and signal delay are reduced.

Benefits of technology

The electromagnetic interference and control loop miscellaneousness reduction under low-sensitivity packaging conditions are achieved, the response speed and signal purity are improved, and the problem of erroneous control logic and limiting performance is avoided.

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Abstract

The invention belongs to the technical field of semiconductors, and particularly relates to a power module which comprises a substrate, a lining plate, a first chip unit serving as an upper tube and a second chip unit serving as a lower tube, the first chip unit is arranged at one end, close to an AC terminal, of the lining plate, and the second chip unit is arranged at one end, close to a DC terminal, of the lining plate; each of the first chip unit and the second chip unit comprises more than two pairs of IGBTs and diode chips, the IGBTs and the diode chips are arranged in a line shape, and the IGBTs in the second chip unit are located on the side close to the first chip unit; a first island copper sheet is arranged in the area, located between the first chip unit and the second chip unit, of the lining plate, a first lower tube copper sheet, connected with a lower tube G pole auxiliary terminal, of the lining plate is located at the end where an AC terminal is located, gate poles of IGBTs in the second chip unit are all connected with the first island copper sheet, and the first island copper sheet is connected with the first lower tube copper sheet. The structure is suitable for low-inductance packaging, can reduce electromagnetic interference and control loop stray inductance, and improves the response speed.
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Description

Technical Field

[0001] The invention belongs to the technical field of semiconductors, and in particular relates to a power module. Background Art

[0002] At present, most power modules at home and abroad adopt an interface layout with DC+ and DC- terminals on the same side and AC terminals on the opposite side. In power modules, there are inherent parasitic parameters on the conductors used to connect the chip to the external circuit. With the development of low-inductance packaging, the switching speed has been greatly improved. During the switching process, the main circuit current changes rapidly. Due to the large di / dt, a strong magnetic field will be generated around the main current path. The control circuit (G / S routing, including bonding wires and liner copper routing) in the magnetic field is a low-voltage circuit. The magnetic field generated by the change of the main circuit current will greatly affect the voltage VGS voltage value at both ends of the chip in the control circuit, so that the gate signal waveform at the chip end is interfered by unnecessary signals, resulting in erroneous control logic for the switching function of the chip, and even affecting the module's limit performance. In addition, some power modules have a long control circuit path and a large control circuit inductance, which is prone to signal delay and control circuit signal resonance. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide a power module suitable for low-inductance packaging, which can reduce electromagnetic interference and control loop inductance and improve response speed.

[0004] The present invention includes a substrate, a liner, a chip unit 1 as an upper tube and a chip unit 2 as a lower tube, wherein the chip unit 1 is arranged at one end of the liner close to the AC terminal, and the chip unit 2 is arranged at one end of the liner close to the DC terminal; the chip unit 1 and the chip unit 2 each include more than two pairs of IGBT and diode chips, the IGBT and diode chips in the chip unit 1 and the chip unit 2 are arranged in a straight line, and the IGBT in the chip unit 2 is located on a side close to the chip unit 1; An island copper sheet 1 is provided in the area of ​​the liner between chip unit 1 and chip unit 2. The lower tube copper sheet 1 connected to the lower tube G-pole auxiliary terminal on the liner is located at the end where the AC terminal is located and is located on one side of the chip unit 1. The gates of the IGBTs in the chip unit 2 are interconnected with the island copper sheet 1 through bonding wires, and the island copper sheet 1 is interconnected with the lower tube copper sheet 1 through inclined bonding wires.

[0005] Furthermore, the IGBT and diode chips in the chip unit 1 and the chip unit 2 are staggeredly arranged in the direction from the AC terminal to the DC terminal, and the IGBT in the chip unit 1 is located on the side close to the AC terminal.

[0006] Furthermore, an island copper sheet 2 is provided in the area of ​​the liner between the chip unit 1 and the AC terminal, and the upper tube copper sheet 1 connected to the upper tube G-pole auxiliary terminal on the liner is located at the end where the AC terminal is located, and the gates of all IGBTs in the chip unit 1 are interconnected with the island copper sheet 2 through bonding wires, and the island copper sheet 2 is interconnected with the upper tube copper sheet 1 through bonding wires.

[0007] Furthermore, the liner is connected with an upper tube E-pole auxiliary terminal and an upper tube C-pole auxiliary terminal through corresponding copper areas, and the upper tube E-pole auxiliary terminal, the upper tube C-pole auxiliary terminal and the upper tube G-pole auxiliary terminal are arranged side by side.

[0008] Furthermore, the lower tube copper sheet 2 connected to the lower tube E-pole auxiliary terminal on the lining plate is arranged side by side with the lower tube copper sheet 1, and the lower tube E-pole auxiliary terminal and the lower tube G-pole auxiliary terminal are arranged side by side.

[0009] Furthermore, the diode chip is an FRD or an SBD.

[0010] Furthermore, the liner is also provided with a thermistor and two resistor copper sheets connected to the resistor auxiliary terminals, and the thermistor is interconnected with the two resistor copper sheets through corresponding bonding wires.

[0011] Furthermore, the thermistor is located on a side of the chip unit 1 away from the lower tube copper sheet 1, and two resistor copper sheets are arranged side by side.

[0012] Furthermore, a side of the substrate facing away from the lining plate is provided with pin fins.

[0013] Furthermore, the pin fins are cylindrical, elliptical, prismatic, square, or a combination of two or more thereof.

[0014] The beneficial effect of the present invention is that the routing direction of the IGBT gate control loop in the lower tube is bonded to the island copper sheet 1 which is adjacent to the lower tube IGBT and located in the middle of the liner, and then the island copper sheet 1 is bonded to the lower tube copper sheet 1 connected to the G-pole auxiliary terminal of the lower tube. The path of the gate control loop is shorter, and the inductance of the gate control loop can be reduced by more than 30%, the control loop noise is reduced, signal delay and control loop signal resonance are avoided, the response speed is improved, and the demand for faster response drive is met; and the direction of the large current is from chip unit 1 to chip unit 2, which is opposite to the direction of the bonding wire in the aforementioned gate control loop and is perpendicular to the island copper sheet 1. Application to low-inductance packaging can greatly reduce the electromagnetic interference of the main loop current change di / dt on the gate bonding wire, avoid the gate signal waveform at the chip end from being interfered by unnecessary signals, ensure that the signal in the control loop is clean and not affected, avoid the chip's switching function from generating erroneous control logic, and also avoid affecting the module's limit performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a schematic diagram of the structure of the power module of the present invention.

[0016] In the figure: 1. substrate; 2. lining plate; 201. isolated copper skin one; 202. isolated copper skin two; 203. lower tube copper skin one; 204. lower tube copper skin two; 205. upper tube copper skin one; 3. IGBT; 4. diode chip; 5. thermistor; 6. lower tube G-pole auxiliary terminal; 7. lower tube E-pole auxiliary terminal; 8. upper tube E-pole auxiliary terminal; 9. upper tube G-pole auxiliary terminal; 10. upper tube C-pole auxiliary terminal; 11. resistor auxiliary terminal; 100. chip unit one; 200. chip unit two. DETAILED DESCRIPTION

[0017] like Figure 1 As shown, the present invention includes a substrate 1, a liner 2, a chip unit 100 as an upper tube and a chip unit 200 as a lower tube. The chip unit 100 is arranged at one end of the liner 2 close to the AC terminal, and the chip unit 200 is arranged at one end of the liner 2 close to the DC terminal (DC+ and DC-). The chip unit 100 and the chip unit 200 both include more than two pairs of IGBT3 and diode chips 4. The IGBT3 and diode chips 4 in the chip unit 100 and the chip unit 200 are arranged in a straight line. Figure 1 As shown, all IGBT3 in chip unit one 100 are arranged in a straight line along the xy direction, and the diode chip 4 in chip unit one 100 is also arranged in a straight line along the xy direction. The arrangement of IGBT3 and diode chip 4 in chip unit two 200 is the same as that of chip unit one 100, and the IGBT3 in chip unit two 200 is located on the side close to chip unit one 100, that is, the IGBT3 in chip unit two 200 is closer to chip unit one 100 than the diode chip 4.

[0018] The upper and lower surfaces of the liner 2 are covered with copper, i.e., copper skin layer, which is used for circuit interconnection. The copper coating of the liner 2 can be bare copper, or the copper surface is plated with gold, nickel, silver or other coatings. The area between the chip unit 1 100 and the chip unit 2 200 on the surface of the liner 2 is provided with an island copper skin 1 201, and the length direction of the island copper skin 1 201 is perpendicular to the connection direction of the chip unit 1 100 and the chip unit 2 200, i.e., the length direction of the island copper skin 1 201 is along the Figure 1 The xy direction in Figure 1 The liner 2 is provided with a lower tube copper sheet 203 connected to the lower tube G-pole auxiliary terminal 6. The lower tube copper sheet 203 is located at the end where the AC terminal is located on the liner 2 and is located on one side of the chip unit 100. Figure 1From the perspective, the lower tube copper foil 1 203 is located above the right side of the chip unit 200. The gates of the IGBT3 in the chip unit 200 are interconnected with the island copper foil 1 201 through bonding wires, and the island copper foil 1 201 is interconnected with the lower tube copper foil 1 203 through inclined bonding wires.

[0019] The power module provided by the present invention is based on the above-mentioned structural setting. The routing direction of the gate control loop of the IGBT3 in the lower tube is bonded to the island copper sheet 1 201 adjacent to the lower tube IGBT3 and located in the middle of the liner 2, and then the island copper sheet 1 201 is bonded to the lower tube copper sheet 1 203 connected to the lower tube G-pole auxiliary terminal 6. The path of the gate control loop is shorter, and the inductance of the gate control loop can be reduced by more than 30%, the control loop noise is reduced, the signal delay and control loop signal resonance are avoided, the response speed is improved, and the demand for faster response driving is met; and the direction of the large current is from the chip unit 1 100 to the chip unit 2 200, that is, Figure 1 The direction from the middle right to the left in the viewing angle is opposite to the direction of the bonding wire in the aforementioned gate control loop and is perpendicular to the isolated copper foil 201. The application of low-inductance packaging can greatly reduce the electromagnetic interference of the main circuit current change di / dt on the gate bonding wire, avoid the gate signal waveform at the chip end from being interfered by unnecessary signals, ensure that the signal in the control loop is clean and unaffected, avoid the chip's switching function from generating erroneous control logic, and also avoid affecting the module's ultimate performance.

[0020] The IGBT3 and the diode chip 4 in the chip unit 100 and the chip unit 2 200 are arranged alternately along the direction from the AC terminal to the DC terminal, and the IGBT3 in the chip unit 100 is located on the side close to the AC terminal. With this arrangement, the IGBT3 in the upper tube can be closer to its corresponding auxiliary terminal, and the bonding wire path is shorter, which effectively reduces the noise of its control loop.

[0021] Specifically, the area of ​​the liner 2 between the chip unit 100 and the AC terminal is provided with an island copper sheet 202, and the liner 2 is provided with an upper tube copper sheet 205 connected to the upper tube G-pole auxiliary terminal 9, and the upper tube copper sheet 205 is located at the end where the AC terminal is located, and the gates of all IGBT3 in the chip unit 100 are interconnected with the island copper sheet 202 through bonding wires, and the island copper sheet 202 is interconnected with the upper tube copper sheet 205 through bonding wires.

[0022] The liner plate 2 is connected to an upper tube E-pole auxiliary terminal 8 and an upper tube C-pole auxiliary terminal 10 through corresponding copper areas. The upper tube E-pole auxiliary terminal 8 and the upper tube C-pole auxiliary terminal 10 are both located at the end where the AC terminal is located, and are arranged side by side with the upper tube G-pole auxiliary terminal 9.

[0023] The liner 2 is provided with a lower tube copper sheet 204 connected to the lower tube E-pole auxiliary terminal 7, the lower tube copper sheet 204 is arranged side by side with the lower tube copper sheet 1 203, and the lower tube E-pole auxiliary terminal 7 and the lower tube G-pole auxiliary terminal 6 are arranged side by side. Figure 1 As shown, the IGBT3 in the lower tube are interconnected through bonding wires, and one of the IGBT3 is directly interconnected with the isolated copper sheet 202 through a bonding wire, and the bonding path is shorter.

[0024] In the present invention, the diode chip 4 is an FRD or an SBD, and in other embodiments, it may be other chips.

[0025] The liner 2 is also provided with a thermistor 5 and two resistor copper sheets connected to the resistor auxiliary terminal 11. The thermistor 5 is interconnected with the two resistor copper sheets through corresponding bonding wires. The thermistor 5 is specifically a PTC resistor. The thermistor 5 is located on the side of the chip unit 100 away from the island copper sheet 201, and the two resistor copper sheets are arranged side by side.

[0026] Among them, in the present invention, the lower tube G pole auxiliary terminal 6 and the lower tube E pole auxiliary terminal 7 are located on one side of the AC terminal, and the upper tube E pole auxiliary terminal 8, the upper tube G pole auxiliary terminal 9, the upper tube C pole auxiliary terminal 10 and the two resistor auxiliary terminals 11 are located on the other side of the AC terminal. The IGBT3 and the diode chip 4 and the liner 2 can be interconnected by Cu-Clip. The liner 2 can be ZTA, or AMB and other processes, and its ceramic insulating layer can be Al2O3 (ceramic can be doped with oxides such as ZrO2 to enhance the thermal conductivity or structural strength of the insulating layer), Si3N4, AlN and other ceramic materials or other insulating materials.

[0027] The liner 2 and the substrate 1 can be welded, sintered or transient liquid phase diffusion welded. The substrate 1 is provided with pin fins on the side facing away from the liner 2, that is, the substrate 1 is a substrate with a pin fin structure, which is mainly used for mechanical support and provides an installation interface. At the same time, it plays a vital role in the overall heat dissipation of the module. The material of the substrate 1 is a high thermal conductivity material, which can be bare copper, or the copper layer surface is plated with nickel, silver or other coatings. When in use, the heat of the chip unit 100 and the chip unit 2 200 passes through the chip sintering layer, the liner 2, and the substrate 1, and finally the heat is quickly transferred to the coolant through the pin fins. The pin fins are cylindrical, elliptical, prismatic, square, or a combination of two or more. The pin fins can be a uniform array or a non-uniform array. The circuit layout surface on the upper surface of the substrate 1 can be provided with a boss to maintain the uniformity of the welding thickness, and the boss thickness is 0.05~0.3mm.

[0028] A person skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of protection of the present application is limited to these examples. In line with the concept of the present application, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of different aspects of one or more embodiments of the present application as described above, which are not provided in detail for the sake of simplicity.

[0029] One or more embodiments of the present application are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the present application. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of one or more embodiments of the present application should be included in the protection scope of the present application.

Claims

1. A power module, characterized in that: The invention comprises a substrate (1), a liner (2), a chip unit 1 (100) as an upper tube, and a chip unit 2 (200) as a lower tube, wherein the chip unit 1 (100) is arranged at one end of the liner (2) close to the AC terminal, and the chip unit 2 (200) is arranged at one end of the liner (2) close to the DC terminal; the chip unit 1 (100) and the chip unit 2 (200) each comprise more than two pairs of IGBTs (3) and diode chips (4), the IGBTs (3) and diode chips (4) in the chip unit 1 (100) and the chip unit 2 (200) are arranged in a straight line, and the IGBTs (3) in the chip unit 2 (200) are located on a side close to the chip unit 1 (100); An island copper sheet 1 (201) is arranged in an area of ​​the liner (2) located between the chip unit 1 (100) and the chip unit 2 (200); a lower tube copper sheet 1 (203) connected to the lower tube G-pole auxiliary terminal (6) on the liner (2) is located at the end where the AC terminal is located and is located on one side of the chip unit 1 (100); the gates of the IGBTs (3) in the chip unit 2 (200) are interconnected with the island copper sheet 1 (201) through bonding wires, and the island copper sheet 1 (201) is interconnected with the lower tube copper sheet 1 (203) through inclined bonding wires.

2. The power module according to claim 1, characterized in that: The IGBT (3) and the diode chip (4) in the chip unit 1 (100) and the chip unit 2 (200) are arranged alternately along the direction from the AC terminal to the DC terminal, and the IGBT (3) in the chip unit 1 (100) is located on a side close to the AC terminal.

3. The power module according to claim 2, characterized in that: An island copper sheet 2 (202) is provided in the area of ​​the liner (2) located between the chip unit 1 (100) and the AC terminal. An upper tube copper sheet 1 (205) connected to the upper tube G-pole auxiliary terminal (9) on the liner (2) is located at the end where the AC terminal is located. The gates of all IGBTs (3) in the chip unit 1 (100) are interconnected with the island copper sheet 2 (202) through bonding wires, and the island copper sheet 2 (202) is interconnected with the upper tube copper sheet 1 (205) through bonding wires.

4. The power module according to claim 3, characterized in that: The liner (2) is connected to an upper tube E-pole auxiliary terminal (8) and an upper tube C-pole auxiliary terminal (10) via corresponding copper areas, and the upper tube E-pole auxiliary terminal (8), the upper tube C-pole auxiliary terminal (10) and the upper tube G-pole auxiliary terminal (9) are arranged side by side.

5. The power module according to any one of claims 1 to 4, characterized in that: The lower tube copper sheet 2 (204) connected to the lower tube E-pole auxiliary terminal (7) and the lower tube copper sheet 1 (203) are arranged side by side on the lining plate (2), and the lower tube E-pole auxiliary terminal (7) and the lower tube G-pole auxiliary terminal (6) are arranged side by side.

6. The power module according to any one of claims 1 to 4, characterized in that: The diode chip (4) is an FRD or an SBD.

7. The power module according to any one of claims 1 to 4, characterized in that: The lining plate (2) is also provided with a thermistor (5) and two resistor copper sheets connected to the resistor auxiliary terminals (11); the thermistor (5) is interconnected with the two resistor copper sheets via corresponding bonding wires.

8. The power module according to claim 7, characterized in that: The thermistor (5) is located on a side of the chip unit 1 (100) away from the lower tube copper sheet 1 (203), and the two resistor copper sheets are arranged side by side.

9. The power module according to any one of claims 1 to 4 and 8, characterized in that: The substrate (1) is provided with pin fins on a side facing away from the lining plate (2).

10. The power module according to claim 9, characterized in that: The pin fins are cylindrical, elliptical, prismatic, square, or a combination of two or more thereof.

Citation Information

Patent Citations

  • Power module and electronic equipment

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  • Power module

    CN205140972U

  • Multizone parallel configuration's two -sided radiating power module

    CN207165547U

  • Packaging structure of power semiconductor module

    CN220934073U