Drive circuit, power conversion circuit, and power tube driver

Abstract

The application relates to the technical field of driving circuits, in particular to a driving circuit, a power conversion circuit and a power tube driver. The driving circuit comprises a first transistor, a second transistor, a third transistor, a driving control circuit and a voltage refreshing circuit. The driving control circuit outputs a first control signal and a second control signal respectively to control the first transistor and the second transistor to alternately turn on and turn off, so that the voltage at the control electrode of the third transistor is pulled up or pulled down to control the third transistor to turn on and turn off. The voltage refreshing circuit respectively pulls down the voltage at the control electrode of the first transistor and the second transistor to release the charge accumulated at the control electrode of the first transistor and the second transistor due to ringing, so that the voltage at the control electrode of the first transistor and the second transistor is refreshed to a target value, and the first control signal and the second control signal can accurately control the action of the third transistor, so that the driving circuit can normally work.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of driving circuit, and in particular, to a driving circuit, a power conversion circuit and a power tube driver. BACKGROUND

[0002] In the technical field of power conversion circuit, a driving circuit is usually needed to drive the conduction and turn-off of a high-side power tube, so as to realize the adjustment of the output power of the power conversion circuit.

[0003] In the related art, due to the existence of parasitic inductance in the circuit, the ringing phenomenon will occur on the driving circuit in the current signal transmission process, and the ringing phenomenon will cause a certain amount of charge accumulation in the driving circuit. When the charge accumulates to a certain extent, the amount of charge stored in the driving circuit exceeds the amount of charge change caused by the control signal, that is, the amount of charge accumulation will affect the amount of voltage adjustment of the control signal to a certain control node, so that the voltage value of the control node cannot be accurately adjusted to the target voltage value, thereby affecting the control accuracy of the driving circuit, causing the driving work of the driving circuit to fail, and finally causing the circuit to malfunction. SUMMARY

[0004] The present application provides a driving circuit, a power conversion circuit and a power tube driver to solve the technical problem that the ringing phenomenon in the related art affects the control accuracy of the driving circuit, and continuously refreshes the potential of the control node, so that the potential of the control node is always clamped to the target voltage value, thereby ensuring that the control signal can accurately control the normal operation of each device, thereby ensuring the normal operation of the circuit.

[0005] In a first aspect, the present application provides a driving circuit, which comprises a first transistor, a second transistor, a third transistor, a driving control circuit and a voltage refresh circuit.

[0006] The driving control circuit comprises an input end, a first output end and a second output end, the input end of the driving control circuit is configured to receive a driving control signal, the driving control circuit is configured to perform signal processing on the driving control signal to generate a first control signal and a second control signal with opposite logic states, and the first output end and the second output end are configured to output the first control signal and the second control signal, respectively.

[0007] The first output end of the drive control circuit is connected with the first electrode of the first transistor, the second electrode of the first transistor is used for being connected with the output end of the power supply circuit; the second output end of the drive control circuit is connected with the first electrode of the second transistor, the second electrode of the second transistor is also used for being connected with the output end of the power supply circuit; the first output end of the drive control circuit is also connected with the control electrode of the second transistor, and the second output end of the drive control circuit is also connected with the control electrode of the first transistor;

[0008] The second output end of the drive control circuit is also connected with the control electrode of the third transistor, the first electrode of the third transistor is used for being connected with the output end of the power supply circuit, and the second electrode of the third transistor is used for outputting the switch control signal;

[0009] The voltage refreshing circuit comprises a refreshing control circuit, a first current source branch and a second current source branch; the input end of the first current source branch is connected with the first electrode of the first transistor, and the input end of the second current source branch is connected with the first electrode of the second transistor;

[0010] The refreshing control circuit is used for collecting the drive voltage signal on the control electrode of the third transistor and the switch control signal, and determining whether the voltage difference between the drive voltage signal and the switch control signal is greater than or equal to the threshold voltage of the third transistor, if yes, generating the first refreshing control signal, and if no, generating the second refreshing control signal;

[0011] The first refreshing control signal is used for controlling the first current source branch to be turned on to form a current loop, so as to pull down the voltage at the first electrode of the first transistor to a first voltage value; and the second refreshing control signal is used for controlling the second current source branch to be turned on to form a current loop, so as to pull down the voltage at the first electrode of the second transistor to a second voltage value.

[0012] In a possible design, the refreshing control circuit comprises a comparator and a control unit;

[0013] The noninverting input end of the comparator is connected with the control electrode of the third transistor, so as to collect the drive voltage signal on the control electrode of the third transistor; the inverting input end of the comparator is connected with the second electrode of the third transistor, so as to collect the switch control signal; and the comparator is used for comparing whether the voltage difference between the drive voltage signal and the switch control signal is greater than or equal to the threshold voltage of the third transistor, and outputting a first comparison signal;

[0014] The control unit is used for generating the first refreshing control signal or the second refreshing control signal according to the logic state of the first comparison signal.

[0015] In one possible design, the drive control circuit includes a first inverter, a second inverter, a buffer, a first capacitor, and a second capacitor;

[0016] The output end of the first inverter is connected to the input end of the buffer, the output end of the buffer is connected to the first end of the first capacitor, and the second end of the first capacitor is connected to the first electrode of the first transistor; the input end of the first inverter is the input end of the drive control circuit, and the second end of the first capacitor is the first output end of the drive control circuit;

[0017] The output end of the first inverter is also connected to the input end of the second inverter, the output end of the second inverter is connected to the first end of the second capacitor, the second end of the second capacitor is connected to the first electrode of the second transistor, and the second end of the second capacitor is the second output end of the drive control circuit.

[0018] In one possible design, the refresh control circuit includes a first control signal output terminal and a second control signal output terminal;

[0019] The first control signal output terminal is used to output a first refresh control signal, and the second control signal output terminal is used to output a second refresh control signal.

[0020] In one possible design, the first current source branch includes a first current source and a first switching tube; the output end of the first current source is grounded, the input end of the first current source is connected to the first electrode of the first switching tube, the second electrode of the first switching tube is the input end of the first current source branch, and the second electrode of the first switching tube is connected to the first electrode of the first transistor; the first control signal output end is connected to the control electrode of the first switching tube.

[0021] In one possible design, the second current source branch includes a second current source and a second switching tube; the output end of the second current source is grounded, the input end of the second current source is connected to the first electrode of the second switching tube, the second electrode of the second switching tube is the input end of the second current source branch, and the second electrode of the second switching tube is connected to the first electrode of the second transistor; the second control signal output end is connected to the control electrode of the second switching tube.

[0022] In one possible design, the driving circuit includes a power supply circuit, an input end of the power supply circuit is used to connect to a power supply, and an output end of the power supply circuit is used to output a supply voltage.

[0023] In a second aspect, the present application further provides a power conversion circuit, which includes the driving circuit as described above.

[0024] In a third aspect, the present application provides a power tube driver, which comprises the driving circuit as described above.

[0025] In a fourth aspect, the present application provides a power conversion device, which comprises the driving circuit as described above.

[0026] The driving circuit provided by the first aspect has the following advantages. The first control signal and the second control signal are respectively output by the driving control circuit to control the first transistor and the second transistor to be alternately turned on and turned off, so as to control the voltage at the control electrode of the third transistor to be pulled high or pulled low, thereby controlling the third transistor to be turned on and turned off. In each working cycle, the voltage refreshing circuit can respectively pull down the voltage at the control electrode of the first transistor and the second transistor to release the charge accumulated at the control electrode of the first transistor and the second transistor due to ringing, thereby ensuring that the voltage at the control electrode of the first transistor and the second transistor is refreshed to the target value in each cycle, so as to ensure that the first control signal and the second control signal can accurately control the action of the third transistor, thereby ensuring that the driving circuit works normally.

[0027] The second aspect and the possible designs of the second aspect have the advantages as described above with respect to the first aspect and the possible designs of the first aspect, which will not be repeated here. BRIEF DESCRIPTION OF DRAWINGS

[0028] Figure 1 A driving circuit structure schematic diagram provided by the present application for related technologies of embodiments of the present application;

[0029] Figure 2 One of the waveform diagrams of internal voltage signals and current signals of the driving circuit provided by the present application;

[0030] Figure 3 A driving circuit structure schematic diagram provided by the present application for related technologies of embodiments of the present application;

[0031] Figure 4 The second waveform diagram of internal voltage signals and current signals of the driving circuit of the present application. DETAILED DESCRIPTION

[0032] In the present application, "at least one" means one or more, and "multiple" means two or more. The "and / or" describes the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B can represent the following three cases: A exists alone, A and B exist together, and B exists alone, where A and B can be singular or plural. The character " / " generally represents an "or" relationship between the associated objects before and after it. "At least one of the following" or similar expressions means any combination of these items, including any combination of single or multiple items. For example, at least one of a, b or c alone can represent: a alone, b alone, c alone, combination of a and b, combination of a and c, combination of b and c, or combination of a, b and c, where a, b and c can be single or multiple. In addition, the terms "first", "second" are only for descriptive purposes, and cannot be understood as indicating or implying relative importance.

[0033] The terms "center", "longitudinal", "transverse", "upper", "lower", "left", "right", "front", "back", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, which is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application.

[0034] The terms "connected" and "connected" should be broadly understood, for example, the "connected" or "connected" of the circuit structure can mean not only physical connection, but also electrical connection or signal connection, for example, it can be directly connected, that is, physically connected, or indirectly connected through at least one element in the middle as long as the circuit is connected, and it can also be the connection inside two elements; In addition to signal connection through circuit, signal connection through media medium, such as radio waves, can also be referred to. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0035] The transistor in the present application is a three-terminal transistor, and the three terminals thereof are a control electrode, a first electrode and a second electrode. The transistor can be a bipolar transistor or a field effect transistor, etc. For example, when the transistor is a bipolar transistor, the control electrode thereof refers to the base electrode of the bipolar transistor, and the first electrode can be the collector electrode or the emitter electrode of the bipolar transistor, and the corresponding second electrode can be the emitter electrode or the collector electrode of the bipolar transistor; when the transistor is a field effect transistor, the control electrode thereof refers to the gate electrode of the field effect transistor, and the first electrode can be the drain electrode or the source electrode of the field effect transistor, and the corresponding second electrode can be the source electrode or the drain electrode of the field effect transistor. In addition, the switch in the present application can also be a three-terminal switch, and the three terminals thereof are a control electrode, a first electrode and a second electrode, when the switch is a bipolar transistor, the control electrode thereof refers to the base electrode of the bipolar transistor, and the first electrode can be the collector electrode or the emitter electrode of the bipolar transistor, and the corresponding second electrode can be the emitter electrode or the collector electrode of the bipolar transistor; when the switch is a field effect transistor, the control electrode thereof refers to the gate electrode of the field effect transistor, and the first electrode can be the drain electrode or the source electrode of the field effect transistor, and the corresponding second electrode can be the source electrode or the drain electrode of the field effect transistor.

[0036] The ringing phenomenon refers to a periodic oscillation phenomenon occurring in a circuit or a system, usually having multiple harmonic components, having a certain amplitude and frequency. This phenomenon is often caused by the existence of a feedback loop in the circuit or system, so that the signal is repeatedly amplified and acts on the input end again after passing through the loop, thereby causing the oscillation and distortion of the output signal. The occurrence of the ringing phenomenon will affect the normal operation of the circuit or system, leading to signal distortion, error increase, system stability reduction and other problems.

[0037] The ringing phenomenon can be caused by multiple factors, and the most common factor is parasitic inductance. Parasitic inductance usually exists in a circuit, so during current signal transmission, the ringing phenomenon will occur on the driving circuit. The ringing phenomenon will cause a certain amount of charge accumulation in the driving circuit. When the charge accumulates to a certain extent, the amount of charge stored in the driving circuit exceeds the amount of charge change brought by the control signal, which causes the voltage value of the control node to be unable to be accurately adjusted to the target voltage value, thereby affecting the control accuracy of the driving circuit.

[0038] In order to overcome the influence of ringing phenomenon on the circuit, the related art usually adopts the way of optimizing the layout of each component on the circuit board. For example, for the case that there is a long transmission line or a large number of high-speed logic gate circuits in the circuit, the ringing phenomenon can be reduced by optimizing the PCB (Printed Circuit Board) layout, such as strengthening the power supply and grounding, shortening the signal transmission line, etc. In addition, for the digital controller, the ringing phenomenon can be eliminated by parameter selection method or ringing factor elimination method. For example, the inertia time constant and the sampling period of the expected closed-loop transfer function are reasonably selected, or the factors causing the ringing phenomenon in the digital controller are found out and artificially eliminated to change the dynamic characteristics of the digital controller, so as to suppress the ringing phenomenon.

[0039] However, through the test of the actual application scene, it is found that the way of optimizing the PCB layout provided in the related art has a limited effect on eliminating the ringing phenomenon, and in a complex circuit structure, the way of optimizing the PCB layout still cannot solve the way of charge accumulation in the circuit, so that when the amount of charge accumulates to a certain degree after the circuit works for a plurality of cycles, the voltage of the control node in the circuit is still affected, thereby affecting the adjustment of the control node potential, causing the driving work of the driving circuit to fail, and finally causing the circuit to malfunction.

[0040] Figure 1 A driving circuit structure diagram provided by the related art of the embodiments of the present application is shown in Figure 1As shown, the driving circuit includes transistor M1, transistor M2, transistor M3, inverter INV11, inverter INV12, buffer Buf10, capacitor C10 and capacitor C20. The power supply terminal PAD_V0 is connected to an external power supply, L1 is a parasitic inductance in the circuit, V0 is a power supply terminal inside the driving circuit, which is used to connect internal components. The output end of the control signal receiving terminal HSD_VIN is connected to the input end of the inverter INV11, the output end of the inverter INV11 is connected to the input end of the buffer Buf10, the output end of the buffer Buf10 is connected to the first electrode of the transistor M1 through the capacitor C10, and the second electrode of the transistor M1 is connected to the power supply terminal V0. The output end of the inverter INV11 is also connected to the input end of the inverter INV12, the output end of the inverter INV12 is connected to the first electrode of the transistor M2 through the capacitor C20, and the second electrode of the transistor M2 is connected to the power supply terminal V0. The output end of the inverter INV12 is also connected to the control electrode of the transistor M1 through the capacitor C20, and the output end of the buffer Buf10 is connected to the control electrode of the transistor M2 through the capacitor C10. The output end of the inverter INV12 is also connected to the control electrode of the transistor M3 through the capacitor C20. The first electrode of the transistor M3 is used to output the switch control signal S1, and the second electrode of the transistor M3 is also connected to the power supply terminal V0.

[0041] Wherein, the control signal receiving terminal HSD_VIN receives an input control signal, which is used to control the conduction or turn-off of the transistor M3, assuming that the control signal is a high-low level signal, the high level signal is used to control the opening of the transistor M3, and the low level signal is used to control the closing of the transistor M3. Assuming that the supply voltage of the inverter INV11 and the inverter INV12 in the present application is VCC, and the supply voltage on the power supply terminal V0 is V0. Please refer to Figure 1 As shown, since there are parasitic diodes on the transistor M1 and the transistor M2, assuming that the conduction voltage drop of the parasitic diode in the present embodiment is Vdiode, when the transistor M1 and the transistor M2 are turned off, since the parasitic diode is a path, Figure 1 The voltage at points A and C in the middle can be represented as (V0-Vdiode). When it is necessary to control the transistor M3 to open, the high level signal is input to the signal receiving terminal HSD_VI, at this time the voltage at point C will become (V0-Vdiode+VCC), at this time, the transistor M1 and the transistor M3 are turned on, and the transistor M2 is turned off, at this time, the voltage at point B and the switch control signal S1 is V0. When it is necessary to turn off the transistor M3, the low level signal is input to the signal receiving terminal HSD_VI, at this time, the voltage at point B will become (V0+VCC), at this time, the transistor M2 is turned on, and the voltage value at point C is biased to V0, at this time, the transistor M3 is turned off.

[0042] It can be understood that when the voltage difference between the control electrode and the first electrode of the transistor M3 is greater than the threshold voltage of the transistor M3, the transistor M3 is turned on, and when the voltage difference between the control electrode and the first electrode is less than the threshold voltage, the transistor M3 is turned off. Figure 1 In the driving circuit, when transistor M3 is off, the voltage of the switch control signal S1 is V0, and the voltage value at point C is also V0. At this time, the voltage difference between the control electrode and the first electrode of M3 is 0. When transistor M3 is on, the voltage of the switch control signal S1 is V0, and the voltage value at point C is (V0-Vdiode+VCC). At this time, the voltage difference between the control electrode and the first electrode of transistor M3 is (VCC-Vdiode). In order to turn on transistor M3, in an actual circuit, according to the parameters of each component, it is necessary to set the voltage difference (VCC-Vdiode) to be greater than the conduction threshold of transistor M3.

[0043] Please continue to see Figure 1 As shown, the current inside the driving circuit comes from the power supply terminal PAD_V0. Due to the presence of parasitic inductance L1 in the circuit, in actual operation, when the current flows from the power supply terminal PAD_V0 to the internal power supply terminal V0, when the current slope changes, the current will generate ringing on the parasitic inductance L1.

[0044] Figure 2 This is one of the waveform diagrams of the voltage signal and current signal inside the driving circuit provided in this application, please refer to Figure 2 As shown, Figure 2 In the equation, Vc is Figure 1 The voltage signal on the receiving terminal HSD_VIN is I1. Figure 1 The current signal on the parasitic inductor L1, V0 is the voltage signal on the power supply terminal V0, and Vb is Figure 1 The voltage signal V1 at point B is the voltage difference between the control electrode and the first electrode of the transistor M3.

[0045] See Figure 2 As shown in the figure, within a switching cycle, at time t0, the voltage signal Vc on HSD_VIN changes from a low level to a high level, and the voltage difference V1 between the control electrode and the first electrode of the transistor M3 changes from 0 to greater than the threshold voltage, at which time the transistor M3 is turned on. At the same time, at time t0, the slope of the current signal I1 on the parasitic inductance L1 changes, and at this time, ringing occurs in the voltage signal V0, which will cause Figure 1 Charge accumulation occurs at point B, so Figure 1The voltage signal of point B accumulates voltage difference ΔV. Since voltage difference ΔV is generated each time the ringing phenomenon occurs, if a plurality of periods elapses, the voltage signal Vb of point B accumulates a plurality of voltage differences, and the voltage value of the voltage signal Vb increases. When the ringing phenomenon occurs a plurality of times, if the sum of the voltage differences accumulated by point B exceeds the voltage variation amount caused by the voltage signal Vc, then Figure 1 the voltage of point B is always higher than (V0+VCC), at this time, even if the voltage signal Vc changes from low to high, the voltage of point B cannot be pulled below (V0+VCC), then transistor M2 is always on, so that Figure 1 the voltage of point C is always equal to V0, at this time, the voltage of the control electrode of transistor M1 is always V0, so transistor M1 cannot be turned on, that is, the voltage of point B cannot be refreshed to the normal voltage V0, and thus transistor M3 cannot be normally turned off, so that the driving circuit cannot be modulated according to the normal duty cycle signal, the driving circuit cannot satisfy the volt-second balance, thereby affecting the control accuracy of the driving circuit, causing the driving circuit to fail, and causing a circuit failure.

[0046] In another working condition, correspondingly, if the ringing phenomenon has a greater impact on the voltage value of point C, then the voltage signal of point C accumulates a plurality of voltage differences, which causes the voltage value of the voltage signal of point C to be always high, and thus transistor M1 is always in the on state, transistor M2 cannot be turned on, and transistor M3 is always on, that is, transistor M3 cannot be normally turned off. This also causes the driving circuit to fail, and causes a circuit failure.

[0047] In order to overcome the above-mentioned deficiencies in the related art, the present application provides a driving circuit, which comprises a first transistor, a second transistor, a third transistor, a driving control circuit and a voltage refreshing circuit. The first output end of the driving control circuit is connected with the first electrode of the first transistor, and the second electrode of the first transistor is connected with the output end of a power supply circuit. The second output end of the driving control circuit is connected with the first electrode of the second transistor, and the second electrode of the second transistor is also connected with the output end of the power supply circuit. The first output end of the driving control circuit is also connected with the control electrode of the second transistor, and the second output end of the driving control circuit is also connected with the control electrode of the first transistor. The second output end of the driving control circuit is also connected with the control electrode of the third transistor, the first electrode of the third transistor is connected with the output end of the power supply circuit, and the second electrode of the third transistor is used for outputting a switching control signal. In one working cycle, the driving control circuit outputs a first control signal and a second control signal respectively to control the first transistor and the second transistor to be turned on and turned off alternately, so as to control the voltage at the control electrode of the third transistor to be pulled up or pulled down, thereby controlling the third transistor to be turned on and turned off. In each working cycle, the voltage refreshing circuit can pull down the voltage at the control electrode of the first transistor and the second transistor respectively to release the charge accumulated at the control electrode of the first transistor and the second transistor due to ringing, thereby ensuring that the voltage at the control electrode of the first transistor and the second transistor is refreshed to a target value in each cycle, so as to ensure that the first control signal and the second control signal can accurately control the action of the third transistor, thereby ensuring that the driving circuit works normally.

[0048] Figure 3 For the driving circuit structure diagram provided by the embodiment of the present application, please refer to Figure 3 The driving circuit comprises a first transistor Q1, a second transistor Q2, a third transistor Q3, a driving control circuit 10 and a voltage refreshing circuit 20.

[0049] The driving control circuit 10 comprises an input end, a first output end and a second output end. The input end of the driving control circuit 10 is configured to receive a driving control signal. The driving control circuit is configured to perform signal processing on the driving control signal to generate a first control signal and a second control signal with opposite logic states. The first output end and the second output end of the driving control circuit 10 are configured to output the first control signal and the second control signal, respectively. In this embodiment, the opposite logic states of the first control signal and the second control signal refer to, for example, the logic state of the first control signal is a high-level pulse signal, and the logic state of the second control signal is a low-level pulse signal; or if the logic state of the first control signal is a low-level pulse signal, the logic state of the second control signal is a high-level pulse signal. Since the first control signal and the second control signal are used to control the turn-on and turn-off of the first transistor Q1 and the second transistor Q2, respectively, in order to achieve the periodic control of the turn-on and turn-off of the first transistor Q1 and the second transistor Q2, the logic states of the first control signal and the second control signal are opposite in this embodiment to achieve the above purpose.

[0050] The first output end of the driving control circuit 10 is connected with the first electrode of the first transistor Q1. The second electrode of the first transistor Q1 is configured to be connected with the output end of the power supply circuit. The second output end of the driving control circuit 10 is connected with the first electrode of the second transistor Q2. The second electrode of the second transistor Q2 is also configured to be connected with the output end of the power supply circuit. The first output end of the driving control circuit 10 is further connected with the control electrode of the second transistor Q2. The second output end of the driving control circuit 10 is further connected with the control electrode of the first transistor Q1. In this way, the first control signal and the second control signal output by the first output end and the second output end of the driving control circuit 10 can control the turn-on and turn-off of the first transistor Q1 and the second transistor Q2 alternately.

[0051] The second output end of the driving control circuit 10 is further connected with the control electrode of the third transistor Q3. The first electrode of the third transistor Q3 is configured to be connected with the output end of the power supply circuit. The second electrode of the third transistor Q3 is configured to output a switching control signal. In this way, the first control signal and the second control signal output by the driving control circuit 10 can control the turn-on and turn-off of the first transistor Q1 and the second transistor Q2 alternately, so as to pull up or pull down the voltage at the control electrode of the third transistor Q3, thereby controlling the turn-on and turn-off of the third transistor Q3, to achieve the purpose of controlling the opening and closing of the driving circuit.

[0052] The voltage refreshing circuit 20 comprises a refreshing control circuit, a first current source branch 201 and a second current source branch 202. The input end of the first current source branch 201 is connected with the first electrode of the first transistor Q1. The input end of the second current source branch 202 is connected with the first electrode of the second transistor Q2.

[0053] The refresh control circuit is configured to collect the driving voltage signal and the switch control signal on the control electrode of the third transistor Q3, and determine whether the voltage difference between the driving voltage signal and the switch control signal is greater than or equal to the threshold voltage of the third transistor Q3, and generate the first refresh control signal if yes, or generate the second refresh control signal if no. The first refresh control signal is configured to control the first current source branch 201 to be turned on to form a current loop, so that the current loop formed can consume the accumulated charge at the first electrode of the first transistor Q1, thereby pulling down the voltage at the first electrode of the first transistor Q1 to the first voltage value. The second refresh control signal is configured to control the second current source branch 202 to be turned on to form a current loop, so that the current loop formed can consume the accumulated charge at the first electrode of the second transistor Q2, thereby pulling down the voltage at the first electrode of the second transistor Q2 to the second voltage value.

[0054] It can be seen that the driving circuit provided by the embodiment is used. The first control signal and the second control signal are respectively output by the driving control circuit to control the first transistor and the second transistor to be turned on and turned off alternately, so as to control the voltage at the control electrode of the third transistor to be pulled up or pulled down, so as to control the third transistor to be turned on and turned off. In each working period, the voltage refresh circuit can generate the corresponding first refresh control signal or the second refresh control signal according to the voltage difference between the driving voltage signal and the switch control signal, so as to control the first current source branch 201 or the second current source branch 202 to form a conduction loop. In this way, the voltage at the control electrode of the first transistor and the second transistor can be pulled down respectively, so as to release the charge accumulated at the control electrode of the first transistor and the second transistor due to ringing, thereby ensuring that the voltage at the control electrode of the first transistor and the second transistor is refreshed to the target value in each period, so as to ensure that the first control signal and the second control signal can accurately control the action of the third transistor, thereby ensuring that the driving circuit works normally.

[0055] Please continue to refer to Figure 3 As shown in FIG. 1, in some embodiments, the refresh control circuit includes a comparator COMP and a control unit 203. The non-inverting input terminal of the comparator COMP is connected with the control electrode of the third transistor Q3 to collect the driving voltage signal on the control electrode of the third transistor Q3; the inverting input terminal of the comparator COMP is connected with the second electrode of the third transistor Q3 to collect the switch control signal SW output by the second electrode of the third transistor Q3; the comparator COMP is configured to compare whether the voltage difference between the driving voltage signal and the switch control signal is greater than or equal to the threshold voltage of the third transistor Q3, and output a first comparison signal through the output terminal F; the control unit 203 is configured to generate the first refresh control signal or the second refresh control signal according to the logic state of the first comparison signal.

[0056] In some embodiments, the first comparison signal can have different logic states, for example, the first comparison signal can be a high level pulse signal or a low level pulse signal in a digital circuit, when the first comparison signal is in different logic states, it means that the comparison result of the voltage difference between the driving voltage signal and the switch control signal SW and the threshold voltage of the third transistor Q3 is different. For example, if the output first comparison signal is a high level pulse signal, it is determined that the voltage difference between the driving voltage signal and the switch control signal SW is greater than or equal to the threshold voltage of the third transistor Q3, and the control unit 203 generates the first refresh control signal; if the output first comparison signal is a low level pulse signal, it is determined that the voltage difference between the driving voltage signal and the switch control signal is less than the threshold voltage of the third transistor Q3, and the control unit 203 generates the second refresh control signal.

[0057] In some embodiments, the driving control circuit 10 includes a first inverter INV1, a second inverter INV2, a buffer Buf1, a first capacitor C1 and a second capacitor C2. Wherein, the input end HSD_ON of the driving control circuit 10 is connected with the input end of the first inverter INV1, that is, the input end of the first inverter INV1 is the input end of the driving control circuit 10, the output end of the first inverter INV1 is connected with the input end of the buffer Buf1, the output end of the buffer Buf1 is connected with the first end of the first capacitor C1, and the second end of the first capacitor C1 is connected with the first electrode of the first transistor Q1; the second end of the first capacitor C1 is the first output end of the driving control circuit 10, and the potential corresponding to the first output end of the driving control circuit 10 is Figure 3 the voltage at point A in the middle, that is, the voltage at the first output end of the driving control circuit 10 is Figure 3 the voltage at point A in the middle. In addition, the output end of the first inverter INV1 is also connected with the input end of the second inverter INV2, the output end of the second inverter INV2 is connected with the first end of the second capacitor C2, and the second end of the second capacitor C2 is connected with the first electrode of the second transistor Q2. The second end of the second capacitor C2 is the second output end of the driving control circuit 10.

[0058] It can be understood that, in the embodiment, the drive control circuit 10 makes the first output end and the second output end output the first control signal and the second control signal with opposite logic states through the combination of the first inverter INV1, the second inverter INV2, and the buffer Buf1. Assuming that the supply voltage of the first inverter INV1, the second inverter INV2, and the buffer Buf1 is VCC, when the first control signal is a high-level pulse signal, the supply voltage VCC charges the first capacitor C1, so that the voltage at the second end of the first capacitor C1 is VCC; or when the second control signal is a high-level pulse signal, the supply voltage VCC charges the second capacitor C2, so that the voltage at the second end of the second capacitor C2 is VCC. Then, according to whether the first transistor Q1 and the second transistor Q2 are turned on, it can be determined Figure 3 the voltage values of the points A and HSD, and further determine whether the third transistor Q3 is turned on.

[0059] In some embodiments, please continue to refer to Figure 3 As shown in FIG. 8, the refresh control circuit includes a first control signal output end E and a second control signal output end D; the first control signal output end E is configured to output a first refresh control signal, and the second control signal output end D is configured to output a second refresh control signal. Specifically, the control unit 203 is provided with the first control signal output end E and the second control signal output end D to output the first refresh control signal and the second refresh control signal.

[0060] Please continue to refer to Figure 3 As shown in FIG. 8, in some embodiments, the first current source branch 201 includes a first current source IDC1 and a first switch tube K1; the output end of the first current source IDC1 is connected to the ground GND, the input end of the first current source IDC1 is connected to the first pole of the first switch tube K1, the second pole of the first switch tube K1 is the input end of the first current source branch 201, the second pole of the first switch tube K1 is connected to the first pole of the first transistor Q1; the control pole of the first switch tube K1 is connected to the first control signal output end E. In this way, the first control signal output end E can output the first refresh control signal to control the turn-on and turn-off of the first switch tube K1, so as to control whether the first current source branch 201 is turned on to form a current loop.

[0061] Please continue to refer to Figure 3As shown, in some embodiments, the second current source branch 202 includes a second current source IDC2 and a second switch tube K2; the output end of the second current source IDC2 is grounded GND, the input end of the second current source IDC2 is connected with the first pole of the second switch tube K2, the second pole of the second switch tube K2 is the input end of the second current source branch 202, the second pole of the second switch tube K2 is connected with the first pole of the second transistor Q2; the second control signal output end is connected with the control pole of the second switch tube K2. In this way, the second control signal output end D can output the second refresh control signal to control the turn-on and turn-off of the second switch tube K2, so as to control whether the second current source branch 202 is turned on to form a current loop.

[0062] Please continue to see Figure 3 As shown, in some embodiments, the driving circuit includes a power supply circuit, the input end PAD_VIN of the power supply circuit is used for connecting a power supply, and the output end of the power supply circuit is used for outputting a power supply voltage VIN for supplying power to various devices inside the circuit.

[0063] It can be understood that the input end PAD_VIN of the power supply circuit is generally connected with an external total power supply terminal, and then the power supply circuit processes the input electrical signal to obtain electrical signals suitable for various devices, and outputs these electrical signals from the output end. Between the input end PAD_VIN and the output end of the power supply circuit, there is a parasitic inductance PAR_IND, and when the slope of the current in the circuit changes, the current will ring on the parasitic inductance PAR_IND, thereby affecting the voltage values of points A and HSD.

[0064] In some embodiments, the driving circuit further includes a transistor LSD and a voltage output end VOUT, the transistor LSD is controlled to be turned on, the switch control signal SW is pulled down to a low level, and the voltage output end VOUT is used for outputting a discharge voltage signal to the outside.

[0065] Figure 4 For the second waveform diagram of various voltage signals and current signals inside the driving circuit of the present application, please see Figure 4 As shown, Figure 4 HSD_ON in Figure 3 the voltage waveform diagram of the input end HSD_ON of the driving control circuit 10 in

[0066] Figure 4 V2 in is the voltage difference signal waveform diagram of the driving voltage signal and the switch control signal SW, in other words, V2 is Figure 3 the voltage difference signal waveform diagram between the control pole and the first pole of the third transistor Q3 in Figure 4 IND in Figure 3Schematic diagram of the current signal waveform on the parasitic inductance PAR_IND; Figure 4 The VIN in Figure 3 A schematic diagram of the waveform of the voltage signal at the output end of the power supply circuit; Figure 4 F in Figure 3 A schematic diagram of a waveform of a first comparison signal at an output terminal of the comparator COMP; Figure 4 The E in Figure 3 A schematic diagram of a waveform of a first refresh control signal outputted by the first control signal output terminal E; Figure 4 D in Figure 3 A schematic diagram of a waveform of a second refresh control signal outputted by the second control signal output terminal D;

[0067] Figure 4 A in Figure 3 Schematic diagram of the waveform of the voltage signal on the control electrode of the second transistor Q2 in FIG. Figure 4 A in Figure 3 Schematic diagram of the waveform of the voltage signal on the first electrode of the first transistor Q1.

[0068] Please continue to see Figure 3 and Figure 4 As shown, within a switching cycle, at time t1, when the voltage signal on HSD_ON changes from a low level to a high level, the first transistor Q1 is controlled to be turned on and the second transistor Q2 is controlled to be turned off. The voltage difference between the drive voltage signal and the switch control signal SW is greater than the threshold voltage of the third transistor Q3. That is, the voltage difference V2 between the control electrode and the first electrode of the third transistor Q3 changes from 0V to greater than the threshold voltage of the third transistor Q3, and the third transistor Q3 is turned on. Correspondingly, when the voltage signal on HSD_ON changes from a high level to a low level, the first transistor Q1 is controlled to be turned off and the second transistor Q2 is controlled to be turned on. The voltage difference between the drive voltage signal and the switch control signal SW is 0V, that is, the voltage difference between the drive voltage signal and the switch control signal SW is less than the threshold voltage of the third transistor Q3, and the third transistor Q3 is controlled to be turned off.

[0069] At the same time, at time t1, the slope of the current signal IND on the parasitic inductance PAR_IND changes, and the power supply voltage signal VIN rings, which will cause Figure 3 Charge accumulation occurs at point A, so Figure 3The voltage signal at point A accumulates a voltage difference of ΔV. Since a voltage difference of ΔV is generated at point A each time a ringing phenomenon occurs, after multiple cycles, the voltage signal at point A accumulates multiple voltage differences, which will cause the voltage value of the voltage signal to increase. When the sum of the accumulated voltage differences at point A exceeds the voltage change caused by the power supply voltage VCC of the first inverter INV1 after multiple ringing phenomena occur, then Figure 3 The voltage at point A in the circuit will always be higher than (VIN+VCC). At this time, even if the driving control signal HSD_ON changes from a low level to a high level, the voltage at point A cannot be pulled down to below (VIN+VCC). The second transistor Q2 will be turned on all the time, making Figure 3 The voltage at the HSD point is always equal to VIN, that is, the voltage of the control electrode of the first transistor Q1 is always VIN at this time, so the first transistor Q1 cannot be controlled to be turned on, that is, the voltage at point A cannot be refreshed to the normal voltage VIN, which in turn causes the third transistor Q3 to be unable to be turned off normally, that is, the drive circuit cannot be modulated according to the normal duty cycle signal, and the drive circuit cannot meet the volt-second balance, thereby affecting the control accuracy of the drive circuit, causing the drive circuit to fail and causing circuit failure. In another working condition, correspondingly, if the ringing phenomenon has a greater impact on the voltage value of the HSD point, then after the voltage signal of the HSD point accumulates multiple voltage differences, the voltage value of the voltage signal of the HSD point will be always high, causing the first transistor Q1 to be always in the on state, causing the second transistor Q2 to be unable to open, and causing the third transistor Q3 to be always on, that is, the third transistor Q3 cannot be turned off normally. This will also cause the drive circuit to fail and cause circuit failure.

[0070] According to the driving circuit provided in this embodiment, the driving circuit includes a voltage refresh circuit, please continue to refer to Figure 3 As shown, during the first half of a working cycle, at time t1, when the drive control signal HSD_ON switches from a low-level signal to a high-level signal, the first transistor Q1 is turned on, and the third transistor Q3 is controlled to be turned on. The voltage value at point A is (VIN-Vdiode+VCC). At this time, the voltage difference between the control electrode and the first electrode of the third transistor Q3 is (VCC-Vdiode). Due to signal hysteresis, at time t2, the voltage difference signal F output by the comparator COMP changes from 0V to a high-level signal. The control unit 203 then outputs the first refresh control signal E, i.e., the first refresh control signal E switches from a low-level signal to a high-level signal, to control the first switch K1 to be turned on, thereby controlling the first current source branch 201 to be turned on to form a current loop, thereby releasing the charge accumulated at point A, i.e., pulling the voltage at point A down to VIN, thereby ensuring that in the next cycle, the second control signal can be output to control the normal shutdown of the second transistor Q2, thereby driving the third transistor Q3 to be turned on.

[0071] wherein Vdiode is the on voltage drop of the freewheeling diode in the second transistor Q2 or the third transistor Q3. It can be understood that in the circuit of the embodiment, the second transistor Q2 and the third transistor Q3 can adopt transistors of the same specification, and thus the freewheeling diodes in the second transistor Q2 and the third transistor Q3 have the same voltage drop.

[0072] Correspondingly, please continue to refer to Figure 3 As shown in the figure, in the second half of a working cycle, when the driving control signal HSD_ON is switched from a high-level signal to a low-level signal, the first transistor Q1 is controlled to be turned off, at this time, the control electrode of the second transistor Q2 is at a high level, and thus the second transistor Q2 is turned on, at this time, the voltage of the control electrode of the third transistor Q3 is pulled down to VIN, and thus the third transistor Q3 is controlled to be turned off, at this time, the voltage difference between the control electrode and the first electrode of the third transistor Q3 is at a high level, that is, the voltage difference signal F output by the comparator COMP is also changed from 0V to a high-level signal, and thus the control unit 203 outputs a second refresh control signal, that is, the second refresh control signal D is switched from a low-level signal to a high-level signal, to control the second switch K2 to be turned on, so as to control the second current source branch 202 to be turned on to form a current loop, to release the accumulated charge amount of the HSD point, that is, to pull down the voltage of the HSD point to VIN, so as to ensure that in the next cycle, the first control signal can be output to control the first transistor Q1 to be normally turned off, and then the third transistor Q3 is driven to be turned off.

[0073] It should be noted that the time length during which the control unit 203 controls the first current source branch 201 and the second current source branch 202 to be turned on can be set according to the parameter characteristics of the circuit, and the time length during which the first current source branch 201 and the second current source branch 202 are turned on represents the time length during which the accumulated charge is released. Therefore, the time length during which the first current source branch 201 and the second current source branch 202 are turned on should be set to ensure that the accumulated charge can be released, and since the first current source branch 201 and the second current source branch 202 are controlled to be turned on in each cycle to release the accumulated charge, the time length during which the first current source branch 201 and the second current source branch 202 are turned on should not be too long, so as to affect the working efficiency of the circuit. The control unit 203 can be a control chip.

[0074] In some embodiments, the first control signal is output to control the first transistor Q1 to be normally turned off, and then the third transistor Q3 is driven to be turned off. Figure 3Taking the driving circuit shown in the figure as an example, assuming that the voltage difference caused by the accumulated charge at point A is ΔV, the capacitance of the first capacitor C1 and the second capacitor C2 are both C, and the current value of the first current source IDC1 and the second current source IDC2 is I2, then C*ΔV=I2*t3, t3 is the conduction time of the first current source branch 201 and the second current source branch 202. Then, the conduction time t3 of the first current source branch 201 and the second current source branch 202 can be calculated through the above theoretical formula. Based on the conduction time t3, the ringing effect can be eliminated while ensuring the working efficiency of the driving circuit.

[0075] From the above analysis, it can be seen that in each working cycle, the voltage refresh circuit can generate a corresponding first refresh control signal or a second refresh control signal according to the voltage difference between the driving voltage signal and the switch control signal, so as to respectively control the first current source branch 201 or the second current source branch 202 to form a conduction loop, so that the voltage at the control electrode of the first transistor and the second transistor can be pulled down respectively to release the charge accumulated at the control electrode of the first transistor and the second transistor due to ringing, thereby ensuring that in each cycle, the voltage at the control electrode of the first transistor and the second transistor are refreshed to the target value, thereby ensuring that the first control signal and the second control signal can accurately control the action of the third transistor, thereby ensuring the normal operation of the driving circuit.

[0076] In addition, according to the drive circuit provided in this embodiment, the voltage VIN provided by the output end of the power supply circuit can be a relatively high voltage, generally tens of volts, while the power supply for the components in the drive control circuit 10 and the voltage refresh circuit 20 is low voltage, generally a few volts. Therefore, according to this embodiment, there is no need to consider the technical issues of high voltage resistance of the components in the drive control circuit 10 and the voltage refresh circuit 20. It is only necessary to consider the technical issues of high voltage resistance of the first capacitor C1, the second capacitor C2, the first transistor Q1, the second transistor Q2, and the third transistor Q3. In this way, the drive circuit provided in this embodiment can be widely used in high voltage environments, making the application range wider.

[0077] In this embodiment, the supply voltage of the first inverter INV1, the second inverter INV2, and the buffer Buf1 can be set to 5 V. Therefore, there is no need to consider the technical issue of high voltage resistance of the first inverter INV1, the second inverter INV2, and the buffer Buf1. Only the voltage resistance of the first capacitor C1 and the second capacitor C2 needs to be considered.

[0078] On the basis of the driving circuit provided in the above-mentioned embodiment, the present embodiment further provides a power conversion circuit, which comprises a plurality of transistors and further comprises the driving circuit provided in the above-mentioned embodiment. The driving circuit can accurately control the turn-on and turn-off of each transistor in the power conversion circuit, so as to ensure the working accuracy and stability of the power conversion circuit.

[0079] On the basis of the driving circuit provided in the above-mentioned embodiment, the present embodiment further provides a power tube driver, which comprises the driving circuit provided in the above-mentioned embodiment. The power tube driver can accurately control the turn-on and turn-off of the power tube, so as to ensure the working accuracy and stability of the circuit.

[0080] On the basis of the driving circuit provided in the above-mentioned embodiment, the present embodiment further provides a power conversion device, which comprises the driving circuit provided in the above-mentioned embodiment. The driving circuit can accurately control the turn-on and turn-off of each transistor in the power conversion device, so as to ensure the working accuracy and stability of the power conversion device.

[0081] Finally, it should be noted that the above-mentioned embodiments are merely specific embodiments of the present application, but the protection scope of the present application is not limited thereto. Any change or replacement within the technical scope disclosed in the present application should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A driving circuit, characterized in that: include: a first transistor, a second transistor, a third transistor, a drive control circuit, and a voltage refresh circuit; The drive control circuit includes an input terminal, a first output terminal, and a second output terminal. The input terminal of the drive control circuit is used to receive a drive control signal. The drive control circuit is used to process the drive control signal to generate a first control signal and a second control signal with opposite logical states. The first output terminal and the second output terminal are used to output the first control signal and the second control signal, respectively. The first output terminal of the drive control circuit is connected to the first electrode of the first transistor, and the second electrode of the first transistor is used to be connected to the output terminal of the power supply circuit; the second output terminal of the drive control circuit is connected to the first electrode of the second transistor, and the second electrode of the second transistor is also used to be connected to the output terminal of the power supply circuit; the first output terminal of the drive control circuit is also connected to the control electrode of the second transistor, and the second output terminal of the drive control circuit is also connected to the control electrode of the first transistor; The second output terminal of the drive control circuit is further connected to the control electrode of the third transistor, the first electrode of the third transistor is used to be connected to the output terminal of the power supply circuit, and the second electrode of the third transistor is used to output a switch control signal; The voltage refresh circuit includes a refresh control circuit, a first current source branch, and a second current source branch; the input end of the first current source branch is connected to the first electrode of the first transistor, and the input end of the second current source branch is connected to the first electrode of the second transistor; the refresh control circuit is configured to collect the driving voltage signal and the switch control signal on the control electrode of the third transistor, and determine whether a voltage difference between the driving voltage signal and the switch control signal is greater than or equal to a threshold voltage of the third transistor; if so, generate a first refresh control signal; if not, generate a second refresh control signal; The first refresh control signal is used to control the first current source branch to be turned on to form a current loop, thereby pulling down the voltage at the first electrode of the first transistor to a first voltage value; The second refresh control signal is used to control the second current source branch to be turned on to form a current loop, thereby pulling down the voltage at the first electrode of the second transistor to a second voltage value.

2. The driving circuit according to claim 1, wherein: The refresh control circuit includes a comparator and a control unit; The non-inverting input terminal of the comparator is connected to the control electrode of the third transistor to collect the driving voltage signal on the control electrode of the third transistor; the inverting input terminal of the comparator is connected to the second electrode of the third transistor to collect the switch control signal; the comparator is used to compare whether the voltage difference between the driving voltage signal and the switch control signal is greater than or equal to the threshold voltage of the third transistor, and output a first comparison signal; The control unit is configured to generate the first refresh control signal or the second refresh control signal according to a logic state of the first comparison signal.

3. The driving circuit according to claim 1 or 2, characterized in that: The drive control circuit includes a first inverter, a second inverter, a buffer, a first capacitor and a second capacitor; The output end of the first inverter is connected to the input end of the buffer, the output end of the buffer is connected to the first end of the first capacitor, and the second end of the first capacitor is connected to the first electrode of the first transistor; the input end of the first inverter is the input end of the drive control circuit, and the second end of the first capacitor is the first output end of the drive control circuit; The output end of the first inverter is also connected to the input end of the second inverter, the output end of the second inverter is connected to the first end of the second capacitor, the second end of the second capacitor is connected to the first electrode of the second transistor, and the second end of the second capacitor is the second output end of the drive control circuit.

4. The driving circuit according to claim 1 or 2, characterized in that: The refresh control circuit includes a first control signal output terminal and a second control signal output terminal; The first control signal output terminal is used to output a first refresh control signal, and the second control signal output terminal is used to output a second refresh control signal.

5. The driving circuit according to claim 4, wherein: The first current source branch includes a first current source and a first switching tube; the output end of the first current source is grounded, the input end of the first current source is connected to the first electrode of the first switching tube, the second electrode of the first switching tube is the input end of the first current source branch, and the second electrode of the first switching tube is connected to the first electrode of the first transistor; the first control signal output end is connected to the control electrode of the first switching tube.

6. The driving circuit according to claim 4, wherein: The second current source branch includes a second current source and a second switching tube; the output end of the second current source is grounded, the input end of the second current source is connected to the first electrode of the second switching tube, the second electrode of the second switching tube is the input end of the second current source branch, and the second electrode of the second switching tube is connected to the first electrode of the second transistor; the second control signal output end is connected to the control electrode of the second switching tube.

7. The driving circuit according to claim 1 or 2, characterized in that: The driving circuit includes a power supply circuit, an input end of the power supply circuit is used to connect to a power supply, and an output end of the power supply circuit is used to output a supply voltage.

8. A power conversion circuit, characterized in that: The drive circuit comprises the drive circuit according to any one of claims 1 to 7.

9. A power tube driver, characterized in that: The drive circuit comprises the drive circuit according to any one of claims 1 to 7.

10. A power conversion device, characterized in that: The drive circuit comprises the drive circuit according to any one of claims 1 to 7.

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