LVDT high-frequency signal processing circuit

By combining the DDS frequency source and the AGC amplitude-stabilized control circuit to generate a high-frequency excitation signal and using a lossless rectifier circuit for signal processing, the signal distortion and small signal dead zone problems of conventional LVDT signal processing circuit under high frequency conditions are solved, and the problem of signal distortion and small signal dead zones is realized. High-precision, high-linear high-frequency signal processing.

CN119448799AActive Publication Date: 2025-02-14HARBIN ENG UNIV
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Patent Information

Application Number
CN202510018328.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-07
Publication Date
2025-02-14
Estimated Expiration
2045-01-07

AI Technical Summary

Technical Problem

Conventional LVDT signal processing circuits have problems with signal distortion, large nonlinearity and small signal dead zone under high frequency conditions.

Method used

The direct digital synthesis (DDS) frequency source and automatic gain control (AGC) amplitude-steady control circuit are combined to generate stable and pure high-frequency excitation signals, and the high-frequency lossless rectification is used to use analog switches to avoid diodes. The dead zone problem of rectification.

Benefits of technology

It effectively reduces high-frequency signal distortion and improves signal processing accuracy. In theory, there is no problem of small signal dead zones, and improves output linearity.

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Abstract

The invention discloses an LVDT high-frequency signal processing circuit, and relates to the field of displacement sensors, and the circuit comprises a primary coil excitation module which is combined with a DDS frequency source and an AGC amplitude stabilization control circuit to provide a high-frequency excitation signal for an LVDT; the secondary coil signal processing module adopts a lossless rectification circuit to losslessly rectify an output signal of the LVDT; the lossless rectification circuit comprises an input isolation and bias circuit, an isolation low-pass filter and an analog switch. The input isolation and bias circuit performs isolation and bias processing on the output signal, and outputs analog signals which have bias amounts and have a phase difference of 180 degrees under two different channels; the isolation low-pass filter prevents burr signals of the analog switch from being transmitted forwards; the analog switch selectively accesses two analog signals with the phase difference of 180 degrees to the output channel under the control of the digital control signal, and outputs a lossless rectified signal, the requirement of a high-frequency LVDT for a high-frequency excitation source is met, and the dead zone problem caused by diode conduction voltage drop does not exist.
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Description

Technical Field

[0001] The present application relates to the field of displacement sensors, and in particular to an LVDT high-frequency signal processing circuit. Background Art

[0002] Linear Variable Differential Transformer (LVDT) has extremely high resolution and reliability, can achieve frictionless measurement, has unlimited mechanical life, simple structure and low cost, and is widely used in hydraulic and pneumatic fields.

[0003] According to the basic principle of LVDT signal processing, its frequency response is positively correlated with the frequency of the excitation signal. The conventional LVDT processing circuit adopts a diode lossy rectification method, but this conventional lossy rectification method using a diode is only applicable to low-frequency LVDT signal processing. When applied to high-frequency signal processing, signal distortion will occur, increasing the nonlinearity of the signal output; in addition, diode rectification cannot be applied to small signals, that is, there is a small signal dead zone problem, resulting in a large zero point error in the positive and negative bidirectional output of the conventional LVDT. Summary of the invention

[0004] The purpose of the present application is to provide an LVDT high-frequency signal processing circuit to solve the problems of severe distortion, large nonlinearity and small signal dead zone in the lossy rectification method of conventional diodes under high-frequency conditions.

[0005] To achieve the above objectives, this application provides the following solutions.

[0006] In a first aspect, the present application provides an LVDT high-frequency signal processing circuit, comprising: a primary coil excitation module and a secondary coil signal processing module.

[0007] The primary coil excitation module is connected to the input end of the LVDT and is used to provide a high-frequency excitation signal to the LVDT in combination with a DDS frequency source and an AGC amplitude stabilization control circuit.

[0008] The secondary coil signal processing module is connected to the output end of the LVDT and is used to losslessly rectify the output signal of the LVDT using a lossless rectification circuit; the lossless rectification circuit includes an input isolation and bias circuit, an isolation low-pass filter and an analog switch; the input isolation and bias circuit is used to isolate and bias the output signal, and output two analog signals with the same bias and a phase difference of 180 degrees in two different channels; the isolation low-pass filter is used to prevent the burr signal of the analog switch from being transmitted forward; the analog switch is used to selectively connect two analog signals with a phase difference of 180 degrees to the output channel under the control of a digital control signal, and output the lossless rectified signal.

[0009] According to the specific embodiments provided by the present application, the present application discloses the following technical effects: the present application adopts a combination of a direct digital synthesizer (DDS) frequency source and an automatic gain control (AGC) amplitude stabilization control circuit, and the DDS frequency source outputs an excitation signal of a specific frequency. The signal enters the AGC amplitude stabilization control circuit and is stabilized by the AGC amplitude stabilization control circuit to generate a stable and pure high-frequency excitation signal, which meets the needs of high-frequency LVDT for high-frequency excitation sources. In terms of subsequent signal processing, a high-frequency lossless rectification method with an analog switch as the core is used to selectively connect two different channel signals to the output channel according to the level of the digital control signal. When the phase difference between the two input signals is 180 degrees, and the switching edge of the digital control signal coincides with the intersection between the two signals, a complete lossless rectified signal can be obtained. In theory, there is no dead zone problem caused by the diode conduction voltage drop, which improves the output linearity. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0011] Figure 1 This is the basic principle diagram of the LVDT high-frequency signal processing circuit provided in this application.

[0012] Figure 2 This is a schematic diagram of the primary coil excitation module circuit provided in this application.

[0013] Figure 3 This is a schematic diagram of the signal before rectification provided by this application.

[0014] Figure 4 This is a schematic diagram of the rectified signal provided in this application.

[0015] Figure 5 This is a schematic diagram of the signal detection circuit provided in this application.

[0016] Figure 6 This is a schematic diagram of the lossless rectification circuit provided in this application.

[0017] Figure 7 This is a schematic diagram of the LVDT leads provided in this application.

[0018] Figure numerals: 1. DDS frequency source; 2. DDS amplitude reference circuit; 3. AGC amplitude stabilization control circuit; 4. Signal detection circuit; 5. Input isolation and bias circuit; 6. Lossless rectification circuit; 7. Isolation low-pass filter; 8. Analog switch; 9. Active filter; 10. ADC; 11. Controller; 101. Variable gain amplifier; 102. Amplitude detection circuit; 103. Error amplifier amplifier; 104. Sensitivity suppression circuit; 201. Phase shifter; 202. Comparator; 301. DC blocking capacitor; 302. Bias voltage; 303. Unit inverting amplifier; 304. Unit in-phase amplifier. DETAILED DESCRIPTION

[0019] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0020] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0021] The present application embodiment provides a LVDT high-frequency signal processing circuit, such as Figure 1 As shown, the LVDT high-frequency signal processing circuit includes: a primary coil excitation module and a secondary coil signal processing module.

[0022] The primary coil excitation module is connected to the input end of the LVDT and is used to provide a high-frequency excitation signal to the LVDT in combination with the DDS frequency source 1 and the AGC amplitude stabilization control circuit 3 .

[0023] The secondary coil signal processing module is connected to the output end of the LVDT, and is used to losslessly rectify the output signal of the LVDT using a lossless rectification circuit 6; the lossless rectification circuit 6 includes an input isolation and bias circuit 5, an isolation low-pass filter 7 and an analog switch 8; the input isolation and bias circuit 5 is used to isolate and bias the output signal, and output analog signals with bias amounts and a phase difference of 180 degrees under two different channels; the isolation low-pass filter 7 is used to prevent the burr signal of the analog switch 8 from being transmitted forward; the analog switch 8 is used to selectively connect the two analog signals with a phase difference of 180 degrees to the output channel under the control of a digital control signal, and output the lossless rectified signal.

[0024] In an exemplary embodiment, the primary coil excitation module further includes: a DDS amplitude reference circuit 2 .

[0025] The DDS amplitude reference circuit 2 is connected to the AGC amplitude stabilization control circuit 3 ; the DDS amplitude reference circuit 2 is used to input a voltage-adjustable reference signal to the AGC amplitude stabilization control circuit 3 .

[0026] The AGC amplitude control circuit 3 includes a variable gain amplifier 101, an amplitude detection circuit 102, an error amplifier amplifier 103 and a sensitivity suppression circuit 104 which are connected in sequence; wherein the sensitivity suppression circuit 104 is also connected to the variable gain amplifier 101.

[0027] The variable gain amplifier 101 is used to perform gain adjustment on the sinusoidal signal output by the DDS frequency source, and input the gain-adjusted signal to the error amplifier amplifier 103 and the amplitude detection circuit 102 respectively; the amplitude detection circuit 102 performs amplitude detection on the gain-adjusted signal, monitors the amplitude change of the gain-adjusted signal, and realizes closed-loop control of the amplitude of the high-frequency excitation signal through the error amplifier amplifier 103 and the sensitivity suppression circuit 104; the gain-adjusted signal is the high-frequency excitation signal.

[0028] The error amplifier operational amplifier 103 is connected to the amplitude detection circuit 102 and the DDS amplitude reference circuit, and is used to output the voltage difference between the voltage-adjustable reference signal and the amplitude of the high-frequency excitation signal output by the amplitude detection circuit 102, and amplify and output the voltage difference.

[0029] The sensitivity suppression circuit 104 is used to filter the amplified voltage difference and generate a filtered variable gain amplifier gain control signal to control the variable gain amplifier.

[0030] The amplitude detection circuit 102 is used to perform single-tube rectification on the gain-adjusted signal and filter the single-tube rectified signal to obtain an amplitude signal of the gain-adjusted signal.

[0031] In an exemplary embodiment, the variable gain amplifier 101 specifically includes: a common-mode operational amplifier circuit U1 , a first resistor R1 , a second resistor R2 , a third resistor R3 , and a junction field effect transistor U2 .

[0032] The positive input terminal of the in-phase operational amplifier circuit U1 is connected to the first resistor R1; the negative input terminal of the in-phase operational amplifier circuit U1 is connected to one end of the second resistor R2 and one end of the third resistor R3; the other end of the third resistor R3 is connected to the drain of the junction field effect transistor U2; the output terminal of the in-phase operational amplifier circuit U1 is connected to the other end of the second resistor R2 and the amplitude detection circuit 102.

[0033] The gain of the in-phase operational amplifier circuit U1 is adjusted by a feedback network formed by the first resistor R1 , the second resistor R2 , the third resistor R3 , and the junction field effect transistor U2 .

[0034] In an exemplary embodiment, the amplitude detection circuit 102 specifically includes: a Schottky diode D1, a loss resistor R4, and a filter capacitor C1 connected in sequence to form a single-tube half-wave rectification topology structure.

[0035] In practical applications, the primary coil excitation module uses a DDS frequency source 1 as an excitation signal source. The DDS frequency source 1 has extremely high accuracy in frequency output, but although the amplitude output can be flexibly adjusted, it still has the defects of poor stability and large temperature drift. The present application connects the DDS in series with the AGC amplitude stabilization control circuit 3, and the DDS frequency source 1 outputs a high-frequency excitation signal of a specific frequency. The signal enters the AGC amplitude stabilization control circuit 3 and stabilizes the amplitude. Compared with the traditional RC Wien bridge excitation source, the present application can achieve flexible amplitude and frequency control, and the excitation frequency is accurate and stable, not prone to frequency drift and not affected by discrete component deviations. It can achieve an ultra-wide frequency output of a minimum of 0.01Hz and a maximum of not less than 100MHz, which is far beyond the current mainstream 10KHz and 20KHz excitation frequencies, sufficient to meet the needs of high-frequency LVDT for high-frequency excitation sources, and the frequency control resolution can reach 14bit. Compared with the equally controllable digital-to-analog converter (DAC) excitation signal source, DDS has low control difficulty, simple peripheral circuits, and low application thresholds.

[0036] Furthermore, the primary coil excitation module used in this application is as follows Figure 2 As shown, it includes: a DDS frequency source 1, a variable gain amplifier 101, an amplitude detection circuit 102, an error amplifier amplifier 103, a DDS amplitude reference circuit 2, and a sensitivity suppression circuit 104. Among them, the AGC amplitude stabilization control circuit 3 includes a variable gain amplifier circuit 101, an amplitude detection circuit 102, an error amplifier amplifier 103, and a sensitivity suppression circuit 104.

[0037] The basic structure of the variable gain operational amplifier circuit 101 is a common-mode operational amplifier circuit U1, whose gain is adjusted by a feedback network composed of a first resistor R1, a second resistor R2, a third resistor R3 and a junction field effect transistor U2. The gain expression is R2 / (R3+R(U2))+1, where R(U2) is the equivalent resistance of the junction field effect transistor U2. The gain adjustment is achieved by utilizing the voltage-controlled resistance characteristic of the junction field effect transistor U2.

[0038] The amplitude detection circuit 102 is composed of a low conduction voltage Schottky diode D1, a loss resistor R4 and a filter capacitor C1. The overall topology is a single-tube half-wave rectifier. Since the subsequent operational amplifier circuit and the front-end diode have too low losses, the output amplitude of the circuit cannot respond in time when the amplitude changes. Therefore, a loss resistor R4 is added to enable the output voltage of the amplitude detection part to follow the signal amplitude.

[0039] The error amplifier operational amplifier 103 is a subtraction operational amplifier circuit with gain, which can output the voltage difference between the DDS amplitude reference circuit 2 and the amplitude detection circuit 102 and amplify and output the difference according to the set gain. The DDS amplitude reference circuit 2 is a voltage reference signal source, which in this application specifically refers to an adjustable reference signal source composed of a precision voltage reference and a high-resolution DAC. By changing the reference signal voltage, the output amplitude of the high-frequency excitation signal can be changed within a certain range.

[0040] The sensitivity suppression circuit 104 is essentially a passive low-pass filter, which can effectively suppress the high-frequency components contained in the error amplification, and prevent the junction field effect transistor from changing the resistance too quickly to cause the high-frequency excitation signal amplitude fluctuation. With the help of the AGC amplitude stabilization circuit, the present application can achieve the amplitude of the excitation signal to be flexible, stable and controllable, and the amplitude fluctuation is less than 100uV.

[0041] The present application is different from the diode lossy rectification method adopted in the conventional LVDT post-processing circuit. The conventional diode lossy rectification method is only applicable to low-frequency LVDT signal processing. When applied to high-frequency signal processing, signal distortion will occur, increasing the nonlinearity of the signal output. In addition, diode rectification cannot be applied to small signals, that is, there is a dead zone problem, resulting in a large zero point error of the conventional LVDT when outputting positive and negative bidirectional signals.

[0042] The present application adopts a lossless rectification method with an analog switch 8 as the core. The analog switch 8 is essentially a controllable single-pole double-position switch element, which can selectively connect two different channel signals to the output according to the level of the digital control signal. Figure 3-Figure 4As shown, when the two input signals, signal 1 and signal 2, are 180 degrees out of phase and the switching edge of the digital control signal coincides with the intersection of the two signals, a complete rectified signal can be obtained. In theory, there is no dead zone problem caused by the diode conduction voltage drop. Signal 1 and signal 2 are analog signals. Since the existing high-speed analog switch 8 is basically powered by a single power supply, the present application adds an input bias after the input isolation circuit to ensure that the input signal is always positive, which is convenient for using high-speed analog switch elements.

[0043] In an exemplary embodiment, it further includes: a signal detection circuit 4; the signal detection circuit 4 is connected to the AGC amplitude stabilization control circuit 3 and the analog switch 8, and is used to perform zero-crossing detection on the high-frequency excitation signal.

[0044] The signal detection circuit 4 includes a phase shifter and a comparator connected in sequence.

[0045] The phase shifter is used to perform phase shift processing on the high-frequency excitation signal to determine the excitation signal after phase shift; the phase of the excitation signal after phase shift is the same as the signal phase required by the analog switch 8; the signal required by the analog switch 8 is an in-phase signal or an anti-phase signal.

[0046] The comparator is used to compare the phase-shifted excitation signal and the reference ground. When the phase-shifted excitation signal is greater than the reference ground, it outputs a high level. When the phase-shifted excitation signal is not greater than the reference ground, it outputs a low level to achieve zero-crossing detection.

[0047] In practical applications, the control signal used in this application is provided by the signal detection circuit 4, and the specific circuit is as follows: Figure 5 As shown, it includes: a phase shifter 201 and a comparator 202. Its input signal is an excitation signal. Since there must be a phase difference between the excitation signal and the two-channel signal input by the analog switch 8, the phase shift must be performed through the phase shifter 201 to make the phase of the excitation signal after phase shift consistent with the phase of the in-phase or anti-phase signal required by the analog switch 8. The phase adjustment is achieved by changing the resistance value of R9, and observing the zero point state of the signal after lossless rectification output by the analog switch 8. When there is no positive or negative zero bias, it indicates that the adjustment is completed. The comparator 202 compares the phase-shifted signal with the reference ground. When the input signal is greater than the reference ground, it outputs a high level, otherwise it outputs a low level. This process is essentially zero-crossing detection. Finally, the output square wave signal is input to the analog switch 8 to achieve lossless rectification. The square wave signal is a digital control signal.

[0048] In an exemplary embodiment, the input isolation and bias circuit 5 specifically includes: a DC blocking capacitor 301 , a bias voltage 302 , a unit inverting operational amplifier 303 , and a unit non-inverting operational amplifier 304 .

[0049] The DC blocking capacitor 301 is respectively connected to the negative input terminal of the unit inverting amplifier 303 and the positive input terminal and negative input terminal of the unit non-inverting amplifier 304; the bias voltage 302 is connected to the positive input terminal of the unit inverting amplifier 303; and the output terminal of the unit inverting amplifier 303 is connected to the output terminal of the unit non-inverting amplifier 304.

[0050] The DC blocking capacitor 301 is used to isolate the LVDT output signal from the bias voltage.

[0051] The bias voltage 302 is used to apply the bias voltage 302 to the unit in-phase amplifier 304 and the unit inverting amplifier 303 , and determine the operating voltage range of the analog switch 8 .

[0052] The unit inverting amplifier 303 and the unit in-phase amplifier 304 are used together to synchronously transform the output signal into a pair of analog signals with a phase difference of 180 degrees and an offset amount under different channels.

[0053] In practical applications, the specific circuit of the lossless rectifier circuit 6 used in this application is as follows: Figure 6 As shown, it specifically includes: a DC blocking capacitor 301, a bias voltage 302, a unit inverting amplifier 303, a unit non-inverting amplifier 304, an isolation low-pass filter 7, and an analog switch 8. The input isolation and bias circuit 5 includes a DC blocking capacitor 301, a bias voltage 302, a unit inverting amplifier 303, and a unit non-inverting amplifier 304.

[0054] The DC blocking capacitor 301 is used to isolate the bias voltage to prevent it from affecting the front-end circuit while effectively transmitting the input signal to the back-end operational amplifier circuit.

[0055] The specific value of the bias voltage 302 depends on the specific operating voltage range of the selected analog switch 8 , and its value is half of the maximum operating voltage of the analog switch 8 , and is specifically provided by a precision voltage reference source in the present application.

[0056] The present application applies a bias voltage to the non-inverting input terminal of the unit inverting amplifier 303. Combining the basic working principle of the amplifier circuit, it can be known that in the current circuit connection state, the bias will be simultaneously applied to the unit non-inverting amplifier 304, which has the effect of simplifying the circuit design.

[0057] The unit inverting amplifier 303 and the unit in-phase amplifier 304 are used to synchronously transform the input signal into a pair of complementary signals with a phase difference of 180 degrees. The purpose of introducing the unit in-phase amplifier 304 is to make the in-phase output and the reverse output have the minimum phase lag, and to maximize the phase difference of the complementary signals close to 180 degrees.

[0058] The analog switch 8 generates a large glitch signal during the switching process. If the glitch signal is not controlled, it will be transmitted forward. When the glitch signal is transmitted to the pre-gain link, it will be further amplified, greatly increasing the noise level of the signal. To this end, the present application adds an isolation low-pass filter 7 before the analog switch 8. The cutoff frequency of the isolation low-pass filter 7 is slightly higher than the signal frequency, which can effectively prevent the glitch signal of the analog switch 8 from being transmitted forward.

[0059] The analog switch 8 can selectively connect the analog signals of the normally open channel and the normally closed channel to the output channel under the control of the digital control signal.

[0060] In an exemplary embodiment, it also includes: an active filter 9; the active filter 9 is connected to the analog switch 8, and is used to filter the signal after lossless rectification to determine an analog voltage signal representing the LVDT displacement information; the signal after lossless rectification is a half-wave signal with unstable amplitude after lossless rectification.

[0061] In an exemplary embodiment, it also includes: an analog-to-digital converter (ADC); the ADC 10 is connected to the active filter 9 and is used to collect and convert the analog voltage signal representing the LVDT displacement information, and upload the converted voltage signal to the controller 11.

[0062] In an exemplary embodiment, the controller 11 is also connected to the DDS frequency source 1 and the DDS amplitude reference circuit 2, and is used to adjust the output frequency of the DDS frequency source 1, the output voltage of the DDS amplitude reference circuit 2 and the acquisition frequency of ADC10.

[0063] In an exemplary embodiment, the primary coil of the LVDT inputs the high-frequency excitation signal through two leads; the first secondary coil and the second secondary coil of the LVDT are connected in reverse series and then output the output signal through two leads.

[0064] In practical applications, an active filter 9 is used after the lossless rectification link to stabilize the rectified signal, and the voltage signal after filtering is collected by ADC 10 and sent to the controller 11 for further processing.

[0065] The controller 11 plays a master role in signal processing and is responsible for adjusting the DDS output frequency, DDS amplitude reference and ADC10 acquisition control.

[0066] The advantages of the present application are as follows: the high-frequency excitation source based on DDS of the present application adopts DDS as a high-precision frequency source and combines it with an AGC amplitude stabilization circuit, thereby overcoming the defect of DDS device having large temperature drift and poor stability, and thus has the advantages of wide frequency output range, arbitrary variable, precise frequency, low harmonic content, stable amplitude, controllable amplitude and low application threshold.

[0067] The signal processing circuit of the present application adopts a lossless rectification method to effectively reduce high-frequency signal distortion and small signal dead zone problems, thereby improving signal processing accuracy.

[0068] The present application combines DDS with an AGC amplitude stabilization circuit to obtain an accurate and stable high-frequency excitation signal, and effectively improves the high-frequency signal processing accuracy through a lossless rectification method, so that the processing circuit has the ability to generate and process 200K-500KHz high-frequency signals, which is much higher than the conventional 10K-20KHz. Therefore, it can be applied to the signal processing of high-dynamic LVDT and obtain a dynamic range of more than 10 times that of conventional LVDT.

[0069] The technical solution of this application is explained below by taking actual operation as an example.

[0070] Figure 7 This is the lead diagram of the LVDT. The primary coil of the LVDT inputs the excitation signal E1 through two leads, and the first secondary coil and the second secondary coil are reversely connected in series and then output the signal E0 through two leads.

[0071] The main structure of the LVDT high-frequency signal processing circuit involved in the present application includes: a primary coil excitation module and a secondary coil signal post-processing module. Among them, the primary coil excitation module includes: a DDS frequency source 1, a DDS amplitude reference circuit 2, and an AGC amplitude stabilization control circuit 3; the secondary signal post-processing module includes: a signal detection circuit 4, an input isolation and bias circuit 5, a lossless rectification circuit 6, an isolation low-pass filter 7, an analog switch 8, an active filter 9, an ADC 10, and a controller 11.

[0072] In practical applications, the DDS frequency source 1 in this application specifically refers to a DDS dedicated chip and its subsequent instrumentation amplifier for differential conversion of single-ended signals and an active low-pass filter for suppressing digital noise.

[0073] like Figure 2As shown, under the control of the controller 11, the DDS frequency source 1 outputs a sinusoidal differential signal of a specific frequency. The sinusoidal signal is converted into a sinusoidal single-ended signal of a certain amplitude by an instrumentation amplifier. In order to reduce the high-order harmonics contained in the DDS signal, the sinusoidal single-ended signal also needs to pass through an active low-pass filter. The use of an active low-pass filter can effectively reduce the degree of signal attenuation. After filtering, the AGC amplitude stabilization control circuit 3 is used to stabilize the output amplitude of the sinusoidal signal. The specific value of the signal amplitude is set by the DDS amplitude reference circuit 2. The DDS amplitude reference circuit 2 in this application specifically refers to an adjustable reference signal source composed of a precision voltage reference and a high-resolution DAC. By changing the reference signal voltage, the output amplitude of the excitation signal can be changed within a certain range. The DDS amplitude reference circuit 2 is controlled by the controller 11, and can achieve stable and flexible reference signal output. At this point, a sinusoidal signal of a specified frequency and amplitude is obtained, which is the primary coil excitation E1 of the LVDT.

[0074] The output signal E0 of the secondary coil of the LVDT is processed by the secondary coil signal post-processing module and the displacement information is extracted. The processing module consists of the following parts: signal detection circuit 4, input isolation and bias circuit 5, lossless rectification circuit 6, isolation low-pass filter 7, analog switch 8, active filter 9, ADC10 and controller 11.

[0075] like Figure 6 As shown, the lossless rectifier circuit 6 used in the present application specifically includes: a DC blocking capacitor 301, a bias voltage 302, a unit inverting amplifier 303, a unit non-inverting amplifier 304, an isolation low-pass filter 7 and an analog switch 8.

[0076] Signal E0 first passes through a DC blocking capacitor 301 to remove the DC bias component in the signal, while preventing the bias voltage 302 at the back end from affecting the input signal. The bias voltage 302 subsequently accurately controls the signal bias amount. In order to achieve lossless rectification, two input signals with a phase difference of 180 degrees need to be obtained. After the signal passes through a unit inverting amplifier 303 and a unit in-phase amplifier 304, two signals with a phase difference of 180 degrees and a specific bias amount can be obtained. The signal subsequently passes through an isolation low-pass filter 7 to enter the analog switch 8. The isolation low-pass filter 7 can effectively prevent the high-speed switching glitch signal from being transmitted to the front-end circuit. The analog switch 8 completes lossless rectification under the control of a digital control signal, and the digital control signal is provided by a signal detection circuit 4.

[0077] like Figure 5As shown, the phase shifter 201 and the comparator 202 can realize the zero-point phase adjustment and zero-crossing detection of the excitation signal. The phase shifter needs to be manually adjusted to ensure that the zero point of the signal after phase shifting is consistent with the phase of the in-phase or inverted input signal of the analog switch 8. For a specific LVDT, only one phase adjustment is required. The analog switch 8 rectifies the input signal of the two channels with a phase difference of 180 degrees into a half-wave signal. The signal is connected to the active filter 9 to output an analog signal representing the displacement of the LVDT. The cutoff frequency of the active filter 9 is the response frequency of the LVDT. The signal is subsequently collected by the ADC 10 and transmitted to the controller 11 for application.

[0078] This application is mainly suitable for applications that require LVDT for high-frequency response displacement detection. This application uses DDS as a signal source to achieve a flexible and controllable high-frequency stable pure sinusoidal excitation signal, which has significant advantages over conventional Wien bridge oscillation circuits and general DAC circuits. This application solves the problem of severe distortion and large nonlinearity of conventional diode rectification under high-frequency conditions through lossless rectification, while avoiding the small signal dead zone problem of diode rectification, and can provide a reference for LVDT signal processing in high-frequency applications.

[0079] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0080] This article uses specific examples to illustrate the principles and implementation methods of this application. The description of the above embodiments is only used to help understand the method and core ideas of this application. At the same time, for those skilled in the art, according to the ideas of this application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting this application.

Claims

1. An LVDT high-frequency signal processing circuit, characterized in that: The LVDT high-frequency signal processing circuit includes: a primary coil excitation module and a secondary coil signal processing module; The primary coil excitation module is connected to the input end of the LVDT and is used to combine the DDS frequency source (1) and the AGC amplitude stabilization control circuit (3) to provide a high-frequency excitation signal to the LVDT; The secondary coil signal processing module is connected to the output end of the LVDT and is used to losslessly rectify the output signal of the LVDT using a lossless rectification circuit (6); the lossless rectification circuit (6) comprises an input isolation and bias circuit (5), an isolation low-pass filter (7) and an analog switch (8) connected in sequence; the input isolation and bias circuit (5) is used to isolate and bias the output signal, and output analog signals with a bias amount and a phase difference of 180 degrees under two different channels; the isolation low-pass filter (7) is used to prevent the burr signal of the analog switch (8) from being transmitted forward; the analog switch (8) is used to selectively connect the two analog signals with a phase difference of 180 degrees to the output channel under the control of a digital control signal, and output the lossless rectified signal.

2. The LVDT high-frequency signal processing circuit according to claim 1, characterized in that: The primary coil excitation module further includes: a DDS amplitude reference circuit (2); The DDS amplitude reference circuit (2) is connected to the AGC amplitude stabilization control circuit (3); the DDS amplitude reference circuit (2) is used to input a voltage-adjustable reference signal to the AGC amplitude stabilization control circuit (3); The AGC amplitude stabilization control circuit (3) comprises a variable gain amplifier (101), an amplitude detection circuit (102), an error amplifier amplifier (103) and a sensitivity suppression circuit (104) which are connected in sequence; wherein the sensitivity suppression circuit (104) is also connected to the variable gain amplifier (101); The variable gain amplifier (101) is used to perform gain adjustment on the sinusoidal signal output by the DDS frequency source (1), and input the gain-adjusted signal into the error amplifier amplifier (103) and the amplitude detection circuit (102) respectively; the amplitude detection circuit (102) performs amplitude detection on the gain-adjusted signal, monitors the amplitude change of the gain-adjusted signal, and implements closed-loop control of the high-frequency excitation signal amplitude through the error amplifier amplifier (103) and the sensitivity suppression circuit (104); the gain-adjusted signal is the high-frequency excitation signal; The error amplifier operational amplifier (103) is connected to the amplitude detection circuit (102) and the DDS amplitude reference circuit (2), and is used to output the voltage difference between the voltage-adjustable reference signal and the amplitude of the high-frequency excitation signal output by the amplitude detection circuit (102), and to amplify and output the voltage difference; The sensitivity suppression circuit (104) is used to filter the amplified voltage difference to generate a filtered variable gain amplifier gain control signal to control the variable gain amplifier (101); The amplitude detection circuit (102) is used to perform single-tube rectification on the gain-adjusted signal, and filter the single-tube rectified signal to obtain an amplitude signal of the gain-adjusted signal.

3. The LVDT high-frequency signal processing circuit according to claim 2, characterized in that: The variable gain operational amplifier (101) specifically comprises: a common-mode operational amplifier circuit U1, a first resistor R1, a second resistor R2, a third resistor R3 and a junction field effect transistor U2; The positive input terminal of the in-phase operational amplifier circuit U1 is connected to the first resistor R1; the negative input terminal of the in-phase operational amplifier circuit U1 is connected to one end of the second resistor R2 and one end of the third resistor R3; the other end of the third resistor R3 is connected to the drain of the junction field effect transistor U2; the output terminal of the in-phase operational amplifier circuit U1 is connected to the other end of the second resistor R2 and the amplitude detection circuit (102); The gain of the in-phase operational amplifier circuit U1 is adjusted by a feedback network formed by the first resistor R1 , the second resistor R2 , the third resistor R3 and the junction field effect transistor U2 .

4. The LVDT high-frequency signal processing circuit according to claim 2, characterized in that: The amplitude detection circuit (102) specifically comprises: a Schottky diode D1, a loss resistor R4 and a filter capacitor C1 connected in sequence, forming a single-tube half-wave rectification topology structure.

5. The LVDT high-frequency signal processing circuit according to claim 1, characterized in that: The input isolation and bias circuit (5) specifically comprises: a DC blocking capacitor (301), a bias voltage (302), a unit inverting operational amplifier (303) and a unit non-inverting operational amplifier (304); The DC blocking capacitor (301) is respectively connected to the negative input terminal of the unit inverting amplifier (303) and the positive input terminal and negative input terminal of the unit inverting amplifier (304); the bias voltage (302) is connected to the positive input terminal of the unit inverting amplifier (303); the output terminal of the unit inverting amplifier (303) is connected to the output terminal of the unit inverting amplifier (304); The DC blocking capacitor (301) is used to isolate the LVDT output signal from the bias voltage (302); The bias voltage (302) is used to apply the bias voltage (302) to the unit in-phase operational amplifier (304) and the unit inverting operational amplifier (303), and to determine the operating voltage range of the analog switch (8); The unit inverting operational amplifier (303) and the unit in-phase operational amplifier (304) are used together to synchronously transform the output signal into a pair of analog signals with a phase difference of 180 degrees and an offset amount in different channels.

6. The LVDT high-frequency signal processing circuit according to claim 2, characterized in that: Also includes: Signal detection circuit (4); The signal detection circuit (4) is connected to the AGC amplitude stabilization control circuit (3) and the analog switch (8) and is used to perform zero-crossing detection on the high-frequency excitation signal; The signal detection circuit (4) comprises a phase shifter (201) and a comparator (202) connected in sequence; The phase shifter (201) is used to perform phase shift processing on the high-frequency excitation signal to determine the excitation signal after phase shift; the phase of the excitation signal after phase shift is the same as the phase of the signal required by the analog switch (8); the signal required by the analog switch (8) is an in-phase signal or an anti-phase signal; The comparator (202) is used to compare the phase-shifted excitation signal and a reference ground, and output a high level when the phase-shifted excitation signal is greater than the reference ground, and output a low level when the phase-shifted excitation signal is not greater than the reference ground, so as to achieve zero-crossing detection.

7. The LVDT high-frequency signal processing circuit according to claim 6, characterized in that: Also includes: Active filter (9); The active filter (9) is connected to the analog switch (8) and is used to filter the lossless rectified signal and convert it into an analog voltage signal with a stable amplitude representing the LVDT displacement information; the lossless rectified signal is a half-wave signal with an unstable amplitude after lossless rectification.

8. The LVDT high-frequency signal processing circuit according to claim 7, characterized in that: Also includes: ADC(10); The ADC (10) is connected to the active filter (9) and is used to collect and convert the analog voltage signal representing the LVDT displacement information, and upload the converted voltage signal to the controller (11).

9. The LVDT high-frequency signal processing circuit according to claim 8, characterized in that: The controller (11) is also connected to the DDS frequency source (1) and the DDS amplitude reference circuit (2), and is used to adjust the output frequency of the DDS frequency source (1), the output voltage of the DDS amplitude reference circuit (2), and the acquisition frequency of the ADC (10).

10. The LVDT high-frequency signal processing circuit according to claim 1, characterized in that: The primary coil of the LVDT is input with the high-frequency excitation signal through two leads; After the first secondary coil and the second secondary coil of the LVDT are connected in reverse series, the output signal is output through two lead wires.

Citation Information

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