Comparator-based high-power instrument bus host transmitting circuit

Abstract

The invention provides a high-power instrument bus host sending circuit based on a comparator. The technical problems that an existing industrial instrument field bus is high in cost and poor in compatibility are solved. The system comprises a host controller, the host controller is connected with a signal isolation circuit, the signal isolation circuit is connected with a signal conversion circuit, the signal conversion circuit is connected with a field bus, the signal conversion circuit is further connected with a power supply control protection circuit and a communication acceleration circuit, and the power supply control protection circuit is connected with a power supply; the power supply control protection circuit is connected with the host controller, and the signal isolation circuit is connected with the communication acceleration circuit. A plurality of comparator chips are used, a communication acceleration function circuit is added, co-communication bit rate high-speed data transmission of a bus system can be achieved, data transmission of different baud rates of a bus can be achieved, the anti-interference capacity and the loading capacity of the bus are improved, and the problem that when long-distance wiring is conducted and a large number of slave devices are arranged, the communication speed is high is solved. And the influence on communication is caused by parasitic capacitance and inductance of the slave and the electric wire.

Description

Technical Field

[0001] The invention relates to the technical field of instruments and meters, and in particular to a high-power instrument bus host sending circuit. Background Art

[0002] Field instrument bus communication generally adopts a master-slave half-duplex bus transmission architecture. Currently, the bus communication methods on the market mainly include two-bus, three-bus, four-bus and other methods. Among them, two-bus is widely used in various instrument systems due to its low cost, simple structure, long communication distance, and strong scalability.

[0003] The existing industrial instrument fieldbus system generally adopts bus methods such as RS485, M-BUS, and POWERBUS. Among them, the RS485 bus usually requires four-wire communication, two power supplies, and two differential signal lines for communication. This solution is gradually eliminated by the market due to its high cost, weak load capacity, low communication rate, poor anti-interference ability, and short communication distance. M-BUS and POWERBUS are a new type of two-wire communication method that adopts the method of downstream voltage communication and upstream current loop communication. Its communication line can realize both power supply and communication. Although its communication method has certain advantages, the communication system needs to use a dedicated M-BUS communication chip or POWERBUS communication chip to realize data transmission. It has high cost, poor scalability, low communication rate, and is easily affected by factors such as bus parasitic capacitance and parasitic inductance. The scope of use is subject to certain restrictions.

[0004] The utility model patent with application number 202322374653.3 discloses an anti-interference communication converter, which belongs to the field of communication technology, including: an external power supply circuit for power supply; a first conversion circuit connected to the external power supply circuit for realizing voltage conversion of the external source circuit; a power isolation circuit connected to the external power supply circuit to separate the voltage isolated from the external power supply circuit; a second conversion circuit connected to the power isolation circuit, an RS485 signal transceiver circuit connected to the first conversion circuit for switching the sending and receiving states of the 485 communication signal; a controller connected to the RS485 signal transceiver circuit for receiving, sending and processing signals. The above utility model is connected between the host controller with a 232 bus interface and the field sensors and actuators with a 485 bus interface for bus communication, field data acquisition or detection and control of downlink control instructions, data transmission, automatic control and remote operation, and can perform data isolation transmission and prevent a series of safety accidents caused by overvoltage. However, its transmission rate is low and its load capacity is poor during long-distance communication on site. When multiple slave devices upload data at the same time, it is easy to damage the equipment. This communication method has gradually been eliminated by the market. Summary of the invention

[0005] In view of the technical problems of high cost and poor compatibility of existing industrial instrument field buses, the present invention proposes a high-power instrument bus host sending circuit based on a comparator, an instrument bus communication circuit implemented with discrete components, which can greatly reduce the product production cost, add a signal isolation circuit, and can be directly compatible with the serial TTL interface signal output by the existing main control circuit.

[0006] In order to achieve the above-mentioned purpose, the technical solution of the present invention is implemented as follows: a high-power instrument bus host sending circuit based on a comparator includes a host controller, the host controller is connected to a signal isolation circuit, the signal isolation circuit is connected to a signal conversion circuit, the signal conversion circuit is connected to a field bus, the signal conversion circuit is also respectively connected to a power supply control protection circuit and a communication acceleration circuit, and the power supply control protection circuit is connected to a power supply; the power supply control protection circuit is connected to the host controller, and the signal isolation circuit is connected to the communication acceleration circuit.

[0007] Preferably, the signal conversion circuit includes a first comparator and a first switching circuit, an input end of the first comparator is connected to the output signal of the signal isolation circuit, and the other input end of the first comparator is connected to the first reference voltage circuit; the output end of the first comparator is connected to an input end of the first switching circuit, and the other input end of the first switching circuit is connected to the output end of the power supply control protection circuit, and the output end of the first switching circuit is connected to the field bus through a diode D1.

[0008] Preferably, the communication acceleration circuit includes a second comparator, a third comparator and a MOS tube Q3, one input end of the second comparator and the third comparator are both connected to the output signal of the signal isolation circuit, the other input end of the second comparator is connected to the second reference voltage circuit, the other input end of the third comparator is connected to the third reference voltage circuit, the output ends of the second comparator and the third comparator are both connected to the gate of the MOS tube Q3, the drain of the MOS tube Q3 is connected to the field bus, and the source of the MOS tube Q3 is grounded.

[0009] Preferably, the first reference voltage circuit, the second reference voltage circuit and the third reference voltage circuit each include a first resistor and a second resistor connected in series, one end of the first resistor is connected to the output end of the power supply control protection circuit, the other end of the first resistor is connected to one end of the second resistor, and the other end of the second resistor is grounded; the other end of the first resistor and one end of the second resistor are connected to the other input end of the first comparator, the second comparator or the third comparator as output ends; and a first capacitor is connected in parallel at both ends of the second resistor.

[0010] Preferably, the output voltage of the first reference voltage circuit of the first comparator is the intermediate voltage of the output signal of the signal isolation circuit, and the output voltage of the first reference voltage circuit of the first comparator is located in the middle of the output voltages of the second reference voltage circuit of the second comparator and the third reference voltage circuit of the third comparator.

[0011] Preferably, the power control protection circuit includes a switching circuit, an overload protection circuit and a power control circuit, one input end of the switching circuit is connected to the power supply, the other input end of the switching circuit is respectively connected to the overload protection circuit and the power control circuit, and the output end of the switching circuit obtains an output voltage through the overload protection circuit.

[0012] Preferably, the power control circuit includes a power isolation circuit and a MOS tube Q6, the input end of the power isolation circuit is connected to the host controller, the output end of the power isolation circuit is connected to the gate of the MOS tube Q6, the source of the MOS tube Q6 is grounded, and the drain of the MOS tube Q6 is connected to the other input end of the switch circuit.

[0013] Preferably, the overload protection circuit includes a resettable fuse and a transistor Q5, the base of the transistor Q5 is respectively connected to the output end of the switching circuit and one end of the resettable fuse through a resistor R24, the emitter of the transistor Q5 is connected to one end of the resistor R22, the collector of the transistor Q5 is connected to the other input end of the switching circuit, the other end of the resettable fuse is connected to the other end of the resistor R22, and one end of the resistor R22 obtains the output voltage.

[0014] Preferably, the switching circuit includes a PMOS tube Q4, a gate of the PMOS tube Q4 is respectively connected to one end of the resistor R23, one end of the resistor R25, and the collector of the transistor Q5 of the overload protection circuit, the other end of the resistor R25 is connected to the drain of the MOS tube Q6, the drain of the PMOS tube Q4 is connected to the positive electrode of the power supply, and the source of the PMOS tube Q4 is connected to the other end of the resistor R23 and one end of the self-recovery fuse of the overload protection circuit.

[0015] Preferably, the signal isolation circuit and the power isolation circuit both include a first transistor and an optocoupler isolator, the base of the first transistor is connected to the input signal, the base of the first transistor is grounded through a third resistor, the collector of the first transistor is connected to an input end of the optocoupler isolator, an output end of the optocoupler isolator serves as an output end, the other input end of the optocoupler isolator, the other output end of the optocoupler isolator, and the source of the first transistor are all grounded; an input end of the optocoupler isolator and the collector of the first transistor are both connected to a 5V voltage through a fourth resistor, an output end of the optocoupler isolator is respectively connected to one end of a fifth resistor and a sixth resistor, the other end of the fifth resistor is connected to a positive voltage, and the other end of the sixth resistor is grounded.

[0016] Compared with the prior art, the invention has the following beneficial effects: the invention uses multiple comparator chips and adds a communication acceleration function circuit, which can realize high-speed data transmission of the same signal bit rate of the bus system from the commonly used 4800 to more than 19200, realize data transmission at different baud rates of the bus, improve the anti-interference ability and load capacity of the bus, solve the influence of the parasitic capacitance and inductance of the slave and the wire on the communication during long-distance wiring and a large number of slave devices, and the communication distance can achieve reliable transmission of more than 3000 meters; the signal conversion circuit uses a high-power MOS tube, which can achieve a continuous driving capacity of more than 70A, and increase the number of slave loads. The invention adds an overload protection circuit, adds the protection function of instantaneous overload and continuous overload, and improves the stability of the entire circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0018] Figure 1 It is a circuit block diagram of the present invention.

[0019] Figure 2 for Figure 1 The circuit diagram of the signal transmission circuit is shown.

[0020] Figure 3 The power supply control of the present invention includes a circuit diagram of the circuit.

[0021] Figure 4 It is a curve diagram of the output voltage signal of the signal isolation circuit of the present invention.

[0022] Figure 5 It is a schematic diagram of the output voltage signal of the three-way comparator of the present invention.

[0023] In the figure, 1 is a host controller, 2 is a signal isolation circuit, 3 is a signal conversion circuit, 4 is a power control protection circuit, 41 is a power control circuit, 42 is an overload protection circuit, 43 is a switch circuit, 5 is a power supply, 6 is a communication acceleration circuit, and 7 is a field bus. DETAILED DESCRIPTION

[0024] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0025] like Figure 1 As shown, a high-power meter bus host transmission circuit based on a comparator includes a host controller 1, the host controller 1 is connected to a signal isolation circuit 2, the signal isolation circuit 2 is connected to a signal conversion circuit 3, the signal conversion circuit 3 is connected to a field bus 7, the signal conversion circuit 3 is also connected to a power control protection circuit 4 and a communication acceleration circuit 6 respectively, the power control protection circuit 4 is connected to a power supply 5; the power control protection circuit 4 is connected to the host controller 1, and the signal isolation circuit 2 is connected to the communication acceleration circuit 6. Figure 1 As shown, the circuit implementation process of the present invention is as follows: the host controller 1 sends a TTL signal to the signal isolation circuit 2, the signal isolation circuit 2 is used to isolate and protect the host controller 1 from interference from the field bus 7, the isolated signal drives the high-power MOS tube Q1 through the comparator of the signal conversion circuit 3, and converts the weak digital signal into a high-power voltage signal of the power supply 5. The voltage signal is generated by the power supply 5, and is output to the field bus 7 after passing through the power control protection circuit 4 and the signal conversion circuit 3. The communication acceleration circuit 6 is used to accelerate the conversion rate of the signal conversion circuit 3, so as to improve the communication quality and communication efficiency.

[0026] The instrument bus communication system is usually composed of a host system and several slave systems. Its transmission form is mainly to send data instructions to the slave device by changing the voltage form in the downstream communication. When sending the voltage, the TTL serial port signal of the master device is converted into a voltage signal of 0~VCC. The upstream communication realizes reliable upstream transmission of data by changing the load current size on the bus by the slave. The present invention converts the traditional serial port TTL signal into a voltage signal of 0~VCC. Usually when there is no signal transmission on the bus, the signal line outputs VCC power supply. The VCC power supply adopts a high-power MOS tube, which can increase the power supply of the slave device. After the slave device receives the signal, it generates a current signal to generate response information. The host output circuit structure of the present invention is simple, low cost, does not require a dedicated communication chip, has a high communication rate, and has strong anti-interference ability.

[0027] like Figure 2As shown, the signal isolation circuit 2 includes a transistor Q2 and an optocoupler isolator U1. The base of the transistor Q2 is connected to the input signal, i.e., the TTL signal sent by the host controller 1, through a resistor R1. The resistor R1 is a current limiting resistor for the TTL signal, and can be used together with the resistor R8 to divide the voltage to set the start-up time of the transistor Q2. The base of the transistor Q2 is grounded through the resistor R8. The resistor R8 not only plays a role in dividing the voltage, but also ensures the default working state of the circuit when the TTL signal is floating. The collector of the transistor Q2 is connected to the input terminal A of the optocoupler isolator U1, and the output terminal C of the optocoupler isolator U1 is used as the output terminal to obtain the SIGNAL signal. The other input terminal K of the optocoupler isolator U1, the other output terminal E of the optocoupler isolator, and the emitter of the transistor Q2 are all grounded. The input terminal A of the optocoupler isolator U1 and the collector of the transistor Q2 are both connected to a 5V voltage through a resistor R2. The resistor R2 is a current-limiting resistor for powering the light-emitting diode inside the optocoupler isolator U1. R2 can ensure that the diode inside the optocoupler isolator U1 is within the normal operating current range. When the input terminal of the optocoupler isolator U1 is connected to different voltages, the resistance value of the resistor R2 should be adjusted accordingly. An output terminal C of the optocoupler isolator U1 is respectively connected to one end of the resistor R4 and the resistor R9, the other end of the resistor R4 is connected to the output voltage of the signal conversion circuit 3, and the other end of the resistor R9 is grounded. The resistor R4 and the resistor R9 are voltage-dividing resistors.

[0028] The signal conversion circuit 3 includes a comparator U2A and a first switch circuit. The inverting input terminal of the comparator U2A is connected to the output signal of the signal isolation circuit 2, i.e., the SIGNAL signal, through a resistor R7. The resistor R7 is a current limiting resistor, so that the signal value of the output SIGNAL signal will not be affected by the comparator U2A. The non-inverting input terminal of the comparator U2A is connected to the first reference voltage circuit. The first reference voltage circuit includes a resistor R13 and a resistor R18 connected in series. One end of the resistor R13 is connected to the voltage +V_1 output by the power control protection circuit 4, and the other end of the resistor R13 is connected to one end of the resistor R18, and the other end of the resistor R18 is grounded. The resistor R13 and the resistor R18 are voltage-dividing resistors, which can set the reference voltage of the input terminal of the comparator U2A. The two ends of resistor R18 are connected in parallel with capacitor C1, which is used to stabilize the reference voltage generated by voltage-dividing resistors R13 and R18, ensuring that when the +V_1 signal generates noise during operation, it can be effectively filtered out by capacitor C1, ensuring the stability and reliability of the REF_01 reference signal. The midpoint of resistor R13 and resistor R18 is connected to the non-inverting input of comparator U2A as the output terminal.

[0029] The output end of the comparator U2A is connected to an input end of the first switch circuit through the resistor R6, the other input end of the first switch circuit is connected to the output end of the power control protection circuit 4, and the output end of the first switch circuit is connected to the field bus 7 through the diode D1. The first switch circuit includes a MOS tube Q1, the gate of the MOS tube Q1 is connected to the resistor R6, the drain of the MOS tube Q1 is connected to the positive electrode of the diode D1, the negative electrode of the diode D1 is connected to the BUS+ of the field bus 7, the other end of the field bus 7 is BUS- and is grounded through the resistor R5, the resistor R5 is a sampling resistor of the receiving circuit, usually composed of a small resistor, the host controller 1 obtains the signal sent by the slave by collecting the voltage signal of the resistor R5, and a resistor R3 is provided between the source and the gate of the MOS tube Q1. When working, the comparator U2A outputs a low level, and the resistor R6 and the resistor R3 generate a voltage divider, so that a voltage value that can drive the MOS tube Q1 to work is generated between the 1st and 3rd pins of the MOS tube Q1, so that the MOS tube Q1 is turned on and outputs a high level signal. Resistors R3 and R6 divide the voltage to drive MOS tube Q1 to work. When comparator U2A fails, resistor R3 can pull the supply voltage of pin 1 of MOS tube Q1 to +V_1, so that MOS tube Q1 is in a closed state. The source of MOS tube Q1 obtains the output voltage +V_1 signal.

[0030] The protected TLL signal output by the host controller 1 drives the transistor Q2, and passes through the optocoupler isolation device U1, and outputs a changing voltage signal---SIGNAL signal at the output end of the optocoupler isolation device U1. After passing through the optocoupler isolation device U1, it drives the comparator U2A, which can quickly turn on and off the MOS tube Q1, thereby sending high and low level signals to the slave device. The diode D1 is used to isolate the high-voltage reverse impact caused by bus parasitic inductance and parasitic capacitance after the MOS tube Q1 is disconnected.

[0031] As a feasible solution, in order to improve the data transmission speed of the system and reduce the influence of bus parasitic capacitance and inductance, a communication acceleration function circuit is added at BUS+, such as Figure 2As shown, the communication acceleration circuit 6 includes a comparator U2B, a comparator and an N-type MOS tube Q3. The inverting input terminals of the comparator U2B and the comparator U3A are both connected to the signal voltage signal --- SIGNAL signal output by the signal isolation circuit 2. The positive input terminal of the comparator U2B is connected to the second reference voltage circuit, and the positive input terminal of the comparator U3A is connected to the third reference voltage circuit. The output terminal of the comparator U2B is connected to the gate of the MOS tube Q3 through a resistor R11, and the drain of the MOS tube Q3 is connected to the BUS+ of the field bus 7. The output terminal of the comparator U3A is connected to the gate of the MOS tube Q3 through a resistor R16, and the source of the MOS tube Q3 is grounded. The resistors R11 and R16 are composed of small resistances, usually 100Ω resistors, which are used for current limiting to ensure that when the comparator U2B or U3A is working, the voltage of the 1-pin of the MOS tube Q3 can be quickly pulled to close to 0V, so that it can be quickly turned off. The gate of MOS tube Q3 is connected to one end of resistor R10 and one end of resistor R21 respectively, the other end of resistor R10 is connected to output voltage +V_1, and the other end of resistor R21 is grounded. Resistors R10 and R21 form a voltage divider resistor to divide the voltage of output voltage +V_1 signal and provide a normal start voltage for MOS tube Q3. Figure 2 As shown, the comparator U2B and the comparator U3A together form an AND gate circuit to simultaneously drive the MOS tube Q3 to be turned on and off. When the N-type MOS tube Q3 is turned on, the parasitic voltage on the bus can be quickly pulled to a low level to achieve fast data transmission.

[0032] The second reference voltage circuit includes a resistor R14 and a resistor R19 connected in series, and a capacitor C2 is connected in parallel at both ends of the resistor R19. One end of the resistor R14 is connected to the output voltage +V_1, the other end of the resistor R14 is connected to one end of the resistor R19, and the other end of the resistor R19 is grounded; the other end of the resistor R14 and one end of the resistor R19 are connected to the non-inverting input end of the comparator U2B as output ends. The third reference voltage circuit includes a resistor R15 and a resistor R20 connected in series, and a capacitor C2 is connected in parallel at both ends of the resistor R20. One end of the resistor R15 is connected to the output voltage +V_1, the other end of the resistor R15 is connected to one end of the resistor R20, and the other end of the resistor R19 is grounded; the other end of the resistor R15 and one end of the resistor R20 are connected to the non-inverting input end of the comparator U3A as output ends.

[0033] The output voltage of the first reference voltage circuit of the comparator U2A is the middle voltage of the output signal of the signal isolation circuit 2, and the output voltage of the first reference voltage circuit of the first comparator U2A is located in the middle of the output voltages of the second reference voltage circuit of the comparator U2B and the third reference voltage circuit of the comparator U3A.

[0034] In order to ensure the normal operation of the circuit, it is necessary to set a suitable reference point voltage and signal collection point for the comparator. The signal collection point should be set at the voltage signal output by the TLL signal output by the host controller 1 after passing through the optocoupler isolation device U1, such as Figure 2 When the photosensitive tube of the optocoupler isolation device U1 receives the light signal emitted by the light-emitting diode, the voltage signal output by its 4th pin is as follows: Figure 4 As shown in the figure, during the rising and falling process of the signal, a voltage signal with an inclined rise and a decreasing slope will be output. When setting the reference voltage, the voltages at points b and e should be set as the reference points of the comparator U2A, the voltages at points a and f should be set as the reference voltages of the comparator U2B, and the voltages at points c and d should be set as the reference voltages of the comparator U3A. The reference voltage value is compared with the SIGNAL signal voltage. After passing through the comparators U2A, U2B, and U3A, the waveforms of the voltage values ​​are output respectively as shown in the figure below. Figure 5 As shown, when the voltage increases and decreases, the voltage change point of the comparator U2A is just located at the middle point between the comparator U2B and the comparator U3A. By setting the three reference voltage values, it can be ensured that when the MOS tube Q1 is turned off, the MOS tube Q3 starts to conduct, and when the MOS tube Q3 is turned off, the MOS tube Q1 starts to conduct, so as to avoid the damage of the device caused by the simultaneous conduction of the MOS tube Q1 and the MOS tube Q3, and accelerate the discharge of the bus data transmission.

[0035] like Figure 3 As shown, the power control protection circuit 4 includes a switch circuit 43, an overload protection circuit 42 and a power control circuit 41, one input end of the switch circuit 43 is connected to the power supply 5, the other input end of the switch circuit 43 is respectively connected to the overload protection circuit 42 and the power control circuit 41, and the output end of the switch circuit 43 obtains an output voltage through the overload protection circuit 42. The switch circuit 43 is powered by the bus +V of the power supply 5.

[0036] The power control circuit 41 includes a power isolation circuit and a MOS transistor Q6, wherein the input end of the power isolation circuit is connected to the host controller 1, the output end of the power isolation circuit is connected to the gate of the MOS transistor Q6, the source of the MOS transistor Q6 is grounded, and the drain of the MOS transistor Q6 is connected to the other input end of the switch circuit 43 through the resistor R25. When the MOS transistor Q6 is turned on, the resistor R25 and the resistor R23 divide the voltage to generate a voltage value that can drive the PMOS transistor Q4 to start normally, start the PMOS transistor Q4, and provide power supply labeled +V_1 for the subsequent circuit.

[0037] The switch circuit 43 includes a PMOS tube Q4, the gate of which is respectively connected to one end of a resistor R23, one end of a resistor R25, and the collector of a transistor Q5 of an overload protection circuit 42, the other end of the resistor R25 is connected to the drain of a MOS tube Q6, the drain of the PMOS tube Q4 is connected to the positive electrode of a power source 5, and the source of the PMOS tube Q4 is connected to the other end of the resistor R23 and one end of a self-recovery fuse F1 of an overload protection circuit 42. The resistors R23 and R25 are connected in series for voltage division. When the MOS tube Q6 is disconnected, the resistor R23 can pull up the voltage of the pin 1 of the PMOS tube Q4, so that the PMOS tube Q4 turns off the power supply. Diodes are connected in reverse parallel to the MOS tube Q1, the MOS tube Q3, the PMOS tube Q4, and the MOS tube Q6.

[0038] The power isolation circuit includes a transistor Q7 and an optocoupler isolator U5. The base of the transistor Q7 is connected to the switch signal of the host controller 1 through a resistor R30. The resistor R30 is a current limiting protection resistor, which usually has a small resistance. The resistor R30 is grounded through a resistor R31. The resistor R30 is connected to a 5V voltage through a resistor R27. The resistor R27 and the resistor R31 form a voltage divider network, which can provide a voltage for the start-up of the transistor Q7. At the same time, it can also adapt to the input level of the ON / OFF signal. When the ON / OFF is floating, it can ensure that the power supply of the network is in the off state. The collector of the transistor Q7 is connected to the input terminal A of the optocoupler isolator U5, and the output terminal C of the optocoupler isolator U5 is used as the output terminal. The input terminal K of the optocoupler isolator U5, the output terminal E of the optocoupler isolator U5, and the emitter of the transistor Q7 are all grounded. The input terminal A of the optocoupler isolator U5 and the collector of the transistor Q7 are both connected to a 5V voltage through a resistor R29. The resistor R29 provides a current limiting resistor for the light-emitting diode AK inside the optocoupler isolator U5. When the transistor Q7 is open, the optocoupler isolator U5 emits light to generate a signal. When the transistor Q7 is turned on, the 1st and 2nd pins of the optocoupler isolator U5 are short-circuited, and the light-emitting diode inside the optocoupler isolator U5 does not emit light. The output terminal C of the optocoupler isolator U5 is connected to one end of the resistor R26 and the resistor R28 respectively. The other end of the resistor R26 is connected to the positive electrode of the power supply 5, the negative electrode of the power supply 5 is grounded, and the other end of the resistor R28 is grounded. The resistor R26 and the resistor R28 form a voltage divider resistor to provide a bias voltage for the MOS tube Q6. The output terminal C of the optocoupler isolator U5 is connected to the gate of the MOS tube Q6. The voltage divider generated by the resistor R26 and the resistor R28 ensures that the MOS tube Q6 can be normally switched on and off when the optocoupler isolator U5 is working.

[0039] Among them, the optocoupler isolator U5 is used to isolate the IO signal output by the host controller 1, and the N-type MOS tube Q6 is used to switch the PMOS tube Q4 of the main power supply. During normal operation, when the ON / OFF is at a high level, the transistor Q7 is turned on. At this time, the gate of the MOS tube Q6 is turned on at a high level, thereby starting the PMOS tube Q4 to turn on and realize the power supply of the entire system.

[0040] The overload protection circuit 42 includes a resettable fuse F1 and a transistor Q5. The base of the transistor Q5 is connected to the output end of the switch circuit 43 and one end of the resettable fuse F1 through a resistor R24. The emitter of the transistor Q5 is connected to one end of the resistor R22. The collector of the transistor Q5 is connected to the other input end of the switch circuit 43. The other end of the resettable fuse F1 is connected to the other end of the resistor R22. One end of the resistor R22 obtains the output voltage. The overload protection circuit 42 of the present invention includes a resettable fuse F1 and a transistor Q5. The base of the transistor Q5 is connected to the output end of the switch circuit 43 and one end of the resettable fuse F1 through a resistor R24. Figure 3 The resistor R22, resistor R24, resettable fuse F1 and transistor Q5 shown in the figure realize overload protection. In case of instantaneous overload, due to the slow response speed of resettable fuse F1, the current generates an overvoltage greater than 0.9V at both ends of resistor R22. At this time, transistor Q5 is turned on, short-circuiting pins 1 and 3 of PMOS tube Q4, thereby shutting down the power supply of the entire system to achieve the purpose of overload protection. When the overload lasts, the internal resistance of resettable fuse F1 increases, realizing continuous protection of the system.

[0041] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A comparator-based high-power meter bus host transmission circuit, comprising a host controller (1), characterized in that: The host controller (1) is connected to the signal isolation circuit (2), the signal isolation circuit (2) is connected to the signal conversion circuit (3), the signal conversion circuit (3) is connected to the field bus (7), the signal conversion circuit (3) is also connected to the power control protection circuit (4) and the communication acceleration circuit (6), respectively, the power control protection circuit (4) is connected to the power supply (5); the power control protection circuit (4) is connected to the host controller (1), and the signal isolation circuit (2) is connected to the communication acceleration circuit (6).

2. The comparator-based high-power meter bus host transmission circuit according to claim 1, characterized in that: The signal conversion circuit (3) comprises a first comparator and a first switch circuit, wherein an input end of the first comparator is connected to an output signal of the signal isolation circuit (2), and another input end of the first comparator is connected to a first reference voltage circuit; an output end of the first comparator is connected to an input end of the first switch circuit, and another input end of the first switch circuit is connected to an output end of the power control protection circuit (4); and an output end of the first switch circuit is connected to a field bus (7) via a diode D1.

3. The comparator-based high-power meter bus host sending circuit according to claim 2, characterized in that the communication acceleration circuit (6) comprises a second comparator, a third comparator and a MOS tube Q3, one input end of the second comparator and the third comparator are both connected to the output signal of the signal isolation circuit (2), the other input end of the second comparator is connected to the second reference voltage circuit, the other input end of the third comparator is connected to the third reference voltage circuit, the output ends of the second comparator and the third comparator are both connected to the gate of the MOS tube Q3, the drain of the MOS tube Q3 is connected to the field bus (7), and the source of the MOS tube Q3 is grounded.

4. The comparator-based high-power meter bus host transmission circuit according to claim 3, characterized in that: The first reference voltage circuit, the second reference voltage circuit and the third reference voltage circuit all include a first resistor and a second resistor connected in series, one end of the first resistor is connected to the output end of the power supply control protection circuit (4), the other end of the first resistor is connected to one end of the second resistor, and the other end of the second resistor is grounded; the other end of the first resistor and one end of the second resistor are connected as output ends to the other input end of the first comparator, the second comparator or the third comparator; and the two ends of the second resistor are connected in parallel with a first capacitor.

5. The comparator-based high-power meter bus host transmission circuit according to claim 3, characterized in that: The output voltage of the first reference voltage circuit of the first comparator is the middle voltage of the output signal of the signal isolation circuit (2), and the output voltage of the first reference voltage circuit of the first comparator is located between the output voltages of the second reference voltage circuit of the second comparator and the third reference voltage circuit of the third comparator.

6. The comparator-based high-power meter bus host transmission circuit according to any one of claims 1 to 5, characterized in that: The power control protection circuit (4) comprises a switch circuit (43), an overload protection circuit (42) and a power control circuit (41); an input end of the switch circuit (43) is connected to the power supply (5); another input end of the switch circuit (43) is connected to the overload protection circuit (42) and the power control circuit (41), respectively; and an output end of the switch circuit (43) obtains an output voltage through the overload protection circuit (42).

7. The comparator-based high-power meter bus host transmission circuit according to claim 6, characterized in that: The power control circuit (41) comprises a power isolation circuit and a MOS tube Q6, wherein the input end of the power isolation circuit is connected to the host controller (1), the output end of the power isolation circuit is connected to the gate of the MOS tube Q6, the source of the MOS tube Q6 is grounded, and the drain of the MOS tube Q6 is connected to the other input end of the switch circuit (43).

8. The comparator-based high-power meter bus host transmission circuit according to claim 7, characterized in that: The overload protection circuit (42) comprises a resettable fuse and a transistor Q5, the base of the transistor Q5 being connected to the output end of the switch circuit (43) and one end of the resettable fuse respectively through a resistor R24, the emitter of the transistor Q5 being connected to one end of the resistor R22, the collector of the transistor Q5 being connected to the other input end of the switch circuit (43), the other end of the resettable fuse being connected to the other end of the resistor R22, and one end of the resistor R22 obtaining an output voltage.

9. The comparator-based high-power meter bus host transmission circuit according to claim 7 or 8, characterized in that: The switch circuit (43) comprises a PMOS tube Q4, the gate of the PMOS tube Q4 being respectively connected to one end of a resistor R23, one end of a resistor R25, and the collector of a transistor Q5 of an overload protection circuit (42), the other end of the resistor R25 being connected to the drain of a MOS tube Q6, the drain of the PMOS tube Q4 being connected to the positive electrode of a power source (5), and the source of the PMOS tube Q4 being connected to the other end of the resistor R23 and one end of a self-recovery fuse of the overload protection circuit (42).

10. The comparator-based high-power meter bus host transmission circuit according to claim 7, characterized in that: The signal isolation circuit (2) and the power isolation circuit both comprise a first transistor and an optocoupler isolator, wherein the base of the first transistor is connected to the input signal, the base of the first transistor is grounded via a third resistor, the collector of the first transistor is connected to an input end of the optocoupler isolator, an output end of the optocoupler isolator serves as an output end, the other input end of the optocoupler isolator, the other output end of the optocoupler isolator, and the source of the first transistor are all grounded; an input end of the optocoupler isolator and the collector of the first transistor are both connected to a 5V voltage via a fourth resistor, an output end of the optocoupler isolator is respectively connected to one end of a fifth resistor and one end of a sixth resistor, the other end of the fifth resistor is connected to a positive voltage, and the other end of the sixth resistor is grounded.

Images