Circuit board structure containing metal materials with different thermal expansion coefficients and manufacturing method thereof

Abstract

The invention discloses a circuit board structure containing metal materials with different thermal expansion coefficients and a manufacturing method of the circuit board structure. The circuit board structure comprises a core substrate layer, a first circuit layer formed on the core substrate layer and an insulating dielectric layer formed on the first circuit layer. A signal via hole is formed in the inner side of the insulating dielectric layer. The circuit board structure further comprises a first metal material and a second metal material which are formed in the signal conduction hole. Wherein the first metal material is formed on the first circuit layer, and the second metal material is formed on the first metal material. The first metal material has a first thermal expansion coefficient, the second metal material has a second thermal expansion coefficient, and the second thermal expansion coefficient is greater than the first thermal expansion coefficient. Therefore, when the hole (Via) of the circuit board is broken, the signal connection can be maintained.

Description

Technical Field

[0001] The present application relates to a circuit board structure, and more particularly to a circuit board structure including metal materials with different thermal expansion coefficients and a manufacturing method thereof. Background Art

[0002] like Figure 1 As shown, in the prior art, two adjacent layers of circuits L in a circuit board E can be connected by signals, for example, through a via hole Via and a metal material M (such as copper) filled therein. During the processing of the via hole Via, the metal material M is mainly filled in the hole by a hole-filling electroplating process. Before electroplating, the surface to be electroplated in the circuit board E generally needs to be cleaned to ensure that the electroplating quality meets the requirements. Figure 2 As shown, if the surface to be plated in the circuit board E is not sufficiently cleaned, the circuit board E formed in the subsequent operation process may be heated, causing the interface fracture C to occur at the junction of the metal material M in the via hole Via and the circuit L or the copper layer, thereby causing the electrical signal to be unable to be transmitted between the two adjacent layers of circuit L. Therefore, the product of the circuit board E may be judged as functional failure due to the signal disconnection.

[0003] Therefore, the inventor felt that the above-mentioned deficiencies could be improved, so he devoted himself to research and applied scientific theories, and finally proposed the present application which has a reasonable design and effectively improves the above-mentioned deficiencies. Summary of the invention

[0004] The present application provides a circuit board structure including metal materials with different thermal expansion coefficients, so as to effectively improve the defects that may occur in the existing torsion plates.

[0005] The present application discloses a circuit board structure including metal materials with different thermal expansion coefficients, including: a core substrate layer; a first circuit layer formed on the core substrate layer; an insulating dielectric layer formed on the first circuit layer; wherein a signal via hole is formed on the inner side of the insulating dielectric layer; a first metal material is formed in the signal via hole and formed on the first circuit layer; and a second metal material is formed in the signal via hole and formed on the first metal material; wherein the first metal material has a first thermal expansion coefficient, the second metal material has a second thermal expansion coefficient, and the second thermal expansion coefficient is greater than the first thermal expansion coefficient.

[0006] Optionally, when the circuit board structure undergoes a high-temperature operation, the volume expansion rate of the second metal material is greater than the volume expansion rate of the first metal material, so that the second metal material generates an extrusion stress in the direction of the first metal material, and the first metal material can continuously contact the first circuit layer and maintain electrical connection through the extrusion of the second metal material.

[0007] Optionally, in the signal via, the first metal material has a first thickness, the second metal material has a second thickness, and the second thickness of the second metal material is greater than the first thickness of the first metal material.

[0008] Optionally, the sum of the first thickness and the second thickness is defined as the total thickness, the first thickness of the first metal material accounts for 15% to 45% of the total thickness, and the second thickness of the second metal material accounts for 55% to 85% of the total thickness.

[0009] Optionally, the first thermal expansion coefficient of the first metal material and the second thermal expansion coefficient of the second metal material are respectively between 10 and 40*10 -6 / K@20°C, and the difference between the second thermal expansion coefficient and the first thermal expansion coefficient is not less than 1*10 -6 / K@20℃.

[0010] Optionally, the circuit board structure further includes a second circuit layer formed on a surface of the insulating dielectric layer away from the first circuit layer; wherein the first circuit layer is connected to the first metal material, and the second circuit layer is connected to the second metal material.

[0011] Optionally, the first metal material has a base portion and a protruding portion formed on the base portion, and the width of the base portion is greater than the width of the protruding portion, so that the first metal material presents a convex structure.

[0012] Optionally, the base portion is formed on the first circuit layer, and the protrusion is embedded in the second metal material, so that the first metal material is embedded in the second metal material.

[0013] Optionally, when the circuit board structure cools down, the volume shrinkage rate of the first metal material is greater than the volume shrinkage rate of the second metal material, so that a bending stress is generated in the base portion in a direction toward the protruding portion.

[0014] The present application also discloses a method for manufacturing a circuit board structure, including: providing a core substrate layer; forming a first circuit layer on a side surface of the core substrate layer; forming an insulating dielectric layer on a side surface of the first circuit layer away from the core substrate layer; forming a signal via hole on the inner side of the insulating dielectric layer, and the signal via hole is connected to the upper surface and the lower surface of the insulating dielectric layer; forming a first metal material in the signal via hole and formed on the first circuit layer; wherein the first metal material has a first thermal expansion coefficient; and forming a second metal material in the signal via hole and formed on the first metal material; wherein the second metal material has a second thermal expansion coefficient, and the second thermal expansion coefficient is greater than the first thermal expansion coefficient.

[0015] In summary, the circuit board structure and manufacturing method provided in the present application, which include metal materials with different thermal expansion coefficients, can maintain signal connection when the hole (Via) is broken by "stacking the first metal material and the second metal material in the signal via and designing the thermal expansion coefficient".

[0016] To further understand the features and technical contents of the present application, please refer to the following detailed description and drawings of the present application. However, such description and drawings are only used to illustrate the present application and are not intended to limit the scope of protection of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 The figure is a cross-sectional schematic diagram of a circuit board structure in the prior art.

[0018] Figure 2 It is a schematic diagram of interface fracture occurring at the junction of the metal material and the copper layer in the via hole of the circuit board structure in the prior art.

[0019] Figure 3 It is a cross-sectional schematic diagram of the circuit board structure of the first embodiment of the present application.

[0020] Figure 4 for Figure 1 Schematic diagram of a second metal material generating a compressive stress downward.

[0021] Figure 5 for Figure 1 A schematic diagram of another variation of the circuit board structure.

[0022] Figure 6 It is a cross-sectional schematic diagram of the circuit board structure of the second embodiment of the present application.

[0023] Figure 7 for Figure 6 A partial enlarged view of the middle area VII.

[0024] Figure 8 for Figure 6 Schematic diagram of a first metal material generating a bending stress inward.

[0025] Fig. 9 This is a flow chart of a method for manufacturing a circuit board structure according to the third embodiment of the present application. DETAILED DESCRIPTION

[0026] The following is an explanation of the embodiments disclosed in the present application through specific embodiments. Those skilled in the art can understand the advantages and effects of the present application from the contents disclosed in this specification. The present application can be implemented or applied through other different specific embodiments, and the details in this specification can also be modified and changed in various ways based on different viewpoints and applications without departing from the concept of the present application. In addition, the drawings of the present application are only simple schematic illustrations and are not depicted according to actual sizes. It is stated in advance. The following embodiments will further explain the relevant technical contents of the present application in detail, but the disclosed contents are not intended to limit the scope of protection of the present application.

[0027] It should be understood that, although the terms "first", "second", "third", etc. may be used herein to describe various components or signals, these components or signals should not be limited by these terms. These terms are mainly used to distinguish one component from another component, or one signal from another signal. In addition, the term "or" used herein may include any one or more combinations of the associated listed items depending on the actual situation.

[0028] First embodiment

[0029] See also Figure 3 and Figure 4 As shown, the first embodiment of the present application provides a circuit board structure 100, and in particular, provides a circuit board structure 100 including metal materials with different thermal expansion coefficients, which can improve the problem in the prior art that electrical signals cannot be transmitted due to fractures at the interface between the via and the copper circuit layer.

[0030] In order to achieve the above purpose, the circuit board structure 100 includes: a core substrate layer 1, a first circuit layer 2 and an insulating dielectric layer 3. The first circuit layer 2 is formed on a side surface of the core substrate layer 1, and the insulating dielectric layer 3 is formed on a side surface of the first circuit layer 2 away from the core substrate layer 1.

[0031] In this embodiment, the material of the core substrate layer 1 may be, for example, glass fiber cloth (such as FR-4), the first circuit layer 2 may be, for example, a copper metal circuit layer, and the material of the insulating dielectric layer 3 may be, for example, a semi-cured bonding sheet (such as Prepreg, PP glue), but the present application is not limited thereto.

[0032] Furthermore, a signal via hole 4 is formed inside the insulating dielectric layer 3, and the signal via hole 4 is connected to the upper surface and the lower surface of the insulating dielectric layer 3, and corresponds in position to a portion of the first circuit layer 2. In this embodiment, the signal via hole 4 is a laser drilled hole, and presents a hole shape that is wide at the top and narrow at the bottom, but the present application is not limited thereto.

[0033] Furthermore, the circuit board structure 100 is filled with a first metal material 41 and a second metal material 42 in sequence inside the signal via 4 from close to the first circuit layer 2 to away from the first circuit layer 2 (or from the bottom to the top).

[0034] In other words, the first metal material 41 is formed in the hole of the signal via 4, and is formed on the first circuit layer 2 and is directly connected to and in contact with the first circuit layer 2. In addition, the second metal material 42 is formed in the hole of the signal via 4, and is formed on a side surface of the first metal material 41 away from the first circuit layer 2, and is directly connected to and in contact with the first metal material 41.

[0035] The first metal material 41 and the second metal material 42 may be formed by, for example, at least one of a metal electroplating process, an electroless plating process, a metal physical deposition process, and a metal chemical deposition process, respectively.

[0036] In this embodiment, the first metal material 41 and the second metal material 42 are both in contact with the sidewalls of the signal via hole 4 (eg Figure 3 However, the present application is not limited thereto.

[0037] like Figure 5 As shown, in another embodiment of the present application, the first metal material 41 may also be formed on the first circuit layer 2 and extend to cover all side walls in the signal via hole 4. The second metal material 42 fills the remaining portion of the signal via hole 4 and does not contact the side walls in the signal via hole 4.

[0038] Please continue reading Figure 3 and Figure 4As shown, further, the first metal material 41 has a first thermal expansion coefficient α1, and the second metal material 42 has a second thermal expansion coefficient α2. The second thermal expansion coefficient α2 of the second metal material 42 is greater than the first thermal expansion coefficient α1 of the first metal material 41.

[0039] According to this, if Figure 4 As shown, when the circuit board structure 100 undergoes a high-temperature operation, the volume expansion rate of the second metal material 42 is greater than the volume expansion rate of the first metal material 41, so that the second metal material 42 generates an extrusion stress F1 in the direction of the first metal material 41, and the first metal material 41 can be continuously in contact with the first circuit layer 2 through the extrusion of the second metal material 42 to maintain electrical connection.

[0040] The high temperature operation may be, for example, high temperature reflow, but the present application is not limited thereto.

[0041] According to the above configuration, even if the interface between the first metal material 41 and the first circuit layer 2 is fractured, the first metal material 41 is still squeezed by the extrusion stress F1 and is continuously connected to and in contact with the first circuit layer 2. Therefore, the problem of the inability to transmit electrical signals due to fracture at the interface between the via and the copper circuit layer in the prior art can be effectively solved.

[0042] It is worth mentioning that the coefficient of thermal expansion (CTE) referred to herein refers to the regularity of the geometrical properties of a material changing with the rise and fall of temperature under the effect of thermal expansion and contraction. The coefficient of thermal expansion of the first and second metal materials may be the coefficient of linear thermal expansion (CLTE), but is not limited thereto.

[0043] It is worth mentioning that in some embodiments of the present application, the first metal material 41 and the second metal material 42 filled in the signal via 4 can be respectively selected from at least one of the material group consisting of: copper metal, silver metal, gold metal, zinc metal and aluminum metal, but the present application is not limited thereto.

[0044] In terms of the linear thermal expansion coefficient α, for example, the linear thermal expansion coefficient α of the copper metal is 16.5*10 -6 / K@20°C. The linear thermal expansion coefficient α of the silver metal is 19.5*10 -6 / K@20℃.

[0045] The linear thermal expansion coefficient α of the gold metal is 14.2*10-6 / K@20℃. And the linear thermal expansion coefficient α of the zinc metal is 36.0*10 -6 / K@20°C. Furthermore, the linear thermal expansion coefficient α of the aluminum metal is 23.0*10 -6 / K@20℃.

[0046] In some embodiments of the present application, the second metal material 42 may be, for example, copper metal (α2=16.5*10 -6 / K@20°C), and the first metal material 41 may be, for example, gold metal (α1=

[0047] 14.2*10 -6 / K@20°C). Alternatively, the second metal material 42 may be, for example, silver metal (α2=19.5*10 -6 / K@20°C, and the first metal material 41 may be, for example, copper metal (α2=16.5*10 -6 / K@20℃).

[0048] It is worth mentioning that the second thermal expansion coefficient α2 of the second metal material 42 in the above embodiments is greater than the first thermal expansion coefficient α1 of the first metal material 41 .

[0049] From another perspective, the first thermal expansion coefficient α1 of the first metal material 41 and the second thermal expansion coefficient α2 of the second metal material 42 are respectively in the range of 10 to 40*10 -6 / K@20℃.

[0050] Furthermore, a difference between the second thermal expansion coefficient α2 of the second metal material 42 and the first thermal expansion coefficient α1 of the first metal material 41 is not less than 1*10 -6 / K@20℃, and preferably not less than 2*10 -6 / K@20℃.

[0051] However, it should be noted that the above embodiments are merely exemplary descriptions, and the present application is not limited to the above embodiments.

[0052] Please continue reading Figure 3 and Figure 4 In the signal via 4 , the first metal material 41 has a first thickness T1 , and the second metal material 42 has a second thickness T2 . The second thickness T2 of the second metal material 42 is greater than the first thickness T1 of the first metal material 41 .

[0053] In some embodiments of the present application, the sum of the thickness of the first thickness T1 and the second thickness T2 is defined as the total thickness. The first thickness T1 of the first metal material 41 accounts for 15% to 45% of the total thickness, and preferably 20% to 40%. Furthermore, the second thickness T2 of the second metal material 42 accounts for 55% to 85% of the total thickness, and preferably 60% to 80%.

[0054] Based on the above thickness ratio, the second metal material 42 can generate more sufficient extrusion stress F1 on the first metal material 41 when operating at high temperature, so that the first metal material 41 is continuously in contact with the first circuit layer 2 and electrically connected.

[0055] Furthermore, in this embodiment, the circuit board structure 100 further includes a second circuit layer 5, and the second circuit layer 5 is formed on a side surface of the insulating dielectric layer 3 away from the first circuit layer 2. From another perspective, the first circuit layer 2 and the second circuit layer 5 are respectively formed on two opposite side surfaces of the insulating dielectric layer 3. The first circuit layer 2 is connected to the first metal material 41, and the second circuit layer 5 is connected to the second metal material 42.

[0056] In one embodiment of the present application, the first circuit layer 2 and the first metal material 41 can be formed separately in different electroplating processes or metal deposition processes, and the second circuit layer 5 can be formed in the same electroplating process or metal deposition process as the second metal material 42, but the present application is not limited thereto.

[0057] Second embodiment

[0058] See also Figures 6 to 8 As shown, the second embodiment of the present application further provides a circuit board structure 100'. The circuit board structure 100' comprises: a core substrate layer 1, a first circuit layer 2, an insulating dielectric layer 3, and a second circuit layer 5. The first circuit layer 2 is formed on a side surface of the core substrate layer 1, the insulating dielectric layer 3 is formed on a side surface of the first circuit layer 2 away from the core substrate layer 1, and the second circuit layer 5 is formed on a side surface of the insulating dielectric layer 3 away from the first circuit layer 2.

[0059] A signal via hole 4 is formed inside the insulating dielectric layer 3, and the signal via hole 4 is connected to the upper surface and the lower surface of the insulating dielectric layer 3. The signal via hole 4 is sequentially filled with a first metal material 41 and a second metal material 42, wherein the first metal material 41 is formed on the first circuit layer 2, and the second metal material 42 is formed on the first metal material 41. The first metal material 41 has a first thermal expansion coefficient α1, and the second metal material 42 has a second thermal expansion coefficient α2, and the second thermal expansion coefficient α2 is greater than the first thermal expansion coefficient α1. The first metal material 41 is connected to the first circuit layer 2, and the second metal material 42 is connected to the second circuit layer 5, so that the first circuit layer 2 and the second circuit layer 5 are electrically connected.

[0060] The circuit board structure 100' provided in the second embodiment of the present application is substantially the same as the circuit board structure 100 of the first embodiment, and the main difference is that the first metal material 41 in the second embodiment of the present application further has a base portion 411 and a protrusion 412 formed on the base portion 411. The width of the base portion 411 is greater than the width of the protrusion 412, so that the second metal material 42 presents a convex structure.

[0061] Furthermore, the base portion 411 is formed on the first circuit layer 2 and is directly connected to and in contact with the first circuit layer 2. The protrusion 412 is embedded in the second metal material 42, so that the first metal material 41 is embedded in the second metal material 42. Accordingly, the contact area between the first metal material 41 and the second metal material 42 can be increased to effectively increase the bonding between the heterogeneous materials.

[0062] Similar to the first embodiment described above, when the circuit board structure 100' undergoes a high temperature operation, the volume expansion rate of the second metal material 42 will be greater than the volume expansion rate of the first metal material 41, so that the second metal material 42 generates an extrusion stress F1 in the direction of the first metal material 41, and the first metal material 41 can be continuously in contact with the first circuit layer 2 through the extrusion of the second metal material 42 to maintain electrical connection.

[0063] Specifically, when the circuit board structure 100' is cooled down by the high temperature operation, the volume shrinkage rate of the first metal material 41 is greater than the volume shrinkage rate of the second metal material 42, so that the base portion 411 generates a bending stress F2 (such as Figure 8 As shown), the first metal material 41 and the second metal material 42 are more closely bonded and contact the first circuit layer 2 downward to maintain electrical connection.

[0064] According to the above configuration, even if the interface between the first metal material 41 and the first circuit layer 2 is broken, the first metal material 41 will continue to be connected and in contact with the first circuit layer 2. Therefore, the problem of the inability to transmit electrical signals due to the break at the interface between the via and the copper circuit layer in the prior art can be effectively solved.

[0065] Third embodiment

[0066] The above is a description of the structural features and material features of the circuit board structures 100 and 100' of the embodiments of the present application. The following is a description of the manufacturing method of the circuit board structure of the embodiments of the present application. Fig. 9 As shown, the manufacturing method of the circuit board structure includes steps S110 to S160.

[0067] It must be noted that the sequence of the steps and the actual operation methods in this embodiment can be adjusted according to needs and are not limited to those in this embodiment.

[0068] The step S110 includes: providing a core substrate layer 1 . The step S120 includes: forming a first circuit layer 2 on a side surface of the core substrate layer 1 .

[0069] The step S130 includes: forming an insulating dielectric layer 3 on a surface of the first circuit layer 2 that is away from the core substrate layer 1 .

[0070] The step S140 includes: forming a signal via hole 4 inside the insulating dielectric layer 3 , and the signal via hole 4 is connected to the upper surface and the lower surface of the insulating dielectric layer 3 and corresponds to a portion of the first circuit layer 2 in position.

[0071] The step S150 includes: forming a first metal material 41 in the signal via hole 4 and on the first circuit layer 2, and directly connected to and in contact with the first circuit layer 2. The first metal material 41 may have the following Figure 3 As shown in the figure, the first metal material 41 may also have a flat layered shape. Figure 6 The first metal material 41 has a first thermal expansion coefficient α1.

[0072] The step S160 includes: forming a second metal material 42 in the signal via 4 and on the first metal material 41, and directly connected to and in contact with the first metal material 41. The second metal material 42 has a second thermal expansion coefficient α2, and the second thermal expansion coefficient α2 of the second metal material 42 is greater than the first thermal expansion coefficient α1 of the first metal material 41.

[0073] In some embodiments of the present application, the first metal material 41 and the second metal material 42 may be formed in the signal via 4 by at least one of a metal electroplating process, an electroless plating process, a metal physical deposition process, and a metal chemical deposition process, for example.

[0074] Advantageous Effects of the Invention

[0075] One of the beneficial effects of the present application is that the circuit board structure provided by the present application includes metal materials with different thermal expansion coefficients and the manufacturing method thereof, which can prevent the signal connection from being maintained when the hole (Via) is broken through the "stacking and thermal expansion coefficient design of the first metal material and the second metal material in the signal via hole".

[0076] The contents disclosed above are only preferred feasible embodiments of the present application, and are not intended to limit the scope of the present patent application. Therefore, all equivalent technical changes made using the description and drawings of the present application are included in the scope of the present patent application.

Claims

1. A circuit board structure comprising metal materials with different thermal expansion coefficients, characterized in that: The circuit board structure comprises: a core substrate layer; A first circuit layer formed on the core substrate layer; An insulating dielectric layer is formed on the first circuit layer; wherein a signal via hole is formed inside the insulating dielectric layer; a first metal material formed in the signal via hole and on the first circuit layer; and a second metal material formed in the signal via hole and formed on the first metal material; The first metal material has a first thermal expansion coefficient, the second metal material has a second thermal expansion coefficient, and the second thermal expansion coefficient is greater than the first thermal expansion coefficient.

2. The circuit board structure comprising metal materials with different thermal expansion coefficients according to claim 1, characterized in that: When the circuit board structure undergoes a high-temperature operation, the volume expansion rate of the second metal material is greater than the volume expansion rate of the first metal material, so that the second metal material generates an extrusion stress in the direction of the first metal material, and the first metal material can continuously contact the first circuit layer and maintain electrical connection through the extrusion of the second metal material.

3. The circuit board structure comprising metal materials with different thermal expansion coefficients according to claim 1, characterized in that: In the signal via, the first metal material has a first thickness, the second metal material has a second thickness, and the second thickness of the second metal material is greater than the first thickness of the first metal material.

4. The circuit board structure comprising metal materials with different thermal expansion coefficients according to claim 3, characterized in that: The sum of the first thickness and the second thickness is defined as the total thickness, the first thickness of the first metal material accounts for 15% to 45% of the total thickness, and the second thickness of the second metal material accounts for 55% to 85% of the total thickness.

5. The circuit board structure comprising metal materials with different thermal expansion coefficients according to claim 1, characterized in that: The first thermal expansion coefficient of the first metal material and the second thermal expansion coefficient of the second metal material are respectively between 10 and 40*10 -6 / K@20°C, and the difference between the second thermal expansion coefficient and the first thermal expansion coefficient is not less than 1*10 -6 / K@20℃.

6. The circuit board structure comprising metal materials with different thermal expansion coefficients according to claim 1, characterized in that: The circuit board structure comprising metal materials with different thermal expansion coefficients further comprises a second circuit layer formed on a surface of the insulating dielectric layer on a side away from the first circuit layer; wherein the first circuit layer is connected to the first metal material, and the second circuit layer is connected to the second metal material.

7. The circuit board structure comprising metal materials with different thermal expansion coefficients according to claim 1, characterized in that: The first metal material has a base portion and a protruding portion formed on the base portion, and the width of the base portion is greater than the width of the protruding portion, so that the first metal material presents a convex structure.

8. The circuit board structure comprising metal materials with different thermal expansion coefficients according to claim 7, characterized in that: The base portion is formed on the first circuit layer, and the protrusion is embedded in the second metal material so that the first metal material is embedded in the second metal material.

9. The circuit board structure comprising metal materials with different thermal expansion coefficients according to claim 8, characterized in that: When the circuit board structure cools down, the volume shrinkage rate of the first metal material is greater than the volume shrinkage rate of the second metal material, so that a bending stress is generated in the base portion in a direction toward the protruding portion.

10. A method for manufacturing a circuit board structure, characterized in that: The manufacturing method of the circuit board structure comprises: Providing a core substrate layer; Forming a first circuit layer on a surface of one side of the core substrate layer; forming an insulating dielectric layer on a surface of the first circuit layer away from the core substrate layer; Forming a signal via hole inside the insulating dielectric layer, and the signal via hole is connected to the upper surface and the lower surface of the insulating dielectric layer; forming a first metal material in the signal via hole and on the first circuit layer; Wherein, the first metal material has a first thermal expansion coefficient; and A second metal material is formed in the signal via hole and on the first metal material; wherein the second metal material has a second thermal expansion coefficient, and the second thermal expansion coefficient is greater than the first thermal expansion coefficient.

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