High-frequency circuit

Abstract

A high-frequency circuit (1) is provided with: a power amplifier (11); and a variable load matching circuit (21 or 22) connected to the output of the power amplifier (11), the power amplifier (11) being supplied with a supply voltage (Vcc1) when a first power level is applied, and the load impedance from the power amplifier (11) being adjusted to a first impedance by the variable load matching circuit (21 or 22), the load impedance being adjusted to a second impedance by the variable load matching circuit (21 or 22) when the first power level is applied. When a second power level having a lower maximum output power than that of the first power level is applied, the power amplifier (11) is supplied with a power supply voltage (Vcc2), the power supply voltage (Vcc1) being higher than the power supply voltage (Vcc2), and the load impedance from the power amplifier (11) being adjusted to a second impedance by a variable load matching circuit (21 or 22). The first impedance is lower than the second impedance.

Description

Technical Field

[0001] The invention relates to a high-frequency circuit. Background Art

[0002] In mobile communication systems used in mobile phones and the like, in addition to the use and utilization of frequency bands that require radio station licenses (hereinafter referred to as licensed bands), the use and utilization of frequency bands that do not require radio station licenses (hereinafter referred to as unlicensed bands) are also being developed. In the licensed band, a power level that allows a higher maximum output power (hereinafter referred to as a high power level) is used, and in the unlicensed band, a power level that is limited to a lower maximum output power (hereinafter referred to as a low power level) is used.

[0003] Patent Document 1 discloses a high-frequency circuit that can utilize a license-exempt frequency band in addition to a licensed frequency band.

[0004] Prior art literature

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent Application Publication No. 2017-17691 Summary of the invention

[0007] Problem that the invention aims to solve

[0008] However, in the above-mentioned conventional technology, it is difficult to make the power amplifier support both the high power level and the low power level.

[0009] Therefore, the present invention provides a high frequency circuit that can support both high power levels and low power levels.

[0010] Solutions for solving problems

[0011] A high-frequency circuit involved in one embodiment of the present invention is configured to support a first power level and a second power level, wherein the maximum output power of the second power level is lower than the maximum output power of the first power level. The high-frequency circuit comprises: a first power amplifier; and a variable load matching circuit connected to the output end of the first power amplifier. When the first power level is applied, the first power amplifier is provided with a first power supply voltage, and the load impedance viewed from the first power amplifier is adjusted to the first impedance through the variable load matching circuit. When the second power level is applied, the first power amplifier is provided with a second power supply voltage, and the load impedance viewed from the first power amplifier is adjusted to the second impedance through the variable load matching circuit. The first power supply voltage is higher than the second power supply voltage, and the first impedance is lower than the second impedance.

[0012] A high-frequency circuit involved in one embodiment of the present invention is configured to support a first power level and a second power level, wherein the maximum output power of the second power level is lower than the maximum output power of the first power level. The high-frequency circuit comprises: a first power amplifier; a first filter; a second filter; and a switching circuit, which includes a first terminal connected to the output end of the first power amplifier, a second terminal connected to the first filter, and a third terminal connected to the second filter. When the first power level is applied, the first power amplifier is provided with a first power supply voltage, and the first filter is connected to the first power amplifier through the switching circuit. When the second power level is applied, the first power amplifier is provided with a second power supply voltage, and the second filter is connected to the first power amplifier through the switching circuit. The first power supply voltage is higher than the second power supply voltage, and the input impedance of the first filter is lower than the input impedance of the second filter.

[0013] Effects of the Invention

[0014] According to the high-frequency circuit of the present invention, it is possible to support both high power levels and low power levels. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is a circuit configuration diagram of a communication device according to Embodiment 1.

[0016] Figure 2 This is a circuit configuration diagram of an example of a variable load matching circuit according to the first embodiment.

[0017] Figure 3 This is a circuit configuration diagram of another example of the variable load matching circuit according to the first embodiment.

[0018] Figure 4 This is a circuit configuration diagram of a communication device according to Embodiment 2.

[0019] Figure 5 This is a circuit configuration diagram of an example of a variable load matching circuit according to the second embodiment.

[0020] Figure 6 This is a circuit configuration diagram of another example of the variable load matching circuit according to the second embodiment.

[0021] Figure 7 This is a circuit configuration diagram of a communication device according to Embodiment 3.

[0022] Figure 8 4 is a circuit configuration diagram of a variable load matching circuit according to the third embodiment.

[0023] Fig. 9 This is a circuit configuration diagram of a communication device according to a fourth embodiment.

[0024] Fig.10 This is a circuit configuration diagram of a communication device according to the fifth embodiment.

[0025] Fig.11 This is a circuit configuration diagram of a communication device according to a sixth embodiment.

[0026] Fig.12 This is a circuit structure diagram of a communication device according to Embodiment 7.

[0027] Fig.13 This is a circuit structure diagram of a communication device according to the eighth embodiment.

[0028] Fig.14 This is a circuit structure diagram of a communication device according to the ninth embodiment.

[0029] Fig.15 This is a circuit configuration diagram of a communication device according to a tenth embodiment.

[0030] Fig.16 It is a circuit configuration diagram of a communication device according to another embodiment. DETAILED DESCRIPTION

[0031] The following are embodiments of the present invention described in detail using the accompanying drawings. In addition, the embodiments described below all represent general or specific examples. The numerical values, shapes, materials, structural elements, configurations of structural elements, and connection methods shown in the following embodiments are examples, and their purpose is not to limit the present invention.

[0032] In addition, each figure is a schematic diagram that appropriately emphasizes, omits, or adjusts the ratio in order to express the present invention, and is not necessarily strictly illustrated, and sometimes differs from the actual shape, positional relationship, and ratio. In each figure, the same reference numerals are given to substantially the same structure, and repeated descriptions are sometimes omitted or simplified.

[0033] In the circuit structure of the present invention, "connection" includes not only direct connection through connection terminals and / or wiring conductors, but also electrical connection via other circuit elements. "Connection between A and B" means connection between A and B and both A and B, and means being arranged in series on the path connecting A and B.

[0034] In the circuit structure of the present invention, a "terminal" refers to a point where a conductor in an element ends. In addition, when the impedance of the path between elements is sufficiently low, the terminal is interpreted as an arbitrary point on the path between elements or the entire path, rather than just a single point.

[0035] (Implementation Method 1)

[0036] Embodiment 1 is described. The communication device 6 involved in this embodiment is equivalent to a user terminal (UE: User Equipment) in a cellular network, and is typically a mobile phone, a smart phone, a tablet computer, a wearable device, etc. In addition, the communication device 6 may also be an IoT (Internet of Things) sensor device, a medical / health care device, a car, an unmanned aerial vehicle (UAV: Unmanned Aerial Vehicle) (so-called drone), or an unmanned guided vehicle (AGV: Automated Guided Vehicle).

[0037] Reference Figure 1 The circuit configurations of the communication device 6 and the high-frequency circuit 1 according to the present embodiment will be described. Figure 1 It is a circuit configuration diagram of the communication device 6 involved in this embodiment.

[0038] also, Figure 1 The circuit configurations are exemplary, and the communication device 6 and the high frequency circuit 1 can be implemented using any of a variety of circuit implementations and circuit technologies. Thus, the description of the communication device 6 and the high frequency circuit 1 provided below should not be interpreted in a limiting sense.

[0039] [1.1 Circuit Structure of Communication Device 6]

[0040] First, refer to Figure 1 A communication device 6 according to the present embodiment will be described. The communication device 6 includes a high frequency circuit 1, an antenna 2, an RFIC (Radio Frequency Integrated Circuit) 3, a BBIC (Baseband Integrated Circuit) 4, and a power supply circuit 5.

[0041] The high-frequency circuit 1 transmits a high-frequency signal between the antenna 2 and the RFIC 3. The circuit structure of the high-frequency circuit 1 will be described later.

[0042] The antenna 2 is connected to the antenna connection terminal 100 of the high frequency circuit 1. The antenna 2 receives a high frequency signal from the high frequency circuit 1 and outputs it to the outside of the communication device 6. In addition, the antenna 2 may receive a high frequency signal from the outside of the communication device 6 and output it to the high frequency circuit 1. In addition, the antenna 2 may not be included in the communication device 6. In addition, the communication device 6 may include one or more antennas in addition to the antenna 2.

[0043] RFIC 3 is an example of a signal processing circuit that processes a high-frequency signal. Specifically, RFIC 3 processes the transmission signal input from BBIC 4 by up-conversion, etc., and outputs the high-frequency transmission signal generated after the signal processing to the high-frequency circuit 1. In addition, RFIC 3 has a control unit that controls switches and power amplifiers, etc., of the high-frequency circuit 1 and / or the power supply circuit 5. In addition, part or all of the functions of RFIC 3 as a control unit may also be configured outside RFIC 3, for example, may also be configured in BBIC 4, the high-frequency circuit 1, or the power supply circuit 5.

[0044] The BBIC 4 is a baseband signal processing circuit that performs signal processing using an intermediate frequency band having a frequency lower than the frequency of the high frequency signal transmitted by the high frequency circuit 1. As the signal processed by the BBIC 4, for example, an image signal is used to display an image and / or an audio signal is used to make a call via a speaker. In addition, the BBIC 4 may not be included in the communication device 6.

[0045] The power supply circuit 5 is configured to supply a power supply voltage to the high frequency circuit 1. At this time, the power supply circuit 5 can selectively supply at least two levels of power supply voltages Vcc1 and Vcc2. The power supply voltage Vcc1 is an example of a first power supply voltage, which is higher than the power supply voltage Vcc2. The power supply voltage Vcc2 is an example of a second power supply voltage, which is lower than the power supply voltage Vcc1. As the power supply voltage Vcc1, for example, a voltage level of 6 volts is used, and as the power supply voltage Vcc2, for example, a voltage level of 3 volts is used.

[0046] [1.2 Circuit structure of high frequency circuit 1]

[0047] Next, refer to Figure 1 The high frequency circuit 1 according to the present embodiment is described below. The high frequency circuit 1 includes a power amplifier 11 , a variable load matching circuit 21 or 22 , a filter 31 , an antenna connection terminal 100 , an input terminal 111 , and a power supply voltage terminal 121 .

[0048] The antenna connection terminal 100 is an external connection terminal of the high frequency circuit 1 and is a terminal for supplying a transmission signal to the outside of the high frequency circuit 1. The antenna connection terminal 100 is connected to the antenna 2 outside the high frequency circuit 1 and is connected to the filter 31 inside the high frequency circuit 1.

[0049] The input terminal 111 is an external connection terminal of the high frequency circuit 1, and is a terminal for receiving a transmission signal from outside the high frequency circuit 1. The input terminal 111 is connected to the RFIC 3 outside the high frequency circuit 1, and is connected to the power amplifier 11 inside the high frequency circuit 1. Thus, the transmission signal received from the RFIC 3 via the input terminal 111 is provided to the power amplifier 11.

[0050] The power supply voltage terminal 121 is an external connection terminal of the high frequency circuit 1, and is a terminal for receiving power supply voltages Vcc1 and Vcc2 from the power supply circuit 5. The power supply voltage terminal 121 is connected to the power supply circuit 5 outside the high frequency circuit 1, and is connected to the power amplifier 11 inside the high frequency circuit 1. Thus, the power supply voltages Vcc1 and Vcc2 received from the power supply circuit 5 via the power supply voltage terminal 121 are provided to the power amplifier 11.

[0051] The power amplifier 11 is an example of a first power amplifier. The input end of the power amplifier 11 is connected to an input terminal 111. The output end of the power amplifier 11 is connected to a variable load matching circuit 21 or 22. In addition, the power amplifier 11 is connected to a power supply voltage terminal 121.

[0052] In this connection structure, the power amplifier 11 can amplify the high-frequency signal supplied from the RFIC 3 via the input terminal 111 using the power supply voltages Vcc1 and Vcc2 supplied from the power supply circuit 5 via the power supply voltage terminal 121 .

[0053] This power amplifier 11 can be composed of a heterojunction bipolar transistor (HBT) and can be manufactured using semiconductor materials. As a semiconductor material, for example, silicon germanium (SiGe) or gallium arsenide (GaAs) can be used. In addition, the amplifying transistor of the power amplifier 11 is not limited to the HBT. For example, the power amplifier 11 can also be composed of a HEMT (High Electron Mobility Transistor) or a MESFET (Metal-Semiconductor Field Effect Transistor). In this case, gallium nitride (GaN) or silicon carbide (SiC) can also be used as a semiconductor material.

[0054] In addition, the power amplifier 11 can support a first power level, a second power level, and a third power level. When the first power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc1, and when the second power level and the third power level are applied, the power amplifier 11 is provided with a power supply voltage Vcc2. In addition, the power amplifier 11 may not be able to support the third power level.

[0055] The maximum output power of the first power level is higher than the maximum output power of the second power level and the third power level, and the first power level is equivalent to the high power level. The maximum output power of the second power level is lower than the maximum output power of the first power level and the third power level, and the second power level is equivalent to the low power level. The maximum output power of the third power level is lower than the maximum output power of the first power level and higher than the maximum output power of the second power level, and the third power level is equivalent to the medium power level.

[0056] In addition, the power class is a classification of the output power of the terminal specified by the maximum output power, and the smaller the value of the power class, the higher the permissible output power. For example, in 3GPP (registered trademark) (3rd Generation Partnership Project), the maximum output power of power class 1 is 31dBm, the maximum output power of power class 1.5 is 29dBm, the maximum output power of power class 2 is 26dBm, the maximum output power of power class 3 is 23dBm, and the maximum output power of power class 5 is 20dBm.

[0057] The maximum output power of the terminal is defined by the maximum output power at the antenna end of the terminal. The maximum output power of the terminal can be determined by a method defined by 3GPP or the like. For example, Figure 1 In the embodiment, the maximum output power is measured by measuring the radiation power at the antenna 2. Alternatively, instead of measuring the radiation power, a terminal may be provided near the antenna 2 and a measuring device (such as a spectrum analyzer) may be connected to the terminal to measure the maximum output power of the antenna 2.

[0058] The power level supported by the power amplifier can be determined according to the maximum output power of the power amplifier. For example, the maximum output power of a power amplifier supporting power level 2 is greater than 26 dBm.

[0059] In this embodiment, power level 2 is used as the first power level, power level 5 is used as the second power level, and power level 3 is used as the third power level. In addition, the combination of the first power level, the second power level, and the third power level is not limited thereto. For example, power level 1.5 may be used as the first power level, power level 3 may be used as the second power level, and power level 2 may be used as the third power level.

[0060] The variable load matching circuits 21 and 22 are variable impedance matching circuits configured to adjust the load impedance viewed from the power amplifier 11 according to the power level. The high frequency circuit 1 includes one of the variable load matching circuits 21 and 22. In addition, regarding the circuit configuration of the variable load matching circuits 21 and 22, use Figure 2 and Figure 3This will be described later.

[0061] The filter 31 is connected between the antenna connection terminal 100 and the variable load matching circuit 21 or 22. Specifically, one end of the filter 31 is connected to the variable load matching circuit 21 or 22, and the other end of the filter 31 is connected to the antenna connection terminal 100. The filter 31 corresponds to a specified frequency band and is a bandpass filter having a passband including the specified frequency band. The filter 31 has a power tolerance that can support the first power level. As the passband of the filter 31, for example, 5150MHz to 7125MHz, 5925MHz to 7125MHz, or 6425MHz to 7125MHz can be used, but the passband of the filter 31 is not limited to these. As the filter 31, a surface acoustic wave (SAW: Surface Acoustic Wave) filter, a bulk acoustic wave (BAW: Bulk Acoustic Wave) filter, an LC resonant filter or a dielectric resonant filter, or any combination thereof can be used, and it is not limited to these. In addition, the filter 31 may not be included in the high-frequency circuit 1.

[0062] The prescribed frequency band is a frequency band used for a communication system constructed using a radio access technology (RAT). The prescribed frequency band is pre-defined by standardization organizations, such as 3GPP and IEEE (Institute of Electrical and Electronics Engineers). As examples of communication systems, 5GNR (5th Generation New Radio) systems, LTE (Long Term Evolution) systems, and WLAN (Wireless Local Area Network) systems can be listed. For example, as a prescribed frequency band, n46, n96, n102 or n104 for 5GNR, or any combination thereof, can be used, but the prescribed frequency band is not limited to these.

[0063] [1.3 Circuit structure of variable load matching circuit]

[0064] Here, as different examples of the variable load matching circuits according to the present embodiment, the variable load matching circuits 21 and 22 will be described in sequence.

[0065] [1.3.1 Circuit structure of variable load matching circuit 21]

[0066] First, refer to Figure 2A circuit configuration of a variable load matching circuit 21 as an example of a variable load matching circuit according to the present embodiment will be described. Figure 2 2 is a circuit configuration diagram of the variable load matching circuit 21 according to the present embodiment.

[0067] also, Figure 2 is an exemplary circuit configuration, and the variable load matching circuit 21 can be implemented using any of a variety of circuit implementations and circuit techniques. Thus, the description of the variable load matching circuit 21 provided below should not be interpreted in a limiting sense.

[0068] The variable load matching circuit 21 includes inductors L211 and L212 , capacitors C211 to C214 , switches SW211 to SW214 , an input terminal T211 , and an output terminal T212 .

[0069] The input terminal T211 is connected to the output end of the power amplifier 11 outside the variable load matching circuit 21, and is connected to the inductor L211 inside the variable load matching circuit 21. The output terminal T212 is connected to the antenna connection terminal 100 via the filter 31 outside the variable load matching circuit 21, and is connected to the capacitors C213 and C214 inside the variable load matching circuit 21.

[0070] Inductors L211 and L212, switch SW211, capacitor C213, and switch SW212 are connected in series between input terminal T211 and output terminal T212. Switch SW213, capacitor C214, and switch SW214 are connected in series between inductor L212 and output terminal T212, and are connected in parallel with switch SW211, capacitor C213, and switch SW212.

[0071] Capacitors C211 and C212 are connected in parallel between the path between the input terminal T211 and the output terminal T212 and the ground. Specifically, capacitor C211 is connected between the path between inductors L211 and L212. Capacitor C212 is connected between the path between inductor L212 and capacitors C213 and C214 and the ground.

[0072] The switches SW211 and SW212 are each an example of a first switch, and are formed of a SPST (Single-Pole Single-Throw) type switch circuit. One end of the switch SW211 is connected to the inductor L212. The other end of the switch SW211 is connected to the capacitor C213. One end of the switch SW212 is connected to the capacitor C213. The other end of the switch SW212 is connected to the output terminal T212. In addition, one of the switches SW211 and SW212 may not be included in the variable load matching circuit 21.

[0073] The capacitor C213 is an example of a first capacitor. One end of the capacitor C213 is connected to the switch SW211. The other end of the capacitor C213 is connected to the switch SW212.

[0074] The switches SW213 and SW214 are each an example of a second switch, and are formed of a SPST type switch circuit. One end of the switch SW213 is connected to the inductor L212, and the other end of the switch SW213 is connected to the capacitor C214. One end of the switch SW214 is connected to the capacitor C214, and the other end of the switch SW214 is connected to the output terminal T212. In addition, one of the switches SW213 and SW214 may not be included in the variable load matching circuit 21.

[0075] The capacitor C214 is an example of a second capacitor. One end of the capacitor C214 is connected to the switch SW213. The other end of the capacitor C214 is connected to the switch SW214.

[0076] In this connection structure, when the first power level and the third power level are applied, the switches SW211 and SW212 are respectively closed (that is, ON), and when the second power level is applied, the switches SW211 and SW212 are respectively opened (that is, OFF). On the other hand, when the first power level and the third power level are applied, the switches SW213 and SW214 are respectively opened, and when the second power level is applied, the switches SW213 and SW214 are respectively closed. In other words, when the first power level and the third power level are applied, the capacitor C213 is selected, and when the second power level is applied, the capacitor C214 is selected.

[0077] The electrostatic capacitance of capacitor C214 is smaller than the electrostatic capacitance of capacitor C213. Conversely, the electrostatic capacitance of capacitor C213 is larger than the electrostatic capacitance of capacitor C214. Thus, when the first power level and the third power level are applied, the load impedance viewed from the power amplifier 11 is adjusted to a lower first impedance (e.g., 3 ohms), and when the second power level is applied, the load impedance viewed from the power amplifier 11 is adjusted to a higher second impedance (e.g., 6 ohms).

[0078] In addition, the electrostatic capacitance of capacitors C213 and C214 can be measured using an LCR meter. At this time, an automatic balancing bridge method can be used as a measurement method. In addition, the load impedance viewed from the power amplifier 11 can be determined by measuring the impedance at the center frequency of a specified frequency band using a network analyzer.

[0079] [1.3.2 Circuit structure of variable load matching circuit 22]

[0080] Next, refer to Figure 3 A circuit configuration of a variable load matching circuit 22 as another example of the variable load matching circuit according to the present embodiment will be described. Figure 3 2 is a circuit configuration diagram of the variable load matching circuit 22 according to the present embodiment.

[0081] also, Figure 3 is an exemplary circuit configuration, and the variable load matching circuit 22 can be implemented using any of a variety of circuit implementations and circuit techniques. Thus, the description of the variable load matching circuit 22 provided below should not be construed in a limiting sense.

[0082] The variable load matching circuit 22 includes inductors L221 to L223 , capacitors C220 to C223 , switches SW221 and SW222 , an input terminal T221 , and an output terminal T222 .

[0083] The input terminal T221 is connected to the output end of the power amplifier 11 outside the variable load matching circuit 22, and is connected to the inductor L221 inside the variable load matching circuit 22. The output terminal T222 is connected to the antenna connection terminal 100 via the filter 31 outside the variable load matching circuit 22, and is connected to the inductors L222 and L223 inside the variable load matching circuit 22.

[0084] Inductors L221 and L222 are connected in series between input terminal T221 and output terminal T222. Here, inductor L222 is an example of a first inductor. In addition, switch SW221 and inductor L223 are examples of a first switch and a second inductor, respectively, connected in series between inductor L221 and output terminal T222, and connected in parallel with inductor L222.

[0085] Capacitors C220 to C223 are connected in parallel between the path between the input terminal T221 and the output terminal T222 and the ground. Specifically, capacitor C220 is connected between the path between the input terminal T221 and the inductor L221 and the ground. Capacitor C221 is connected between the path between the inductors L221 and L222 and the ground. Capacitor C222 is an example of a first capacitor, connected between the path between the inductor L222 and the output terminal T222 and the ground. Capacitor C223 and switch SW222 are examples of a second capacitor and a second switch, respectively, connected in series between the path between the inductor L222 and the output terminal T222 and the ground, and connected in parallel with capacitor C222.

[0086] In this connection structure, when the first power level and the third power level are applied, the switch SW221 is opened, and when the second power level is applied, the switch SW221 is closed. On the other hand, when the first power level and the third power level are applied, the switch SW222 is closed, and when the second power level is applied, the switch SW222 is opened. In other words, when the first power level and the third power level are applied, at least one end of the inductor L223 is not connected to the path between the input terminal T221 and the output terminal T222, and the two ends of the capacitor C223 are respectively connected to the path between the input terminal T221 and the output terminal T222 and the ground. On the other hand, when the second power level is applied, the two ends of the inductor L223 are connected to the path between the input terminal T221 and the output terminal T222, and at least one end of the capacitor C223 is not connected to the path between the input terminal T221 and the output terminal T222 and the ground.

[0087] Thus, when the first power level and the third power level are applied, the load impedance viewed from the node N1 becomes higher, and when the second power level is applied, the load impedance viewed from the node N1 becomes lower. At this time, the Π-type matching circuit composed of the capacitors C220 and C221 and the inductor L221 functions as an impedance inverter. Therefore, when the first power level and the third power level are applied, the load impedance viewed from the input terminal T221 becomes lower, and when the second power level is applied, the load impedance viewed from the input terminal T221 becomes higher. As a result, when the first power level and the third power level are applied, the load impedance viewed from the power amplifier 11 is adjusted to a lower first impedance (for example, 3 ohms), and when the second power level is applied, the load impedance viewed from the power amplifier 11 is adjusted to a higher second impedance (for example, 6 ohms).

[0088] [1.4 Effects, etc.]

[0089] As described above, the high-frequency circuit 1 involved in this embodiment is configured to support a first power level and a second power level, and the maximum output power of the second power level is lower than the maximum output power of the first power level. The high-frequency circuit 1 includes: a power amplifier 11; and a variable load matching circuit 21 or 22, which is connected to the output end of the power amplifier 11. When the first power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc1, and the load impedance viewed from the power amplifier 11 is adjusted to the first impedance through the variable load matching circuit 21 or 22. When the second power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the load impedance viewed from the power amplifier 11 is adjusted to the second impedance through the variable load matching circuit 21 or 22. The power supply voltage Vcc1 is higher than the power supply voltage Vcc2, and the first impedance is lower than the second impedance.

[0090] According to this, both the power supply voltage and the load impedance are adjusted according to the first power level and the second power level, so that both the first power level and the second power level can be supported by the power amplifier 11. In particular, when the difference between the maximum output power of the first power level and the maximum output power of the second power level is large, if the power supply voltage is fixed, the adjustment range of the load impedance becomes wider, and the switching loss increases at a low load impedance. Therefore, by adjusting both the power supply voltage and the load impedance, it is possible to suppress the adjustment range of the load impedance from becoming wider, thereby suppressing the switching loss. In addition, when the difference between the maximum output power of the first power level and the maximum output power of the second power level is large, if the load impedance is fixed, a higher power supply voltage is required, and the power amplifier 11 is required to have a higher voltage tolerance. Therefore, by adjusting both the power supply voltage and the load impedance, it is possible to suppress the voltage tolerance requirement for the power amplifier 11.

[0091] For example, in the high-frequency circuit 1 involved in the present embodiment, the power amplifier 11 may be configured to also support a third power level, wherein the maximum output power of the third power level is lower than the maximum output power of the first power level and higher than the maximum output power of the second power level. Alternatively, when the third power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the load impedance viewed from the power amplifier 11 is adjusted to the first impedance through the variable load matching circuit 21 or 22.

[0092] According to this, at the third power level between the first power level and the second power level, the same power supply voltage as the second power level is provided, and the load impedance is adjusted to be the same as the first power level. Therefore, the increase of the power supply voltage at the third power level can be suppressed, thereby improving power efficiency.

[0093] For example, in the high frequency circuit 1 according to the present embodiment, the variable load matching circuit 21 may include: a capacitor C213 and a switch SW211 and / or SW212, wherein the capacitor C213 and the switch SW211 and / or SW212 are connected in series between the power amplifier 11 and the antenna connection terminal 100; and a capacitor C214 and a switch SW213 and / or SW214, wherein the capacitor C214 and the switch SW213 and / or SW214 are connected in series with each other and connected to the capacitor C213. 3 and switches SW211 and / or SW212 are connected in parallel between the power amplifier 11 and the antenna connection terminal 100, the electrostatic capacitance of the capacitor C213 is larger than the electrostatic capacitance of the capacitor C214, and it is also possible that, when the first power level is applied, the switches SW211 and / or SW212 are closed and the switches SW213 and / or SW214 are opened, or it is possible that, when the second power level is applied, the switches SW211 and / or SW212 are opened and the switches SW213 and / or SW214 are closed.

[0094] According to this, by switching the capacitors C213 and C214 on the signal path, the load impedance viewed from the power amplifier 11 can be adjusted to the first impedance and the second impedance.

[0095] For example, in the high-frequency circuit 1 involved in the present embodiment, the variable load matching circuit 22 may include: an inductor L222, which is connected between the power amplifier 11 and the antenna connection terminal 100; an inductor L223 and a switch SW221, which are connected in series with each other and connected in parallel with the inductor L222 between the power amplifier 11 and the antenna connection terminal 100; a capacitor C222, which is connected between the path between the power amplifier 11 and the antenna connection terminal 100 and the ground; and a capacitor C223 and a switch SW222, which are connected in series with each other and connected in parallel with the capacitor C222 between the path between the power amplifier 11 and the antenna connection terminal 100 and the ground. It is also possible that when the first power level is applied, the switch SW221 is opened and the switch SW222 is closed, and it is also possible that when the second power level is applied, the switch SW221 is closed and the switch SW222 is opened.

[0096] Accordingly, at the second power level, the inductor L223 is connected in parallel with the inductor L222 on the signal path, and the capacitor C223 is connected between the signal path and the ground, thereby adjusting the load impedance viewed from the power amplifier 11 to the second impedance. In particular, at the first power level, the switch SW221 on the signal path is not closed, so that the signal loss caused by the switch SW221 can be suppressed.

[0097] (Implementation Method 2)

[0098] Next, Embodiment 2 is described. This embodiment differs from Embodiment 1 mainly in that a differential amplifier circuit is used as a power amplifier circuit. This embodiment will be described below with reference to the drawings, focusing on the differences from Embodiment 1.

[0099] Reference Figure 4 The circuit configurations of the communication device 6A and the high-frequency circuit 1A according to the present embodiment will be described. Figure 4 It is a circuit configuration diagram of a communication device 6A according to the present embodiment.

[0100] also, Figure 4 The circuit configurations are exemplary, and the communication device 6A and high-frequency circuit 1A can be implemented using any of a variety of circuit implementations and circuit technologies. Thus, the description of the communication device 6A and high-frequency circuit 1A provided below should not be interpreted in a limiting sense.

[0101] In addition, the communication device 6A is the same as the communication device 6 except that it includes a high-frequency circuit 1A instead of the high-frequency circuit 1 , and therefore the description thereof is omitted.

[0102] [2.1 Circuit structure of high-frequency circuit 1A]

[0103] Reference Figure 4 The high frequency circuit 1A according to the present embodiment includes power amplifiers 11 and 12 , variable load matching circuits 23 and 24 , a filter 31 , transformers 41 and 42 , a capacitor C11 , an antenna connection terminal 100 , an input terminal 111 , and a power supply voltage terminal 121 .

[0104] The power amplifier 11 is an example of a first power amplifier. The input end of the power amplifier 11 is connected to the transformer 41. The output end of the power amplifier 11 is connected to the transformer 42. The power amplifier 11 can amplify one of the differential signals output from the transformer 41.

[0105] The power amplifier 12 is an example of a second power amplifier. The input end of the power amplifier 12 is connected to the transformer 41. The output end of the power amplifier 12 is connected to the transformer 42. The power amplifier 12 can amplify the other of the differential signals output from the transformer 41.

[0106] Such a power amplifier 12 can be formed of an HBT and can be manufactured using a semiconductor material. As the semiconductor material, for example, SiGe or GaAs can be used, but the present invention is not limited thereto.

[0107] The power amplifiers 11 and 12 can support a first power level, a second power level, and a third power level. When the first power level is applied, the power amplifiers 11 and 12 are provided with a power supply voltage Vcc1, and when the second power level and the third power level are applied, the power amplifiers 11 and 12 are provided with a power supply voltage Vcc2. In addition, the power amplifiers 11 and 12 may not be able to support the third power level.

[0108] The transformer 41 includes a primary coil L411 and a secondary coil L412 coupled to the primary coil L411. One end of the primary coil L411 is connected to the input terminal 111, and the other end of the primary coil L411 is connected to the ground. Both ends of the secondary coil L412 are connected to the input ends of the power amplifiers 11 and 12, respectively.

[0109] With this connection structure, the transformer 41 can divide the high frequency signal supplied from the RFIC 3 via the input terminal 111 into two high frequency signals having opposite phases. The two divided high frequency signals (ie, differential signals) are supplied to the power amplifiers 11 and 12 .

[0110] In addition, the transformer 41 may not be included in the high-frequency circuit 1A. In this case, the high-frequency circuit 1A may include, for example, two input terminals 111 to receive a differential signal from the RFIC 3 .

[0111] The transformer 42 includes a primary coil L421 and a secondary coil L422 coupled to the primary coil L421. Both ends of the primary coil L421 are connected to the output ends of the power amplifiers 11 and 12, respectively. In addition, the primary coil L421 is divided into two coils, and the node between the two coils is connected to the power supply voltage terminal 121. One end of the secondary coil L422 is connected to the variable load matching circuit 23 or 24. The other end of the secondary coil L422 is connected to the ground.

[0112] With this connection structure, the transformer 42 can combine the differential signals amplified by the power amplifiers 11 and 12 into one high-frequency signal. The combined high-frequency signal is transmitted to the antenna connection terminal 100 via the variable load matching circuit 23 or 24 and the filter 31 .

[0113] The capacitor C11 and the primary coil L421 of the transformer 42 are connected in parallel between the output terminal of the power amplifier 11 and the output terminal of the power amplifier 12. Specifically, one end of the capacitor C11 is connected to the output terminal of the power amplifier 11 and one end of the primary coil L421, and the other end of the capacitor C11 is connected to the output terminal of the power amplifier 12 and the other end of the primary coil L421.

[0114] The variable load matching circuits 23 and 24 are variable impedance matching circuits configured to adjust the load impedance viewed from the power amplifiers 11 and 12 according to the power level. The high frequency circuit 1A includes either the variable load matching circuit 23 or 24.

[0115] [2.2 Circuit structure of variable load matching circuit]

[0116] Here, variable load matching circuits 23 and 24 will be described in sequence as different examples of the variable load matching circuit according to the present embodiment.

[0117] [2.2.1 Circuit structure of variable load matching circuit 23]

[0118] First, refer to Figure 5 A circuit configuration of a variable load matching circuit 23 as an example of a variable load matching circuit according to the present embodiment will be described. Figure 5 2 is a circuit configuration diagram of the variable load matching circuit 23 according to the present embodiment.

[0119] also, Figure 5 is an exemplary circuit configuration, and the variable load matching circuit 23 can be implemented using any of a variety of circuit implementations and circuit techniques. Thus, the description of the variable load matching circuit 23 provided below should not be interpreted in a limiting sense.

[0120] The variable load matching circuit 23 includes capacitors C213 and C214, switches SW211 to SW214, an input terminal T231, and an output terminal T232. The variable load matching circuit 23 is equivalent to a circuit obtained by removing the inductors L211 and L212 and the capacitors C211 and C212 in the variable load matching circuit 21 of the first embodiment and replacing the input terminal T211 and the output terminal T212 with the input terminal T231 and the output terminal T232.

[0121] The input terminal T231 is connected to the secondary coil L422 of the transformer 42 outside the variable load matching circuit 23, and is connected to the capacitors C213 and C214 inside the variable load matching circuit 23. The output terminal T232 is connected to the antenna connection terminal 100 via the filter 31 outside the variable load matching circuit 23, and is connected to the capacitors C213 and C214 inside the variable load matching circuit 23.

[0122] Similar to the variable load matching circuit 21 according to the first embodiment, when the first power level and the third power level are applied, the switches SW211 and SW212 are closed, respectively, and when the second power level is applied, the switches SW211 and SW212 are opened, respectively. On the other hand, when the first power level and the third power level are applied, the switches SW213 and SW214 are opened, respectively, and when the second power level is applied, the switches SW213 and SW214 are closed, respectively. In other words, when the first power level and the third power level are applied, the capacitor C213 is selected, and when the second power level is applied, the capacitor C214 is selected.

[0123] The electrostatic capacitance of capacitor C213 is larger than the electrostatic capacitance of capacitor C214. Therefore, when the first power level and the third power level are applied, the load impedance viewed from the power amplifiers 11 and 12 is adjusted to a lower first impedance (for example, 3 ohms), and when the second power level is applied, the load impedance viewed from the power amplifiers 11 and 12 is adjusted to a higher second impedance (for example, 6 ohms).

[0124] [2.2.2 Circuit Structure of Variable Load Matching Circuit 24]

[0125] Next, refer to Figure 6 A circuit configuration of a variable load matching circuit 24 as another example of the variable load matching circuit according to the present embodiment will be described. Figure 6 2 is a circuit configuration diagram of the variable load matching circuit 24 according to the present embodiment.

[0126] also, Figure 6 is an exemplary circuit configuration, and the variable load matching circuit 24 can be implemented using any of a variety of circuit implementations and circuit techniques. Thus, the description of the variable load matching circuit 24 provided below should not be construed in a limiting sense.

[0127] The variable load matching circuit 24 includes inductors L222 and L223, capacitors C221 to C223, switches SW221 and SW222, an input terminal T241, and an output terminal T242. The variable load matching circuit 24 is equivalent to a circuit obtained by removing the inductor L221 and the capacitor C220 in the variable load matching circuit 22 of the first embodiment and replacing the input terminal T221 and the output terminal T222 with an input terminal T241 and an output terminal T242.

[0128] The input terminal T241 is connected to the secondary coil L422 of the transformer 42 outside the variable load matching circuit 24, and is connected to the inductors L222 and L223 inside the variable load matching circuit 24. The output terminal T242 is connected to the antenna connection terminal 100 via the filter 31 outside the variable load matching circuit 24, and is connected to the inductors L222 and L223 inside the variable load matching circuit 24.

[0129] Similar to the variable load matching circuit 22 involved in the first embodiment, when the first power level and the third power level are applied, the switch SW221 is opened, and when the second power level is applied, the switch SW221 is closed. On the other hand, when the first power level and the third power level are applied, the switch SW222 is closed, and when the second power level is applied, the switch SW222 is opened. In other words, when the first power level and the third power level are applied, at least one end of the inductor L223 is not connected to the path between the input terminal T241 and the output terminal T242, and both ends of the capacitor C223 are connected to the path between the input terminal T241 and the output terminal T242 and the ground, respectively. On the other hand, when the second power level is applied, both ends of the inductor L223 are connected to the path between the input terminal T241 and the output terminal T242, and at least one end of the capacitor C223 is not connected to the path between the input terminal T241 and the output terminal T242 and the ground.

[0130] Thus, when the first power level and the third power level are applied, the load impedance viewed from the node N1 becomes higher, and when the second power level is applied, the load impedance viewed from the node N1 becomes lower. At this time, the capacitor C221 and the transformer 42 function as an impedance inverter. As a result, when the first power level and the third power level are applied, the load impedance viewed from the power amplifiers 11 and 12 is adjusted to a lower first impedance (for example, 3 ohms), and when the second power level is applied, the load impedance viewed from the power amplifiers 11 and 12 is adjusted to a higher second impedance (for example, 6 ohms).

[0131] [2.3 Effects, etc.]

[0132] As described above, the high-frequency circuit 1A involved in this embodiment is configured to support a first power level and a second power level, and the maximum output power of the second power level is lower than the maximum output power of the first power level. The high-frequency circuit 1A includes: a power amplifier 11; and a variable load matching circuit 23 or 24, which is connected to the output end of the power amplifier 11. When the first power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc1, and the load impedance viewed from the power amplifier 11 is adjusted to the first impedance through the variable load matching circuit 23 or 24. When the second power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the load impedance viewed from the power amplifier 11 is adjusted to the second impedance through the variable load matching circuit 23 or 24. The power supply voltage Vcc1 is higher than the power supply voltage Vcc2, and the first impedance is lower than the second impedance.

[0133] According to this, both the power supply voltage and the load impedance are adjusted according to the first power level and the second power level, so that both the first power level and the second power level can be supported by the power amplifier 11. In particular, when the difference between the maximum output power of the first power level and the maximum output power of the second power level is large, if the power supply voltage is fixed, the adjustment range of the load impedance becomes wider, and the switching loss increases at a low load impedance. Therefore, by adjusting both the power supply voltage and the load impedance, it is possible to suppress the adjustment range of the load impedance from becoming wider, thereby suppressing the switching loss. In addition, when the difference between the maximum output power of the first power level and the maximum output power of the second power level is large, if the load impedance is fixed, a higher power supply voltage is required, and the power amplifier 11 is required to have a higher voltage tolerance. Therefore, by adjusting both the power supply voltage and the load impedance, it is possible to suppress the voltage tolerance requirement for the power amplifier 11.

[0134] For example, in the high-frequency circuit 1A involved in the present embodiment, the power amplifier 11 may be configured to also support a third power level, wherein the maximum output power of the third power level is lower than the maximum output power of the first power level and higher than the maximum output power of the second power level. Alternatively, when the third power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the load impedance viewed from the power amplifier 11 is adjusted to the first impedance through the variable load matching circuit 23 or 24.

[0135] According to this, at the third power level between the first power level and the second power level, the same power supply voltage as the second power level is provided, and the load impedance is adjusted to be the same as the first power level. Therefore, the increase of the power supply voltage at the third power level can be suppressed, thereby improving power efficiency.

[0136] For example, in the high frequency circuit 1A according to the present embodiment, the variable load matching circuit 23 may include: a capacitor C213 and a switch SW211 and / or SW212, wherein the capacitor C213 and the switch SW211 and / or SW212 are connected in series between the power amplifier 11 and the antenna connection terminal 100; and a capacitor C214 and a switch SW213 and / or SW214, wherein the capacitor C214 and the switch SW213 and / or SW214 are connected in series with each other and connected to the capacitor C213. 13 and switches SW211 and / or SW212 are connected in parallel between the power amplifier 11 and the antenna connection terminal 100, the electrostatic capacitance of capacitor C213 is larger than the electrostatic capacitance of capacitor C214, and it is also possible that, when the first power level is applied, switches SW211 and / or SW212 are closed and switches SW213 and / or SW214 are opened, or it is possible that, when the second power level is applied, switches SW211 and / or SW212 are opened and switches SW213 and / or SW214 are closed.

[0137] According to this, by switching the capacitors C213 and C214 on the signal path, the load impedance viewed from the power amplifier 11 can be adjusted to the first impedance and the second impedance.

[0138] For example, in the high-frequency circuit 1A involved in the present embodiment, the variable load matching circuit 24 may include: an inductor L222, which is connected between the power amplifier 11 and the antenna connection terminal 100; an inductor L223 and a switch SW221, which are connected in series with each other and connected in parallel with the inductor L222 between the power amplifier 11 and the antenna connection terminal 100; a capacitor C222, which is connected between the path between the power amplifier 11 and the antenna connection terminal 100 and the ground; and a capacitor C223 and a switch SW222, which are connected in series with each other and connected in parallel with the capacitor C222 between the path between the power amplifier 11 and the antenna connection terminal 100 and the ground. It is also possible that when the first power level is applied, the switch SW221 is opened and the switch SW222 is closed, and it is also possible that when the second power level is applied, the switch SW221 is closed and the switch SW222 is opened.

[0139] Accordingly, at the second power level, the inductor L223 is connected in parallel with the inductor L222 on the signal path, and the capacitor C223 is connected between the signal path and the ground, thereby adjusting the load impedance viewed from the power amplifier 11 to the second impedance. In particular, at the first power level, the switch SW221 on the signal path is not closed, so that the signal loss caused by the switch SW221 can be suppressed.

[0140] In addition, for example, the high-frequency circuit 1A involved in the present embodiment may also include: a power amplifier 12; and a transformer 42, which includes a primary coil L421 and a secondary coil L422, wherein the two ends of the primary coil L421 are respectively connected to the output end of the power amplifier 11 and the output end of the power amplifier 12, and one end of the secondary coil L422 is connected to the variable load matching circuit 23 or 24. When the first power level is applied, the power amplifiers 11 and 12 are provided with a power supply voltage Vcc1, and the load impedance viewed from the power amplifiers 11 and 12 is adjusted to the first impedance through the variable load matching circuit 23 or 24. When the second power level is applied, the power amplifiers 11 and 12 are provided with a power supply voltage Vcc2, and the load impedance viewed from the power amplifiers 11 and 12 is adjusted to the second impedance through the variable load matching circuit 23 or 24.

[0141] According to this, the high-frequency signal can be amplified using the two power amplifiers 11 and 12 , and thus the requirement for the maximum output power of each of the power amplifiers 11 and 12 at the first power level can be reduced.

[0142] (Implementation method 3)

[0143] Next, the third embodiment is described. This embodiment differs from the first and second embodiments mainly in that a differential amplifier circuit is used as a power amplifier circuit, and the operation of one of the two power amplifiers is stopped at the second power level. Hereinafter, with reference to the accompanying drawings, this embodiment is described with a focus on the differences from the first and second embodiments.

[0144] Reference Figure 7 The circuit configurations of the communication device 6B and the high-frequency circuit 1B according to the present embodiment will be described. Figure 7 It is a circuit configuration diagram of the communication device 6B according to the present embodiment.

[0145] also, Figure 7 The circuit configurations are exemplary, and the communication device 6B and the high-frequency circuit 1B can be implemented using any of a variety of circuit implementations and circuit technologies. Therefore, the description of the communication device 6B and the high-frequency circuit 1B provided below should not be interpreted restrictively.

[0146] The communication device 6B is the same as the communication device 6 except that it includes a high-frequency circuit 1B instead of the high-frequency circuit 1 , and therefore the description thereof will be omitted.

[0147] [3.1 Circuit structure of high-frequency circuit 1B]

[0148] Reference Figure 7The high frequency circuit 1B according to the present embodiment will be described. The high frequency circuit 1B includes power amplifiers 11 and 12, a variable load matching circuit 25, a filter 31, transformers 41 and 42, capacitors C11 and C12, a switch SW11, an antenna connection terminal 100, an input terminal 111, and a power supply voltage terminal 121. The high frequency circuit 1B is equivalent to a circuit in which the variable load matching circuit 23 or 24 is replaced with the variable load matching circuit 25 in the high frequency circuit 1A according to the second embodiment, and a capacitor C12 and a switch SW1 are added.

[0149] Capacitor C12 and switch SW11 are examples of a third capacitor and a third switch, respectively, and are connected in series between the path between power amplifier 12 and transformer 42 and ground. Here, switch SW11 is connected between capacitor C12 and ground, but capacitor C12 may be connected between switch SW11 and ground.

[0150] In this circuit structure, when the second power level and the third power level are applied, the operation of the power amplifier 12 is stopped. On the contrary, when the first power level is applied, the operation of the power amplifier 12 is not stopped. For example, at the second power level and the third power level, the bias voltage and / or the power supply voltage are stopped to the power amplifier 12, thereby stopping the operation of the power amplifier 12. At this time, by closing the switch SW11, the high-frequency signal amplified by the power amplifier 11 is transmitted to the variable load matching circuit 25 via the transformer 42. On the contrary, at the first power level, the bias voltage and the power supply voltage Vcc1 are provided to the power amplifier 12, and the switch SW11 is opened, thereby amplifying the high-frequency signal by the power amplifiers 11 and 12, and the amplified high-frequency signal is synthesized by the transformer 42 and transmitted to the variable load matching circuit 25.

[0151] The variable load matching circuit 25 is a variable impedance matching circuit configured to adjust the load impedance viewed from the power amplifiers 11 and 12 according to the power level.

[0152] [3.2 Circuit Structure of Variable Load Matching Circuit 25]

[0153] Here, refer to Figure 8 The circuit configuration of the variable load matching circuit 25 according to the present embodiment will be described. Figure 8 2 is a circuit configuration diagram of the variable load matching circuit 25 according to the present embodiment.

[0154] also, Figure 8 is an exemplary circuit configuration, and the variable load matching circuit 25 can be implemented using any of a variety of circuit implementations and circuit techniques. Thus, the description of the variable load matching circuit 25 provided below should not be construed in a limiting sense.

[0155] The variable load matching circuit 25 includes inductors L222 and L223, capacitors C221, C251 and C252, switches SW221 and SW251, an input terminal T251 and an output terminal T252. The variable load matching circuit 25 is equivalent to a circuit in which the capacitors C222 and C223 and the switch SW222 are replaced by capacitors C251 and C252 and the switch SW251, and the input terminal T241 and the output terminal T242 are replaced by the input terminal T251 and the output terminal T252 in the variable load matching circuit 24 of the second embodiment.

[0156] The input terminal T251 is connected to the secondary coil L422 of the transformer 42 outside the variable load matching circuit 25, and is connected to the inductors L222 and L223 inside the variable load matching circuit 25. The output terminal T252 is connected to the antenna connection terminal 100 via the filter 31 outside the variable load matching circuit 25, and is connected to the inductors L222 and L223 inside the variable load matching circuit 25.

[0157] The inductor L222 is an example of a first inductor, and is connected between the input terminal T251 and the output terminal T252.

[0158] The inductor L223 and the switch SW221 are examples of a second inductor and a first switch, respectively, are connected in series with each other, and are connected in parallel with the inductor L222 between the input terminal T251 and the output terminal T252 .

[0159] The capacitors C251 and C252 are examples of a first capacitor and a second capacitor, respectively, and are connected in series between a path between the inductors L222 and L223 and the output terminal T252 and the ground.

[0160] The switch SW251 is an example of a second switch, and is connected between a path between the capacitors C251 and C252 and the ground.

[0161] In this connection structure, when the first power level and the third power level are applied, the switch SW221 is opened, and when the second power level is applied, the switch SW221 is closed. On the other hand, when the first power level and the third power level are applied, the switch SW251 is closed, and when the second power level is applied, the switch SW251 is opened. In other words, when the first power level and the third power level are applied, at least one end of the inductor L223 is not connected to the path between the input terminal T251 and the output terminal T252, and one end of the capacitor C251 is connected to the ground without passing through the capacitor C252. On the other hand, when the second power level is applied, both ends of the inductor L223 are connected to the path between the input terminal T251 and the output terminal T252, and one end of the capacitor C251 is connected to the ground via the capacitor C252.

[0162] Thus, when the first power level and the third power level are applied, the load impedance viewed from the node N1 becomes higher, and when the second power level is applied, the load impedance viewed from the node N1 becomes lower. At this time, the capacitor C221 and the transformer 42 function as an impedance inverter. As a result, when the first power level and the third power level are applied, the load impedance viewed from the power amplifiers 11 and 12 is adjusted to a lower first impedance (for example, 3 ohms), and when the second power level is applied, the load impedance viewed from the power amplifier 11 is adjusted to a higher second impedance (for example, 6 ohms).

[0163] [3.3 Effects, etc.]

[0164] As described above, the high-frequency circuit 1B involved in this embodiment is configured to support a first power level and a second power level, and the maximum output power of the second power level is lower than the maximum output power of the first power level. The high-frequency circuit 1B includes: a power amplifier 11; and a variable load matching circuit 25, which is connected to the output end of the power amplifier 11. When the first power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc1, and the load impedance viewed from the power amplifier 11 is adjusted to the first impedance through the variable load matching circuit 25. When the second power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the load impedance viewed from the power amplifier 11 is adjusted to the second impedance through the variable load matching circuit 25. The power supply voltage Vcc1 is higher than the power supply voltage Vcc2, and the first impedance is lower than the second impedance.

[0165] According to this, both the power supply voltage and the load impedance are adjusted according to the first power level and the second power level, so that both the first power level and the second power level can be supported by the power amplifier 11. In particular, when the difference between the maximum output power of the first power level and the maximum output power of the second power level is large, if the power supply voltage is fixed, the adjustment range of the load impedance becomes wider, and the switching loss increases at a low load impedance. Therefore, by adjusting both the power supply voltage and the load impedance, it is possible to suppress the adjustment range of the load impedance from becoming wider, thereby suppressing the switching loss. In addition, when the difference between the maximum output power of the first power level and the maximum output power of the second power level is large, if the load impedance is fixed, a higher power supply voltage is required, and the power amplifier 11 is required to have a higher voltage tolerance. Therefore, by adjusting both the power supply voltage and the load impedance, it is possible to suppress the voltage tolerance requirement for the power amplifier 11.

[0166] For example, in the high-frequency circuit 1B involved in the present embodiment, the power amplifier 11 may be configured to also support a third power level, wherein the maximum output power of the third power level is lower than the maximum output power of the first power level and higher than the maximum output power of the second power level. Alternatively, when the third power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the load impedance viewed from the power amplifier 11 is adjusted to the first impedance through the variable load matching circuit 25.

[0167] According to this, at the third power level between the first power level and the second power level, the same power supply voltage as the second power level is provided, and the load impedance is adjusted to be the same as the first power level. Therefore, the increase of the power supply voltage at the third power level can be suppressed, thereby improving power efficiency.

[0168] For example, in the high-frequency circuit 1B involved in the present embodiment, it can also include: a power amplifier 12; and a transformer 42, which includes a primary coil L421 and a secondary coil L422, the two ends of the primary coil L421 are respectively connected to the output end of the power amplifier 11 and the output end of the power amplifier 12, and one end of the secondary coil L422 is connected to the variable load matching circuit 25. It can also be that when the first power level is applied, the power amplifiers 11 and 12 are provided with a power supply voltage Vcc1, and the load impedance viewed from the power amplifiers 11 and 12 is adjusted to the first impedance through the variable load matching circuit 25. It can also be that when the second power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the load impedance viewed from the power amplifier 11 is adjusted to the second impedance through the variable load matching circuit 25, and the operation of the power amplifier 12 is stopped.

[0169] According to this, the high frequency signal can be amplified using the two power amplifiers 11 and 12, so that the requirement for the maximum output power of each of the power amplifiers 11 and 12 at the first power level can be reduced. Furthermore, at the second power level where the maximum output power is low, the operation of the power amplifier 12 can be stopped, so that the decrease in power efficiency at the second power level can be suppressed.

[0170] For example, in the high frequency circuit 1B according to the present embodiment, the variable load matching circuit 25 may include: an inductor L222 connected between the secondary coil L422 and the antenna connection terminal 100; an inductor L223 and a switch SW221 connected in series with each other and connected in parallel with the inductor L222 between the secondary coil L422 and the antenna connection terminal 100; capacitors C251 and C252 connected in series between a path between the power amplifier 11 and the antenna connection terminal 100 and ground; and a switch SW221 connected in series with the inductor L223 and the switch SW221. Switch SW251 is connected between the path between capacitors C251 and C252 and ground. Alternatively, the high-frequency circuit 1B also has a capacitor C12 and a switch SW11, which are connected in series between the path between the power amplifier 12 and the primary coil L421 and ground. Alternatively, when the first power level is applied, switches SW221 and SW11 are respectively disconnected and switch SW251 is closed. Alternatively, when the second power level is applied, switches SW221 and SW11 are respectively closed and switch SW251 is disconnected.

[0171] According to this, the high frequency signal can be amplified using the two power amplifiers 11 and 12, so that the requirement for the maximum output power of each of the power amplifiers 11 and 12 at the first power level can be reduced. Furthermore, at the second power level where the maximum output power is low, the operation of the power amplifier 12 can be stopped, so that the decrease in power efficiency at the second power level can be suppressed.

[0172] (Implementation 4)

[0173] Next, Embodiment 4 is described. This embodiment differs from Embodiment 1 mainly in that a Wilkinson amplifier circuit is used as a power amplifier circuit. This embodiment will be described below with reference to the drawings, focusing on the differences from Embodiment 1.

[0174] Reference Fig. 9 The circuit configurations of the communication device 6C and the high-frequency circuit 1C according to the present embodiment will be described. Fig. 9 It is a circuit configuration diagram of a communication device 6C according to this embodiment.

[0175] also, Fig. 9The circuit configurations are exemplary, and the communication device 6C and the high-frequency circuit 1C can be implemented using any of a variety of circuit implementations and circuit technologies. Therefore, the description of the communication device 6C and the high-frequency circuit 1C provided below should not be interpreted restrictively.

[0176] In addition, since the communication device 6C is the same as the communication device 6 except that it includes a high-frequency circuit 1C instead of the high-frequency circuit 1 , the description thereof will be omitted.

[0177] [4.1 Circuit structure of high-frequency circuit 1C]

[0178] Reference Fig. 9 The high frequency circuit 1C according to the present embodiment is described below. The high frequency circuit 1C includes power amplifiers 11 and 12, a variable load matching circuit 23 or 24, a filter 31, a Wilkinson divider 43, a Wilkinson coupler 44, an antenna connection terminal 100, an input terminal 111, and a power supply voltage terminal 121.

[0179] The power amplifier 11 is an example of a first power amplifier. The input end of the power amplifier 11 is connected to the Wilkinson divider 43. The output end of the power amplifier 11 is connected to the Wilkinson coupler 44. The power amplifier 11 can amplify one of the in-phase signals output from the Wilkinson divider 43.

[0180] The power amplifier 12 is an example of a second power amplifier. The input end of the power amplifier 12 is connected to the Wilkinson divider 43. The output end of the power amplifier 12 is connected to the Wilkinson coupler 44. The power amplifier 12 can amplify the other of the in-phase signals output from the Wilkinson divider 43.

[0181] The power amplifiers 11 and 12 can support a first power level, a second power level, and a third power level. When the first power level is applied, the power amplifiers 11 and 12 are provided with a power supply voltage Vcc1, and when the second power level and the third power level are applied, the power amplifiers 11 and 12 are provided with a power supply voltage Vcc2. In addition, the power amplifiers 11 and 12 may not be able to support the third power level.

[0182] The Wilkinson divider 43 includes transmission lines TL431 and TL432 and a resistor R431. The transmission line TL431 is connected between the input terminal 111 and the input end of the power amplifier 11. The transmission line TL432 is connected between the input terminal 111 and the input end of the power amplifier 12. The resistor R431 is connected in parallel with the transmission lines TL431 and TL432 between the input end of the power amplifier 11 and the input end of the power amplifier 12.

[0183] With this connection structure, the Wilkinson divider 43 can divide the high frequency signal supplied from the RFIC 3 via the input terminal 111 into two high frequency signals of the same phase. The two divided high frequency signals (ie, signals of the same phase) are supplied to the power amplifiers 11 and 12.

[0184] In addition, the Wilkinson divider 43 may not be included in the high-frequency circuit 1C. In this case, the high-frequency circuit 1C may include, for example, two input terminals 111 to receive the in-phase signal from the RFIC 3 .

[0185] The Wilkinson coupler 44 includes transmission lines TL441 and TL442 and a resistor R441. The transmission line TL441 is an example of a first transmission line, and is connected between the output end of the power amplifier 11 and the variable load matching circuit 23 or 24. The transmission line TL442 is an example of a second transmission line, and is connected between the output end of the power amplifier 12 and the variable load matching circuit 23 or 24. The resistor R441 is connected in parallel with the transmission lines TL441 and TL442 between the output end of the power amplifier 11 and the output end of the power amplifier 12.

[0186] With this connection structure, the Wilkinson coupler 44 can combine the in-phase signals amplified by the power amplifiers 11 and 12 into one high-frequency signal. The combined high-frequency signal is transmitted to the antenna connection terminal 100 via the variable load matching circuit 23 or 24 and the filter 31 .

[0187] In addition, as the transmission lines TL431, TL432, TL441, and TL442, 1 / 4 wavelength transmission lines can be used, but the present invention is not limited thereto. For example, LC circuits may be used as the transmission lines TL431, TL432, TL441, and TL442.

[0188] [4.2 Effects, etc.]

[0189] As described above, the high-frequency circuit 1C involved in this embodiment is configured to support a first power level and a second power level, and the maximum output power of the second power level is lower than the maximum output power of the first power level. The high-frequency circuit 1C includes: a power amplifier 11; and a variable load matching circuit 23 or 24, which is connected to the output end of the power amplifier 11. When the first power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc1, and the load impedance viewed from the power amplifier 11 is adjusted to the first impedance through the variable load matching circuit 23 or 24. When the second power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the load impedance viewed from the power amplifier 11 is adjusted to the second impedance through the variable load matching circuit 23 or 24. The power supply voltage Vcc1 is higher than the power supply voltage Vcc2, and the first impedance is lower than the second impedance.

[0190] According to this, both the power supply voltage and the load impedance are adjusted according to the first power level and the second power level, so that both the first power level and the second power level can be supported by the power amplifier 11. In particular, when the difference between the maximum output power of the first power level and the maximum output power of the second power level is large, if the power supply voltage is fixed, the adjustment range of the load impedance becomes wider, and the switching loss increases at a low load impedance. Therefore, by adjusting both the power supply voltage and the load impedance, it is possible to suppress the adjustment range of the load impedance from becoming wider, thereby suppressing the switching loss. In addition, when the difference between the maximum output power of the first power level and the maximum output power of the second power level is large, if the load impedance is fixed, a higher power supply voltage is required, and the power amplifier 11 is required to have a higher voltage tolerance. Therefore, by adjusting both the power supply voltage and the load impedance, it is possible to suppress the voltage tolerance requirement for the power amplifier 11.

[0191] For example, in the high-frequency circuit 1C involved in the present embodiment, the power amplifier 11 may be configured to also support a third power level, wherein the maximum output power of the third power level is lower than the maximum output power of the first power level and higher than the maximum output power of the second power level. Alternatively, when the third power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the load impedance viewed from the power amplifier 11 is adjusted to the first impedance through the variable load matching circuit 23 or 24.

[0192] According to this, at the third power level between the first power level and the second power level, the same power supply voltage as the second power level is provided, and the load impedance is adjusted to be the same as the first power level. Therefore, the increase of the power supply voltage at the third power level can be suppressed, thereby improving power efficiency.

[0193] For example, in the high frequency circuit 1C according to the present embodiment, the variable load matching circuit 23 may include: a capacitor C213 and a switch SW211 and / or SW212, wherein the capacitor C213 and the switch SW211 and / or SW212 are connected in series between the power amplifier 11 and the antenna connection terminal 100; and a capacitor C214 and a switch SW213 and / or SW214, wherein the capacitor C214 and the switch SW213 and / or SW214 are connected in series with each other and connected to the capacitor C213. 13 and switches SW211 and / or SW212 are connected in parallel between the power amplifier 11 and the antenna connection terminal 100, the electrostatic capacitance of capacitor C213 is larger than the electrostatic capacitance of capacitor C214, and it is also possible that, when the first power level is applied, switches SW211 and / or SW212 are closed and switches SW213 and / or SW214 are opened, or it is possible that, when the second power level is applied, switches SW211 and / or SW212 are opened and switches SW213 and / or SW214 are closed.

[0194] According to this, by switching the capacitors C213 and C214 on the signal path, the load impedance viewed from the power amplifier 11 can be adjusted to the first impedance and the second impedance.

[0195] For example, in the high-frequency circuit 1C involved in the present embodiment, the variable load matching circuit 24 may include: an inductor L222 connected between the power amplifier 11 and the antenna connection terminal 100; an inductor L223 and a switch SW221, the inductor L223 and the switch SW221 being connected in series with each other and connected in parallel with the inductor L222 between the power amplifier 11 and the antenna connection terminal 100; a capacitor C222 connected between the path between the power amplifier 11 and the antenna connection terminal 100 and the ground; and a capacitor C223 and a switch SW222, the capacitor C223 and the switch SW222 being connected in series with each other and connected in parallel with the capacitor C222 between the path between the power amplifier 11 and the antenna connection terminal 100 and the ground. It may be that when the first power level is applied, the switch SW221 is opened and the switch SW222 is closed, and it may be that when the second power level is applied, the switch SW221 is closed and the switch SW222 is opened.

[0196] Accordingly, at the second power level, the inductor L223 is connected in parallel with the inductor L222 on the signal path, and the capacitor C223 is connected between the signal path and the ground, thereby adjusting the load impedance viewed from the power amplifier 11 to the second impedance. In particular, at the first power level, the switch SW221 on the signal path is not closed, so that the signal loss caused by the switch SW221 can be suppressed.

[0197] For example, the high-frequency circuit 1C according to the present embodiment may further include: a power amplifier 12; a transmission line TL441 connected between the output end of the power amplifier 11 and the variable load matching circuit 23 or 24; a transmission line TL442 connected between the output end of the power amplifier 12 and the variable load matching circuit 23 or 24; and a resistor R441 connected in parallel with the transmission lines TL441 and TL442 between the output end of the power amplifier 11 and the output end of the power amplifier 12. In a case where a first power level is applied, the power amplifiers 11 and 12 are supplied with a power supply voltage Vcc1, and the load impedance viewed from the power amplifiers 11 and 12 is adjusted to a first impedance by the variable load matching circuit 23 or 24. In a case where a second power level is applied, the power amplifiers 11 and 12 are supplied with a power supply voltage Vcc2, and the load impedance viewed from the power amplifiers 11 and 12 is adjusted to a second impedance by the variable load matching circuit 23 or 24.

[0198] According to this, the high-frequency signal can be amplified using the two power amplifiers 11 and 12 , and thus the requirement for the maximum output power of each of the power amplifiers 11 and 12 at the first power level can be reduced.

[0199] (Implementation method 5)

[0200] Next, the fifth embodiment is described. This embodiment differs from the first and fourth embodiments mainly in that a Wilkinson type amplifier circuit is used as a power amplifier circuit and one of the two power amplifiers is stopped at the second power level. Hereinafter, the fifth embodiment is described with reference to the accompanying drawings, focusing on the differences from the first and fourth embodiments.

[0201] Reference Fig.10 The circuit configurations of the communication device 6D and the high-frequency circuit 1D according to the present embodiment will be described. Fig.10 It is a circuit configuration diagram of a communication device 6D according to this embodiment.

[0202] also, Fig.10 The circuit configurations are exemplary, and the communication device 6D and high frequency circuit 1D can be implemented using any of a variety of circuit implementations and circuit technologies. Thus, the description of the communication device 6D and high frequency circuit 1D provided below should not be interpreted in a limiting sense.

[0203] The communication device 6D is the same as the communication device 6 except that it includes a high-frequency circuit 1D instead of the high-frequency circuit 1 , and therefore the description thereof is omitted.

[0204] [5.1 Circuit structure of high-frequency circuit 1D]

[0205] Reference Fig.10 The high frequency circuit 1D according to the present embodiment will be described. The high frequency circuit 1D includes power amplifiers 11 and 12, variable load matching circuits 23 or 24, a filter 31, a Wilkinson divider 43, a Wilkinson coupler 44D, a capacitor C12, a switch SW11, an antenna connection terminal 100, an input terminal 111, and a power supply voltage terminal 121. The high frequency circuit 1D is equivalent to a circuit in which the Wilkinson coupler 44 is replaced with a Wilkinson coupler 44D in the high frequency circuit 1C according to the fourth embodiment, and a capacitor C12 and a switch SW11 are added.

[0206] The Wilkinson coupler 44D includes a switch SW441 (an example of a fourth switch) in addition to the transmission lines TL441 and TL442 and the resistor R441. The switch SW441 and the resistor R441 are connected in series and connected in parallel with the transmission lines TL441 and TL442 between the output terminals of the power amplifiers 11 and 12.

[0207] Capacitor C12 and switch SW11 are examples of a third capacitor and a third switch, respectively, and are connected in series between the path between the power amplifier 12 and the Wilkinson coupler 44D and the ground. Here, switch SW11 is connected between capacitor C12 and the ground, but capacitor C12 may also be connected between switch SW11 and the ground.

[0208] In this circuit configuration, when the second power level and the third power level are applied, the operation of the power amplifier 12 is stopped. On the contrary, when the first power level is applied, the operation of the power amplifier 12 is not stopped. For example, when the second power level and the third power level are applied, the bias voltage is stopped to the power amplifier 12, the switch SW11 is closed, and the switch SW441 is opened, thereby stopping the operation of the power amplifier 12, and the high-frequency signal amplified by the power amplifier 11 is transmitted to the variable load matching circuit 23 or 24. In addition, when the first power level is applied, the bias voltage is applied to the power amplifier 12, and the switch SW11 is opened, thereby starting / continuing the operation of the power amplifier 12, and the high-frequency signals amplified by the power amplifiers 11 and 12 are combined and transmitted to the variable load matching circuit 23 or 24.

[0209] [5.2 Effects, etc.]

[0210] As described above, the high-frequency circuit 1D involved in this embodiment is configured to support a first power level and a second power level, and the maximum output power of the second power level is lower than the maximum output power of the first power level. The high-frequency circuit 1D includes: a power amplifier 11; and a variable load matching circuit 23 or 24, which is connected to the output end of the power amplifier 11. When the first power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc1, and the load impedance viewed from the power amplifier 11 is adjusted to the first impedance through the variable load matching circuit 23 or 24. When the second power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the load impedance viewed from the power amplifier 11 is adjusted to the second impedance through the variable load matching circuit 23 or 24. The power supply voltage Vcc1 is higher than the power supply voltage Vcc2, and the first impedance is lower than the second impedance.

[0211] According to this, both the power supply voltage and the load impedance are adjusted according to the first power level and the second power level, so that both the first power level and the second power level can be supported by the power amplifier 11. In particular, when the difference between the maximum output power of the first power level and the maximum output power of the second power level is large, if the power supply voltage is fixed, the adjustment range of the load impedance becomes wider, and the switching loss increases at a low load impedance. Therefore, by adjusting both the power supply voltage and the load impedance, it is possible to suppress the adjustment range of the load impedance from becoming wider, thereby suppressing the switching loss. In addition, when the difference between the maximum output power of the first power level and the maximum output power of the second power level is large, if the load impedance is fixed, a higher power supply voltage is required, and the power amplifier 11 is required to have a higher voltage tolerance. Therefore, by adjusting both the power supply voltage and the load impedance, it is possible to suppress the voltage tolerance requirement for the power amplifier 11.

[0212] For example, in the high-frequency circuit 1D involved in the present embodiment, the power amplifier 11 may be configured to also support a third power level, wherein the maximum output power of the third power level is lower than the maximum output power of the first power level and higher than the maximum output power of the second power level. Alternatively, when the third power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the load impedance viewed from the power amplifier 11 is adjusted to the first impedance through the variable load matching circuit 23 or 24.

[0213] According to this, at the third power level between the first power level and the second power level, the same power supply voltage as the second power level is provided, and the load impedance is adjusted to be the same as the first power level. Therefore, the increase of the power supply voltage at the third power level can be suppressed, thereby improving power efficiency.

[0214] For example, in the high frequency circuit 1D according to the present embodiment, the variable load matching circuit 23 may include: a capacitor C213 and a switch SW211 and / or SW212, wherein the capacitor C213 and the switch SW211 and / or SW212 are connected in series between the power amplifier 11 and the antenna connection terminal 100; and a capacitor C214 and a switch SW213 and / or SW214, wherein the capacitor C214 and the switch SW213 and / or SW214 are connected in series with each other and connected to the capacitor C213. 13 and switches SW211 and / or SW212 are connected in parallel between the power amplifier 11 and the antenna connection terminal 100, the electrostatic capacitance of capacitor C213 is larger than the electrostatic capacitance of capacitor C214, and it is also possible that, when the first power level is applied, switches SW211 and / or SW212 are closed and switches SW213 and / or SW214 are opened, or it is possible that, when the second power level is applied, switches SW211 and / or SW212 are opened and switches SW213 and / or SW214 are closed.

[0215] According to this, by switching the capacitors C213 and C214 on the signal path, the load impedance viewed from the power amplifier 11 can be adjusted to the first impedance and the second impedance.

[0216] For example, in the high-frequency circuit 1D involved in the present embodiment, the variable load matching circuit 24 may include: an inductor L222 connected between the power amplifier 11 and the antenna connection terminal 100; an inductor L223 and a switch SW221, wherein the inductor L223 and the switch SW221 are connected in series with each other and connected in parallel with the inductor L222 between the power amplifier 11 and the antenna connection terminal 100; a capacitor C222 connected between the path between the power amplifier 11 and the antenna connection terminal 100 and the ground; and a capacitor C223 and a switch SW222, wherein the capacitor C223 and the switch SW222 are connected in series with each other and connected in parallel with the capacitor C222 between the path between the power amplifier 11 and the antenna connection terminal 100 and the ground. It is also possible that, when the first power level is applied, the switch SW221 is opened and the switch SW222 is closed, and it is also possible that, when the second power level is applied, the switch SW221 is closed and the switch SW222 is opened.

[0217] Accordingly, at the second power level, the inductor L223 is connected in parallel with the inductor L222 on the signal path, and the capacitor C223 is connected between the signal path and the ground, thereby adjusting the load impedance viewed from the power amplifier 11 to the second impedance. In particular, at the first power level, the switch SW221 on the signal path is not closed, so that the signal loss caused by the switch SW221 can be suppressed.

[0218] For example, the high-frequency circuit 1D according to the present embodiment may further include: a power amplifier 12; a transmission line TL441 connected between the output end of the power amplifier 11 and the variable load matching circuit 23 or 24; a transmission line TL442 connected between the output end of the power amplifier 12 and the variable load matching circuit 23 or 24; and a resistor R441 connected in parallel with the transmission lines TL441 and TL442 between the output end of the power amplifier 11 and the output end of the power amplifier 12. In a case where a first power level is applied, the power supply voltage Vcc1 is supplied to the power amplifiers 11 and 12, and the load impedance viewed from the power amplifiers 11 and 12 is adjusted to the first impedance by the variable load matching circuit 23 or 24. In a case where a second power level is applied, the power supply voltage Vcc2 is supplied to the power amplifier 11, and the load impedance viewed from the power amplifier 11 is adjusted to the second impedance by the variable load matching circuit 23 or 24, and the operation of the power amplifier 12 is stopped.

[0219] According to this, the high frequency signal can be amplified using the two power amplifiers 11 and 12, so that the requirement for the maximum output power of each of the power amplifiers 11 and 12 at the first power level can be reduced. Furthermore, at the second power level where the maximum output power is low, the operation of the power amplifier 12 can be stopped, so that the decrease in power efficiency at the second power level can be suppressed.

[0220] In addition, for example, the high-frequency circuit 1D involved in this embodiment may also include: a capacitor C12 and a switch SW11, which are connected in series between the path between the power amplifier 12 and the second transmission line and the ground; and a switch SW441, which is connected in series with a resistor R441 between the output end of the power amplifier 11 and the output end of the power amplifier 12. It is also possible that when the first power level is applied, the switch SW11 is disconnected and the switch SW441 is closed, and it is also possible that when the second power level is applied, the switch SW11 is closed and the switch SW441 is disconnected.

[0221] According to this, the high frequency signal can be amplified using the two power amplifiers 11 and 12, so that the requirement for the maximum output power of each of the power amplifiers 11 and 12 at the first power level can be reduced. Furthermore, at the second power level where the maximum output power is low, the operation of the power amplifier 12 can be stopped, so that the decrease in power efficiency at the second power level can be suppressed.

[0222] Specific examples of combinations of the passband or corresponding frequency band of the filter 31 and the power level that can be used in the above-mentioned Embodiments 1 to 5 are shown in Table 1 below.

[0223] [Table 1]

[0224]

[0225] (Implementation 6)

[0226] Next, Embodiment 6 is described. This embodiment differs from Embodiment 1 mainly in that two filters with different input impedances are used instead of a variable load matching circuit to adjust the load impedance seen from the power amplifier. Hereinafter, referring to the accompanying drawings, this embodiment is described with a focus on the aspects that are different from Embodiment 1.

[0227] Reference Fig.11 The circuit configurations of the communication device 6E and the high-frequency circuit 1E according to the present embodiment will be described. Fig.11 It is a circuit configuration diagram of a communication device 6E according to this embodiment.

[0228] also, Fig.11 The circuit configurations are exemplary, and the communication device 6E and high-frequency circuit 1E can be implemented using any of a variety of circuit implementations and circuit technologies. Therefore, the description of the communication device 6E and high-frequency circuit 1E provided below should not be interpreted in a limiting sense.

[0229] [6.1 Circuit Structure of Communication Device 6E]

[0230] Reference Fig.11 The communication device 6E according to the present embodiment is described below. The communication device 6E includes a high frequency circuit 1E, antennas 2a and 2b, an RFIC (Radio Frequency Integrated Circuit) 3, a BBIC (Baseband Integrated Circuit) 4, and a power supply circuit 5.

[0231] The high-frequency circuit 1E transmits a high-frequency signal between the antenna 2 and the RFIC 3. The circuit structure of the high-frequency circuit 1E will be described later.

[0232] The antennas 2a and 2b are connected to the antenna connection terminals 100a and 100b of the high-frequency circuit 1E, respectively. The antennas 2a and 2b receive high-frequency signals from the high-frequency circuit 1E, respectively, and output them to the outside of the communication device 6E. In addition, the antennas 2a and 2b may receive high-frequency signals from the outside of the communication device 6E and output them to the high-frequency circuit 1E. In addition, at least one of the antennas 2a and 2b may not be included in the communication device 6E. In addition, the communication device 6E may also include one or more antennas in addition to the antennas 2a and 2b.

[0233] [6.2 Circuit structure of high-frequency circuit 1E]

[0234] Next, refer to Fig.11 The high frequency circuit 1E according to the present embodiment is described below. The high frequency circuit 1E includes a power amplifier 11 , filters 32 and 33 , switch circuits 51 and 52 , antenna connection terminals 100 a and 100 b , an input terminal 111 , and a power supply voltage terminal 121 .

[0235] The antenna connection terminals 100a and 100b are external connection terminals of the high-frequency circuit 1E, and are terminals for providing transmission signals to the outside of the high-frequency circuit 1E. The antenna connection terminals 100a and 100b are connected to the antennas 2a and 2b, respectively, outside the high-frequency circuit 1E, and are connected to the filters 32 and 33 via the switch circuit 52 inside the high-frequency circuit 1E. In addition, one of the antenna connection terminals 100a and 100b may not be included in the high-frequency circuit 1E.

[0236] The power amplifier 11 is an example of a first power amplifier. The input end of the power amplifier 11 is connected to the input terminal 111. The output end of the power amplifier 11 is selectively connected to the filters 32 and 33 via the switch circuit 51. Furthermore, the power amplifier 11 is connected to the power supply voltage terminal 121.

[0237] As in Embodiment 1, the power amplifier 11 can amplify the high frequency signal supplied from the RFIC 3 via the input terminal 111 using the power supply voltages Vcc1 and Vcc2 supplied from the power supply circuit 5 via the power supply voltage terminal 121. In addition, the power amplifier 11 can support the first power level, the second power level, and the third power level. When the first power level is applied, the power amplifier 11 is supplied with the power supply voltage Vcc1, and when the second power level and the third power level are applied, the power amplifier 11 is supplied with the power supply voltage Vcc2. In addition, the power amplifier 11 may not be able to support the third power level.

[0238] The filter 32 is an example of a first filter, and is connected between the antenna connection terminals 100a and 100b and the power amplifier 11. Specifically, one end of the filter 32 is connected to the power amplifier 11 via the switch circuit 51, and the other end of the filter 32 is connected to the antenna connection terminal 100a or 100b via the switch circuit 52. The filter 32 corresponds to a specified frequency band and is a bandpass filter having a passband including the specified frequency band. The filter 32 has a power tolerance capable of supporting a first power level. As the filter 32, a SAW filter, a BAW filter, an LC resonant filter or a dielectric resonant filter, or any combination thereof, may also be used, and is not limited to these.

[0239] The filter 33 is an example of a second filter, and is connected between the antenna connection terminals 100a and 100b and the power amplifier 11. Specifically, one end of the filter 33 is connected to the power amplifier 11 via the switch circuit 51, and the other end of the filter 33 is connected to the antenna connection terminal 100a or 100b via the switch circuit 52. The filter 33 is a bandpass filter having a passband including a specified frequency band, and has a power tolerance capable of supporting a second power level. As the filter 33, a SAW filter, a BAW filter, an LC resonant filter, or a dielectric resonant filter, or any combination thereof, may also be used, and is not limited to these.

[0240] Filters 32 and 33 have different input impedances. Specifically, the input impedance of filter 32 is lower than the input impedance of filter 33. Therefore, when filter 32 is connected to power amplifier 11, the load impedance viewed from power amplifier 11 is adjusted to a lower first impedance, and when filter 33 is connected to power amplifier 11, the load impedance viewed from power amplifier 11 is adjusted to a higher second impedance.

[0241] In addition, the input impedance of the filters 32 and 33 can be determined by measuring the impedance at the center frequency of a predetermined frequency band using a network analyzer.

[0242] The switch circuit 51 is connected between the power amplifier 11 and the filters 32 and 33. Specifically, the switch circuit 51 includes terminals 511 to 513. The terminal 511 is an example of a first terminal and is connected to the output end of the power amplifier 11. The terminal 512 is an example of a second terminal and is connected to the filter 32. The terminal 513 is an example of a third terminal and is connected to the filter 33.

[0243] In this connection structure, the switch circuit 51 can, for example, exclusively connect the terminal 511 to the terminals 512 and 513 based on a control signal from the RFIC 3. That is, the switch circuit 51 can selectively connect the power amplifier 11 to the filters 32 and 33. More specifically, when the first power level and the third power level are applied, the switch circuit 51 can connect the power amplifier 11 to the filter 32, and when the second power level is applied, the switch circuit 51 can connect the power amplifier 11 to the filter 33. The switch circuit 51 is, for example, composed of a SPDT (Single-Pole Double-Throw) type switch circuit.

[0244] The switch circuit 52 is connected between the filters 32 and 33 and the antenna connection terminals 100a and 100b. Specifically, the switch circuit 52 includes terminals 521 to 524. The terminal 521 is connected to the antenna connection terminal 100a. The terminal 522 is connected to the antenna connection terminal 100b. The terminal 523 is connected to the filter 32. The terminal 524 is connected to the filter 33.

[0245] In this connection structure, the switch circuit 52 can connect the terminal 521 exclusively to the terminals 523 and 524, and can connect the terminal 522 exclusively to the terminals 523 and 524, based on the control signal from the RFIC 3. The switch circuit 52 is composed of a DPDT (Double-Pole Double-Throw) type switch circuit, for example.

[0246] In addition, the switch circuit 52 may not be included in the high frequency circuit 1E. In this case, the filters 32 and 33 may be fixedly connected to the antenna connection terminals 100a and 100b, respectively.

[0247] [6.3 Effects, etc.]

[0248] As described above, the high-frequency circuit 1E involved in this embodiment is configured to support a first power level and a second power level, and the maximum output power of the second power level is lower than the maximum output power of the first power level. The high-frequency circuit 1E includes: a power amplifier 11; a filter 32; a filter 33; and a switching circuit 51, which includes a terminal 511 connected to the output end of the power amplifier 11, a terminal 512 connected to the filter 32, and a terminal 513 connected to the filter 33. When the first power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc1, and the filter 32 is connected to the power amplifier 11 through the switching circuit 51. When the second power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the filter 33 is connected to the power amplifier 11 through the switching circuit 51. The power supply voltage Vcc1 is higher than the power supply voltage Vcc2, and the input impedance of the filter 32 is lower than the input impedance of the filter 33.

[0249] According to this, the connection between the power amplifier 12 and the filters 32 and 33 having different input impedances is switched according to the first power level and the second power level, so that the load impedance viewed from the power amplifier 11 can be switched. Therefore, both the power supply voltage and the load impedance are adjusted according to the first power level and the second power level, so that both the first power level and the second power level can be supported by the power amplifier 11. In particular, when the difference between the maximum output power of the first power level and the maximum output power of the second power level is large, if the power supply voltage is fixed, the adjustment range of the load impedance becomes wider, and the switching loss increases at a low load impedance. Therefore, by adjusting both the power supply voltage and the load impedance, the adjustment range of the load impedance can be suppressed from becoming wider, thereby suppressing the switching loss. In addition, when the difference between the maximum output power of the first power level and the maximum output power of the second power level is large, if the load impedance is fixed, a higher power supply voltage is required, and the power amplifier 11 is required to have a higher voltage tolerance. Therefore, by adjusting both the power supply voltage and the load impedance, the requirement for the voltage tolerance of the power amplifier 11 can be suppressed.

[0250] For example, in the high-frequency circuit 1E involved in the present embodiment, the power amplifier 11 may be configured to also support a third power level, wherein the maximum output power of the third power level is lower than the maximum output power of the first power level and higher than the maximum output power of the second power level. Alternatively, when the third power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the filter 32 is connected to the power amplifier 11 via a switching circuit 51.

[0251] Thus, at the third power level between the first and second power levels, the same power supply voltage as the second power level is provided, and the same filter 32 as the first power level is connected to the power amplifier 11. Therefore, the increase in power supply voltage at the third power level can be suppressed, thereby improving power efficiency.

[0252] (Implementation 7)

[0253] Next, Embodiment 7 is described. This embodiment differs from Embodiment 6 mainly in that a differential amplifier circuit is used as a power amplifier circuit. Hereinafter, this embodiment will be described with reference to the drawings, focusing on the differences from Embodiment 6.

[0254] Reference Fig.12 The circuit configurations of the communication device 6F and the high-frequency circuit 1F according to the present embodiment will be described. Fig.12 It is a circuit configuration diagram of a communication device 6F according to this embodiment.

[0255] also, Fig.12The circuit configurations are exemplary, and the communication device 6F and high-frequency circuit 1F can be implemented using any of a variety of circuit implementations and circuit technologies. Thus, the description of the communication device 6F and high-frequency circuit 1F provided below should not be interpreted in a limiting sense.

[0256] In addition, since the communication device 6F is the same as the communication device 6E except that it includes a high-frequency circuit 1F instead of the high-frequency circuit 1E, the description thereof is omitted.

[0257] The high frequency circuit 1F includes power amplifiers 11 and 12, filters 32 and 33, transformers 41 and 42, switch circuits 51 and 52, a capacitor C11, antenna connection terminals 100a and 100b, an input terminal 111, and a power supply voltage terminal 121. The high frequency circuit 1F corresponds to a combination of the above-mentioned embodiments 2 and 6, and therefore a detailed description thereof will be omitted.

[0258] As described above, the high-frequency circuit 1F involved in this embodiment is configured to support a first power level and a second power level, and the maximum output power of the second power level is lower than the maximum output power of the first power level. The high-frequency circuit 1F includes: a power amplifier 11; a filter 32; a filter 33; and a switching circuit 51, which includes a terminal 511 connected to the output end of the power amplifier 11, a terminal 512 connected to the filter 32, and a terminal 513 connected to the filter 33. When the first power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc1, and the filter 32 is connected to the power amplifier 11 through the switching circuit 51. When the second power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the filter 33 is connected to the power amplifier 11 through the switching circuit 51. The power supply voltage Vcc1 is higher than the power supply voltage Vcc2, and the input impedance of the filter 32 is lower than the input impedance of the filter 33.

[0259] According to this, the connection between the power amplifier 12 and the filters 32 and 33 having different input impedances is switched according to the first power level and the second power level, so that the load impedance viewed from the power amplifier 11 can be switched. Therefore, both the power supply voltage and the load impedance are adjusted according to the first power level and the second power level, so that both the first power level and the second power level can be supported by the power amplifier 11. In particular, when the difference between the maximum output power of the first power level and the maximum output power of the second power level is large, if the power supply voltage is fixed, the adjustment range of the load impedance becomes wider, and the switching loss increases at a low load impedance. Therefore, by adjusting both the power supply voltage and the load impedance, the adjustment range of the load impedance can be suppressed from becoming wider, thereby suppressing the switching loss. In addition, when the difference between the maximum output power of the first power level and the maximum output power of the second power level is large, if the load impedance is fixed, a higher power supply voltage is required, and the power amplifier 11 is required to have a higher voltage tolerance. Therefore, by adjusting both the power supply voltage and the load impedance, the requirement for the voltage tolerance of the power amplifier 11 can be suppressed.

[0260] For example, in the high-frequency circuit 1F involved in the present embodiment, the power amplifier 11 may be configured to also support a third power level, wherein the maximum output power of the third power level is lower than the maximum output power of the first power level and higher than the maximum output power of the second power level. Alternatively, when the third power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the filter 32 is connected to the power amplifier 11 via a switching circuit 51.

[0261] Thus, at the third power level between the first and second power levels, the same power supply voltage as the second power level is provided, and the same filter 32 as the first power level is connected to the power amplifier 11. Therefore, the increase in power supply voltage at the third power level can be suppressed, thereby improving power efficiency.

[0262] In addition, for example, the high-frequency circuit 1F involved in the present embodiment may also include: a power amplifier 12; and a transformer 42, which includes a primary coil L421 and a secondary coil L422, wherein the two ends of the primary coil L421 are respectively connected to the output end of the power amplifier 11 and the output end of the power amplifier 12, and one end of the secondary coil L422 is connected to the terminal 511 of the switching circuit 51. Alternatively, when the first power level is applied, the power amplifiers 11 and 12 are provided with a power supply voltage Vcc1, and the filter 32 is connected to the transformer 42 through the switching circuit 51. Alternatively, when the second power level is applied, the power amplifiers 11 and 12 are provided with a power supply voltage Vcc2, and the filter 33 is connected to the transformer 42 through the switching circuit 51.

[0263] According to this, the high-frequency signal can be amplified using the two power amplifiers 11 and 12 , and thus the requirement for the maximum output power of each of the power amplifiers 11 and 12 at the first power level can be reduced.

[0264] (Implementation 8)

[0265] Next, the eighth embodiment is described. This embodiment differs from the sixth and seventh embodiments mainly in that a differential amplifier circuit is used as a power amplifier circuit, and the operation of one of the two power amplifiers is stopped at the second power level. Hereinafter, with reference to the accompanying drawings, this embodiment is described mainly in terms of differences from the sixth and seventh embodiments.

[0266] Reference Fig.13 The circuit configurations of the communication device 6G and the high-frequency circuit 1G according to the present embodiment will be described. Fig.13 It is a circuit configuration diagram of the communication device 6G according to this embodiment.

[0267] also, Fig.13 The circuit configurations are exemplary, and the communication device 6G and the high-frequency circuit 1G can be implemented using any of a variety of circuit implementations and circuit technologies. Therefore, the description of the communication device 6G and the high-frequency circuit 1G provided below should not be interpreted in a limiting sense.

[0268] The communication device 6G is the same as the communication device 6E except that it includes a high-frequency circuit 1G instead of the high-frequency circuit 1E, and therefore the description thereof is omitted.

[0269] The high frequency circuit 1G includes power amplifiers 11 and 12, filters 32 and 33, transformers 41 and 42, switch circuits 51 and 52, capacitors C11 and C12, a switch SW11, antenna connection terminals 100a and 100b, an input terminal 111, and a power supply voltage terminal 121. The high frequency circuit 1G corresponds to a combination of the above-mentioned embodiments 3 and 6, and therefore a detailed description thereof will be omitted.

[0270] As described above, the high-frequency circuit 1G involved in this embodiment is configured to support a first power level and a second power level, and the maximum output power of the second power level is lower than the maximum output power of the first power level. The high-frequency circuit 1G includes: a power amplifier 11; a filter 32; a filter 33; and a switch circuit 51, which includes a terminal 511 connected to the output end of the power amplifier 11, a terminal 512 connected to the filter 32, and a terminal 513 connected to the filter 33. When the first power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc1, and the filter 32 is connected to the power amplifier 11 through the switch circuit 51. When the second power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the filter 33 is connected to the power amplifier 11 through the switch circuit 51. The power supply voltage Vcc1 is higher than the power supply voltage Vcc2, and the input impedance of the filter 32 is lower than the input impedance of the filter 33.

[0271] According to this, the connection between the power amplifier 12 and the filters 32 and 33 having different input impedances is switched according to the first power level and the second power level, so that the load impedance viewed from the power amplifier 11 can be switched. Therefore, both the power supply voltage and the load impedance are adjusted according to the first power level and the second power level, so that both the first power level and the second power level can be supported by the power amplifier 11. In particular, when the difference between the maximum output power of the first power level and the maximum output power of the second power level is large, if the power supply voltage is fixed, the adjustment range of the load impedance becomes wider, and the switching loss increases at a low load impedance. Therefore, by adjusting both the power supply voltage and the load impedance, the adjustment range of the load impedance can be suppressed from becoming wider, thereby suppressing the switching loss. In addition, when the difference between the maximum output power of the first power level and the maximum output power of the second power level is large, if the load impedance is fixed, a higher power supply voltage is required, and the power amplifier 11 is required to have a higher voltage tolerance. Therefore, by adjusting both the power supply voltage and the load impedance, the requirement for the voltage tolerance of the power amplifier 11 can be suppressed.

[0272] For example, in the high-frequency circuit 1G involved in the present embodiment, the power amplifier 11 may be configured to also support a third power level, wherein the maximum output power of the third power level is lower than the maximum output power of the first power level and higher than the maximum output power of the second power level. Alternatively, when the third power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the filter 32 is connected to the power amplifier 11 via a switching circuit 51.

[0273] Thus, at the third power level between the first and second power levels, the same power supply voltage as the second power level is provided, and the same filter 32 as the first power level is connected to the power amplifier 11. Therefore, the increase in power supply voltage at the third power level can be suppressed, thereby improving power efficiency.

[0274] In addition, for example, the high-frequency circuit 1G involved in the present embodiment may also include: a power amplifier 12; and a transformer 42, which includes a primary coil L421 and a secondary coil L422, wherein the two ends of the primary coil L421 are respectively connected to the output end of the power amplifier 11 and the output end of the power amplifier 12, and one end of the secondary coil L422 is connected to the terminal 511 of the switching circuit 51. Alternatively, when the first power level is applied, the power amplifiers 11 and 12 are provided with a power supply voltage Vcc1, and the filter 32 is connected to the transformer 42 through the switching circuit 51. Alternatively, when the second power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the filter 33 is connected to the transformer 42 through the switching circuit 51, and the operation of the power amplifier 12 is stopped.

[0275] According to this, the high frequency signal can be amplified using the two power amplifiers 11 and 12, so that the requirement for the maximum output power of each of the power amplifiers 11 and 12 at the first power level can be reduced. Furthermore, at the second power level where the maximum output power is low, the operation of the power amplifier 12 can be stopped, so that the decrease in power efficiency at the second power level can be suppressed.

[0276] (Implementation method 9)

[0277] Next, Embodiment 9 is described. This embodiment differs from Embodiment 6 mainly in that a Wilkinson amplifier circuit is used as a power amplifier circuit. Hereinafter, this embodiment will be described with reference to the drawings, focusing on the differences from Embodiment 6.

[0278] Reference Fig.14 The circuit configurations of the communication device 6H and the high-frequency circuit 1H according to the present embodiment will be described. Fig.14 It is a circuit configuration diagram of a communication device 6H according to this embodiment.

[0279] also, Fig.14 The circuit configurations are exemplary, and the communication device 6H and the high-frequency circuit 1H can be implemented using any of a variety of circuit implementations and circuit technologies. Therefore, the description of the communication device 6H and the high-frequency circuit 1H provided below should not be interpreted in a limiting sense.

[0280] In addition, the communication device 6H is the same as the communication device 6E except that it includes the high-frequency circuit 1H instead of the high-frequency circuit 1E, and therefore the description thereof is omitted.

[0281] The high frequency circuit 1H includes power amplifiers 11 and 12, filters 32 and 33, a Wilkinson divider 43, a Wilkinson coupler 44, switch circuits 51 and 52, antenna connection terminals 100a and 100b, an input terminal 111, and a power supply voltage terminal 121. The high frequency circuit 1H corresponds to a combination of the above-mentioned fourth and sixth embodiments, and therefore detailed description thereof will be omitted.

[0282] As described above, the high-frequency circuit 1H involved in this embodiment is configured to support a first power level and a second power level, and the maximum output power of the second power level is lower than the maximum output power of the first power level. The high-frequency circuit 1H includes: a power amplifier 11; a filter 32; a filter 33; and a switching circuit 51, which includes a terminal 511 connected to the output end of the power amplifier 11, a terminal 512 connected to the filter 32, and a terminal 513 connected to the filter 33. When the first power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc1, and the filter 32 is connected to the power amplifier 11 through the switching circuit 51. When the second power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the filter 33 is connected to the power amplifier 11 through the switching circuit 51. The power supply voltage Vcc1 is higher than the power supply voltage Vcc2, and the input impedance of the filter 32 is lower than the input impedance of the filter 33.

[0283] According to this, the connection between the power amplifier 12 and the filters 32 and 33 having different input impedances is switched according to the first power level and the second power level, so that the load impedance viewed from the power amplifier 11 can be switched. Therefore, both the power supply voltage and the load impedance are adjusted according to the first power level and the second power level, so that both the first power level and the second power level can be supported by the power amplifier 11. In particular, when the difference between the maximum output power of the first power level and the maximum output power of the second power level is large, if the power supply voltage is fixed, the adjustment range of the load impedance becomes wider, and the switching loss increases at a low load impedance. Therefore, by adjusting both the power supply voltage and the load impedance, the adjustment range of the load impedance can be suppressed from becoming wider, thereby suppressing the switching loss. In addition, when the difference between the maximum output power of the first power level and the maximum output power of the second power level is large, if the load impedance is fixed, a higher power supply voltage is required, and the power amplifier 11 is required to have a higher voltage tolerance. Therefore, by adjusting both the power supply voltage and the load impedance, the requirement for the voltage tolerance of the power amplifier 11 can be suppressed.

[0284] For example, in the high-frequency circuit 1H involved in the present embodiment, the power amplifier 11 may be configured to also support a third power level, wherein the maximum output power of the third power level is lower than the maximum output power of the first power level and higher than the maximum output power of the second power level. Alternatively, when the third power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the filter 32 is connected to the power amplifier 11 via a switching circuit 51.

[0285] Thus, at the third power level between the first and second power levels, the same power supply voltage as the second power level is provided, and the same filter 32 as the first power level is connected to the power amplifier 11. Therefore, the increase in power supply voltage at the third power level can be suppressed, thereby improving power efficiency.

[0286] In addition, for example, the high-frequency circuit 1H involved in this embodiment may also include: a power amplifier 12; a transmission line TL441, which is connected between the output end of the power amplifier 11 and the terminal 511 of the switch circuit 51; a transmission line TL442, which is connected between the output end of the power amplifier 12 and the terminal 511 of the switch circuit 51; and a resistor R441, which is connected in parallel with the transmission lines TL441 and TL442 between the output end of the power amplifier 11 and the output end of the power amplifier 12. It is also possible that, when the first power level is applied, the power amplifiers 11 and 12 are provided with a power supply voltage Vcc1, and the filter 32 is connected to the power amplifiers 11 and 12 through the switch circuit 51. It is also possible that, when the second power level is applied, the power amplifiers 11 and 12 are provided with a power supply voltage Vcc2, and the filter 33 is connected to the power amplifiers 11 and 12 through the switch circuit 51.

[0287] According to this, the high-frequency signal can be amplified using the two power amplifiers 11 and 12 , and thus the requirement for the maximum output power of each of the power amplifiers 11 and 12 at the first power level can be reduced.

[0288] (Implementation 10)

[0289] Next, the tenth embodiment is described. This embodiment differs from the sixth and ninth embodiments mainly in that a Wilkinson amplifier circuit is used as a power amplifier circuit and one of the two power amplifiers is stopped at the second power level. Hereinafter, with reference to the accompanying drawings, this embodiment is described mainly in terms of the differences from the sixth and ninth embodiments.

[0290] Reference Fig.15 The circuit configurations of the communication device 6I and the high-frequency circuit 1I according to the present embodiment will be described. Fig.15It is a circuit configuration diagram of the communication device 6I according to this embodiment.

[0291] also, Fig.15 The circuit configurations are exemplary, and the communication device 6I and the high-frequency circuit 1I can be implemented using any of a variety of circuit implementations and circuit technologies. Therefore, the description of the communication device 6I and the high-frequency circuit 1I provided below should not be interpreted in a limiting sense.

[0292] The communication device 6I is the same as the communication device 6E except that it includes a high-frequency circuit 1I instead of the high-frequency circuit 1E, and therefore the description thereof is omitted.

[0293] The high-frequency circuit 1I includes power amplifiers 11 and 12, filters 32 and 33, a Wilkinson divider 43, a Wilkinson coupler 44D, switch circuits 51 and 52, a capacitor C12, a switch SW11, antenna connection terminals 100a and 100b, an input terminal 111, and a power supply voltage terminal 121. The high-frequency circuit 1I corresponds to a combination of the fifth and sixth embodiments described above, and therefore a detailed description thereof will be omitted.

[0294] As described above, the high-frequency circuit 1I involved in this embodiment is configured to support a first power level and a second power level, and the maximum output power of the second power level is lower than the maximum output power of the first power level. The high-frequency circuit 1I includes: a power amplifier 11; a filter 32; a filter 33; and a switching circuit 51, which includes a terminal 511 connected to the output end of the power amplifier 11, a terminal 512 connected to the filter 32, and a terminal 513 connected to the filter 33. When the first power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc1, and the filter 32 is connected to the power amplifier 11 through the switching circuit 51. When the second power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the filter 33 is connected to the power amplifier 11 through the switching circuit 51. The power supply voltage Vcc1 is higher than the power supply voltage Vcc2, and the input impedance of the filter 32 is lower than the input impedance of the filter 33.

[0295] According to this, the connection between the power amplifier 12 and the filters 32 and 33 having different input impedances is switched according to the first power level and the second power level, so that the load impedance viewed from the power amplifier 11 can be switched. Therefore, both the power supply voltage and the load impedance are adjusted according to the first power level and the second power level, so that both the first power level and the second power level can be supported by the power amplifier 11. In particular, when the difference between the maximum output power of the first power level and the maximum output power of the second power level is large, if the power supply voltage is fixed, the adjustment range of the load impedance becomes wider, and the switching loss increases at a low load impedance. Therefore, by adjusting both the power supply voltage and the load impedance, the adjustment range of the load impedance can be suppressed from becoming wider, thereby suppressing the switching loss. In addition, when the difference between the maximum output power of the first power level and the maximum output power of the second power level is large, if the load impedance is fixed, a higher power supply voltage is required, and the power amplifier 11 is required to have a higher voltage tolerance. Therefore, by adjusting both the power supply voltage and the load impedance, the requirement for the voltage tolerance of the power amplifier 11 can be suppressed.

[0296] For example, in the high-frequency circuit 1I involved in the present embodiment, the power amplifier 11 may be configured to also support a third power level, wherein the maximum output power of the third power level is lower than the maximum output power of the first power level and higher than the maximum output power of the second power level. Alternatively, when the third power level is applied, the power amplifier 11 is provided with a power supply voltage Vcc2, and the filter 32 is connected to the power amplifier 11 via a switching circuit 51.

[0297] Thus, at the third power level between the first and second power levels, the same power supply voltage as the second power level is provided, and the same filter 32 as the first power level is connected to the power amplifier 11. Therefore, the increase in power supply voltage at the third power level can be suppressed, thereby improving power efficiency.

[0298] For example, the high-frequency circuit 1I of the present embodiment may further include: a power amplifier 12; a transmission line TL441 connected between the output end of the power amplifier 11 and the terminal 511 of the switch circuit 51; a transmission line TL442 connected between the output end of the power amplifier 12 and the terminal 511 of the switch circuit 51; and a resistor R441 connected in parallel with the transmission lines TL441 and TL442 between the output end of the power amplifier 11 and the output end of the power amplifier 12. Alternatively, when the first power level is applied, the power amplifiers 11 and 12 are provided with a power supply voltage Vccl, and the filter 32 is connected to the power amplifiers 11 and 12 through the switch circuit 51. Alternatively, when the second power level is applied, the power amplifier 11 is provided with a power supply voltage Vccl. c 2, and the filter 33 is connected to the power amplifier 11 through the switch circuit 51, and the operation of the power amplifier 12 is stopped.

[0299] According to this, the high frequency signal can be amplified using the two power amplifiers 11 and 12, so that the requirement for the maximum output power of each of the power amplifiers 11 and 12 at the first power level can be reduced. Furthermore, at the second power level where the maximum output power is low, the operation of the power amplifier 12 can be stopped, so that the decrease in power efficiency at the second power level can be suppressed.

[0300] Specific examples of combinations of passbands or corresponding frequency bands and power levels of the filters 32 and 33 that can be used in the above-mentioned Embodiments 7 to 10 are shown in Table 2 below.

[0301] [Table 2]

[0302] Passband or corresponding frequency band First power level Second power level The third power level #1 6425-7125MHz PC1 / PC1.5 / PC2 PC5 PC3 #2 n104 PC1 / PC1.5 / PC2 PC5 PC3

[0303] (Other embodiments)

[0304] The high-frequency circuit involved in the present invention is described above based on the embodiment, but the high-frequency circuit involved in the present invention is not limited to the above embodiment. Other embodiments implemented by combining any structural elements in the above embodiment, modified examples obtained by implementing various modifications that can be thought of by those skilled in the art without departing from the scope of the purpose of the present invention to the above embodiment, and various devices with the above high-frequency circuit built in are also included in the present invention.

[0305] For example, in the circuit structure of the high-frequency circuit involved in each of the above-mentioned embodiments, other circuit elements and wirings may be inserted between the paths connecting the circuit elements and signal paths disclosed in the drawings. For example, an inductor and / or a capacitor may be inserted between the power supply voltage terminal and the power amplifier.

[0306] In addition, the communication device according to each of the above embodiments may include a plurality of high-frequency circuits. In this case, the plurality of high-frequency circuits may be integrated into one high-frequency circuit. Fig.16 An example of such a high-frequency circuit will be described. Fig.16 1 is a circuit diagram of a communication device 6J according to another embodiment. The communication device 6J includes a high-frequency circuit 1J, two antennas 2, an RFIC 3, a BBIC 4, and a power supply circuit 5. The high-frequency circuit 1J includes two power amplifiers 11, two variable load matching circuits 21 or 22, two filters 31, two antenna connection terminals 100, two input terminals 111, and a power supply voltage terminal 121.

[0307] Next, the features of the high-frequency circuit described in the above-mentioned embodiments are shown.

[0308] <1> A high frequency circuit is configured to support a first power level and a second power level, wherein a maximum output power of the second power level is lower than a maximum output power of the first power level, the high frequency circuit comprising:

[0309] a first power amplifier; and

[0310] a variable load matching circuit connected to the output terminal of the first power amplifier,

[0311] When the first power level is applied, the first power amplifier is provided with a first power supply voltage, and the load impedance viewed from the first power amplifier is adjusted to a first impedance by the variable load matching circuit.

[0312] When the second power level is applied, the first power amplifier is provided with a second power supply voltage, and the load impedance viewed from the first power amplifier is adjusted to a second impedance by the variable load matching circuit.

[0313] The first power supply voltage is higher than the second power supply voltage,

[0314] The first impedance is lower than the second impedance.

[0315] <2> according to <1> The high frequency circuit, wherein:

[0316] The first power amplifier is configured to further support a third power level, wherein a maximum output power of the third power level is lower than a maximum output power of the first power level and higher than a maximum output power of the second power level,

[0317] In a condition where the third power level is applied, the second power supply voltage is provided to the first power amplifier, and the load impedance viewed from the first power amplifier is adjusted to the first impedance through the variable load matching circuit.

[0318] <3> according to <1> or <2> The high frequency circuit, wherein:

[0319] The variable load matching circuit comprises:

[0320] A first capacitor and a first switch, wherein the first capacitor and the first switch are connected in series between the first power amplifier and an antenna connection terminal; and

[0321] a second capacitor and a second switch, wherein the second capacitor and the second switch are connected in series with each other and connected in parallel with the first capacitor and the first switch between the first power amplifier and the antenna connection terminal;

[0322] The electrostatic capacitance of the first capacitor is larger than the electrostatic capacitance of the second capacitor,

[0323] When the first power level is applied, the first switch is closed and the second switch is open.

[0324] When the second power level is applied, the first switch is opened and the second switch is closed.

[0325] <4> according to <1> or <2> The high frequency circuit, wherein:

[0326] The variable load matching circuit comprises:

[0327] a first inductor connected between the first power amplifier and an antenna connection terminal;

[0328] a second inductor and a first switch, wherein the second inductor and the first switch are connected in series with each other and connected in parallel with the first inductor between the first power amplifier and the antenna connection terminal;

[0329] a first capacitor connected between a path between the first power amplifier and the antenna connection terminal and ground; and

[0330] a second capacitor and a second switch, wherein the second capacitor and the second switch are connected in series with each other and connected in parallel with the first capacitor between the path between the first power amplifier and the antenna connection terminal and ground,

[0331] When the first power level is applied, the first switch is opened and the second switch is closed.

[0332] When the second power level is applied, the first switch is closed and the second switch is open.

[0333] <5> according to <1> ~ <4> A high frequency circuit as described in any one of claims , wherein:

[0334] The high frequency circuit further comprises:

[0335] a second power amplifier; and

[0336] A transformer, comprising a primary coil and a secondary coil, wherein two ends of the primary coil are respectively connected to an output end of the first power amplifier and an output end of the second power amplifier, and one end of the secondary coil is connected to the variable load matching circuit.

[0337] Under the condition of applying the first power level, the first power amplifier and the second power amplifier are provided with the first power voltage, and the load impedance viewed from the first power amplifier and the second power amplifier is adjusted to the first impedance through the variable load matching circuit,

[0338] When the second power level is applied, the first power amplifier and the second power amplifier are provided with the second power supply voltage, and the load impedance viewed from the first power amplifier and the second power amplifier is adjusted to the second impedance by the variable load matching circuit.

[0339] <6> according to <1> or <2> The high frequency circuit, wherein:

[0340] The high frequency circuit further comprises:

[0341] a second power amplifier; and

[0342] A transformer, comprising a primary coil and a secondary coil, wherein two ends of the primary coil are respectively connected to an output end of the first power amplifier and an output end of the second power amplifier, and one end of the secondary coil is connected to the variable load matching circuit.

[0343] Under the condition of applying the first power level, the first power amplifier and the second power amplifier are provided with the first power voltage, and the load impedance viewed from the first power amplifier and the second power amplifier is adjusted to the first impedance through the variable load matching circuit,

[0344] When the second power level is applied, the second power supply voltage is provided to the first power amplifier, the load impedance viewed from the first power amplifier is adjusted to the second impedance by the variable load matching circuit, and the operation of the second power amplifier is stopped.

[0345] <7> according to <6> The high frequency circuit, wherein:

[0346] The variable load matching circuit comprises:

[0347] a first inductor connected between the secondary coil and the antenna connection terminal;

[0348] a second inductor and a first switch, wherein the second inductor and the first switch are connected in series with each other and connected in parallel with the first inductor between the secondary coil and the antenna connection terminal;

[0349] A first capacitor and a second capacitor, the first capacitor and the second capacitor being connected in series between a path between the first power amplifier and the antenna connection terminal and ground; and

[0350] a second switch connected between a path between the first capacitor and the second capacitor and ground,

[0351] The high frequency circuit further includes a third capacitor and a third switch, wherein the third capacitor and the third switch are connected in series between a path between the second power amplifier and the primary coil and ground.

[0352] When the first power level is applied, the first switch and the third switch are opened respectively, and the second switch is closed.

[0353] When the second power level is applied, the first switch and the third switch are respectively closed, and the second switch is open.

[0354] <8> according to <1> ~ <4> A high frequency circuit as described in any one of claims , wherein:

[0355] The high frequency circuit further comprises:

[0356] a second power amplifier;

[0357] A first transmission line connected between an output terminal of the first power amplifier and the variable load matching circuit;

[0358] A second transmission line connected between an output terminal of the second power amplifier and the variable load matching circuit; and

[0359] a resistor connected in parallel with the first transmission line and the second transmission line between an output end of the first power amplifier and an output end of the second power amplifier,

[0360] Under the condition of applying the first power level, the first power amplifier and the second power amplifier are provided with the first power voltage, and the load impedance viewed from the first power amplifier and the second power amplifier is adjusted to the first impedance through the variable load matching circuit,

[0361] When the second power level is applied, the first power amplifier and the second power amplifier are provided with the second power supply voltage, and the load impedance viewed from the first power amplifier and the second power amplifier is adjusted to the second impedance by the variable load matching circuit.

[0362] <9> according to <1> ~ <4> A high frequency circuit as described in any one of claims , wherein:

[0363] The high frequency circuit further comprises:

[0364] a second power amplifier;

[0365] A first transmission line connected between an output terminal of the first power amplifier and the variable load matching circuit;

[0366] A second transmission line connected between an output terminal of the second power amplifier and the variable load matching circuit; and

[0367] a resistor connected in parallel with the first transmission line and the second transmission line between an output end of the first power amplifier and an output end of the second power amplifier,

[0368] Under the condition of applying the first power level, the first power amplifier and the second power amplifier are provided with the first power voltage, and the load impedance viewed from the first power amplifier and the second power amplifier is adjusted to the first impedance through the variable load matching circuit,

[0369] When the second power level is applied, the second power supply voltage is provided to the first power amplifier, the load impedance viewed from the first power amplifier is adjusted to the second impedance by the variable load matching circuit, and the operation of the second power amplifier is stopped.

[0370] <10> according to <9> The high frequency circuit, wherein:

[0371] The high frequency circuit further comprises:

[0372] a third capacitor and a third switch, wherein the third capacitor and the third switch are connected in series between a path between the second power amplifier and the second transmission line and ground; and

[0373] a fourth switch connected in series with the resistor between an output terminal of the first power amplifier and an output terminal of the second power amplifier,

[0374] When the first power level is applied, the third switch is opened and the fourth switch is closed.

[0375] When the second power level is applied, the third switch is closed and the fourth switch is open.

[0376] <11> A high frequency circuit is configured to support a first power level and a second power level, wherein a maximum output power of the second power level is lower than a maximum output power of the first power level, the high frequency circuit comprising:

[0377] a first power amplifier;

[0378] A first filter;

[0379] a second filter; and

[0380] a switch circuit comprising a first terminal connected to an output end of the first power amplifier, a second terminal connected to the first filter, and a third terminal connected to the second filter,

[0381] When the first power level is applied, the first power amplifier is provided with a first power supply voltage, and the first filter is connected to the first power amplifier through the switch circuit.

[0382] When the second power level is applied, the first power amplifier is provided with a second power supply voltage, and the second filter is connected to the first power amplifier through the switch circuit.

[0383] The first power supply voltage is higher than the second power supply voltage,

[0384] An input impedance of the first filter is lower than an input impedance of the second filter.

[0385] <12> according to <11> The high frequency circuit, wherein:

[0386] The first power amplifier is configured to further support a third power level, wherein a maximum output power of the third power level is lower than a maximum output power of the first power level and higher than a maximum output power of the second power level,

[0387] When the third power level is applied, the first power amplifier is provided with the second power voltage, and the first filter is connected to the first power amplifier through the switch circuit.

[0388] <13> according to <11> or <12> The high frequency circuit, wherein:

[0389] The high frequency circuit further comprises:

[0390] a second power amplifier; and

[0391] A transformer, comprising a primary coil and a secondary coil, wherein two ends of the primary coil are respectively connected to an output end of the first power amplifier and an output end of the second power amplifier, and one end of the secondary coil is connected to the first terminal of the switch circuit.

[0392] When the first power level is applied, the first power amplifier and the second power amplifier are provided with the first power supply voltage, and the first filter is connected to the transformer through the switch circuit.

[0393] When the second power level is applied, the first power amplifier and the second power amplifier are provided with the second power supply voltage, and the second filter is connected to the transformer through the switch circuit.

[0394] <14> according to <11> or <12> The high frequency circuit, wherein:

[0395] The high frequency circuit further comprises:

[0396] a second power amplifier; and

[0397] A transformer, comprising a primary coil and a secondary coil, wherein two ends of the primary coil are respectively connected to an output end of the first power amplifier and an output end of the second power amplifier, and one end of the secondary coil is connected to the first terminal of the switch circuit.

[0398] When the first power level is applied, the first power amplifier and the second power amplifier are provided with the first power supply voltage, and the first filter is connected to the transformer through the switch circuit.

[0399] When the second power level is applied, the second power voltage is provided to the first power amplifier, the second filter is connected to the transformer through the switch circuit, and the operation of the second power amplifier is stopped.

[0400] <15> according to <11> or <12> The high frequency circuit, wherein:

[0401] The high frequency circuit further comprises:

[0402] a second power amplifier;

[0403] a first transmission line connected between an output end of the first power amplifier and the first terminal of the switch circuit;

[0404] a second transmission line connected between an output end of the second power amplifier and the first terminal of the switch circuit; and

[0405] a resistor connected in parallel with the first transmission line and the second transmission line between an output end of the first power amplifier and an output end of the second power amplifier,

[0406] When the first power level is applied, the first power amplifier and the second power amplifier are provided with the first power voltage, and the first filter is connected to the first power amplifier and the second power amplifier through the switch circuit.

[0407] When the second power level is applied, the first power amplifier and the second power amplifier are provided with the second power voltage, and the second filter is connected to the first power amplifier and the second power amplifier through the switch circuit.

[0408] <16> according to <11> or <12> The high frequency circuit, wherein:

[0409] The high frequency circuit further comprises:

[0410] a second power amplifier;

[0411] a first transmission line connected between an output end of the first power amplifier and the first terminal of the switch circuit;

[0412] a second transmission line connected between an output end of the second power amplifier and the first terminal of the switch circuit; and

[0413] a resistor connected in parallel with the first transmission line and the second transmission line between an output end of the first power amplifier and an output end of the second power amplifier,

[0414] When the first power level is applied, the first power amplifier and the second power amplifier are provided with the first power voltage, and the first filter is connected to the first power amplifier and the second power amplifier through the switch circuit.

[0415] When the second power level is applied, the second power supply voltage is provided to the first power amplifier, the second filter is connected to the first power amplifier through the switch circuit, and the operation of the second power amplifier is stopped.

[0416] Industrial Applicability

[0417] The present invention can be widely used in communication devices such as mobile phones as a high-frequency circuit disposed in the front end portion.

[0418] Description of Reference Numerals

[0419] 1, 1A, 1B, 1C, 1D, 1E, 1F, 1G, 1H, 1I, 1J: high frequency circuit; 2, 2a, 2b: antenna; 3: RFIC; 4: BBIC; 5: power supply circuit; 6, 6A, 6B, 6C, 6D, 6E, 6F, 6G, 6H, 6I, 6J: communication device; 11, 12: power amplifier; 21, 22, 23, 24, 25: variable load matching circuit 31, 32, 33: filter; 41, 42: transformer; 43: Wilkinson divider; 44, 44D: Wilkinson coupler; 51, 52: switch circuit; 100, 100a, 100b: antenna connection terminal; 111, T211, T221, T231, T241, T251: input terminal; 121: power supply voltage terminal; 511, 512, 513, 5 21, 522, 523, 524: terminals; C11, C12, C211, C212, C213, C214, C220, C221, C222, C223, C251, C252: capacitors; L211, L212, L221, L222, L223: inductors; L411, L421: primary coils; L412, L422: secondary coils; R4 31. R441: resistor; SW11, SW211, SW212, SW213, SW214, SW221, SW222, SW251, SW441: switch; T212, T222, T232, T242, T252: output terminal; TL431, TL432, TL441, TL442: transmission line; Vcc1, Vcc2: power supply voltage.

Claims

1. A high-frequency circuit, configured to support a first power level and a second power level, wherein a maximum output power of the second power level is lower than a maximum output power of the first power level, the high-frequency circuit comprising: a first power amplifier; and a variable load matching circuit connected to the output terminal of the first power amplifier, When the first power level is applied, the first power amplifier is provided with a first power supply voltage, and the load impedance viewed from the first power amplifier is adjusted to a first impedance by the variable load matching circuit. When the second power level is applied, the first power amplifier is provided with a second power supply voltage, and the load impedance viewed from the first power amplifier is adjusted to a second impedance by the variable load matching circuit. The first power supply voltage is higher than the second power supply voltage, The first impedance is lower than the second impedance.

2. The high frequency circuit according to claim 1, wherein: The first power amplifier is configured to further support a third power level, wherein a maximum output power of the third power level is lower than a maximum output power of the first power level and higher than a maximum output power of the second power level, In a condition where the third power level is applied, the second power supply voltage is provided to the first power amplifier, and the load impedance viewed from the first power amplifier is adjusted to the first impedance through the variable load matching circuit.

3. The high frequency circuit according to claim 1 or 2, wherein: The variable load matching circuit comprises: A first capacitor and a first switch, wherein the first capacitor and the first switch are connected in series between the first power amplifier and an antenna connection terminal; and a second capacitor and a second switch, wherein the second capacitor and the second switch are connected in series with each other and connected in parallel with the first capacitor and the first switch between the first power amplifier and the antenna connection terminal; The electrostatic capacitance of the first capacitor is larger than the electrostatic capacitance of the second capacitor, When the first power level is applied, the first switch is closed and the second switch is open. When the second power level is applied, the first switch is opened and the second switch is closed.

4. The high frequency circuit according to claim 1 or 2, wherein: The variable load matching circuit comprises: a first inductor connected between the first power amplifier and an antenna connection terminal; a second inductor and a first switch, wherein the second inductor and the first switch are connected in series with each other and connected in parallel with the first inductor between the first power amplifier and the antenna connection terminal; a first capacitor connected between a path between the first power amplifier and the antenna connection terminal and ground; and a second capacitor and a second switch, wherein the second capacitor and the second switch are connected in series with each other and connected in parallel with the first capacitor between the path between the first power amplifier and the antenna connection terminal and ground, When the first power level is applied, the first switch is opened and the second switch is closed. When the second power level is applied, the first switch is closed and the second switch is open.

5. The high frequency circuit according to any one of claims 1 to 4, wherein: The high frequency circuit further comprises: a second power amplifier; and A transformer, comprising a primary coil and a secondary coil, wherein two ends of the primary coil are respectively connected to an output end of the first power amplifier and an output end of the second power amplifier, and one end of the secondary coil is connected to the variable load matching circuit. Under the condition of applying the first power level, the first power amplifier and the second power amplifier are provided with the first power voltage, and the load impedance viewed from the first power amplifier and the second power amplifier is adjusted to the first impedance through the variable load matching circuit, When the second power level is applied, the first power amplifier and the second power amplifier are provided with the second power supply voltage, and the load impedance viewed from the first power amplifier and the second power amplifier is adjusted to the second impedance by the variable load matching circuit.

6. The high frequency circuit according to claim 1 or 2, wherein: The high frequency circuit further comprises: a second power amplifier; and A transformer, comprising a primary coil and a secondary coil, wherein two ends of the primary coil are respectively connected to an output end of the first power amplifier and an output end of the second power amplifier, and one end of the secondary coil is connected to the variable load matching circuit. Under the condition of applying the first power level, the first power amplifier and the second power amplifier are provided with the first power voltage, and the load impedance viewed from the first power amplifier and the second power amplifier is adjusted to the first impedance through the variable load matching circuit, When the second power level is applied, the second power supply voltage is provided to the first power amplifier, the load impedance viewed from the first power amplifier is adjusted to the second impedance by the variable load matching circuit, and the operation of the second power amplifier is stopped.

7. The high frequency circuit according to claim 6, wherein: The variable load matching circuit comprises: a first inductor connected between the secondary coil and the antenna connection terminal; a second inductor and a first switch, wherein the second inductor and the first switch are connected in series with each other and connected in parallel with the first inductor between the secondary coil and the antenna connection terminal; A first capacitor and a second capacitor, the first capacitor and the second capacitor being connected in series between a path between the first power amplifier and the antenna connection terminal and ground; and a second switch connected between a path between the first capacitor and the second capacitor and ground, The high frequency circuit further includes a third capacitor and a third switch, wherein the third capacitor and the third switch are connected in series between a path between the second power amplifier and the primary coil and ground. When the first power level is applied, the first switch and the third switch are opened respectively, and the second switch is closed. When the second power level is applied, the first switch and the third switch are respectively closed, and the second switch is open.

8. The high frequency circuit according to any one of claims 1 to 4, wherein: The high frequency circuit further comprises: a second power amplifier; A first transmission line connected between an output terminal of the first power amplifier and the variable load matching circuit; A second transmission line connected between an output terminal of the second power amplifier and the variable load matching circuit; and a resistor connected in parallel with the first transmission line and the second transmission line between an output end of the first power amplifier and an output end of the second power amplifier, Under the condition of applying the first power level, the first power amplifier and the second power amplifier are provided with the first power voltage, and the load impedance viewed from the first power amplifier and the second power amplifier is adjusted to the first impedance through the variable load matching circuit, When the second power level is applied, the first power amplifier and the second power amplifier are provided with the second power supply voltage, and the load impedance viewed from the first power amplifier and the second power amplifier is adjusted to the second impedance by the variable load matching circuit.

9. The high frequency circuit according to any one of claims 1 to 4, wherein: The high frequency circuit further comprises: a second power amplifier; A first transmission line connected between an output terminal of the first power amplifier and the variable load matching circuit; A second transmission line connected between an output terminal of the second power amplifier and the variable load matching circuit; and a resistor connected in parallel with the first transmission line and the second transmission line between an output end of the first power amplifier and an output end of the second power amplifier, Under the condition of applying the first power level, the first power amplifier and the second power amplifier are provided with the first power voltage, and the load impedance viewed from the first power amplifier and the second power amplifier is adjusted to the first impedance through the variable load matching circuit, When the second power level is applied, the second power supply voltage is provided to the first power amplifier, the load impedance viewed from the first power amplifier is adjusted to the second impedance by the variable load matching circuit, and the operation of the second power amplifier is stopped.

10. The high frequency circuit according to claim 9, wherein: The high frequency circuit further comprises: a third capacitor and a third switch, wherein the third capacitor and the third switch are connected in series between a path between the second power amplifier and the second transmission line and ground; as well as a fourth switch connected in series with the resistor between an output terminal of the first power amplifier and an output terminal of the second power amplifier, When the first power level is applied, the third switch is opened and the fourth switch is closed. When the second power level is applied, the third switch is closed and the fourth switch is open.

11. A high frequency circuit, configured to support a first power level and a second power level, wherein a maximum output power of the second power level is lower than a maximum output power of the first power level, the high frequency circuit comprising: a first power amplifier; A first filter; a second filter; and a switch circuit comprising a first terminal connected to an output end of the first power amplifier, a second terminal connected to the first filter, and a third terminal connected to the second filter, When the first power level is applied, the first power amplifier is provided with a first power supply voltage, and the first filter is connected to the first power amplifier through the switch circuit. When the second power level is applied, the first power amplifier is provided with a second power supply voltage, and the second filter is connected to the first power amplifier through the switch circuit. The first power supply voltage is higher than the second power supply voltage, An input impedance of the first filter is lower than an input impedance of the second filter.

12. The high frequency circuit according to claim 11, wherein: The first power amplifier is configured to further support a third power level, wherein a maximum output power of the third power level is lower than a maximum output power of the first power level and higher than a maximum output power of the second power level, When the third power level is applied, the first power amplifier is provided with the second power voltage, and the first filter is connected to the first power amplifier through the switch circuit.

13. The high frequency circuit according to claim 11 or 12, wherein: The high frequency circuit further comprises: a second power amplifier; and A transformer, comprising a primary coil and a secondary coil, wherein two ends of the primary coil are respectively connected to an output end of the first power amplifier and an output end of the second power amplifier, and one end of the secondary coil is connected to the first terminal of the switch circuit. When the first power level is applied, the first power amplifier and the second power amplifier are provided with the first power supply voltage, and the first filter is connected to the transformer through the switch circuit. When the second power level is applied, the first power amplifier and the second power amplifier are provided with the second power supply voltage, and the second filter is connected to the transformer through the switch circuit.

14. The high frequency circuit according to claim 11 or 12, wherein: The high frequency circuit further comprises: a second power amplifier; and A transformer, comprising a primary coil and a secondary coil, wherein two ends of the primary coil are respectively connected to an output end of the first power amplifier and an output end of the second power amplifier, and one end of the secondary coil is connected to the first terminal of the switch circuit. When the first power level is applied, the first power amplifier and the second power amplifier are provided with the first power supply voltage, and the first filter is connected to the transformer through the switch circuit. When the second power level is applied, the second power voltage is provided to the first power amplifier, the second filter is connected to the transformer through the switch circuit, and the operation of the second power amplifier is stopped.

15. The high frequency circuit according to claim 11 or 12, wherein: The high frequency circuit further comprises: a second power amplifier; a first transmission line connected between an output end of the first power amplifier and the first terminal of the switch circuit; a second transmission line connected between an output end of the second power amplifier and the first terminal of the switch circuit; as well as a resistor connected in parallel with the first transmission line and the second transmission line between an output end of the first power amplifier and an output end of the second power amplifier, When the first power level is applied, the first power amplifier and the second power amplifier are provided with the first power voltage, and the first filter is connected to the first power amplifier and the second power amplifier through the switch circuit. When the second power level is applied, the first power amplifier and the second power amplifier are provided with the second power voltage, and the second filter is connected to the first power amplifier and the second power amplifier through the switch circuit.

16. The high frequency circuit according to claim 11 or 12, wherein: The high frequency circuit further comprises: a second power amplifier; a first transmission line connected between an output end of the first power amplifier and the first terminal of the switch circuit; a second transmission line connected between an output end of the second power amplifier and the first terminal of the switch circuit; as well as a resistor connected in parallel with the first transmission line and the second transmission line between an output end of the first power amplifier and an output end of the second power amplifier, When the first power level is applied, the first power amplifier and the second power amplifier are provided with the first power voltage, and the first filter is connected to the first power amplifier and the second power amplifier through the switch circuit. When the second power level is applied, the second power supply voltage is provided to the first power amplifier, the second filter is connected to the first power amplifier through the switch circuit, and the operation of the second power amplifier is stopped.

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