Chip testing method and testing system based on temperature response

Abstract

The present application discloses a chip testing method and testing system based on temperature response, which belongs to the field of chip testing technology, including: establishing a controllable temperature zone environment, generating a first temperature interval, and setting at least two temperature change rates; receiving the first collected data collected during the chip testing process, and analyzing the first collected data; in the chip testing process, performing local temperature difference control, and recording the gradient temperature distribution; combining the analysis results of the first collected data, and coupling with the gradient temperature difference distribution recorded during the local temperature difference control process, to perform dynamic temperature response analysis on the chip. In the implementation of the technical solution of the present application, by establishing a controllable temperature zone environment and local temperature difference control, simulating the use scenario of the chip, and considering the layout of the chip in the integrated circuit for temperature response testing, the design and layout of the chip are optimized, and the operational stability of the chip is improved.

Description

Technical Field

[0001] The present application relates to the field of chip testing technology, and specifically to a chip testing method and testing system based on temperature response. Background Art

[0002] With the development of intelligence in various devices, the demand for chips is becoming more and more urgent. Chips can be used to empower devices with intelligence, thereby improving the intelligence level of devices.

[0003] In order to ensure the smooth operation and functional stability of the equipment, the requirements for chip stability are becoming higher and higher, because the stability of the chip determines whether the various functions of the equipment can be stably and smoothly implemented. Therefore, the chip needs to be tested before leaving the factory to ensure that it can operate stably in various usage environments. Among them, temperature testing based on temperature response is particularly important. The existing chip temperature testing method usually uses static high temperature or low temperature for testing, so as to test the performance of the chip at high and low temperatures and judge its performance and operation stability.

[0004] However, when performing temperature tests on chips, the above methods are often unable to simulate the temperature change environment in actual use. As the application environment of chips becomes increasingly complex, this limitation makes it difficult for the test results to truly reflect the performance of the chips in actual applications. The impact of dynamic temperature changes on chips is more significant. In addition, for integrated circuits, the different locations of the chips will produce different temperature gradients due to factors such as layout and power consumption density. This temperature gradient is difficult to simulate and test the chip through static high and low temperatures.

[0005] Therefore, it is necessary to provide a chip testing method and testing system based on temperature response to solve the above problems.

[0006] It should be noted that the above information disclosed in this background technology section is only for understanding the background technology of the present application concept, and therefore, it may contain information that does not constitute the prior art. Summary of the invention

[0007] Based on the above-mentioned problems existing in the prior art, the problem to be solved by the present application is: to provide a chip testing method and testing system based on temperature response, by performing dynamic temperature response testing on the chip and local temperature difference control, simulating the chip's use environment, and guiding the chip's design, layout, and thermal management.

[0008] The technical solution adopted by the present application to solve the technical problem is: a chip testing method and testing system based on temperature response, characterized in that: it includes:

[0009] Establishing a controllable temperature zone environment, generating a first temperature interval, and setting at least two temperature change rates, and collecting test data on the chip according to the set temperature change rates within the first temperature interval;

[0010] Receiving first collected data collected during the chip testing process, analyzing the first collected data, and performing temperature response analysis on the chip according to different temperature change rates;

[0011] During chip testing, local temperature difference control is performed and gradient temperature distribution is recorded;

[0012] Combine the analysis result of the first collected data with the gradient temperature difference distribution recorded in the local temperature difference control process to perform dynamic temperature response analysis on the chip;

[0013] Perform time series analysis and data mining on the dynamic temperature response analysis results of the chip to obtain the changing trend of the chip under different environments.

[0014] During the implementation of the technical solution of the present application, a controllable temperature zone environment and local temperature difference control are established to simulate the usage scenario of the chip, and a temperature response test is performed considering the layout of the chip in the integrated circuit to optimize the design and layout of the chip and improve the operating stability of the chip.

[0015] Furthermore, the first collected data includes the load state and power consumption of the chip at various temperature change rates, wherein the load state is the clock frequency of the chip, and the power consumption data reflects the energy consumption of the chip at different temperatures.

[0016] Furthermore, performing temperature response analysis on the chip according to different temperature change rates further includes the following steps:

[0017] Determine the performance inflection point of the chip at different temperature change rates. The performance inflection point indicates that the clock frequency change rate of the chip is the largest under unit power consumption. Based on the performance inflection point, evaluate the performance stability of the chip at different temperature change rates to determine whether the chip can maintain stable operation in actual applications. Repeat the above steps, perform cyclic testing on the chip, and collect and analyze multiple test data to obtain more accurate performance inflection point data.

[0018] Furthermore, the method for obtaining the performance inflection point is: obtain the clock frequency and power consumption data of the chip at various temperature change rates, and calculate the clock frequency change rate per unit power consumption according to the power consumption change, and then calculate the chip clock frequency change during different power consumption changes using the same method. Among the results obtained, the clock frequency at the maximum value is the performance inflection point of the chip.

[0019] Furthermore, a method for performing local temperature difference control is to use a thermoelectric cooler or a micro heater to adjust the temperature of a specific area of ​​the chip during each test phase to achieve temperature gradient control of different areas.

[0020] Furthermore, the analysis results of the first collected data are coupled with the gradient temperature difference distribution recorded during the local temperature difference control process, including: establishing multiple local temperature difference control strategies through fuzzy control, and recording the performance data under different local temperature difference control strategies respectively; establishing a relationship model between gradient temperature difference and performance change, and inputting the gradient temperature difference and performance data into the model; fine-tuning the local temperature difference according to the model analysis results; generating a chip local temperature difference tolerance plan as a reference for the layout of the chip in the integrated circuit.

[0021] Furthermore, when simulating the performance in a real working environment, if some areas are found to be particularly sensitive to temperature differences, specific thermal management measures can be taken for these sensitive areas when designing the chip.

[0022] Furthermore, if nonlinear behavior or multivariate influence is involved in the entire temperature difference control process, the control strategy is further optimized through data mining technology to improve the accuracy of the analysis results. The data mining technology includes machine learning and regression analysis.

[0023] A chip testing system based on temperature response, comprising:

[0024] A controllable temperature zone environment building module is used to establish a controllable temperature zone environment, generate a first temperature interval, and set at least two temperature change rates. Within the first temperature interval, test data collection is performed on the chip according to the set temperature change rates;

[0025] A temperature response analysis module, used for receiving first collected data collected during the chip testing process, analyzing the first collected data, and performing temperature response analysis on the chip according to different temperature change rates;

[0026] The local temperature difference control module is used to perform local temperature difference control and record the gradient temperature distribution during the chip testing process;

[0027] A data coupling module, used to combine the analysis result of the first collected data with the gradient temperature difference distribution recorded in the local temperature difference control process to perform dynamic temperature response analysis on the chip;

[0028] The change trend prediction module is used to perform time series analysis and data mining on the dynamic temperature response analysis results of the chip to obtain the change trend of the chip under different environments.

[0029] The beneficial effects of the present application are as follows: the present application provides a temperature response-based chip testing method and testing system, which simulates the chip usage scenario by establishing a controllable temperature zone environment and local temperature difference control, and performs temperature response testing considering the chip layout in the integrated circuit, thereby optimizing the chip design and layout and improving the chip operation stability.

[0030] In addition to the above-described purposes, features and advantages, the present application also has other purposes, features and advantages. The present application will be further described in detail with reference to the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The drawings constituting part of the present application are used to provide a further understanding of the present application. The exemplary embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0032] Figure 1 This is a schematic diagram of the overall process of a chip testing method based on temperature response in this application;

[0033] Figure 2 This is a schematic diagram of the module structure of a temperature response-based chip testing system in this application. DETAILED DESCRIPTION

[0034] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0035] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0036] Embodiment 1: Figure 1 As shown, the present application provides a chip testing method based on temperature response, which is used to perform simulation testing on a manufactured chip, and can provide a controllable temperature zone environment to quickly heat up and cool down the chip, and simulate the temperature difference changes that the chip may be subjected to during operation at a high-sensitivity temperature change rate, thereby realizing chip testing based on temperature response, and the method includes the following steps:

[0037] Step 10: Establish a controllable temperature zone environment, generate a first temperature interval, and set at least two temperature change rates. Within the first temperature interval, collect test data for the chip according to the set temperature change rates;

[0038] In order to simulate the temperature change environment of the chip during use, it is first necessary to establish a controllable temperature zone environment, which has a first temperature range. The first temperature range is the upper and lower limits of the temperature that the chip can withstand, so that the entire test process is carried out within the tolerable range of the chip, and prevents the chip from not operating normally due to factors such as triggering its own temperature wall during the test. The setting of the first temperature range specifically refers to the operating temperature range of the chip. Since different chips have different operating temperature ranges, it is not described in detail in this embodiment;

[0039] Among them, the controllable temperature zone environment is realized by a programmable temperature control test box. The programmable temperature control test box is a device that can accurately control the temperature within the set range and realize automated testing. Its basic working principle is to control the temperature inside the box through a refrigeration system (such as compressor refrigeration) and a heating system (such as an electric heater). When the temperature setting value changes, the control system adjusts the working state of the heating or refrigeration system to stabilize the temperature inside the box at the required value;

[0040] In order to simulate the dynamic temperature changes of the environment during the operation of the chip, after establishing the controllable temperature zone environment, it is necessary to set multiple temperature change rates so that the controllable temperature zone environment can realize dynamic temperature change process according to the temperature change rate, and in the temperature change process, it is necessary to always ensure that the changed temperature is within the first temperature range, so as to realize the dynamic temperature response test of the chip within the tolerable range of the chip and collect data during the test.

[0041] Step 20: receiving first collected data collected during the chip testing process, analyzing the first collected data, and performing temperature response analysis on the chip according to different temperature change rates;

[0042] After the test environment is established, the chip is placed in the test environment, the temperature change of the controllable temperature zone environment is controlled according to different temperature change rates, and the test data of the chip is synchronously collected as the first collected data, the first collected data includes the load state and power consumption of the chip at each temperature change rate, wherein the load state is the clock frequency (Clock Frequency) of the chip, which indicates the number of clock cycles that the chip can complete per second, in Hertz (Hz), and the power consumption data reflects the energy consumption of the chip at different temperatures, in Watts (W). The collection of the clock frequency and power consumption of the chip can refer to the existing technology, such as through the hardware monitoring interface, through the system command, etc., which will not be described in detail in this embodiment;

[0043] Specifically, performing temperature response analysis on the chip according to different temperature change rates further includes the following steps:

[0044] Step 201: determining a performance inflection point of a chip at different temperature change rates, where the performance inflection point indicates that the chip has a maximum clock frequency change rate at unit power consumption;

[0045] At different temperature change rates, the chip will produce different clock frequency changes during continuous operation, and the corresponding power consumption changes. Under normal circumstances, the chip's clock frequency will maintain normal fluctuations and produce normal power consumption changes. When the clock frequency change rate per unit power consumption is the largest, it means that the performance inflection point has been reached. At this time, the chip's performance has reached a critical state. If the temperature change rate continues to increase, the chip's performance may decline. Therefore, determining the performance inflection point is crucial for evaluating the chip's performance at different temperature change rates.

[0046] Specifically, the method for obtaining the performance inflection point is as follows: obtain the clock frequency and power consumption data of the chip at various temperature change rates, and calculate the clock frequency change rate under unit power consumption according to the power consumption change. For example, under a certain temperature change rate, the clock frequency of the chip increases from 10Hz to 50Hz, and the power consumption increases from 1.2W to 2.5W. The calculated clock frequency change rate under unit power consumption is (50Hz-10Hz) / 1.3W=30.760Hz / W. Then, the chip clock frequency change during different power consumption changes is calculated in the same way. Among the results obtained, the clock frequency corresponding to the maximum value of the clock frequency change rate is the performance inflection point of the chip at the temperature change rate.

[0047] Step 202: Based on the performance inflection point, evaluate the performance stability of the chip at different temperature change rates, so as to determine whether the chip can maintain stable operation in actual applications; through the evaluation of the performance inflection point, it can be known which frequency ranges the chip is most sensitive to at different temperature change rates, and then formulate corresponding heat dissipation strategies to ensure that the chip can still maintain efficient and stable operation in complex environments.

[0048] Step 203: Repeat the above steps to perform cyclic testing on the chip, and collect and analyze multiple test data to obtain more accurate performance inflection point data.

[0049] After repeating the above steps, a comprehensive data set covering the chip performance inflection points under different temperature change rates will be obtained. This comprehensive data set can not only reflect the performance stability of the chip under long-term temperature changes, but also provide a reference for chip design and optimization. Considering its temperature response during the chip design process helps to improve the durability and reliability of the chip and ensure its efficiency in a changing environment. In addition, by deeply analyzing these data, it is possible to predict the performance bottlenecks that the chip may encounter in the future, providing data support for subsequent product development and improvement.

[0050] Step 30: During the chip testing process, local temperature difference control is performed and the gradient temperature distribution is recorded;

[0051] Since chips are usually placed in integrated circuits, different areas inside the chip may have different temperature gradients due to factors such as layout and power density. These local temperature differences may have a significant impact on the electrical performance and reliability of the chip. Conventional tests usually assume that the temperature of the chip is evenly distributed, but in fact local temperature differences may cause some unexpected problems, such as uneven switching delays and changes in metal interconnect resistance. Therefore, through local temperature difference control, we can more accurately simulate the temperature distribution of the chip in the actual working environment, so as to more comprehensively evaluate its performance and reliability.

[0052] Specifically, the method of local temperature difference control is to use thermoelectric coolers or micro heaters to adjust the temperature of specific areas of the chip during each test phase to achieve temperature gradient control in different areas. In this way, the performance data of the chip under different temperature gradients in a simulated real working environment is collected to more accurately evaluate its working performance under different temperature conditions.

[0053] Step 40: Combine the analysis result of the first collected data with the gradient temperature difference distribution recorded during the local temperature difference control process to perform dynamic temperature response analysis on the chip;

[0054] In the above steps, the performance change data of the chip under different temperature differences are obtained by controlling the temperature change rate of the controllable temperature zone environment, and the performance inflection point of the chip is obtained. In the process of local temperature difference control, the performance inflection point is coupled with the gradient temperature difference distribution, which can realize the temperature characteristic analysis of the chip in a dynamic working environment. This analysis method can reveal the performance change law of the chip under complex temperature gradients, and provide an important basis for optimizing chip design and improving its reliability.

[0055] Specifically, coupling the analysis result of the first collected data with the gradient temperature difference distribution recorded in the local temperature difference control process includes: establishing multiple local temperature difference control strategies through fuzzy control, and recording the performance data under different local temperature difference control strategies respectively; establishing a relationship model between gradient temperature difference and performance change, and inputting the gradient temperature difference and performance data into the model; fine-tuning the local temperature difference according to the model analysis result; generating a chip local temperature difference tolerance scheme as a layout reference for the chip in the integrated circuit;

[0056] In order to simulate various temperature difference scenarios, in this embodiment, multiple local temperature difference control strategies are established through fuzzy control to cover various operation scenarios, and the performance data under different local temperature difference control strategies are recorded, wherein the fuzzy control can refer to the prior art and will not be described in detail in this embodiment;

[0057] After the establishment of the local temperature difference control strategy is completed, a relationship model between the gradient temperature difference and the performance change is established, and the gradient temperature difference and performance data in the above process are input into the model. The relationship model can obtain the temperature sensitive area of ​​the chip through the input data and predict its performance under different temperature differences. For example, when simulating the performance in the real working environment, it is found that some areas are particularly sensitive to temperature differences. When designing the chip, specific thermal management measures can be taken for these sensitive areas to optimize the overall performance and stability of the chip. Further, combined with the model analysis results, the local temperature difference is fine-tuned to generate a more detailed temperature difference control scheme to meet the precise temperature control requirements of the chip in different working stages; at the same time, the scheme also simulates the thermal fatigue effect under long-term operation, provides data support for the durability and stability of the chip, and generates a local temperature difference tolerance scheme for the chip. The local temperature difference tolerance scheme includes chip design suggestions, layout suggestions in the integrated circuit, thermal management suggestions at different positions, etc., providing a basis for the temperature management of the chip in different working stages.

[0058] Step 50: Perform time series analysis and data mining on the dynamic temperature response analysis results of the chip to obtain the change trend of the chip under different environments.

[0059] After completing the dynamic temperature response analysis of the chip, time series analysis and data mining technology can be combined to predict the changing trend of the chip temperature and identify abnormal situations that may be encountered during the temperature difference control process. If nonlinear behavior or multivariate influences are involved in the entire temperature difference control process, data mining technology (such as machine learning, regression analysis, etc.) can be used to further optimize the control strategy and improve the accuracy of the analysis results. Specifically, the application of time series analysis and data mining can refer to the existing technology and will not be described in detail in this embodiment.

[0060] Embodiment 2: Figure 2 As shown, the present application proposes a chip testing system based on temperature response. The testing system applies the chip testing method in the first embodiment to implement simulation testing of the manufactured chip, and can provide a controllable temperature zone environment to quickly heat up and cool down the chip, and simulate the temperature difference changes that the chip may be subjected to during operation at a high-sensitivity temperature change rate, thereby implementing chip testing based on temperature response. Specifically, the testing system includes:

[0061] A controllable temperature zone environment building module is used to establish a controllable temperature zone environment, generate a first temperature interval, and set at least two temperature change rates. Within the first temperature interval, test data collection is performed on the chip according to the set temperature change rates;

[0062] A temperature response analysis module, used for receiving first collected data collected during the chip testing process, analyzing the first collected data, and performing temperature response analysis on the chip according to different temperature change rates;

[0063] The local temperature difference control module is used to perform local temperature difference control and record the gradient temperature distribution during the chip testing process;

[0064] A data coupling module, used to combine the analysis result of the first collected data with the gradient temperature difference distribution recorded in the local temperature difference control process to perform dynamic temperature response analysis on the chip;

[0065] The change trend prediction module is used to perform time series analysis and data mining on the dynamic temperature response analysis results of the chip to obtain the change trend of the chip under different environments.

[0066] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A chip testing method based on temperature response, characterized in that: include: Establish a controllable temperature zone environment, generate a first temperature interval, and set at least two temperature change rates. In the first temperature interval, collect test data for the chip according to the set temperature change rate; receive the first collected data collected during the chip test process, analyze the first collected data, and perform temperature response analysis on the chip according to different temperature change rates; during the chip test process, perform local temperature difference control and record the gradient temperature distribution; combine the analysis results of the first collected data with the gradient temperature difference distribution recorded during the local temperature difference control process, and perform dynamic temperature response analysis on the chip; perform time series analysis and data mining on the dynamic temperature response analysis results of the chip to obtain the change trend of the chip under different environments; the first collected data includes the load state and power consumption of the chip at each temperature change rate, wherein the load state is the clock frequency of the chip, and the power consumption data reflects the chip under different Energy consumption under temperature; performing temperature response analysis on the chip according to different temperature change rates further includes the following steps: determining the performance inflection point of the chip at different temperature change rates, the performance inflection point indicating that the chip has the maximum clock frequency change rate per unit power consumption; evaluating the performance stability of the chip at different temperature change rates according to the performance inflection point, so as to determine whether the chip can maintain stable operation in actual applications; repeating the test steps for chip performance stability, performing cycle testing on the chip, and collecting and analyzing multiple test data to obtain more accurate performance inflection point data; the method for obtaining the performance inflection point is: obtaining the clock frequency and power consumption data of the chip at each temperature change rate, and calculating the clock frequency change rate per unit power consumption according to the power consumption change, and then calculating the chip clock frequency change during different power consumption changes according to the same method, and in the obtained results, the clock frequency at the maximum value is the performance inflection point of the chip.

2. The chip testing method based on temperature response according to claim 1, characterized in that: The method of performing local temperature difference control is to use a thermoelectric cooler or a micro heater to adjust the temperature of a specific area of ​​the chip during each test phase to achieve temperature gradient control in different areas.

3. The chip testing method based on temperature response according to claim 1, characterized in that: The analysis results of the first collected data are coupled with the gradient temperature difference distribution recorded during the local temperature difference control process, including: establishing multiple local temperature difference control strategies through fuzzy control, and recording the performance data under different local temperature difference control strategies respectively; establishing a relationship model between gradient temperature difference and performance change, and inputting the gradient temperature difference and performance data into the model; fine-tuning the local temperature difference according to the model analysis results; generating a chip local temperature difference tolerance plan as a layout reference for the chip in the integrated circuit.

4. The chip testing method based on temperature response according to claim 3, characterized in that: When simulating performance in a real working environment, it was found that some areas were particularly sensitive to temperature differences, so specific thermal management measures were taken for these sensitive areas when designing the chip.

5. The chip testing method based on temperature response according to claim 1, characterized in that: If nonlinear behavior or multivariate influence is involved in the entire temperature difference control process, the control strategy is further optimized through data mining technology to improve the accuracy of the analysis results. The data mining technology includes machine learning and regression analysis.

6. A chip testing system based on temperature response, used to implement the chip testing method based on temperature response as claimed in any one of claims 1 to 5, characterized in that: include: A controllable temperature zone environment building module is used to establish a controllable temperature zone environment, generate a first temperature interval, and set at least two temperature change rates. Within the first temperature interval, test data collection is performed on the chip according to the set temperature change rates; The temperature response analysis module is used to receive the first collected data collected during the chip testing process, analyze the first collected data, and perform temperature response analysis on the chip according to different temperature change rates; the local temperature difference control module is used to perform local temperature difference control during the chip testing process and record the gradient temperature distribution; the data coupling module is used to combine the analysis results of the first collected data with the gradient temperature difference distribution recorded during the local temperature difference control process to perform dynamic temperature response analysis on the chip; the change trend prediction module is used to perform time series analysis and data mining on the dynamic temperature response analysis results of the chip to obtain the change trend of the chip under different environments.

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