A measurement and control system based on ZYNQ and its construction method

Abstract

The present invention discloses a measurement and control system based on ZYNQ and a construction method thereof. A main card FPGA unit of the measurement and control system is provided with a plurality of sub-card reconstruction modules and an algorithm reconstruction module. The sub-card reconstruction module can perform firmware reconstruction according to different sub-card types, and encapsulate the underlying communication protocols of different types of sub-cards into a unified upper interface, so as to facilitate the protocol conversion of different sub-cards. The algorithm reconstruction module can make the whole system adapt to more application scenarios, especially in application scenarios with high real-time requirements, large calculation amount, low response delay, etc. The algorithm reconstruction module can construct hardware-level communication paths between different sub-cards, quickly realize the protocol conversion of different sub-cards, enable multiple sub-cards to work together, and meet the application of various complex scenarios.

Description

Technical Field

[0001] The present invention relates to the field of measurement and control electronic technology, and in particular to a measurement and control system and a method for constructing the system. Background Art

[0002] The measurement and control system is a system that can accurately measure and control the object under test, which is composed of sensors, signal conditioning, data acquisition, signal processing, control execution and other parts. According to the different types of signals and communication buses of the measurement and control object, the measurement and control system is generally composed of several or dozens of test boards. Traditional measurement and control systems are generally developed for specific applications. The functions of the equipment developed by developers are often fixed. After the measurement and control system is delivered to the application, the equipment users cannot change the functions of the equipment, especially in the hardware part. Even if the measurement and control requirements change very slightly, the system developers are required to modify and upgrade them. This greatly increases the development cost and time cost of the system. In addition, the functions of the system are relatively single, which makes it difficult to meet the actual measurement and control needs. Therefore, it is necessary to make further improvements to the existing measurement and control system. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide a ZYNQ-based measurement and control system that can reduce repeated development, speed up the development process, and has low technical requirements for software developers in view of the shortcomings of the existing technology.

[0004] A measurement and control system based on ZYNQ, comprising a main card based on the ZYNQ platform and a plurality of sub-cards with different functions, wherein the main card is connected to the sub-cards via a hardware interface, the main card comprises a PS terminal and a PL terminal, the PL terminal is provided with an FPGA unit, the FPGA unit comprises a plurality of sub-card reconstruction modules, a plurality of middle-layer monitoring modules and an algorithm reconstruction module; the sub-card reconstruction module corresponds to the sub-card one-to-one, the firmware of the sub-card reconstruction module is used to adapt and convert the hardware interface of the corresponding sub-card into a first middle-layer interface according to a communication protocol, the first middle-layer interface comprises an axi-lite interface, an axis_m interface and an axis_s interface, wherein the axi-lite interface is used to access a configuration register, the axis_m interface and the axis_s interface are used to transmit data, and the sub-card reconstruction module can perform firmware reconstruction; the middle-layer monitoring module and the sub-card reconstruction module correspond to each other in a one-to-one manner, the firmware of the sub-card reconstruction module is used to adapt and convert the hardware interface of the corresponding sub-card into a first middle-layer interface according to a communication protocol, the first middle-layer interface comprises an axi-lite interface, an axis_m interface and an axis_s interface, wherein the axi-lite interface is used to access a configuration register, the axis_m interface and the axis_s interface are used to transmit data, and the sub-card reconstruction module can perform firmware reconstruction; The blocks correspond one to one, the middle layer monitoring module is used to monitor and control the status of the daughter card and the daughter card reconstruction module, and convert the first middle layer interface into a second middle layer interface, the second middle layer interface includes a RAM interface for register access and a FIFO write interface in two directions; the firmware of the algorithm reconstruction module is used to implement the user's algorithm and control logic, the algorithm reconstruction module is connected to the middle layer monitoring module and the PS end using the second middle layer interface, and the algorithm reconstruction module can perform firmware reconstruction; the PS end includes an application layer, a driver layer, a daughter card identification module, a dynamic reconstruction management module and a FLASH storage module; the daughter card identification module is used to identify the type of the daughter card connected to the main card; the FLASH storage module is used to store the firmware bitstream file for reconstructing the daughter card reconstruction module or the algorithm reconstruction module; the dynamic reconstruction management module is used to implement firmware reconstruction of the daughter card reconstruction module or the algorithm reconstruction module.

[0005] Preferably, the main card and the sub-card are connected using a hardware interface with the same interface resources.

[0006] Preferably, the interface resources of the hardware interface include 10 groups of LVDS interfaces, 10 single-ended IO interfaces, and 1 IIC interface.

[0007] Preferably, the middle layer monitoring module is arranged in a static area of ​​the FPGA unit.

[0008] Preferably, the main card is provided with a slot, and the sub-card is connected to the main card through the slot.

[0009] Preferably, the measurement and control system is also provided with a network interface, and the network interface is communicatively connected with the PS end.

[0010] Preferably, in an initial state, the firmware of the algorithm reconstruction module is a data path connecting the middle layer monitoring module and the PS end.

[0011] Preferably, the firmware in the algorithm reconstruction area can construct data paths between different daughter cards.

[0012] The present invention also discloses a method for constructing the above-mentioned ZYNQ-based measurement and control system, which includes the following steps: Step 1: connecting the main card and at least one sub-card through a hardware interface; Step 2: identifying the type of the sub-card connected to the main card through the sub-card identification module; Step 3: the dynamic reconstruction management module calls the firmware bitstream file corresponding to the sub-card from the FLASH storage module storage according to the sub-card type to reconstruct the corresponding sub-card reconstruction module, and at the same time calls the firmware bitstream file of the algorithm reconstruction module to reconstruct the algorithm reconstruction module.

[0013] Preferably, the algorithm reconstruction module can be redeveloped. When the algorithm reconstruction module is redeveloped, it is first designed through external software, and then the design file is converted into a firmware bitstream file, which is then downloaded to the FLASH storage module or the algorithm reconstruction module is directly reconstructed.

[0014] The above technical solution has the following beneficial effects: the measurement and control system is equipped with multiple sub-card reconstruction modules in the FPGA unit. The sub-card reconstruction modules can reconstruct the firmware according to different sub-card types, and encapsulate the underlying communication protocols of different types of sub-cards into a unified upper interface, which is convenient for realizing protocol conversion of different sub-cards. The algorithm reconstruction module is set up to enable the system to adapt to more application scenarios, especially in applications with high real-time requirements, large calculation amount, and low response delay. The algorithm reconstruction module can build hardware-level data paths between different sub-cards, quickly realize protocol conversion of different sub-cards, and enable multiple sub-cards to work together to meet the application of various complex scenarios.

[0015] To further understand the features and technical contents of the present invention, please refer to the following detailed description and drawings of the present invention. However, the drawings provided are only for reference and description and are not intended to limit the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 FIG. 4 is a system block diagram of the first embodiment of the present invention.

[0017] Figure 2 Schematic diagram of the interface between modules in an embodiment of the present invention.

[0018] Figure 3 FIG. 4 is a system block diagram of a second embodiment of the present invention. DETAILED DESCRIPTION

[0019] The following is an explanation of the disclosed embodiments of the present invention through specific embodiments. Those skilled in the art can understand the advantages and effects of the present invention from the contents disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and the details in this specification can also be modified and changed in various ways based on different viewpoints and applications without departing from the concept of the present invention. In addition, the drawings of the present invention are only simple schematic illustrations and are not depicted according to actual dimensions. It is stated in advance. The following embodiments will further explain the relevant technical contents of the present invention in detail, but the disclosed contents are not intended to limit the scope of protection of the present invention.

[0020] It should be understood that, although the terms "first", "second", etc. may be used herein to describe various components or signals, these components or signals should not be limited by these terms. These terms are mainly used to distinguish one component from another component, or one signal from another signal. In addition, the term "or" used herein may include any one or more combinations of the associated listed items depending on the actual situation.

[0021] Embodiment 1

[0022] like Figure 1 , 2 As shown, the present invention discloses a measurement and control system based on ZYNQ, which includes a main card and 8 sub-cards, and the main card and the sub-card are connected through a hardware interface. The sub-card is mainly used for the input and output of external signals of the measurement and control system, and the sub-card can be set with different functions according to the needs of the measurement and control system. As a specific implementation method, a slot can be set on the main card, and the sub-card can be connected to the main card by plugging. As a preferred implementation method of the present invention, the main card and the sub-card can be connected using a hardware interface with the same interface resources, that is, each hardware interface is a standard interface with the same interface resources, so that each hardware interface can be connected to replace different types of sub-cards, and the sub-card can be plugged in and out of any slot of the main card. As a specific implementation method, the interface resources of the standard hardware interface include 10 groups of LVDS interfaces, 10 single-ended IO interfaces, and 1 IIC interface. This hardware interface can meet the use requirements of most of the currently known measurement and control sub-cards.

[0023] The main card adopts a main card based on the ZYNQ platform, including a PS end and a PL end, and an FPGA unit is provided on the PL end. In this embodiment, the FPGA unit includes 8 sub-card reconstruction modules, 8 middle-layer monitoring modules and 1 algorithm reconstruction module. The sub-card reconstruction module corresponds to the sub-card one-to-one, and the middle-layer monitoring module corresponds to the sub-card reconstruction module one-to-one, that is, each sub-card corresponds to a sub-card reconstruction module and a middle-layer monitoring module. The firmware of the sub-card reconstruction module is used to complete the communication protocol adaptation of the underlying hardware interface, and the hardware interface of the corresponding sub-card is adapted and converted into the first middle-layer interface according to the communication protocol. The first middle-layer interface converted by each sub-card reconstruction module is the same, which is a unified standard interface. The first middle-layer interface includes an axi-lite, an axis_m interface, and an axis_s interface, wherein axi-lite is used to access the configuration register, and the axis_m interface and the axis_s interface are used for data transmission. Through the sub-card reconstruction module, different types of sub-cards and different underlying communication protocols can be encapsulated into a unified first middle-layer interface.

[0024] The middle-layer monitoring module corresponds to the sub-card reconstruction module one by one. The middle-layer monitoring module is used to monitor and control the status of the corresponding sub-card reconstruction area and sub-card, determine whether the sub-card reconstruction area or sub-card is in normal working state, and control the sub-card or sub-card reconstruction area to handle the exception when the sub-card reconstruction area or sub-card is abnormal, such as resetting the sub-card reconstruction area, communication alarm, displaying fault code, etc. By setting the middle-layer monitoring module, the system abnormality can be quickly located to prevent logical lock and other faults. The middle-layer monitoring module is set in the static area of ​​the FPGA unit. Through the middle-layer monitoring module, the status of the sub-card reconstruction area and sub-card can be monitored and exception handling can be performed. When the system needs to be redeveloped, the designer does not need to understand the communication protocol and exception handling method of the underlying sub-card, which can greatly reduce the workload of the designer.

[0025] The axi-lite interface, axis_m interface, and axis_s interface are internal communication interfaces of the FPGA. If secondary development is to be carried out, it is still necessary to understand the corresponding communication protocol, so the requirements for designers are relatively high. For this purpose, the first intermediate layer interface can be converted into the second intermediate layer interface through the intermediate layer monitoring module. The second intermediate layer interface includes a RAM interface for register access and a FIFO write interface in two directions. The timing of the second intermediate layer interface is simpler than that of the first intermediate layer interface. Designers do not need to learn the internal communication protocol of the FPGA to carry out corresponding program development, which can make the development of designers more convenient and quick.

[0026] The algorithm reconstruction module is connected to each middle-layer monitoring module through the second middle-layer interface, and the algorithm reconstruction module is also connected to the public resource area of ​​the PS end and the FPGA unit through the second middle-layer interface. The algorithm reconstruction module can be reconstructed by firmware. The firmware of the algorithm reconstruction module is used to implement the user's algorithm and control logic, which can be developed and designed by designers according to system needs. The uplink interface and downlink interface of the algorithm reconstruction module adopt the above-mentioned extremely simple second middle-layer interface design. Designers do not need to understand the complex communication protocol inside the FPGA, but only need to spend a small learning cost to master the communication methods of all types of sub-cards, so they can quickly complete the development and design of the algorithm reconstruction module. The algorithm reconstruction module can be developed for secondary development, and then the dedicated graphical design tools provided by the system can be used for development. The software provides a graphical interface, and developers can freely call the modules in the device library, interface library, and algorithm library, edit and link them, and complete the development of the application. The software can convert the new design file into hardware description language code in the background, and then update the new design file to the corresponding reconstruction partition design in the template vivado project, call vivado compilation, and generate the firmware bitstream file of the algorithm reconstruction module for system call.

[0027] The PS end of the main card mainly includes the application layer, the driver layer, the sub-card identification module, the dynamic reconstruction management module and the FLASH storage module. The application layer is mainly used for user interaction of each sub-card and the realization of specific functional requirements; the driver layer is mainly used for hardware interaction and control with each sub-card; the sub-card identification module is used to identify the type of sub-card connected to the main card; the FLASH storage module is used to store the firmware bitstream file of the reconstruction sub-card reconstruction module or the algorithm reconstruction module; the dynamic reconstruction management module is used to realize the firmware reconstruction of the sub-card reconstruction module or the algorithm reconstruction module. The measurement and control system is also provided with a network interface, which is connected to the PS end, and the communication connection between the system and the external module can be realized through the network interface.

[0028] When the measurement and control system is being constructed, the main card is first connected to at least one sub-card required for the test through a hardware interface, and the sub-card can be directly inserted into any card slot of the main card; then the system is powered on for initialization, and the PS end of the system identifies the type of sub-card connected to the main card through the sub-card identification module; then the dynamic reconstruction management module calls the firmware bitstream file corresponding to the sub-card from the FLASH storage module storage according to the sub-card type, and calls the ICAP interface inside the FPGA to reconstruct the sub-card reconstruction module corresponding to the sub-card. The dynamic reconstruction management module also calls the firmware bitstream file of the algorithm reconstruction module at the same time, and calls the ICAP interface inside the FPGA to reconstruct the algorithm reconstruction module. In this embodiment, the system is in the initial state, and the firmware of the algorithm reconstruction module defaults to the data path connecting the middle layer monitoring module and the PS end, and does not contain the algorithm and control logic. After the system is built, the user can control a single or multiple sub-cards through the application layer of the PS end of the main card to complete various scenario applications of the measurement and control system.

[0029] Embodiment 2:

[0030] See also Figure 3 , if the application requirements in Example 1 change and it is necessary to complete a task with high real-time requirements, large amount of calculations, and strict delay requirements, such as if the application layer on the PS side cannot meet the task requirements, then the system equipment user can use the graphical software tools or other external software that comes with the system to complete the secondary development and design of the logic algorithm of the algorithm reconstruction unit, generate a new firmware bitstream file of the algorithm reconstruction module, and reconstruct the firmware of the algorithm reconstruction module. During the reconstruction, the dynamic reconstruction management module can be controlled through the network interface to complete the online reconstruction of the algorithm reconstruction module, or it can be downloaded through the network to the FLASH storage module on the PS side to store the default firmware of the algorithm reconstruction module. After the system is powered on again, the firmware of the algorithm reconstruction module is updated to the new design. Figure 3 As shown, in this embodiment, the firmware for data conversion between subcard 6 and subcard 7, and the firmware for data collection and data transfer to the public resource interface of subcard 0 are added to the algorithm reconstruction module. Compared with realizing the same function at the PS end application layer, this method has higher real-time performance and shorter processing delay. In the system, both the algorithm reconstruction module and the PS end application layer can control the call of the same subcard function, and the algorithm reconstruction module can also cooperate with the PS end application layer, so that the entire system can adapt to more application scenarios.

[0031] In this system, by setting up a subcard reconstruction module and an intermediate layer monitoring module, different types of subcards and different underlying communication protocols are encapsulated into a unified second intermediate layer interface. The second intermediate layer interface is a FIFO write interface and a RAM interface with simple timing. System users do not need to master the complex and cumbersome FPGA development process, but only need to focus on the design of the algorithm reconstruction module. With the help of graphical software, they can quickly carry out secondary development and design of the system according to the needs, which reduces the ability requirements for users and speeds up the rapid redefinition of the system. Especially in applications with high real-time requirements, large computational load, and low response delay, the algorithm reconstruction module can build a hardware-level communication channel between different subcards in the system, quickly realize the protocol conversion of different subcard units, and enable multiple subcards to work together to complete the complex scene application of the measurement and control system.

[0032] The contents disclosed above are only preferred feasible embodiments of the present invention, and are not intended to limit the scope of the present invention. Therefore, all equivalent technical changes made using the contents of the present invention's specification and drawings are included in the scope of the present invention.

Claims

1. A measurement and control system based on ZYNQ, comprising a main card based on the ZYNQ platform and a plurality of sub-cards with different functions, wherein the main card and the sub-cards are connected via a hardware interface, the main card comprises a PS terminal and a PL terminal, the PL terminal is provided with an FPGA unit, and is characterized in that: The FPGA unit includes a plurality of daughter card reconstruction modules, a plurality of middle layer monitoring modules and an algorithm reconstruction module; the daughter card reconstruction module corresponds to the daughter card one by one, and the firmware of the daughter card reconstruction module is used to adapt and convert the hardware interface of the corresponding daughter card into a first middle layer interface according to the communication protocol, the first middle layer interface includes an axi-lite interface, an axis_m interface and an axis_s interface, wherein the axi-lite interface is used to access the configuration register, the axis_m interface and the axis_s interface are used for data transmission, and the daughter card reconstruction module can perform firmware reconstruction; the middle layer monitoring module corresponds to the daughter card reconstruction module one by one, the middle layer monitoring module is used to monitor and control the status of the daughter card and the daughter card reconstruction module, and convert the first middle layer interface into a second middle layer interface, the second middle layer interface includes a RAM interface for register access and a FIFO write interface in two directions; the firmware of the algorithm reconstruction module is used to implement the user's algorithm and control logic, the algorithm reconstruction module is connected to the middle layer monitoring module and the PS end using the second middle layer interface, and the algorithm reconstruction module can perform firmware reconstruction; The PS end includes an application layer, a driver layer, a sub-card identification module, a dynamic reconstruction management module and a FLASH storage module; the sub-card identification module is used to identify the type of the sub-card connected to the main card; the FLASH storage module is used to store the firmware bitstream file of the reconstructed sub-card reconstruction module or the algorithm reconstruction module; the dynamic reconstruction management module is used to realize the firmware reconstruction of the sub-card reconstruction module or the algorithm reconstruction module.

2. The ZYNQ-based measurement and control system according to claim 1, characterized in that: The main card and the sub-card are connected using a hardware interface with the same interface resources.

3. The ZYNQ-based measurement and control system according to claim 2, characterized in that: The interface resources of the hardware interface include 10 groups of LVDS interfaces, 10 single-ended IO interfaces, and 1 IIC interface.

4. The ZYNQ-based measurement and control system according to claim 1, characterized in that: The middle layer monitoring module is arranged in the static area of ​​the FPGA unit.

5. The ZYNQ-based measurement and control system according to claim 1, characterized in that: The main card is provided with a slot, and the sub-card is connected to the main card through the slot.

6. The ZYNQ-based measurement and control system according to claim 1, characterized in that: The measurement and control system is also provided with a network interface, and the network interface is communicatively connected with the PS end.

7. The ZYNQ-based measurement and control system according to claim 1, characterized in that: In an initial state, the firmware of the algorithm reconstruction module is a data path connecting the middle layer monitoring module and the PS end.

8. The ZYNQ-based measurement and control system according to claim 1, characterized in that: The firmware of the algorithm reconstruction module can construct data paths between different daughter cards.

9. A method for constructing a ZYNQ-based measurement and control system according to any one of claims 1 to 8, characterized in that: It includes the following steps: Step 1: Connect the main card and at least one sub-card through a hardware interface; Step 2: Identify the type of the sub-card connected to the main card through the sub-card identification module; Step 3: The dynamic reconstruction management module calls the firmware bitstream file corresponding to the daughter card from the FLASH storage module storage according to the daughter card type to reconstruct the corresponding daughter card reconstruction module, and at the same time calls the firmware bitstream file of the algorithm reconstruction module to reconstruct the algorithm reconstruction module.

10. The method for constructing a ZYNQ-based measurement and control system according to claim 9, characterized in that: The algorithm reconstruction module can be redeveloped. When the algorithm reconstruction module is redeveloped, it is first designed by external software, and then the design file is converted into a firmware bit stream file, which is then downloaded to the FLASH storage module or the algorithm reconstruction module is directly reconstructed.

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