Digital signal generation method
By determining multiple sets of pulse parameters in the digital signal generation method and storing them into the cache channel, the problem of high interrupt load rate in the traditional method is solved, and more efficient digital signal generation is achieved.
Patent Information
- Application Number
- CN202411421466.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-12
- Publication Date
- 2025-02-18
AI Technical Summary
In the traditional digital signal generation method, the interrupt load rate is high, resulting in low generation efficiency.
By determining multiple sets of pulse parameters and storing them into the cache channel, these parameters are read in turn through the signal generation channel to generate the target digital signal to avoid interruption.
The interrupt load rate is reduced and the efficiency of digital signal generation is improved.
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Figure CN119472924A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present invention relate to the field of signal processing technology, and in particular to a method for generating a digital signal. Background Art
[0002] With the vigorous development of the electronics industry, the functional requirements of related components or modules have also greatly increased, and the demand for the generation of digital signals has gradually diversified, such as the demand for control signals of some controlled components or circuits.
[0003] The traditional digital signal generation method generates an interrupt after the corresponding pulse is generated according to the pulse parameters. During the interrupt process, the CPU writes new pulse parameters. This method has a high interrupt load rate. Summary of the invention
[0004] The embodiment of the present invention provides a digital signal generation method, which reduces the interruption load rate and improves the generation efficiency of the digital signal.
[0005] In a first aspect, an embodiment of the present invention provides a method for generating a digital signal, comprising:
[0006] Determine multiple sets of pulse parameters; wherein the pulse parameters include period and duty cycle;
[0007] Storing the multiple sets of pulse parameters in a cache channel;
[0008] The plurality of groups of pulse parameters are sequentially read from the cache channel through a signal generation channel, and a target digital signal is generated based on the read plurality of groups of pulse parameters; wherein the target digital signal includes a plurality of pulse signals.
[0009] In a second aspect, an embodiment of the present invention further provides a digital signal generating device, the device comprising:
[0010] A pulse parameter determination module, used to determine multiple sets of pulse parameters; wherein the pulse parameters include a period and a duty cycle;
[0011] A pulse parameter storage module, used for storing the plurality of groups of pulse parameters into a cache channel;
[0012] A digital signal generating module is used to read the multiple sets of pulse parameters from the cache channel in sequence through a signal generating channel, and generate a target digital signal based on the read multiple sets of pulse parameters; wherein the target digital signal includes multiple pulse signals.
[0013] In a third aspect, an embodiment of the present invention further provides an electronic device, the electronic device comprising:
[0014] at least one processor; and
[0015] a memory communicatively connected to the at least one processor; wherein,
[0016] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the digital signal generating method described in the embodiment of the present invention.
[0017] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the digital signal generation method described in the embodiment of the present invention when executed.
[0018] In a fifth aspect, an embodiment of the present invention further provides a computer program product, including a computer program, which, when executed by a processor, implements the digital signal generating method described in the embodiment of the present invention.
[0019] The embodiment of the present invention discloses a method for generating a digital signal, including: determining multiple sets of pulse parameters; wherein the pulse parameters include a period and a duty cycle; storing the multiple sets of pulse parameters in a cache channel; sequentially reading the multiple sets of pulse parameters from the cache channel through a signal generation channel, and generating a target digital signal based on the multiple sets of pulse parameters read; wherein the target digital signal includes multiple pulse signals. The above technical scheme specifically considers storing multiple sets of pulse parameters in a cache channel, and realizes the one-time storage of multiple sets of pulse parameters; at the same time, it also considers reading multiple sets of pulse parameters from the cache channel in sequence through a signal generation channel, and generating a target digital signal based on the multiple sets of pulse parameters read, and in the process of reading pulse parameters from the cache channel and generating the target digital signal, no interruption will be generated, thereby reducing the interruption load rate. Compared with the prior art, the technical scheme provided by this embodiment realizes the one-time storage of multiple sets of pulse parameters, and in the process of reading pulse parameters from the cache channel and generating the target digital signal, no interruption will be generated, thereby reducing the interruption load rate, thereby improving the generation efficiency of digital signals. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 is a flow chart of a digital signal generating method in Embodiment 1 of the present invention;
[0021] Figure 2 is a flow chart of a digital signal generating method in Embodiment 2 of the present invention;
[0022] Figure 3 It is a structural schematic diagram of a digital signal generating device in Embodiment 3 of the present invention;
[0023] Figure 4 It is a structural schematic diagram of an electronic device in Embodiment 4 of the present invention. DETAILED DESCRIPTION
[0024] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.
[0025] Embodiment 1
[0026] Figure 1 This is a flowchart of a digital signal generation method provided in Embodiment 1 of the present invention. This embodiment is applicable to the case of generating digital signals. The method can be executed by a digital signal generation device, which can be implemented in the form of software and / or hardware. Optionally, it can be implemented by an electronic device, which can be a mobile terminal, a PC or a server. Specifically, it includes the following steps:
[0027] S110, determining multiple groups of pulse parameters.
[0028] In this embodiment, the pulse parameters can be understood as key information describing the pulse. Among them, the pulse parameters can include a period and a duty cycle. The period can be understood as the duration of a group of pulses; the duty cycle can be understood as the proportion of the duration of a high-level pulse or the duration of a low-level pulse in a group of pulses to the period, expressed as a percentage.
[0029] Continuing with the above description, in this embodiment, one implementation method of determining multiple sets of pulse parameters can be described as the following steps:
[0030] a1) obtaining duration and status information corresponding to multiple pulses;
[0031] The status information includes a high level status or a low level status.
[0032] In this embodiment, each pulse has a corresponding duration and state information. For example, it is assumed that the duration and state information corresponding to n pulses are obtained, for example, the duration corresponding to the first pulse is t1, the state information is a high level state, and the duration corresponding to the second pulse is t2, and the state information is a low level state.
[0033] b1) taking a set number of pulses in different states as a group of pulses based on the state information to obtain multiple groups of pulses;
[0034] In this embodiment, the set number can be 2. Exemplarily, based on the above example, the first pulse in the high level state and the second pulse in the low level state are taken as a group of pulses, if n is an even number, n / 2 groups of pulses can be obtained; if n is an odd number, (n-1) / 2+1 groups of pulses can be obtained, wherein the last group of pulses contains only one pulse.
[0035] c1) For each group of pulses, a pulse parameter is determined according to the duration and state information of the pulse to obtain multiple groups of pulse parameters.
[0036] In this embodiment, for each group of pulses, the method for determining the pulse parameters based on the pulse duration and state information can be: summing the duration of a set number of pulses to obtain the pulse period; and taking the ratio of the duration corresponding to the pulse in the high level state or the low level state to the period as the duty cycle.
[0037] Continuing with the above description, illustratively, taking a group of pulses as an example, assuming that this group of pulses contains two pulses, the duration of the first pulse is t1, and the state information is a high-level state, and the duration corresponding to the second pulse is t2, and the state information is a low-level state. For this group of pulses, the method of determining the pulse parameters according to the duration and state information of the pulses can be: summing the durations of the two pulses to obtain the period (t1+t2) of this group of pulses; taking the proportion of the duration t1 corresponding to the pulse in the high-level state to the period as the duty cycle, that is, t1 / (t1+t2), or taking the proportion of the duration t2 corresponding to the pulse in the low-level state to the period as the duty cycle, that is, t2 / (t1+t2).
[0038] For example, assuming that this group of pulses contains only one pulse, the duration of this pulse is tn, and the state information is a high level state. For this group of pulses, the pulse parameters can be determined according to the duration and state information of the pulses by: taking tn as the period of this group of pulses; taking the proportion of the duration tn corresponding to the pulse in the high level state to the period as the duty cycle, i.e. 100%, or taking the proportion of the duration 0 corresponding to the pulse in the low level state to the period as the duty cycle, i.e. 0%.
[0039] Continuing with the above description, the pulse parameters, ie, the period and the duty cycle, can be determined for each group of pulses in the above manner. Finally, multiple groups of pulse parameters can be obtained.
[0040] S120, storing multiple groups of pulse parameters into a cache channel.
[0041] In this embodiment, the cache channel can be understood as a storage module for storing pulse parameters. Exemplarily, the cache channel can be a first-in first-out channel (First Input First Output, FIFO), that is, a FIFO channel, as the name implies, a group of pulse parameters first stored in the FIFO channel is read out first.
[0042] S130 , reading multiple groups of pulse parameters from the cache channel in sequence through the signal generation channel, and generating a target digital signal based on the read multiple groups of pulse parameters.
[0043] In this embodiment, the signal generation channel may be an ATOM channel for generating a digital signal, wherein the target digital signal includes a plurality of pulse signals, each of which is generated according to a set of pulse parameters, and assuming that there are m sets of pulse parameters, m pulse signals will be generated, and these m pulse signals constitute the target digital signal.
[0044] Following the above description, the cache channel and the signal generation channel may be connected via a routing unit, wherein the routing unit may be an advanced routing unit (ARU), that is, the cache channel and the signal generation channel may be connected via the ARU.
[0045] Furthermore, the target digital signal may also include an idle level signal, and the idle level signal is determined by an external device connected to the output channel. Exemplarily, the idle level signal may be a high level pulse signal or a low level pulse signal. The input end of the output channel is connected to the output end of the signal generation channel, and the output channel is used to output the target digital signal generated by the signal generation channel to an external device. Among them, the external device may be any device capable of receiving a digital signal, such as a switching device.
[0046] In this embodiment, a plurality of groups of pulse parameters are sequentially read from a cache channel through a signal generation channel, and a target digital signal is generated based on the read plurality of groups of pulse parameters. The signal generation channel reads a group of pulse parameters from the cache channel each time, and generates a pulse signal according to a group of pulse parameters, until all the pulse parameters in the cache channel are read, and finally a plurality of pulse signals, i.e., the target digital signal, can be obtained.
[0047] Continuing with the above description, the target digital signal may also include an idle level signal, that is, the target digital signal may be composed of multiple pulse signals and an idle level signal, wherein the reason for adding an idle level signal after the multiple pulse signals is that when the signal generation channel has finished reading the pulse parameters in the cache channel, since there are no new pulse parameters, the signal generation channel will repeatedly generate the pulse signal according to the last set of pulse parameters. In order to prevent the above phenomenon from occurring, it is necessary to add another idle level signal.
[0048] The technical solution of this embodiment determines multiple sets of pulse parameters; stores the multiple sets of pulse parameters in a cache channel; reads the multiple sets of pulse parameters from the cache channel in sequence through a signal generation channel, and generates a target digital signal based on the multiple sets of pulse parameters read. The above technical solution specifically considers storing multiple sets of pulse parameters in a cache channel to achieve one-time storage of multiple sets of pulse parameters; at the same time, it also considers reading multiple sets of pulse parameters from the cache channel in sequence through a signal generation channel, and generating a target digital signal based on the multiple sets of pulse parameters read. In the process of reading pulse parameters from the cache channel and generating the target digital signal, no interruption occurs, thereby reducing the interruption load rate. The technical solution provided by this embodiment achieves one-time storage of multiple sets of pulse parameters, and in the process of reading pulse parameters from the cache channel and generating the target digital signal, no interruption occurs, thereby reducing the interruption load rate, thereby improving the generation efficiency of digital signals.
[0049] Embodiment 2
[0050] Figure 2 This is a flowchart of a digital signal generation method provided in Embodiment 2 of the present invention. Based on the above embodiment, the method includes the following steps:
[0051] S210, determining multiple groups of pulse parameters.
[0052] S220, storing multiple groups of pulse parameters into a cache channel.
[0053] S230 , the signal generation channel reads a set of pulse parameters from each cache channel, and generates a pulse signal based on the read pulse parameters.
[0054] In this embodiment, the signal generation channel sequentially reads a set of pulse parameters from the cache channel, and generates a pulse signal according to the read set of pulse parameters.
[0055] S240 , outputting the pulse signal through the output channel until the pulse parameters in the cache channel are completely read.
[0056] In this embodiment, a generated pulse signal is output through an output channel; the next set of pulse parameters are read from the cache channel, and the next pulse signal is generated according to the next set of pulse parameters read; the next pulse signal is output through the output channel; and the above process is repeated until all sets of pulse parameters in the cache channel are read.
[0057] In this embodiment, the method of determining whether the pulse parameters in the cache channel have been read can be described as the following steps:
[0058] a2) obtaining the position information of the first pointer and the second pointer in the cache channel;
[0059] In this embodiment, the first pointer is a read pointer, and the second pointer is a write pointer; the position information of the first pointer can be understood as the address of the read pointer, and the position information of the second pointer can be understood as the address of the write pointer. The cache channel includes a read pointer and a write pointer, the read pointer points to a set of pulse parameters to be read, and the write pointer points to a set of pulse parameters being stored.
[0060] b2) If the position information of the first pointer matches the position information of the second pointer, the pulse parameter is read;
[0061] In this embodiment, the matching of the position information of the first pointer and the position information of the second pointer can be understood as the same position information of the first pointer and the second pointer, that is, the address of the read pointer and the address of the write pointer are the same. At this time, all group pulse parameters in the cache channel have been read.
[0062] c2) If the position information of the first pointer does not match the position information of the second pointer, the pulse parameter is not completely read.
[0063] In this embodiment, the mismatch between the position information of the first pointer and the position information of the second pointer can be understood as the position information of the first pointer is different from the position information of the second pointer, that is, the address of the read pointer and the address of the write pointer are different, which means that there are still pulse parameters in the cache channel that have not been read.
[0064] The technical solution of this embodiment determines multiple groups of pulse parameters; stores multiple groups of pulse parameters in a cache channel; the signal generation channel reads a group of pulse parameters from the cache channel each time, and generates a pulse signal based on the read pulse parameters; the pulse signal is output through the output channel until the pulse parameters in the cache channel are completely read. The above technical solution stores multiple groups of pulse parameters in the cache channel, realizing the one-time storage of multiple groups of pulse parameters; at the same time, in the process of the signal generation channel reading a group of pulse parameters from the cache channel each time and generating a pulse signal, and outputting the pulse signal through the output channel until the pulse parameters in the cache channel are completely read, no interruption will occur, reducing the interruption load rate. The technical solution provided by this embodiment realizes the one-time storage of multiple groups of pulse parameters, in the process of the signal generation channel reading a group of pulse parameters from the cache channel each time and generating a pulse signal, and outputting the pulse signal through the output channel until the pulse parameters in the cache channel are completely read, no interruption will occur, reducing the interruption load rate, thereby improving the generation efficiency of digital signals.
[0065] Embodiment 3
[0066] Figure 3 A schematic diagram of the structure of a digital signal generating device provided in Embodiment 3 of the present invention is shown in FIG. Figure 3 As shown, the device comprises:
[0067] A pulse parameter determination module 310, for determining multiple sets of pulse parameters; wherein the pulse parameters include a period and a duty cycle;
[0068] A pulse parameter storage module 320, used to store the plurality of sets of pulse parameters into a cache channel;
[0069] The digital signal generating module 330 is used to read the multiple sets of pulse parameters from the cache channel in sequence through the signal generating channel, and generate a target digital signal based on the read multiple sets of pulse parameters; wherein the target digital signal includes multiple pulse signals.
[0070] Optionally, the digital signal generating module 330 may be specifically used for:
[0071] The signal generation channel reads a set of pulse parameters from the cache channel each time, generates a pulse signal based on the read pulse parameters; and outputs the pulse signal through the output channel until the pulse parameters in the cache channel are completely read.
[0072] Optionally, the cache channel and the signal generation channel are connected via a routing unit; the target digital signal also includes an idle level signal; and the idle level signal is determined by an external device connected to the output channel.
[0073] Optionally, the pulse parameter determination module 310 may specifically include:
[0074] An information acquisition unit, used to acquire duration and state information corresponding to a plurality of pulses; wherein the state information includes a high level state or a low level state;
[0075] a multiple-group pulse obtaining unit, configured to obtain multiple groups of pulses by taking a set number of consecutive pulses in different states as a group of pulses based on the state information;
[0076] The pulse parameter determination unit is used to determine the pulse parameters for each group of pulses according to the duration and the state information of the pulses, so as to obtain multiple groups of pulse parameters.
[0077] Optionally, the pulse parameter determination unit may be specifically used to:
[0078] The duration of a set number of pulses is summed to obtain the pulse period;
[0079] The ratio of the duration corresponding to the pulse of the high level state or the low level state to the period is taken as the duty cycle.
[0080] Optionally, a method for determining whether the pulse parameters in the cache channel have been read may be:
[0081] Obtain the position information of the first pointer and the position information of the second pointer in the cache channel; if the position information of the first pointer matches the position information of the second pointer, the pulse parameter is completed read; if the position information of the first pointer does not match the position information of the second pointer, the pulse parameter is not completed read.
[0082] The above device can execute the methods provided by all the above embodiments of the present invention, and has the corresponding functional modules and beneficial effects of executing the above methods. For technical details not described in detail in this embodiment, please refer to the methods provided by all the above embodiments of the present invention.
[0083] Embodiment 4
[0084] Figure 4A schematic diagram of the structure of an electronic device 10 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.
[0085] like Figure 4 As shown, the electronic device 10 includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 to the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.
[0086] A number of components in the electronic device 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.
[0087] The processor 11 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 performs the various methods and processes described above, such as a digital signal generation method.
[0088] In some embodiments, the digital signal generation method may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the digital signal generation method described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform the digital signal generation method in any other appropriate manner (e.g., by means of firmware).
[0089] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.
[0090] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.
[0091] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
[0092] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).
[0093] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.
[0094] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.
[0095] An embodiment of the present invention further provides a computer program product, including a computer program, which, when executed by a processor, implements the digital signal generating method provided in any embodiment of the present application.
[0096] In the process of implementation, the computer program product can be written in one or more programming languages or a combination thereof to perform the computer program code of the present invention, including object-oriented programming languages, such as Java, Smalltalk, C++, and conventional procedural programming languages, such as "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computer (for example, using an Internet service provider to connect through the Internet).
[0097] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.
[0098] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims
1. A method for generating a digital signal, characterized in that: include: Determine multiple sets of pulse parameters; wherein the pulse parameters include period and duty cycle; Storing the multiple sets of pulse parameters in a cache channel; The plurality of groups of pulse parameters are sequentially read from the cache channel through a signal generation channel, and a target digital signal is generated based on the read plurality of groups of pulse parameters; wherein the target digital signal includes a plurality of pulse signals.
2. The method according to claim 1, characterized in that The method comprises: sequentially reading the plurality of groups of pulse parameters from the cache channel through a signal generation channel, and generating a target digital signal based on the plurality of groups of pulse parameters read, including: The signal generation channel reads a set of pulse parameters from the cache channel each time, and generates a pulse signal based on the read pulse parameters; The pulse signal is output through the output channel until the pulse parameters in the cache channel are completely read.
3. The method according to claim 2, characterized in that The cache channel is connected to the signal generation channel via a routing unit; the target digital signal also includes an idle level signal; the idle level signal is determined by an external device connected to the output channel.
4. The method according to claim 1, characterized in that: Determine multiple sets of pulse parameters, including: Acquire duration and state information corresponding to a plurality of pulses; wherein the state information includes a high level state or a low level state; Based on the state information, a set number of pulses in different states are taken as a group of pulses to obtain multiple groups of pulses; For each group of pulses, a pulse parameter is determined according to the duration of the pulse and the state information to obtain multiple groups of pulse parameters.
5. The method according to claim 4, characterized in that For each group of pulses, determining pulse parameters according to the duration of the pulses and the state information, comprising: The duration of a set number of pulses is summed to obtain the pulse period; The ratio of the duration corresponding to the pulse of the high level state or the low level state to the period is taken as the duty cycle.
6. The method according to claim 2, characterized in that The method for judging whether the pulse parameters in the cache channel have been read is: Acquire the position information of the first pointer and the position information of the second pointer in the cache channel; If the position information of the first pointer matches the position information of the second pointer, the pulse parameter is read; If the position information of the first pointer does not match the position information of the second pointer, the pulse parameter is not completely read.
7. A digital signal generating device, characterized in that: include: A pulse parameter determination module, used to determine multiple sets of pulse parameters; wherein the pulse parameters include a period and a duty cycle; A pulse parameter storage module, used for storing the plurality of groups of pulse parameters into a cache channel; A digital signal generating module is used to read the multiple sets of pulse parameters from the cache channel in sequence through a signal generating channel, and generate a target digital signal based on the read multiple sets of pulse parameters; wherein the target digital signal includes multiple pulse signals.
8. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can perform the digital signal generating method according to any one of claims 1 to 6.
9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the digital signal generation method according to any one of claims 1 to 6 when executed.
10. A computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the digital signal generating method according to any one of claims 1 to 6 is implemented.