Binary data processing method and device, medium and product
By dynamically adjusting the capacity of the memory buffer while the application is running, the application crash problem caused by data exceeding the fixed storage capacity is solved, and the system stability and processing efficiency are improved.
Patent Information
- Application Number
- CN202510054093.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-14
- Publication Date
- 2025-02-18
- Estimated Expiration
- 2045-01-14
AI Technical Summary
During the application running, the application crashes when the amount of data required to be stored is greater than the fixed storage capacity.
By obtaining instructions, we judge whether the data exceeds the capacity of the writable sub-region, and reapply from memory with a capacity greater than the original buffer if necessary to ensure that the data can be stored.
It effectively avoids application crashes caused by data exceeding the buffer capacity, and improves system stability and processing efficiency.
Smart Images

Figure CN119473929A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of computer technology, and in particular to a binary data processing method, device, medium and product. Background Art
[0002] During the running of an application, the application can apply for an area of fixed storage capacity (e.g. 8KB) from the memory to store data. For example, data read from the external memory, data to be processed by the processor, data to be written to the external memory, etc. However, as the application runs, the amount of data to be stored will increase. If the amount of data to be stored is greater than the fixed storage capacity, the area of fixed storage capacity will no longer be able to store data, which will cause the application to crash. Summary of the invention
[0003] In order to solve the problem that an application crashes when data cannot be stored in an area with a fixed storage capacity, the present application provides a binary data processing method, device, medium and product, including: In a first aspect, an embodiment of the present application provides a binary data processing method, which is applied to an electronic device, and the method includes: obtaining a first instruction, the first instruction instructing to write first data of a first byte number into a first writable sub-region, the first writable sub-region being a writable sub-region in a first region of a memory; obtaining the number of bytes corresponding to the first writable sub-region; comparing the first byte number with the number of bytes corresponding to the first writable sub-region; when the first byte number is greater than the number of bytes corresponding to the first writable sub-region, determining a second region from the memory, wherein the number of bytes corresponding to the second region is greater than the number of bytes corresponding to the first region; and writing the first data into the second region.
[0004] In some optional implementations of the first aspect, determining the second area from the memory includes: determining a first candidate byte number, the first candidate byte number being the sum of a preset byte number and a byte number corresponding to the first writable sub-area; comparing the first byte number with the first candidate byte number; determining the second area from the memory based on the first candidate byte number when the first byte number is less than or equal to the first candidate byte number; or, updating the first candidate byte number based on the preset byte number until the first byte number is less than or equal to the updated first candidate byte number, determining the updated first candidate byte number as the second candidate byte number, and determining the second area from the memory based on the second candidate byte number.
[0005] In some optional implementations of the first aspect, the second area includes a second writable sub-area, and the second area is determined from the memory based on the second candidate byte number, including: using the second candidate byte number as the byte number corresponding to the second writable sub-area, and determining the second area from the memory.
[0006] In some optional implementations of the first aspect, the first area also includes a first readable sub-area, the second area includes a second writable sub-area and a second readable sub-area, and writing the first data into the second area includes: writing the data in the first readable sub-area into the second readable sub-area, and writing the first data into the second writable sub-area.
[0007] In some optional implementations of the first aspect, writing the first data into the second writable sub-area includes: obtaining first index information corresponding to the second writable sub-area, the first index information indicating the number of bytes offset between the starting address of the second writable sub-area and the starting address of the second area; and writing the first data into the second writable sub-area starting from the first address corresponding to the first index information in the second writable sub-area.
[0008] In some optional implementations of the first aspect, the method also includes: updating the index information corresponding to the second writable sub-area from the first index information to the second index information based on the first byte number, wherein the second index information represents the sum of the offset byte number represented by the first index information and the first byte number.
[0009] In some optional implementations of the first aspect, the second area includes a second readable sub-area, and the method also includes: obtaining a second instruction, the second instruction is used to instruct reading a second data of a second number of bytes from the second readable sub-area; determining a read type of the second instruction; when the read type of the second instruction is a sequential read type, processing the second readable sub-area in the first manner; when the read type of the second instruction is a random read type, processing the second readable sub-area in the second manner.
[0010] In some optional implementations of the first aspect, the second readable sub-region is processed using the first method, including: obtaining third index information corresponding to the second readable sub-region, the third index information indicating the offset byte number between the starting address of the second readable sub-region and the starting address of the second region; reading second data of the second byte number from the second readable sub-region according to the third index information; updating the index information corresponding to the second readable sub-region from the third index information to the fourth index information; wherein the fourth index information indicates the sum of the offset byte number indicated by the third index information and the second byte number.
[0011] In some optional implementations of the first aspect, the second readable sub-region is processed using the second method, including: obtaining third index information corresponding to the second readable sub-region, and obtaining read index information from the second instruction; reading second data of a second number of bytes from the second readable sub-region according to the read index information; and keeping the index information corresponding to the second readable sub-region as the third index information.
[0012] In some optional implementations of the first aspect, the second area includes a second readable sub-area, and the method also includes: obtaining the number of bytes corresponding to the second readable sub-area; comparing the number of bytes corresponding to the first area with the number of bytes corresponding to the second readable sub-area; when the number of bytes corresponding to the first area is greater than the number of bytes corresponding to the second readable sub-area, shrinking the second area to a third area, wherein the number of bytes corresponding to the third area is less than or equal to the number of bytes corresponding to the second area.
[0013] In some optional implementations of the first aspect, the second area is reduced to a third area, including: obtaining a third byte number of the third data stored in the second readable sub-area; when the third byte number is non-zero, determining the third area from the memory according to the byte number corresponding to the first area, wherein the byte number corresponding to the third area is the same as the byte number corresponding to the first area; when the third byte number is zero, reducing the second area to the third area according to the byte number corresponding to the second area, wherein the byte number corresponding to the third area is the same as the byte number corresponding to the second area.
[0014] In some optional implementations of the first aspect, when the third byte number is non-zero, the third area includes a third readable sub-area and a third writable sub-area, wherein the byte number corresponding to the third readable sub-area is the same as the byte number corresponding to the second readable sub-area.
[0015] In some optional implementations of the first aspect, the method further includes: writing third data into a third readable sub-area.
[0016] In some optional implementations of the first aspect, when the third byte number is zero, the third area includes a third writable sub-area, and the number of bytes corresponding to the third writable sub-area is the same as the number of bytes corresponding to the second area.
[0017] In a second aspect, the present application provides an electronic device, comprising: a memory for storing instructions executed by one or more processors of the electronic device, and a processor, which is one of the one or more processors of the electronic device, for executing the binary data processing method mentioned in the first aspect of the present application or any item of the first aspect.
[0018] In a third aspect, the present application provides a readable storage medium having instructions stored thereon. When the instructions are executed on an electronic device, the electronic device executes the binary data processing method mentioned in the first aspect of the present application or any item of the first aspect.
[0019] In a fourth aspect, an embodiment of the present application provides a computer program product, which includes computer instructions. When executed by an electronic device, the electronic device executes the computer program code of the binary data processing method mentioned in the first aspect of the present application or any item of the first aspect.
[0020] The embodiment of the present application has the following technical effects: when the amount of data to be stored is greater than the capacity of the buffer zone applied to the memory, the electronic device can reapply to the memory for a buffer zone with a capacity greater than the previously applied buffer zone, thereby ensuring that the reapplied buffer zone is sufficient to store the data to be stored. In this way, the crash of the application program can be reduced. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] Figure 1 According to some embodiments of the present application, a schematic diagram of an application scenario is shown; Figure 2 According to some embodiments of the present application, a flowchart of a first binary data processing method is shown; Figure 3 According to some embodiments of the present application, a schematic diagram of a first area 300 is shown; Figure 4 According to some embodiments of the present application, a comparison schematic diagram of a first area and a second area is shown; Figure 5 According to some embodiments of the present application, a schematic diagram of a process of copying data in a first area to a second area is shown; Figure 6 According to some embodiments of the present application, a schematic diagram of updating index information corresponding to a first writable sub-region is shown; Figure 7 According to some embodiments of the present application, a flow chart of a second binary data processing method is shown; Figure 8 According to some embodiments of the present application, a flowchart of a third binary data processing method is shown; Fig. 9 According to some embodiments of the present application, another schematic diagram of updating index information corresponding to the first writable sub-region is shown; Fig.10 According to some embodiments of the present application, a flowchart of a fourth binary data processing method is shown; Fig.11According to some embodiments of the present application, a schematic diagram showing a comparison between the second area and the third area is shown. Fig.12 According to some embodiments of the present application, another schematic diagram comparing the second area and the third area is shown; Fig.13 According to some embodiments of the present application, a schematic diagram of the hardware structure of an electronic device is shown. DETAILED DESCRIPTION
[0022] The embodiments of the present application include but are not limited to a binary data processing method, device, medium and product.
[0023] It can be understood that the binary data processing method mentioned in the embodiment of the present application can be applied to electronic devices. Among them, the electronic device can be called a terminal, a user equipment (UE), a mobile terminal (MT), etc. In some specific implementations, the electronic device can be a smart phone, a tablet computer, a smart watch, a smart TV, a headset, a smart speaker, a router, a smart camera, a smart door lock, a smart light bulb, and other devices with a buffer.
[0024] It can be understood that the binary data processing method mentioned in the embodiments of the present application can be applied to electronic devices with the Hongmeng system.
[0025] like Figure 1 As shown in FIG. , a schematic diagram of an application scenario is shown. Figure 1 As shown, the electronic device 100 may include a processor 110 and a memory 120. During the running of the application, the processor 110 may apply for a part of the area of the memory 120 as a buffer to store data. Therefore, if the processor 110 needs to use the data, it can read directly from the buffer, so that repeated access can be avoided, the waiting time of the processor 110 can be reduced, and the processing efficiency of the electronic device 100 can be improved.
[0026] As mentioned above, when the amount of data to be stored is greater than the capacity of the requested buffer, the buffer will no longer be able to store data, which will cause the application to crash.
[0027] Therefore, an embodiment of the present application provides a binary data processing method. In this method, when the amount of data to be stored is greater than the capacity of the buffer zone applied to the memory, the electronic device can reapply to the memory for a buffer zone with a capacity greater than the previously applied buffer zone, thereby ensuring that the reapplied buffer zone is sufficient to store the data to be stored. In this way, the crash of the application program can be reduced.
[0028] Furthermore, the buffer may include a writable sub-area, and the writable sub-area may have a corresponding writable index to indicate the offset between the starting address of the writable sub-area and the starting address of the buffer. Therefore, after the data to be stored is written into the writable sub-area in the buffer, the writable index corresponding to the writable sub-area needs to be updated. In this way, it is possible to clearly identify which areas in the buffer already have data and which areas have no data and can write data, thereby not only accurately storing data in chronological order or in the order in which events occur, but also preventing data loss caused by data overwriting.
[0029] The following is an introduction to the binary data processing method mentioned in the embodiments of the present application.
[0030] It is understandable that during the running of the application, the electronic device may obtain a write instruction (hereinafter referred to as a first instruction). The following is an introduction to the data processing method mentioned in the embodiment of the present application based on the scenario of obtaining the first instruction.
[0031] like Figure 2 As shown, a flowchart of a binary data processing method is shown, which can be executed by an electronic device. Specifically, it can be executed by an electronic device with a Hongmeng system. Figure 2 As shown, the binary data processing method may include: S201: Obtain a first instruction, where the first instruction instructs writing first data of a first byte number into a first writable sub-area, where the first writable sub-area is a writable sub-area in a first area of a memory.
[0032] It is understandable that the first area may be a buffer zone. The buffer zone may store data to be used by the electronic device. For example, when a user opens a music application, the buffer zone may store audio data of the music to be played.
[0033] In some specific implementations, during the running of the application, the electronic device may obtain a first instruction, which may be an instruction to write the first data into the first writable sub-area in the first area. The data volume of the first data may be a first byte number, such as a first byte number a KB. Furthermore, the first data may be the data to be used mentioned above, such as binary data.
[0034] like Figure 3 , a schematic diagram of a first area 300 is shown. The first area 300 may include a first writable sub-area (also called a writable data area) 310, a first readable sub-area (also called a readable data area) 320, and a first discarded sub-area (also called a discarded data area) 330.
[0035] It can be understood that each sub-region in the first region 300 has a corresponding start address and end address. The start address of the first discarded sub-region 330 may be the start address of the first region 300, the end address of the first discarded sub-region 330 may be the start address of the first readable sub-region 320, the end address of the first readable sub-region 320 may be the start address of the first writable sub-region 310, and the end address of the first writable sub-region 310 may be the end address of the first region 300.
[0036] Furthermore, the starting address of the first region 300 has corresponding index information, which is usually recorded as the starting index, such as "0", and the ending address of the first region 300 also has corresponding index information, which is usually recorded as the maximum index (length). Furthermore, the starting address of the first readable sub-region 320 has corresponding index information, which is recorded as the read index (readerIndex), which can represent the starting address of the first readable sub-region 320 and the offset byte number of the starting address of the first region 300. The starting address of the first writable sub-region 310 has corresponding index information, which is recorded as the written index (writerIndex), which can represent the starting address of the first writable sub-region 310 and the offset byte number of the starting address of the first region 300.
[0037] S202: Obtain the number of bytes corresponding to the first writable sub-area.
[0038] It can be understood that the electronic device can update the number of bytes corresponding to each sub-region stored in real time according to the read and write status of each sub-region in the first region 300. For example, when obtaining the first instruction, the electronic device can obtain the following information: Figure 3 The number of bytes corresponding to the first writable sub-area 310 shown in FIG. 1 is X1 KB.
[0039] Similarly, the electronic device may obtain that the number of bytes corresponding to the first area 300 may be X KB, for example, 8 KB. The number of bytes corresponding to the first readable sub-area 320 may be X2 KB, and the number of bytes corresponding to the first discarded sub-area 330 may be X3 KB, that is, X=X1+X2+X3.
[0040] S203: Compare the first byte number with the byte number corresponding to the first writable sub-area.
[0041] It can be understood that after obtaining the number of bytes corresponding to the first writable sub-area 310, the electronic device can compare the first byte number with the number of bytes corresponding to the first writable sub-area 310 to determine whether the capacity of the first writable sub-area 310 is sufficient to store the first data of the first byte number.
[0042] In the case where it is determined that the first byte number is less than or equal to the byte number corresponding to the first writable sub-area 310, the electronic device can determine that the capacity of the first writable sub-area 310 is sufficient to store the first data of the first byte number. In the case where it is determined that the first byte number is greater than the byte number corresponding to the first writable sub-area 310, the electronic device can determine that the capacity of the first writable sub-area 310 is insufficient to store the first data of the first byte number.
[0043] S204: When the first number of bytes is greater than the number of bytes corresponding to the first writable sub-region, determine a second region from the memory, wherein the number of bytes corresponding to the second region is greater than the number of bytes corresponding to the first region.
[0044] It can be understood that when the first byte number is greater than the byte number corresponding to the first writable sub-area 310, that is, a>X1, that is, the capacity of the first writable sub-area 310 is insufficient to store the first data of the first byte number, the electronic device can expand the capacity of the first area 300. In some specific implementations, the electronic device can reapply to the memory for a second area, and the byte number corresponding to the second area is greater than the byte number corresponding to the first area 300.
[0045] like Figure 4 , which shows a comparative schematic diagram of a first area 300 and a second area 400 . Figure 4 The first region 300 shown in (a) may include a first writable sub-region 310 , a first readable sub-region 320 , and a first discarded sub-region 330 . Figure 4 The second area 400 shown in (b) may include a second writable sub-area 410, a second readable sub-area 420 and a second discarded sub-area 430. The number of bytes corresponding to the first area 300 may be X KB, the number of bytes corresponding to the second area 400 may be Y KB, and X<Y.
[0046] In some optional implementations, the electronic device may determine the sum of the preset number of bytes and the number of bytes corresponding to the first area 300 as the number of bytes corresponding to the second area 400. The preset number of bytes may be a value set by the user based on multiple experiments, such as 2KB, 4KB, etc., which is not limited in the embodiment of the present application. Furthermore, the electronic device may determine the second area 400 from the memory based on the number of bytes corresponding to the second area 400.
[0047] For example, if the preset number of bytes is 2KB, and the number of bytes corresponding to the first area 300 is X KB mentioned above, the electronic device can determine the sum of the preset number of bytes and the number of bytes corresponding to the first area 300 (2+X)KB as the number of bytes corresponding to the second area 400. In this way, the electronic device can expand the capacity of the first area 300 so that the expanded second area is sufficient to store the first data of the first number of bytes.
[0048] In order to avoid frequent memory requests caused by frequent capacity expansion, the electronic device can determine whether the capacity of the expanded area is sufficient to store the first data of the first byte if the capacity is expanded by a preset number of bytes. If the capacity of the expanded area is insufficient to store the first data of the first byte, it is determined again whether the capacity of the expanded area is sufficient to store the first data of the first byte if the capacity is expanded by twice the preset number of bytes, until it is determined that the capacity of the expanded area is sufficient to store the first data of the first byte, and then the first area 300 is expanded.
[0049] In some optional implementations, the electronic device may determine the sum of the preset number of bytes and the number of bytes corresponding to the first writable sub-area 310 as the first candidate number of bytes. For example, if the preset number of bytes is 2KB and the number of bytes corresponding to the first writable sub-area 310 is the aforementioned X1 KB, the electronic device may determine the sum of the preset number of bytes and the number of bytes corresponding to the first writable sub-area 310 (2+X1) KB as the first candidate number of bytes. Then, the electronic device may compare the first number of bytes with the first candidate number of bytes.
[0050] When the first byte number is less than or equal to the first candidate byte number, the electronic device may determine the second area 400 from the memory according to the first candidate byte number.
[0051] In some ways of determining the second area, the electronic device may determine the sum of the preset number of bytes and the number of bytes corresponding to the first area 300 as the number of bytes corresponding to the second area 400. Furthermore, the electronic device may determine the second area 400 from the memory according to the number of bytes corresponding to the second area 400.
[0052] For example, the preset byte number is 2 KB, and the byte number corresponding to the first area 300 is X KB mentioned above, then the electronic device can determine the sum of the preset byte number and the byte number corresponding to the first area 300 (2+X) KB as the byte number corresponding to the second area 400.
[0053] In other ways of determining the second area, the electronic device may use the first candidate byte number as the byte number corresponding to the second writable sub-area 410 in the second area 400, and determine the sum of the first candidate byte number, the byte number corresponding to the first readable sub-area 320, and the byte number corresponding to the first discarded sub-area 330 as the byte number corresponding to the second area 400. Furthermore, the electronic device may determine the second area 400 from the memory according to the byte number corresponding to the second area 400.
[0054] For example, the first candidate byte number is (2+X1) KB, the byte number corresponding to the first writable sub-area 310 is the X2 KB mentioned above, and the byte number corresponding to the first discarded sub-area 330 is the X3 KB mentioned above. The electronic device can determine the sum of the first candidate byte number, the byte number corresponding to the first readable sub-area 320, and the byte number corresponding to the first discarded sub-area 330 (2+X1)+X2+X3 as the byte number corresponding to the second area.
[0055] In the case where the first byte number is greater than the first candidate byte number, that is, a>(2+X1), the electronic device can update the first candidate byte number according to the preset byte number to obtain the updated first candidate byte number. Furthermore, the electronic device can compare the first byte number with the updated first candidate byte number. If the first byte number is still greater than the updated first candidate byte number, the electronic device needs to repeat the steps of updating the first candidate byte number according to the preset byte number and comparing the first byte number with the updated first candidate byte number until the first byte number is less than or equal to the updated first candidate byte number. The electronic device can determine the updated first candidate byte number as the second candidate byte number. Furthermore, the electronic device can determine the second area 400 from the memory based on the second candidate byte number.
[0056] In some ways of determining the second area, the electronic device may use the second candidate byte number as the byte number corresponding to the second writable sub-area 410 in the second area 400, and determine the sum of the second candidate byte number, the byte number corresponding to the first readable sub-area 320, and the byte number corresponding to the first discarded sub-area 330 as the byte number corresponding to the second area 400. Furthermore, the electronic device may determine the second area 400 from the memory according to the byte number corresponding to the second area 400.
[0057] For example, the preset number of bytes is 2KB, and the first candidate number of bytes is the aforementioned (2+X1)KB. When the first number of bytes is greater than the first candidate number of bytes, that is, a>(2+X1), the electronic device updates the first candidate number of bytes according to the preset number of bytes to obtain the updated first candidate number of bytes (4+X1)KB. If the first number of bytes is less than or equal to the updated first candidate number of bytes (4+X1)KB, the electronic device may use the updated first candidate number of bytes (4+X1)KB as the second candidate number of bytes. Furthermore, the number of bytes corresponding to the first readable sub-region 320 is the aforementioned X2KB, and the number of bytes corresponding to the first discarded sub-region 330 is the aforementioned X3KB, then the electronic device may determine the sum of the second candidate number of bytes, the number of bytes corresponding to the first readable sub-region 320, and the number of bytes corresponding to the first discarded sub-region 330 (4+X1)+X2+X3 as the number of bytes corresponding to the second region.
[0058] Thus, based on the above method, it can be determined that Figure 4 The second area 400 shown in (b) is shown in FIG. The number of bytes corresponding to the second area 400 is Y KB, the number of bytes corresponding to the second writable sub-area 410 may be Y1 KB, the number of bytes corresponding to the second readable sub-area 420 may be Y2 KB, and the number of bytes corresponding to the second discarded sub-area 430 may be Y3 KB. That is, Y=Y1+Y2+Y3. Moreover, Y1>X1, Y2=X2, and Y3=X3.
[0059] S205: Writing the first data into the second area.
[0060] It can be understood that after determining the second area 400 from the memory, the electronic device can write the first data into the second writable sub-area 410 .
[0061] In addition, if Figure 5 As shown, a schematic diagram of a process of copying data in the first area 300 to the second area 400 is shown. The electronic device can write the data in the first readable sub-area 320 to the second readable sub-area 420, and write the data in the first discarded sub-area 330 to the second discarded sub-area 430, so as to copy all the data in the first area 300 to the second area 400 newly applied to the memory. That is, the starting address of the first area 300 can be called the starting point of data copying, and the ending address of the first area 300 can be called the end point of data copying. In addition, the area added by the second writable sub-area 410 in the second area 400 compared with the first writable sub-area 310 in the first area 300 can be called a newly added writable data area.
[0062] In some ways of writing the first data into the second writable sub-area, the electronic device may obtain the first index information corresponding to the second writable sub-area 410, and the first index information may indicate the offset byte number between the start address of the second writable sub-area 410 and the start address of the second area 400. Furthermore, the electronic device may write the first data into the second writable sub-area 410 starting from the start address of the second writable sub-area 410.
[0063] And, similarly, each sub-region in the second region 400 has a corresponding start address and end address. The start address of the second discarded sub-region 430 may be the start address of the second region 400, the end address of the second discarded sub-region 430 may be the start address of the second readable sub-region 420, the end address of the second readable sub-region 420 may be the start address of the second writable sub-region 410, and the end address of the second writable sub-region 410 may be the end address of the second region 400.
[0064] In addition, the starting address of the second area 400 has corresponding index information, which is usually recorded as the starting index, such as "0", and the ending address of the second area 400 also has corresponding index information, which is usually recorded as the maximum index (length). In addition, the starting address of the second readable sub-area 420 has corresponding index information (hereinafter referred to as the third index information corresponding to the second readable sub-area 420), which is recorded as the read index (readerIndex), which can represent the starting address of the second readable sub-area 420 and the offset byte number of the starting address of the second area 400. The starting address of the second writable sub-area 410 has corresponding index information (hereinafter referred to as the first index information corresponding to the second writable sub-area 410), which is recorded as the written index (writerIndex), which can represent the starting address of the second writable sub-area 410 and the offset byte number of the starting address of the second area 400.
[0065] It can be understood that in the Hongmeng system, readable and writable binary buffer containers can include ArrayBuffer and SharedArrayBuffer. Among them, ArrayBuffer is a general-purpose, fixed-length existing binary data buffer that is only responsible for storing data and does not record read and write positions. SharedArrayBuffer is also a general-purpose, fixed-length existing binary data buffer, which is mainly used for sharing data between multiple threads. The focus is on concurrent access and synchronization of data by multiple threads, and it does not have the function of recording read and write positions.
[0066] Therefore, in the embodiment of the present application, after writing the first data into the second writable sub-area 410, the electronic device may update the index information corresponding to the second writable sub-area 410. Specifically, the electronic device may update the index information corresponding to the second writable sub-area 410 from the first index information to the second index information. The second index information may represent the sum of the offset byte number represented by the first index information and the first byte number. For example, if the first index information corresponding to the second writable sub-area 410 is n1, and the first byte number of the first data is a KB mentioned above, then the second index information corresponding to the second writable sub-area 410 is n1+a.
[0067] S206: When the first byte number is less than or equal to the byte number corresponding to the first writable sub-region, write the first data into the first writable sub-region.
[0068] It can be understood that when the first byte number is less than or equal to the byte number corresponding to the first writable sub-area 310, that is, a≤X1, that is, the capacity of the first writable sub-area 310 is sufficient to store the first data of the first byte number, the electronic device can obtain the index information corresponding to the first writable sub-area 310, and the index information can indicate the offset byte number between the start address of the first writable sub-area 310 and the start address of the first area 300. Moreover, the electronic device can write the first data into the first writable sub-area 310 starting from the start address of the first writable sub-area 310.
[0069] Next, the electronic device may update the index information corresponding to the first writable sub-area 310 to obtain the updated index information corresponding to the first writable sub-area 310, and the updated index information may represent the sum of the index information corresponding to the first writable sub-area 310 and the first byte number. For example, if the index information corresponding to the first writable sub-area 310 is n2, and the first byte number of the first data is a KB mentioned above, then the updated index information corresponding to the first writable sub-area 310 is n2+a.
[0070] Specific as Figure 6 As shown, the index information corresponding to the first writable sub-area 310 indicates Figure 6 The address corresponding to the written index (ie, index information) selected by the dashed line in (a) is the offset byte number from the start address of the first area 300, and the updated index information corresponding to the first writable sub-area 310 is represented by Figure 6 The address corresponding to the written index (i.e., the updated index information) selected by the solid line in (b).
[0071] In an embodiment of the present application, when the capacity of the writable sub-area in the buffer area applied for by the application to the memory is insufficient to store the data to be written, the application crash can be reduced by reapplying for a buffer area with a larger capacity, that is, expanding the buffer area.
[0072] It can be understood that, during the running of the application, the electronic device can not only obtain the write instruction, but also obtain the read instruction (hereinafter referred to as the second instruction).
[0073] The following is an introduction to the data processing method mentioned in the embodiment of the present application based on the scenario of first obtaining the first instruction and then obtaining the second instruction.
[0074] like Figure 7 As shown, a flow chart of a second binary data processing method is shown. The method can be executed by an electronic device, specifically, by an electronic device having a Hongmeng system. Figure 7 As shown, the binary data processing method may include: S701: Obtain a first instruction, where the first instruction instructs writing first data of a first byte number into a first writable sub-area, where the first writable sub-area is a writable sub-area in a first area of a memory.
[0075] S702: Obtain the number of bytes corresponding to the first writable sub-area.
[0076] S703: Compare the first byte number with the byte number corresponding to the first writable sub-area.
[0077] S704: When the first byte number is greater than the byte number corresponding to the first writable sub-region, determine a second region from the memory, wherein the byte number corresponding to the second region is greater than the byte number corresponding to the first region.
[0078] S705: Write the first data into the second area.
[0079] It is understood that the specific implementation of S701 to S705 can refer to Figure 2 S201 to S205 in the above are not described in detail here.
[0080] S706: Obtain a second instruction, where the second instruction is used to instruct to read second data of a second number of bytes from a second readable sub-region, where the second readable sub-region is a readable sub-region in the second region of the memory.
[0081] In some specific implementations, during the running of the application, the electronic device may obtain a second instruction, which may be an instruction to Figure 4 (b) shows an instruction for reading second data from the second readable sub-area 420 in the second area 400 , wherein the data size of the second data may be a second number of bytes, such as a second number of bytes b KB.
[0082] S707: Determine the read type of the second instruction.
[0083] It can be understood that the data in the second writable sub-area can be audio data, video data, etc., which are stored in chronological order. Therefore, the second instruction can be a sequential read instruction. For example, the second instruction can indicate to read the second data of the second byte number from the second writable sub-area according to the playback order of the video frame.
[0084] However, when it is necessary to analyze, count or verify the data in the second readable sub-region, instead of processing all the data in sequence, the second instruction may be a random read instruction. Alternatively, in order to verify whether some of the data in the second readable sub-region meets the query condition, the second instruction may be a random read instruction. In this way, this part of the data may be accessed randomly, instead of sequentially traversing all the data in the second readable sub-region. Alternatively, when some of the data in the second readable sub-region is erroneous or lost, in order to locate and repair these data, the second instruction may be a random read instruction.
[0085] After acquiring the second instruction, the electronic device may acquire the number of bytes corresponding to the second readable sub-area 420, such as the aforementioned Y2, and determine whether the number of bytes corresponding to the second readable sub-area 420 is greater than the second number of bytes. When the number of bytes corresponding to the second readable sub-area 420 is greater than or equal to the second number of bytes, the read type of the second instruction may be determined. When the number of bytes corresponding to the second readable sub-area 420 is less than the second number of bytes, it may be determined that the second readable sub-area 420 is empty and data cannot be read any further.
[0086] It can be understood that the second instruction may include read index information. Therefore, after obtaining the second instruction, the electronic device may first determine the read index information from the second instruction, and obtain the third index information corresponding to the second readable sub-area 420. Then, the electronic device may compare the size of the read index information and the third index information to determine the read type of the second instruction.
[0087] When the read index information is equal to the third index information, it can be determined that the read type of the second instruction is a sequential read type. When the read index information is greater than the third index information, it can be determined that the read type of the second instruction is a random read type. When the read index information is greater than the second index information, it can be determined that the second instruction is an error instruction, and the electronic device can report an error. When the sum of the read index information and the second number of bytes is greater than the second index information, it can be determined that the second instruction is an error instruction, and the electronic device can report an error.
[0088] S708: When the read type of the second instruction is a sequential read type, the second readable sub-region is processed in the first manner.
[0089] It can be understood that when the read index information is equal to the third index information, and the sum of the read index information and the second byte number is less than the second index information, it can be determined that the read type of the second instruction is a sequential read type. In this way, the electronic device can process the second readable sub-area 420 in the first manner.
[0090] In some methods of processing the second readable sub-region in the first manner, the electronic device may obtain third index information corresponding to the second readable sub-region 420. The third index information may indicate the offset byte number between the start address of the second readable sub-region 420 and the start address of the second region 400. Then, the electronic device may read the second data of the second byte number from the second readable sub-region 420 according to the third index information.
[0091] Furthermore, the electronic device may update the index information corresponding to the second readable sub-area 420 from the third index information to the fourth index information. The fourth index information may represent the sum of the offset byte number represented by the third index information and the second byte number. For example, the third index information corresponding to the second readable sub-area 420 is m1, and the second byte number of the second data is the aforementioned b KB. Then, when the read type of the second instruction is a sequential read type, the fourth index information corresponding to the second readable sub-area 420 is m1+b. Furthermore, since the capacity of the second area 400 is limited, after the electronic device sequentially reads the second data of the second byte number from the second readable sub-area 420, the capacity occupied by the second data is no longer valuable for the second instruction. Therefore, the capacity occupied by the second data, that is, the capacity corresponding to the difference between the third index information and the fourth index information, may be determined as the newly added capacity of the second abandoned sub-area 430. In this way, the efficiency of managing the second area 400 can be improved, and the second data can be prevented from being read again by mistake, resulting in an application error, for example, repeated reading of the same video frame causes the application to freeze. Furthermore, if the capacity occupied by the second data is not determined as the newly added capacity of the second abandoned sub-area 430, the second area 400 will be full of data soon and no new data can be written.
[0092] S709: When the read type of the second instruction is a random read type, the second readable sub-region is processed in a second manner.
[0093] It can be understood that when the read index information is greater than the third index information, and the sum of the read index information and the second byte number is less than the second index information, it can be determined that the read type of the second instruction is a random read type.
[0094] In some methods of processing the second readable sub-region using the second method, the electronic device can obtain the read index information in the second instruction, and read the second data of the second byte number from the second readable sub-region according to the read index information, and then the electronic device can keep the index information corresponding to the second readable sub-region as the third index information. For example, the third index information corresponding to the second readable sub-region 420 is m1, and the second byte number of the second data is the b KB mentioned above. In the case where the read type of the second instruction is a random read type, the fourth index information corresponding to the second readable sub-region 420 is m1. In the case where the read type of the second instruction is a random read type, the second data will be reused, so there is no need to update the third index information corresponding to the second readable sub-region 420, and there is no need to determine the capacity occupied by the second data as the newly added capacity of the second abandoned sub-region 430.
[0095] S710: When the first byte number is less than or equal to the byte number corresponding to the first writable sub-area, write the first data into the first writable sub-area.
[0096] It is understood that the specific implementation of S710 can refer to Figure 2 S206 is not described in detail here.
[0097] In the embodiment of the present application, different methods are determined to process the readable sub-region according to different read types of the read instruction. For example, the index information corresponding to the readable sub-region is updated, or the index information corresponding to the readable sub-region is maintained, so as to avoid the situation where the read data is incorrect due to the incorrect index information corresponding to the readable sub-region when the subsequent read instruction is of the sequential read type.
[0098] It is understandable that the electronic device can obtain the read instruction not only after the capacity of the first area 300 is expanded, but also without expanding the capacity of the first area 300.
[0099] The following is an introduction to the binary data processing method mentioned in the embodiment of the present application based on obtaining a read instruction without expanding the capacity of the first area 300.
[0100] like Figure 8 As shown, a flow chart of a third binary data processing method is shown. The method can be executed by an electronic device, specifically, by an electronic device having a Hongmeng system. Figure 8 As shown, the binary data processing method may include: S801: Obtain a first instruction, where the first instruction instructs writing first data of a first number of bytes into a first writable sub-area, where the first writable sub-area is a writable sub-area in a first area of the memory.
[0101] S802: Obtain the number of bytes corresponding to the first writable sub-area.
[0102] S803: Compare the first byte number with the byte number corresponding to the first writable sub-area.
[0103] S804: When the first byte number is less than or equal to the byte number corresponding to the first writable sub-region, write the first data into the first region.
[0104] It is understood that the specific implementation of S801 to S804 can refer to Figure 2 S201, S202, S203 and S206 are not described in detail here.
[0105] S805: Obtain a second instruction, where the second instruction is used to instruct to read second data of a second number of bytes from the first readable sub-region, where the first readable sub-region is a readable sub-region in the first region of the memory.
[0106] S806: Determine the read type of the second instruction.
[0107] It is understood that the specific implementation of S805 to S806 can refer to Figure 7 S706 to S707 in the above are not described in detail here.
[0108] S807: When the read type of the second instruction is a sequential read type, the first readable sub-region is processed in the first manner.
[0109] It can be understood that in some ways of processing the first readable sub-region in the first way, the electronic device can obtain the index information corresponding to the first readable sub-region 320. The index information can indicate the offset byte number between the start address of the first readable sub-region 320 and the start address of the first region 300. Then, the electronic device can read the second data of the second byte number from the first readable sub-region 320 according to the index information corresponding to the first readable sub-region 320.
[0110] Furthermore, the electronic device can update the index information corresponding to the first readable sub-region 320 to obtain the updated index information corresponding to the first readable sub-region 320, and the updated index information can represent the sum of the index information corresponding to the first writable sub-region 310 and the first byte number. For example, the index information corresponding to the first writable sub-region 310 is n3, and the first byte number of the first data is a KB mentioned above, then the updated index information corresponding to the first writable sub-region 310 is n3+a. Furthermore, since the capacity of the first region 300 is limited, after the electronic device sequentially reads the second data of the second byte number from the first readable sub-region 320, the capacity occupied by the second data is no longer valuable for the second instruction. Therefore, the capacity occupied by the second data can be determined as the newly added capacity of the first abandoned sub-region 330. In this way, the efficiency of managing the first region 300 can be improved, and the second data can be prevented from being read again by mistake, resulting in an application error, for example, repeated reading of the same video frame causes the application to freeze. Furthermore, if the capacity occupied by the second data is not determined as the newly added capacity of the first abandoned sub-area 330, the first area 300 will be filled with data very quickly and no new data can be written.
[0111] Specific as Fig. 9 As shown, the index information corresponding to the first writable sub-area 310 indicates Fig. 9 The address corresponding to the written index (ie, index information) selected by the dashed line in (a) is the offset byte number from the start address of the first area 300, and the updated index information corresponding to the first writable sub-area 310 is represented by Fig. 9 The address corresponding to the written index (i.e., the updated index information) selected by the solid line in (b).
[0112] S808: When the read type of the second instruction is a random read type, the first readable sub-region is processed in a second manner.
[0113] In some methods of processing the first readable sub-region in the second manner, the electronic device may obtain the read index information in the second instruction, and read the second data of the second number of bytes from the first readable sub-region 320 according to the read index information, and then the electronic device may maintain the index information corresponding to the first readable sub-region 320. In the case where the read type of the second instruction is a random read type, the second data will be reused, so there is no need to update the third index information corresponding to the first readable sub-region 320, and there is no need to determine the capacity occupied by the second data as the newly added capacity of the first discarded sub-region 330.
[0114] It is understood that the specific implementation of S805 to S808 can refer to Figure 7 S706 to S709 in the above are not described in detail here.
[0115] In an embodiment of the present application, different methods are determined to process the readable sub-region according to different read types of the read instructions. For example, the index information corresponding to the readable sub-region is updated, or the index information corresponding to the readable sub-region is saved. This can avoid the situation where data reading errors occur due to incorrect index information corresponding to the readable sub-region when the subsequent read instructions are of sequential read type.
[0116] It can be understood that after the first area 300 is expanded, in order to reduce memory waste, it can be determined whether the second area 400 meets the shrinking condition. If the second area 400 meets the shrinking condition, the second area can be shrunk. Fig.10 As shown, a flowchart of a fourth binary data processing method is shown. The method can be executed by an electronic device, specifically, an electronic device having a Hongmeng system. Fig.10 As shown, the binary data processing method may include: S1001: Obtain a first instruction, where the first instruction instructs writing first data of a first number of bytes into a first writable sub-area, where the first writable sub-area is a writable sub-area in a first area of a memory.
[0117] S1002: Obtain the number of bytes corresponding to the first writable sub-area.
[0118] S1003: Compare the first byte number with the byte number corresponding to the first writable sub-area.
[0119] S1004: When the first number of bytes is greater than the number of bytes corresponding to the first writable sub-region, determine a second region from the memory, wherein the number of bytes corresponding to the second region is greater than the number of bytes corresponding to the first region.
[0120] S1005: Write the first data into the second area.
[0121] It is understood that the specific implementation of S1001 to S1005 can refer to Figure 2 S201 to S205 in the above are not described in detail here.
[0122] S1006: Obtain the number of bytes corresponding to the second readable sub-area.
[0123] It can be understood that the electronic device can update the number of bytes corresponding to each sub-region stored in real time according to the read and write status of each sub-region in the second region. Figure 4 The number of bytes corresponding to the second readable sub-region 420 shown in (b) may be Y2 KB.
[0124] S1007: Compare the number of bytes corresponding to the first region with the number of bytes corresponding to the second readable sub-region.
[0125] It can be understood that when more data is read from the buffer, that is, the larger the second discarded sub-area 430 in the second area 400 is, the more serious the memory waste is.
[0126] Therefore, after obtaining the number of bytes corresponding to the second readable sub-area 420, the electronic device can determine whether the second area 400 meets the shrinking condition based on the size of the number of bytes corresponding to the first area 300 and the number of bytes corresponding to the second readable sub-area 420. Since the number of bytes corresponding to the shrunk area needs to be less than or equal to the number of bytes corresponding to the second area, for example, the number of bytes corresponding to the shrunk area can be the number of bytes corresponding to the first area, and in order to ensure that all data in the second writable sub-area 410 can be copied to the shrunk area, the shrinking condition can be that the number of bytes corresponding to the first area 300 is greater than the number of bytes corresponding to the second readable sub-area 420.
[0127] It can be understood that the shrinking condition may also be that the number of bytes corresponding to the second discarded sub-area 430 is greater than the first threshold. The first threshold may be, for example, 6 KB, which is not specifically limited in the embodiment of the present application.
[0128] S1008: When the number of bytes corresponding to the first region is greater than the number of bytes corresponding to the second readable sub-region, shrink the second region to a third region, wherein the number of bytes corresponding to the third region is less than or equal to the number of bytes corresponding to the second region.
[0129] In order to avoid memory waste caused by expansion, when it is determined that the second area 400 meets the reduction condition, that is, the number of bytes corresponding to the first area 300 is greater than the number of bytes corresponding to the second readable sub-area 420, the electronic device can reduce the second area to reduce memory waste.
[0130] It can be understood that the electronic device can obtain the third byte number of the third data stored in the second readable sub-area 420, and adopt different shrinking methods according to whether the third byte number is zero. The third data can be all the data in the second readable sub-area 420. In some specific implementations, the electronic device can reapply to the memory for a third area, the number of bytes corresponding to the third area is less than or equal to the number of bytes corresponding to the second area, and the electronic device can also reset the read index and the written index of the second area 400 to achieve rapid shrinking of the second area 400.
[0131] In some ways of determining the third area, when the third byte number is non-zero, that is, the data in the second area 400 has not been read completely, the electronic device can determine the third area from the memory according to the byte number corresponding to the first area. The byte number corresponding to the third area is less than the byte number corresponding to the second area, and the byte number corresponding to the third area is the same as the byte number corresponding to the first area.
[0132] like Fig.11 As shown, a comparative schematic diagram of the second area 400 and the third area 1100 is shown. Fig.11 The second area 400 shown in (a) may include a second writable sub-area 410, a second readable sub-area 420, and a second discarded sub-area 430. The third area 1100 may include a third writable sub-area 1110 and a third readable sub-area 1120. The number of bytes corresponding to the second area may be Y mentioned above, the number of bytes corresponding to the third area 1100 may be Z, and Z=X<Y.
[0133] And, similarly, each sub-region in the third region 1100 has a corresponding start address and end address. The start address of the third readable sub-region 1120 may be the start address of the third region 1100, the end address of the third readable sub-region 1120 may be the start address of the third writable sub-region 1110, and the end address of the third writable sub-region 1110 may be the end address of the third region 1100.
[0134] In addition, the start address of the third area 1100 has corresponding index information, which is usually recorded as the start index, such as "0", and the end address of the third area 1100 also has corresponding index information, which is usually recorded as the maximum index (length) after shrinking.
[0135] In addition, the start address of the third readable sub-region 1120 has corresponding index information, which is recorded as a read index (readerIndex), and the read index can represent the offset byte number between the start address of the third readable sub-region 1120 and the start address of the third region 1100. Here, when the shrinking is just completed, since the start address of the third region 1100 is the same as the start address of the third readable sub-region 1120, the start index coincides with the read index.
[0136] When the third byte number is zero, that is, all the data in the second area 400 has been read, the electronic device can reset the read index and the written index of the second area 400 according to the byte number corresponding to the second area, for example, reset the read index and the written index of the second area 400 to "0" to shrink the second area to the third area. In this way, the second abandoned sub-area 430 can be reused, thereby realizing the rapid shrinkage of the second area 400. The byte number corresponding to the third area is the same as the byte number corresponding to the second area.
[0137] like Fig.12 As shown, another schematic diagram comparing the second area 400 and the third area 1100 is shown. Fig.12 The second area 400 shown in (a) may include a second writable sub-area 410, a second readable sub-area 420 (the second readable sub-area 420 has no readable data) and a second discarded sub-area 430. The third area 1100 may include a third writable sub-area 1110. The number of bytes corresponding to the second area may be Y mentioned above, the number of bytes corresponding to the third area 1100 may be Z, and Z=Y>X.
[0138] Likewise, the third writable sub-region 1110 in the third region 1100 has a corresponding start address and end address. The start address of the third writable sub-region 1110 is the start address of the third region 1100, and the end address of the third writable sub-region 1110 is the end address of the third region 1100.
[0139] In addition, the starting address of the third area 1100 (i.e., the starting address of the third writable sub-area 1110) has corresponding index information, which is usually recorded as the starting index, such as "0", and the ending address of the third area 1100 (i.e., the ending address of the third writable sub-area 1110) also has corresponding index information, which is usually recorded as the maximum index (length) after reduction.
[0140] It can be understood that the binary data processing method provided in the embodiment of the present application can be applied to electronic devices. The hardware structure of the electronic device to which the binary data processing method provided in the embodiment of the present application is applicable is exemplarily introduced below.
[0141] like Fig.13As shown, the electronic device 100 may include a processor 110, an external memory interface 1320, an internal memory 1321, a universal serial bus (USB) interface 1330, a charging management module 1340, a power management module 1341, a battery 1342, an antenna, a wireless communication module 1350, an audio module 1360, a speaker 1360A, a receiver 1360B, a microphone 1360C, a headphone interface 1360D, a camera 1370, a display screen 1380, and the like.
[0142] It is to be understood that the structure illustrated in the embodiment of the present invention does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown in the figure, or combine some components, or separate some components, or arrange the components differently. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.
[0143] The processor 110 may include one or more processing units, for example, the processor 110 may include an application processor (AP), a modem processor, a graphics processor (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU), etc. Different processing units may be independent devices or integrated into one or more processors.
[0144] The controller can generate an operation control signal according to the instruction operation code and the timing signal to complete the control of fetching instructions and executing instructions. The processor 110 can control the fetching and executing of instructions through the controller to implement the binary data processing method provided in the embodiment of the present application. For example, the processor 110 can control the fetching and executing of instructions through the controller to implement the above Figure 2 , Figure 7 , Figure 8 or Fig.10 The steps in the process shown correspond to the implementation steps.
[0145] The processor 110 may also be provided with a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may store instructions or data that the processor 110 has just used or cyclically used. If the processor 110 needs to use the instruction or data again, it may be directly called from the memory. This avoids repeated access, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.
[0146] The wireless communication function of the electronic device can be implemented through an antenna, a wireless communication module 1350, a modem processor, a baseband processor, and the like.
[0147] The antenna is used to transmit and receive electromagnetic wave signals. Each antenna in the electronic device can be used to cover a single or multiple communication frequency bands. Different antennas can also be reused to improve the utilization of the antenna. For example, the antenna can be reused as a diversity antenna for a wireless local area network. In some other embodiments, the antenna can be used in combination with a tuning switch.
[0148] The wireless communication module 1350 can provide wireless communication solutions for electronic devices, including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR), etc. The wireless communication module 1350 can be one or more devices integrating at least one communication processing module. The wireless communication module 1350 receives electromagnetic waves via an antenna, modulates and filters the electromagnetic wave signals, and sends the processed signals to the processor 110. The wireless communication module 1350 can also receive the signal to be sent from the processor 110, modulate the frequency, amplify it, and convert it into electromagnetic waves for radiation through the antenna.
[0149] The electronic device implements the display function through a GPU, a display screen 1380, and an application processor. The GPU is a microprocessor for image processing, which connects the display screen 1380 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 110 may include one or more GPUs that execute program instructions to generate or change display information.
[0150] The display screen 1380 is used to display images, videos, etc. The display screen 1380 includes a display panel. The display panel can be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light emitting diode or an active-matrix organic light emitting diode (AMOLED), a flexible light-emitting diode (FLED), Mini-LED, MicroLED, Micro-OLED, quantum dot light-emitting diodes (QLED), etc. In some embodiments, the electronic device may include 1 or N display screens 1380, where N is a positive integer greater than 1.
[0151] In some cases, the embodiments disclosed herein may be implemented in hardware, firmware, software, or any combination thereof.
[0152] The embodiments disclosed in the present application may also be implemented as instructions carried or stored on one or more temporary or non-temporary machine-readable (e.g., computer-readable) storage media, which can be read and executed by one or more processors. For example, the instructions may be distributed over a network or through other computer-readable media. Therefore, the machine-readable medium may include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computer), including but not limited to a floppy disk, an optical disk, an optical disk, a magneto-optical disk, a read-only memory (ROM), a random access memory (RAM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a magnetic card or an optical card, a flash memory, or a tangible machine-readable memory for transmitting information (e.g., a carrier wave, an infrared signal, a digital signal, etc.) using the Internet in an electrical, optical, acoustic or other form of propagation signal. Therefore, the machine-readable medium includes any type of machine-readable medium suitable for storing or transmitting electronic instructions or information in a form readable by a machine (e.g., a computer).
[0153] Embodiments of the present application may be implemented as a computer program or program code executed on a programmable system comprising at least one processor, a storage system (including volatile and non-volatile memory and / or storage elements), at least one input device, and at least one output device.
[0154] Program code can be applied to input instructions to perform the functions described in this application and generate output information. The output information can be applied to one or more output devices in a known manner. For the purposes of this application, a processing system includes any system having a processor such as, for example, a digital signal processor (DSP), a microcontroller, an application specific integrated circuit, or a microprocessor.
[0155] Program code can be implemented with high-level programming language or object-oriented programming language to communicate with the processing system. When necessary, program code can also be implemented with assembly language or machine language. In fact, the mechanism described in this application is not limited to the scope of any specific programming language. In either case, the language can be a compiled language or an interpreted language.
[0156] The above describes the hardware structure that the electronic device may have. It is understood that the structure illustrated in the embodiments of the present application does not constitute a specific limitation on the electronic device. In other embodiments of the present application, the electronic device may include more or fewer components than shown in the figure, or combine certain components, or split certain components, or arrange the components differently. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.
[0157] In the accompanying drawings, some structural or method features may be shown in a specific arrangement and / or order. However, it should be understood that such a specific arrangement and / or order may not be required. Instead, in some embodiments, these features may be arranged in a manner and / or order different from that shown in the illustrative drawings. In addition, the inclusion of structural or method features in a particular figure does not mean that such features are required in all embodiments, and in some embodiments, these features may not be included or may be combined with other features.
[0158] It should be noted that in the examples and description of this patent, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "including one" do not exclude the existence of other identical elements in the process, method, article or device including the elements.
[0159] Although the present application has been illustrated and described with reference to certain embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the scope of the present application.
Claims
1. A binary data processing method, characterized in that: Applied to electronic equipment, the method comprises: Obtain a first instruction, wherein the first instruction instructs writing first data of a first number of bytes into a first writable sub-area, wherein the first writable sub-area is a writable sub-area in a first area of a memory; Obtain the number of bytes corresponding to the first writable sub-area; comparing the first number of bytes with the number of bytes corresponding to the first writable sub-area; In a case where the first number of bytes is greater than the number of bytes corresponding to the first writable sub-region, determining a second region from the memory, wherein the number of bytes corresponding to the second region is greater than the number of bytes corresponding to the first region; The first data is written into the second area.
2. The method according to claim 1, characterized in that The determining the second area from the memory includes: Determine a first candidate byte number, where the first candidate byte number is the sum of a preset byte number and a byte number corresponding to the first writable sub-area; Comparing the first byte number with the first candidate byte number; In a case where the first byte number is less than or equal to the first candidate byte number, determining the second area from the memory according to the first candidate byte number; or In the case where the first byte number is greater than the first candidate byte number, the first candidate byte number is updated according to the preset byte number until the first byte number is less than or equal to the updated first candidate byte number, the updated first candidate byte number is determined as the second candidate byte number, and the second area is determined from the memory according to the second candidate byte number.
3. The method according to claim 2, characterized in that The second area includes a second writable sub-area, Determining the second area from the memory according to the second candidate byte number includes: The second candidate byte number is used as the byte number corresponding to the second writable sub-region, and the second region is determined from the memory.
4. The method according to claim 1, characterized in that: The first area further includes a first readable sub-area, and the second area includes a second writable sub-area and a second readable sub-area, Writing the first data into the second area includes: The data in the first readable sub-area is written into the second readable sub-area, and the first data is written into the second writable sub-area.
5. The method according to claim 4, characterized in that Writing the first data into the second writable sub-area comprises: Acquire first index information corresponding to the second writable sub-region, where the first index information indicates the offset byte number between the start address of the second writable sub-region and the start address of the second region; The first data is written into the second writable sub-area starting from a first address corresponding to the first index information in the second writable sub-area.
6. The method according to claim 5, characterized in that The method further comprises: According to the first byte number, the index information corresponding to the second writable sub-area is updated from the first index information to the second index information, wherein the second index information represents the sum of the offset byte number represented by the first index information and the first byte number.
7. The method according to claim 1, characterized in that The second region comprises a second readable sub-region, The method further comprises: Obtain a second instruction, where the second instruction is used to instruct to read second data of a second number of bytes from the second readable sub-area; determining a read type of the second instruction; In a case where the read type of the second instruction is a sequential read type, processing the second readable sub-region in a first manner; When the read type of the second instruction is a random read type, the second readable sub-region is processed in a second manner.
8. The method according to claim 7, characterized in that The adopting the first method to process the second readable sub-region includes: Acquire third index information corresponding to the second readable sub-region, where the third index information indicates the offset byte number between the start address of the second readable sub-region and the start address of the second region; Reading the second data of the second number of bytes from the second readable sub-area according to the third index information; The index information corresponding to the second readable sub-region is updated from the third index information to the fourth index information; wherein the fourth index information indicates the sum of the offset byte number indicated by the third index information and the second byte number.
9. The method according to claim 7, characterized in that: The adopting the second method to process the second readable sub-region includes: Acquire third index information corresponding to the second readable sub-region, and acquire read index information from the second instruction; Reading the second data of the second number of bytes from the second readable sub-area according to the read index information; The index information corresponding to the second readable sub-region is maintained as the third index information.
10. The method according to claim 1, characterized in that The second region comprises a second readable sub-region, The method further comprises: Get the number of bytes corresponding to the second readable sub-area; comparing the number of bytes corresponding to the first area with the number of bytes corresponding to the second readable sub-area; When the number of bytes corresponding to the first region is greater than the number of bytes corresponding to the second readable sub-region, the second region is reduced to a third region, wherein the number of bytes corresponding to the third region is less than or equal to the number of bytes corresponding to the second region.
11. The method according to claim 10, characterized in that The determining of the third area from the memory includes: Acquire a third byte number of the third data stored in the second readable sub-area; When the third number of bytes is non-zero, determining a third region from the memory according to the number of bytes corresponding to the first region, wherein the number of bytes corresponding to the third region is the same as the number of bytes corresponding to the first region; When the third byte number is zero, the second area is reduced to a third area according to the byte number corresponding to the second area, wherein the byte number corresponding to the third area is the same as the byte number corresponding to the second area.
12. The method according to claim 11, characterized in that When the third byte number is non-zero, the third area includes a third readable sub-area and a third writable sub-area, wherein the byte number corresponding to the third readable sub-area is the same as the byte number corresponding to the second readable sub-area.
13. The method according to claim 12, characterized in that The method further comprises: The third data is written into the third readable sub-area.
14. The method according to claim 11, characterized in that In the case that the third byte number is zero, the third area includes a third writable sub-area, and the number of bytes corresponding to the third writable sub-area is the same as the number of bytes corresponding to the second area.
15. An electronic device, characterized in that: include: A memory, used to store instructions executed by one or more processors of the electronic device, and a processor, which is one of the one or more processors of the electronic device, used to execute the binary data processing method described in any one of claims 1-14.
16. A readable storage medium, characterized in that: The readable storage medium stores instructions, and when the instructions are executed on an electronic device, the electronic device executes the binary data processing method according to any one of claims 1 to 14.
17. A computer program product, characterized in that The computer program product comprises computer instructions, and when executed by an electronic device, the electronic device executes the computer program code of the binary data processing method according to any one of claims 1 to 14.
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