Processor, register address updating method, access method and electronic equipment

Abstract

The invention provides a processor, a register address updating method, an access method and electronic equipment. The processor comprises a plurality of hardware modules. The storage module is used for storing a base address table of the hardware module; the hardware module base address table is used for storing a hardware module base address of each hardware module; each hardware module comprises at least one register which can be accessed by software; a compensation address of each register needing to be accessed and a hardware module base address acquisition module are configured in the software; the hardware module base address acquisition module is used for acquiring a hardware module base address of a target hardware module from the hardware module base address table; the target hardware module is a hardware module to which a register to be accessed by the software belongs; and for any register, the register address of the register is equal to the sum of the compensation address of the register and the hardware module base address of the hardware module to which the register belongs. According to the scheme, when a register is newly added to a hardware module, the forward compatibility of software is better.

Description

Technical Field

[0001] The present application relates to the field of data processing technology, and in particular to a processor, a register address updating method, an access method, and an electronic device. Background Art

[0002] With the iteration and update of hardware products, in order to ensure the forward compatibility of hardware, the ideal state is that the existing register addresses are consistent with the previous generations of products, and the newly added registers are added at the end. This will cause the registers of the same hardware module to be divided into multiple fragments, which will bring inconvenience to the subsequent reading and maintenance.

[0003] like Figure 1 As shown, due to the introduction of new functions, block a (hardware module a) needs to add a new register d (i.e. Figure 1 In block_a_reg_d marked in red, in order to keep the addresses of existing registers unchanged, the newly added registers can only be placed at the end, so that the registers of block a are "split" into two or even more segments, which brings inconvenience to the use of software and the later maintenance of hardware.

[0004] Another approach is to place the newly added registers of block a together and move the registers of block b backward as a whole, such as Figure 2 This in turn causes the address of the register of block b (hardware module b) to change, thereby destroying forward compatibility and being detrimental to software reuse and maintenance.

[0005] It is also a common solution to reserve "enough" space when designing each block (hardware module). However, at the beginning of hardware design, it is difficult to predict new functions to be introduced in the future, and the reserved space can only be estimated. However, if the reserved space is too large, it will cause a waste of address space, which is not friendly to embedded systems that are sensitive to address space; if the reserved space is too small, the problems described above will occur. Summary of the invention

[0006] The purpose of the embodiments of the present application is to provide a processor, a register address updating method, an access method, and an electronic device to solve the problem of poor forward compatibility of software when adding new registers in the related art.

[0007] An embodiment of the present application provides a processor, comprising: multiple hardware modules; a storage module, used to store a hardware module base address table; the hardware module base address table is used to store the hardware module base address of each of the hardware modules; each of the hardware modules includes at least one register accessible to software; the software is configured with a compensation address of each register to be accessed and a hardware module base address acquisition module; the hardware module base address acquisition module is used to obtain the hardware module base address of a target hardware module from the hardware module base address table; the target hardware module is the hardware module to which the register to be accessed by the software belongs; and for any of the registers, the register address of the register is equal to the compensation address of the register plus the hardware module base address of the hardware module to which the register belongs.

[0008] In the above implementation scheme, the register address of the register is decoupled into the hardware module base address of the hardware module to which the register belongs + the compensation address of the register. And the hardware module base address table is maintained in the processor to realize the management of the hardware module base address; and in the software, it is only necessary to configure the hardware module base address acquisition module for obtaining the hardware module base address of the target hardware module from the hardware module base address table and the compensation address of each register. Then based on this implementation method, when facing the situation that a new register needs to be added in one or some hardware modules, it is only necessary to update the hardware module base address of each hardware module located after these hardware modules in the hardware module base address table, and add the compensation address of the newly added register in the software. Then for the software, since its acquisition of the hardware module base address is always implemented based on the hardware module base address acquisition module, the change of the hardware module base address will not affect the software. And the compensation addresses of the original registers in the software do not need to be modified, so for the software, it is equivalent to that the address of the register has not changed, so that the forward compatibility of the software is guaranteed. In addition, in the scheme of the embodiment of the present application, it is not necessary to reserve address space for each hardware module in the design stage, saving address space resources.

[0009] Furthermore, the storage module stores the firmware of the processor; and the hardware module base address table is set in the firmware.

[0010] In the above implementation, by setting the hardware module base address table in the firmware, the hardware module base address of each hardware module can be read during the processor initialization process, and then the register address of the register to be accessed can be quickly converted when the software is subsequently run, thereby improving access efficiency.

[0011] Furthermore, the processor is a graphics processor.

[0012] An embodiment of the present application also provides a register address updating method, comprising: when there is a change in a register in any hardware module of a processor, updating the hardware module base address of each hardware module located after the hardware module in the hardware module base address table according to the address size of the changed register; wherein the processor is any of the aforementioned processors; and updating the compensation address of the changed register in the software.

[0013] In the above implementation, when there is a change in the register in any hardware module of the processor, such as when a new one is added, the register address of each register in the same hardware module can be realized to be continuous by updating the hardware module base address of each hardware module located after the hardware module in the hardware module base address table according to the address size of the changed register, and updating the compensation address of the changed register in the software. At the same time, since the acquisition of the hardware module base address by the software is always based on the hardware module base address acquisition module, the change of the hardware module base address will not affect the software. The compensation address of each register in the software does not need to be modified, so for the software, it is equivalent to the address of the register has not changed, so that the forward compatibility of the software is guaranteed. In addition, the change of the register address of each register can be directly realized by modifying the hardware module base address of each hardware module in the hardware module base address table, and updating the compensation address of the changed register in the software, so it is not necessary to reserve address space for each hardware module in the design stage, saving address space resources.

[0014] Furthermore, when the change is to a newly added register, the hardware module base addresses of the hardware modules located after the hardware module in the hardware module base address table are updated according to the address size of the changed register, including: according to the address size of the newly added register, the hardware module base addresses of the hardware modules located after the hardware module in the hardware module base address table are increased by the address size of the newly added register to obtain the updated hardware module base address table.

[0015] In the above implementation, when a new register is added, the hardware module base address of each hardware module located after the hardware module in the hardware module base address table is increased by the address size of the newly added register. This is equivalent to uniformly increasing the register addresses of all registers of each hardware module located after the hardware module by the address size of the newly added register, thereby reserving address space for the newly added register, and there is no need to modify the compensation addresses of the registers of each hardware module located after the hardware module in the software, which is very friendly to the software.

[0016] Further, when the change is to a newly added register, updating the compensation address of the changed register in the software includes: adding the compensation address of the newly added register in the software.

[0017] In the above implementation, when adding a new register, only the compensation address of the new register needs to be added at the software level, and the compensation addresses of the original registers do not need to be modified, so that the software reason logic will not be affected. Therefore, it is very friendly to the software and reduces the impact of the new register on software compatibility.

[0018] Furthermore, when the change is to remove a register, the hardware module base addresses of each hardware module located after the hardware module in the hardware module base address table are updated according to the address size of the changed register, including: according to the address size of the removed register, the hardware module base addresses of each hardware module located after the hardware module in the hardware module base address table are reduced by the address size of the removed register to obtain an updated hardware module base address table.

[0019] In the above implementation, when removing a register, the address size of the removed register is subtracted from the hardware module base address of each hardware module located after the hardware module in the hardware module base address table. This is equivalent to uniformly reducing the register addresses of all registers of each hardware module located after the hardware module by the address size of the removed register, thereby making the register addresses continuous and there is no need to modify the compensation addresses of the registers of each hardware module located after the hardware module in the software, which is very friendly to the software.

[0020] Further, when the change is to remove a register, updating the compensation address of the changed register in the software includes: deleting the compensation address of the removed register in the software.

[0021] In the above implementation, when removing a register, at the software level, only the compensation address of the newly added register needs to be removed, and the compensation addresses of the original registers do not need to be modified, so that the software reason logic will not be affected. Therefore, it is very friendly to the software and reduces the impact of removing the register on software compatibility.

[0022] An embodiment of the present application also provides a method for accessing registers in a processor, wherein the processor is any one of the aforementioned processors; the method is implemented by the software; the method includes: obtaining the hardware module base address table; obtaining the hardware module base address of the target hardware module to which the register currently to be accessed belongs from the hardware module base address table; adding the compensation address of the register currently to be accessed to the hardware module base address of the target hardware module to obtain the register address of the register currently to be accessed; and accessing the register currently to be accessed according to the register address.

[0023] In the above implementation, by obtaining the hardware module base address of the target hardware module to which the currently accessed register belongs, and then adding the compensation address of the currently accessed register to the hardware module base address of the target hardware module, the register address of the currently accessed register is obtained, and effective access to the currently accessed register can be achieved. And based on the register address determination mechanism of the hardware module base address + the compensation address of the register, when a new register needs to be added to the hardware module, it is only necessary to update the hardware module base address of each hardware module located after these hardware modules in the hardware module base address table, and add the compensation address of the newly added register in the software, which is very friendly to the software, and the forward compatibility of the software is guaranteed.

[0024] An embodiment of the present application also provides an electronic device, comprising any of the above-mentioned processors. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments of the present application will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0026] Figure 1 An example diagram of placing a newly added register at the end provided in the related art;

[0027] Figure 2 This is an example diagram provided in the related art of placing newly added registers of block a in a centralized manner and moving the registers of block b backward as a whole;

[0028] Figure 3 A schematic diagram of the basic structure of a processor provided in an embodiment of the present application;

[0029] Figure 4 A schematic diagram of a processor structure in which a hardware module base address table is set in firmware according to an embodiment of the present application;

[0030] Figure 5 A flowchart of a register address updating method provided in an embodiment of the present application;

[0031] Figure 6 A flowchart of a method for accessing registers in a processor provided in an embodiment of the present application;

[0032] Figure 7 A schematic diagram comparing an existing register address representation structure provided in an embodiment of the present application and a register address representation structure in the present application;

[0033] Figure 8 A schematic diagram comparing a hardware module base address table and a register compensation address before and after updating when a new register is added according to an embodiment of the present application. DETAILED DESCRIPTION

[0034] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

[0035] In order to solve the problem of poor forward compatibility of software when adding new registers in the related art, a processor is provided in the embodiment of the present application. Figure 3 As shown, Figure 3 This is a schematic diagram of the structure of the processor provided in an embodiment of the present application, including multiple hardware modules and a storage module.

[0036] Wherein, the storage module is used to store the hardware module base address table.

[0037] The hardware module base address table is used to store the hardware module base address of each hardware module.

[0038] Each hardware module includes at least one register accessible to software.

[0039] In an embodiment of the present application, the software is configured with a compensation address of each register to be accessed and a hardware module base address acquisition module. The hardware module base address acquisition module is used to obtain the hardware module base address of the target hardware module from the hardware module base address table. Among them, the target hardware module is the hardware module to which the register to be accessed by the software belongs.

[0040] It can be understood that in the embodiment of the present application, the hardware module base address acquisition module can be implemented by a calling program pointing to the storage module.

[0041] In the embodiment of the present application, the storage module may be, but is not limited to, a memory, flash, or other storage medium that can be used to store programs.

[0042] In the embodiment of the present application, for any register, the register address of the register is equal to the compensation address of the register plus the hardware module base address of the hardware module to which the register belongs.

[0043] It can be understood that in some scenarios, in order to facilitate memory access management, register access is based on the base address of the entire storage space + the offset address of the register to achieve memory access to the register. Among them, the base address is the basic address of the entire storage space, and the offset address of the register is the register address described in the embodiment of this application.

[0044] In the embodiment of the present application, facing the above scenario, the offset address of the register is decoupled into the hardware module base address and the compensation address of the register, which are set in the hardware module base address table of the processor and in the software respectively. In the face of the above scenario, when accessing the register, the offset address of the register is obtained based on the compensation address of the register to be accessed plus the hardware module base address of the hardware module to which the register to be accessed belongs, and then the actual address of the register is determined by combining the offset address of the register and the base address of the entire storage space, and then the access is performed.

[0045] In the embodiments of the present application, a hardware module refers to a module in a processor that implements a certain function, for example, a computing module that implements a computing function, such as an SP (stream processor), etc.; another example is a page table translation unit that implements page table translation; another example is a video editing unit that performs video editing; another example is a data transfer unit that performs data transfer, such as DMA (direct memory access), etc.

[0046] Then based on the above processor, when facing the situation that a new register needs to be added in one or some hardware modules, it is only necessary to update the hardware module base address of each hardware module located after these hardware modules in the hardware module base address table, and add the compensation address of the newly added register in the software. Then for the software, since its acquisition of the hardware module base address is always implemented based on the hardware module base address acquisition module, the change of the hardware module base address will not affect the software. And the compensation addresses of the original registers in the software do not need to be modified, so for the software, it is equivalent to the address of the register has not changed, so that the forward compatibility of the software is guaranteed. In addition, in the scheme of the embodiment of the present application, it is not necessary to reserve address space for each hardware module in the design stage, saving address space resources.

[0047] In a feasible implementation of the embodiment of the present application, the storage module may store the firmware of the processor, and the hardware module base address table may be set in the firmware, for example Figure 4In this way, by setting the hardware module base address table in the firmware, the hardware module base address of each hardware module can be read during the processor initialization process, and then the register address of the register to be accessed can be quickly converted when the software is subsequently run, thereby improving access efficiency.

[0048] It can be understood that in some other feasible implementations of the embodiments of the present application, the hardware module base address table can also be stored and maintained independently of the firmware.

[0049] In the embodiment of the present application, the processor may be, but is not limited to, a central processing unit (CPU), a graphics processing unit (GPU), a general-purpose graphics processing unit (GPGPU), or other processors that have register address management and maintenance requirements.

[0050] The embodiment of the present application also provides a register address updating method based on the aforementioned processor, see Figure 5 As shown, including:

[0051] S501: When a register in any hardware module of the processor is changed, the hardware module base addresses of the hardware modules after the hardware module in the hardware module base address table are updated according to the address size of the changed register.

[0052] S502: Update the compensation address of the changed register in software.

[0053] In this way, when there is a change in the register in any hardware module of the processor, such as when a new one is added, the register address of each register in the same hardware module can be realized to be continuous by updating the hardware module base address of each hardware module located after the hardware module in the hardware module base address table according to the address size of the changed register, and updating the compensation address of the changed register in the software. At the same time, since the acquisition of the hardware module base address by the software is always based on the hardware module base address acquisition module, the change of the hardware module base address will not affect the software. The compensation address of each register in the software does not need to be modified, so for the software, it is equivalent to the address of the register has not changed, so that the forward compatibility of the software is guaranteed. In addition, the change of the register address of each register can be directly realized by modifying the hardware module base address of each hardware module in the hardware module base address table, and updating the compensation address of the changed register in the software, so it is not necessary to reserve address space for each hardware module in the design stage, saving address space resources.

[0054] It can be understood that in the embodiment of the present application, there are two situations in which registers are changed, one is adding a new register, and the other is reducing a register (ie, removing a register, which usually rarely occurs).

[0055] In an embodiment of the present application, when faced with a situation where a new register is added due to the introduction of a new function in a hardware module, the hardware module base address of each hardware module located after the hardware module in the hardware module base address table can be increased by the address size of the new register according to the address size of the new register to obtain an updated hardware module base address table.

[0056] For example, it is assumed that the hardware module base address table sequentially maintains the hardware module base addresses of hardware module 1, hardware module 2, and hardware module 3, which are recorded as A, B, and C respectively. It is assumed that a new register is added to hardware module 1, and its address size is a, then a can be added to B and C respectively, and the hardware module base addresses in the updated hardware module base address table are A, B+a, and C+a respectively.

[0057] This is equivalent to uniformly increasing the register addresses of all registers of the hardware modules located after the hardware module by the address size of the newly added register, thereby reserving address space for the newly added register, and there is no need to modify the compensation addresses of the registers of the hardware modules located after the hardware module in the software, which is very friendly to the software.

[0058] In the embodiment of the present application, when a new register is added due to the introduction of a new function in a hardware module, a compensation address of the new register may also be added in the software.

[0059] Exemplarily, assuming that there are originally three registers in the hardware module 1, and the register addresses of the three registers are A, A+a, and A+2a, respectively, then the compensation address of the newly added register in the software is 3a.

[0060] In this way, when adding a new register, at the software level, only the compensation address of the new register needs to be increased, and the compensation addresses of the original registers do not need to be modified, which will not affect the software reasoning logic. Therefore, it is very friendly to the software and reduces the impact of the new register on software compatibility.

[0061] In some optional implementations of the embodiments of the present application, when faced with a situation where a register is removed due to a function change in a hardware module, the hardware module base address of each hardware module located after the hardware module in the hardware module base address table can be reduced by the address size of the removed register based on the address size of the removed register to obtain an updated hardware module base address table.

[0062] For example, it is assumed that the hardware module base address table sequentially maintains the hardware module base addresses of hardware module 1, hardware module 2, and hardware module 3, which are recorded as A, B, and C respectively. It is assumed that a register is removed from hardware module 2, and its address size is b, then b can be subtracted from C respectively, and A and B are kept unchanged, and the hardware module base addresses in the updated hardware module base address table are A, B, and Cb respectively.

[0063] This is equivalent to uniformly reducing the register addresses of all registers of the hardware modules located after the hardware module by the address size of the removed register, thereby making the register addresses continuous and there is no need to modify the compensation addresses of the registers of the hardware modules located after the hardware module in the software, which is very friendly to the software.

[0064] Accordingly, in the case where registers are removed due to functional changes in a hardware module, the compensation addresses of the removed registers can be deleted in software.

[0065] In some optional implementations of the embodiments of the present application, when registers are removed due to functional changes in a hardware module, the hardware module base address table may not be changed, and only the compensation address of the removed register may be deleted in the software.

[0066] In the embodiment of the present application, the updating of the hardware module base addresses of the hardware modules located after the hardware module in the hardware module base address table in step S501 can be manually modified by engineers when designing hardware modules with changed functions.

[0067] In the embodiment of the present application, the operation of updating the compensation address of the changed register in the software in step S502 can be updated by the software developer or maintainer.

[0068] The embodiment of the present application also provides a method for accessing registers in a processor based on the aforementioned processor. The method is implemented by the software described above. Figure 6 As shown, the methods for accessing registers within the processor include:

[0069] S601: Obtain a hardware module base address table.

[0070] In the embodiment of the present application, the hardware module base address table can be read from the storage module of the processor by the hardware module base address acquisition module in the software.

[0071] S602: Obtain a hardware module base address of a target hardware module to which the register currently to be accessed belongs from a hardware module base address table.

[0072] In the embodiment of the present application, the hardware module base address of the target hardware module can be read from the hardware module base address table based on the target hardware module to which the register to be currently accessed belongs.

[0073] S603: Add the compensation address of the register to be currently accessed to the hardware module base address of the target hardware module to obtain the register address of the register to be currently accessed.

[0074] S604: Access the current register to be accessed according to the register address.

[0075] It can be understood that when register access is based on the base address of the entire storage space + the offset address of the register, the register address obtained in step S603 is actually the offset address of the register. In step S604, it is necessary to obtain the access address of the current register to be accessed based on the base address of the entire storage space + the offset address of the register, and then access is performed based on the access address.

[0076] To facilitate understanding of the solution of the embodiment of the present application, an example is given below for explanation:

[0077] like Figure 7 As shown, the existing register address management scheme is to directly define the name of each register and its corresponding register address. The register address is a complete address, for example, the address of block_b_reg_a (register a in hardware module b) is 0x100c. However, using the scheme of the present application, the address of block_b_reg_a can be disassembled into: block_b_base (hardware module base address of hardware module b) + offset_in_block_b_reg_a (compensation address of register a in hardware module b) = 0x100c + 0x000 = 0x100c. The register address is still accurate after disassembly.

[0078] In the embodiment of the present application, BBART (i.e., hardware module base address table) is introduced into the processor to store blockbase (hardware module base address). BBART is initialized by hardware firmware. The driver of the processor reads BBART during the initialization process and converts the offset in block (register compensation address) into the register address when accessing the register. For register changes that occur during hardware evolution, the solution process can refer to Figure 8 Example shown.

[0079] Figure 8In the example, due to the introduction of new functions, the block a module needs to add a new register d. The engineer first adjusted the BBART in the firmware in hardware, adjusting block_b_base to 0x1010 to reserve address space for the newly added register d. At the same time, the offset in block definition of register d is added to 0x000c in the software. When the software accesses the block b register, it first reads the BBART table from the hardware, and then uses block_b_base (the base address of hardware module b) + offsetin block to calculate the specific address. Since the offset in block of block b has not changed, and the software obtains block_b_base by reading BBART, it is not sensitive to changes in block_b_base. Therefore, for the software, it is equivalent to the register address of each register not changing, and forward compatibility can be guaranteed.

[0080] Based on the same inventive concept, an embodiment of the present application also provides an electronic device, which includes the processor provided by the present application.

[0081] It can be understood that the electronic device can be a host, a server, a computer and other devices.

[0082] It is also understood that the electronic device may include more components. For example, there may be multiple processors (for example, including both a CPU and a GPU), and the electronic device may also have an internal communication bus for realizing communication between multiple processors, such as realizing communication between a GPU and a CPU; for another example, it may also have an external communication interface, such as a USB (Universal Serial Bus) interface, a CAN (Controller Area Network) bus interface, etc.; for another example, it may also have an information display component such as a display screen, but this is not a limitation.

[0083] In the embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some communication interfaces, and the indirect coupling or communication connection of the devices or units can be electrical, mechanical or other forms.

[0084] In addition, the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0085] Furthermore, the functional modules in the various embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

[0086] In this document, relational terms such as first and second, etc. are used merely to distinguish one entity or operation from another entity or operation, but do not necessarily require or imply any such actual relationship or order between these entities or operations.

[0087] As used herein, a plurality refers to two or more than two.

[0088] The above description is only an embodiment of the present application and is not intended to limit the protection scope of the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A processor, characterized in that: include: Multiple hardware modules; A storage module, used for storing a hardware module base address table; The hardware module base address table is used to store the hardware module base address of each hardware module; Each of the hardware modules includes at least one register accessible to the software; the software is configured with the compensation address of each register to be accessed and a hardware module base address acquisition module; the hardware module base address acquisition module is used to obtain the hardware module base address of the target hardware module from the hardware module base address table; the target hardware module is the hardware module to which the register to be accessed by the software belongs; and for any of the registers, the register address of the register is equal to the compensation address of the register plus the hardware module base address of the hardware module to which the register belongs.

2. The processor according to claim 1, wherein: The storage module stores the firmware of the processor; the hardware module base address table is set in the firmware.

3. The processor according to claim 1 or 2, characterized in that The processor is a graphics processor.

4. A register address updating method, characterized in that: include: When a register in any hardware module of the processor is changed, the hardware module base addresses of the hardware modules located after the hardware module in the hardware module base address table are updated according to the address size of the changed register; wherein the processor is the processor according to any one of claims 1 to 3; And, updating the compensation address of the changed register in the software.

5. The register address updating method according to claim 4, characterized in that: When the change is to a newly added register, the hardware module base addresses of the hardware modules after the hardware module in the hardware module base address table are updated according to the address size of the changed register, including: According to the address size of the newly added register, the hardware module base address of each hardware module located after the hardware module in the hardware module base address table is increased by the address size of the newly added register to obtain an updated hardware module base address table.

6. The register address updating method according to claim 4, characterized in that: When the change is to add a new register, updating the compensation address of the changed register in the software includes: Add the compensation address of the newly added register in the software.

7. The register address updating method according to claim 4, characterized in that: When the change is to remove the register, updating the hardware module base address of each hardware module located after the hardware module in the hardware module base address table according to the address size of the changed register includes: According to the address size of the removed register, the hardware module base address of each hardware module located after the hardware module in the hardware module base address table is reduced by the address size of the removed register to obtain an updated hardware module base address table.

8. The register address updating method according to claim 4, characterized in that: When the change is to remove a register, updating the compensation address of the changed register in the software includes: The compensation address of the removed register is deleted in the software.

9. A method for accessing a register in a processor, characterized in that: The processor is a processor according to any one of claims 1 to 3; the method is implemented by the software; the method comprises: Obtaining the hardware module base address table; Acquire the hardware module base address of the target hardware module to which the register currently to be accessed belongs from the hardware module base address table; Adding the compensation address of the current register to be accessed to the hardware module base address of the target hardware module to obtain the register address of the current register to be accessed; The current register to be accessed is accessed according to the register address.

10. An electronic device, characterized in that: Comprising a processor as claimed in any one of claims 1 to 3.

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