Display panel, driving method thereof and display device

Abstract

The invention provides a display panel, a driving method thereof and a display device, and relates to the technical field of display. And a cathode power supply signal transmitted by the power supply signal line is respectively transmitted to the cathode of the light-emitting element, the control end of the driving module and / or the anode of the light-emitting element in different working periods of the pixel circuit. In other words, the reset signal provided by the first reset module to the control end of the driving module is a cathode power supply signal, and / or the reset signal provided by the second reset module to the anode of the light-emitting element is a cathode power supply signal. By means of the design, at least one reset signal line is omitted from the display panel, wiring of the display panel is reduced, wiring is not too compact, the problems that electric leakage, crosstalk and the like are possibly amplified when wiring is too compact are solved, and the display effect of the display panel is improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a driving method thereof, and a display device. Background Art

[0002] As a new generation of display technology, OLED (Organic Light-Emitting Diode) has higher contrast, faster response speed and wider viewing angle, and has been widely used in the field of high-performance display.

[0003] High resolution is a trend in current display technology. The higher the resolution, the smaller the pixels and pixel circuits need to be to ensure that the display panel can accommodate more pixels. As the size of pixel circuits continues to shrink, more circuit components are needed to solve problems such as leakage and crosstalk.

[0004] Obviously, as the size of pixel circuits continues to shrink and the number of circuit devices continues to increase, the space available for wiring in the display panel is getting smaller and smaller. When the wiring is too compact, it may amplify problems such as leakage and crosstalk, thereby affecting the display performance of the display panel.

[0005] Therefore, how to optimize the wiring method of the display panel is a technical problem that needs to be solved urgently by those skilled in the art. Summary of the invention

[0006] In view of the above problems, the present application provides a display panel and a driving method thereof, and a display device.

[0007] The specific plan is as follows:

[0008] A first aspect of the present application provides a display panel, the display panel comprising:

[0009] Pixel circuit and light emitting element;

[0010] The pixel circuit includes a driving module, a first reset module and a second reset module; the first reset module is electrically connected to the control end of the driving module, the second reset module is electrically connected to the anode of the light-emitting element, the cathode of the light-emitting element is electrically connected to the power signal line, and the power signal line is used to transmit the cathode power signal;

[0011] The reset signal provided by the first reset module to the control end of the driving module is the cathode power signal, and / or the reset signal provided by the second reset module to the anode of the light emitting element is the cathode power signal.

[0012] A second aspect of the present application provides a method for driving a display panel, wherein the method for driving a display panel includes:

[0013] In the reset stage, the first reset module is controlled to be in working state to input the cathode power signal to the control end of the driving module; and / or the second reset module is controlled to be in working state to input the cathode power signal to the anode of the light-emitting element.

[0014] A third aspect of the present application provides a display device, which includes the display panel described above.

[0015] By means of the above technical solution, the present application provides a display panel and a driving method thereof, and a display device, wherein the cathode power signal transmitted by the power signal line is transmitted to the cathode of the light-emitting element, the control end of the driving module and / or the anode of the light-emitting element in different working periods of the pixel circuit. In other words, the reset signal provided by the first reset module to the control end of the driving module is a cathode power signal, and / or the reset signal provided by the second reset module to the anode of the light-emitting element is a cathode power signal. Under such a design, the display panel will save at least one reset signal line, reduce the wiring of the display panel, and prevent the wiring from being too compact, thereby solving the problems of leakage and crosstalk that may be amplified when the wiring is too compact, and improving the display effect of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The above and other features, advantages and aspects of the embodiments of the present disclosure will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings. Throughout the accompanying drawings, the same or similar reference numerals represent the same or similar elements. It should be understood that the drawings are schematic and the originals and elements are not necessarily drawn to scale.

[0017] Figure 1 A schematic diagram of the structure of a display panel provided by an embodiment of the present invention;

[0018] Figure 2 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0019] Figure 3 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0020] Figure 4 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0021] Figure 5 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0022] Figure 6 A schematic diagram of the working timing of a pixel circuit provided by an embodiment of the present invention;

[0023] Figure 7A schematic cross-sectional view of a display panel provided by an embodiment of the present invention;

[0024] Figure 8 A schematic cross-sectional view of another display panel provided by an embodiment of the present invention;

[0025] Fig. 9 A schematic cross-sectional view of another display panel provided by an embodiment of the present invention;

[0026] Fig.10 A schematic flow chart of a method for driving a display panel provided by an embodiment of the present invention;

[0027] Fig.11 A schematic structural diagram of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0028] The embodiments of the present application are described below in conjunction with the drawings in the embodiments of the present application. The terms used in the implementation mode of the present application are only used to explain the specific embodiments of the present application, and are not intended to limit the present application. It is known to those skilled in the art that with the development of technology and the emergence of new scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0029] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0030] refer to Figure 1 , Figure 1 A schematic diagram of a display panel according to an embodiment of the present invention is provided. Figure 2 , Figure 2 A schematic diagram of another display panel provided by an embodiment of the present invention, referring to Figure 3 , Figure 3 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention. The display panel provided by an embodiment of the present invention comprises: a pixel circuit 100 and a light emitting element Q.

[0031] The pixel circuit 100 includes a driving module 11, a first reset module 12 and a second reset module 13; the first reset module 12 is electrically connected to the control end of the driving module 11, the second reset module 13 is electrically connected to the anode of the light-emitting element Q, the cathode of the light-emitting element 1 is electrically connected to the power signal line L1, and the power signal line L1 is used to transmit the cathode power signal PVEE.

[0032] The reset signal provided by the first reset module 12 to the control end of the driving module 11 is the cathode power signal PVEE, and / or the reset signal provided by the second reset module 13 to the anode of the light emitting element Q is the cathode power signal PVEE.

[0033] Specifically, in the embodiment of the present invention, the driving module 11 is coupled to the light emitting element Q, and after the driving module 11 is turned on, the driving current is provided to the light emitting element Q, and the light emitting element Q emits light in response to the driving current. In order to ensure the display effect of the display panel, before the light emitting element Q emits light, the driving module 11 needs to be reset, and / or the anode of the light emitting element Q needs to be reset, so as to ensure that the state of the driving module 11 and / or the state of the light emitting element Q are adjusted to the best before the next light emission.

[0034] During the invention of the present application, it was found that a power signal line L1, a first reset signal line and a second reset signal line are provided on the non-display area of ​​the existing display panel. The power signal line L1 is used to provide a cathode power signal PVEE required by the cathode of the light-emitting element Q (the voltage value represented by the cathode power signal ranges from -2.5 volts to -4.0 volts), the first reset signal line is used to provide a reset signal for resetting the driving module 11 (the voltage value represented by the reset signal is approximately -3.5 volts), and the second reset signal line is used to provide a reset signal for resetting the anode of the light-emitting element Q (the voltage value represented by the reset signal is approximately -3.5 volts).

[0035] The power signal line L1 is electrically connected to the cathode of the light emitting element Q, the first reset signal line is electrically connected to the first reset module 12, and the second reset signal line is electrically connected to the second reset module 13. In other words, the existing display panel outputs the cathode power signal PVEE to the cathode of the light emitting element Q through the power signal line L1; outputs the corresponding reset signal to the first reset module 12 through the first reset signal line, and then transmits it to the driving module 11; outputs the corresponding reset signal to the second reset module 13 through the second reset signal line, and then transmits it to the anode of the light emitting element Q.

[0036] It can be seen that the existing display panel is provided with at least three signal lines, namely, the power signal line L1 , the first reset signal line and the second reset signal line.

[0037] In the invention process of the present application, it is considered that the voltage represented by the reset signal transmitted on the first reset signal line and the second reset signal line is close to the voltage represented by the cathode power signal PVEE transmitted by the power signal line L1, and can be set to be consistent in voltage. Therefore, in the embodiment of the present invention, the cathode power signal PVEE transmitted by the power signal line L1 is transmitted to the cathode of the light-emitting element Q, the control end of the driving module 11 and / or the anode of the light-emitting element Q in different working periods of the pixel circuit 100. In other words, the reset signal provided by the first reset module 12 to the control end of the driving module 11 is the cathode power signal PVEE, and / or the reset signal provided by the second reset module 13 to the anode of the light-emitting element Q is the cathode power signal PVEE. Under such a design, at least one reset signal line is saved for the display panel, the wiring of the display panel is reduced, the wiring is not too compact, and the problems of leakage and crosstalk that may be amplified when the wiring is too compact are solved, thereby improving the display effect of the display panel.

[0038] Moreover, when the number of display panel wiring is reduced, the width of the non-display area of ​​the display panel can be reduced, thereby achieving a narrow frame design. At the same time, in some scenarios, it also contributes to the high-frequency display of the display panel.

[0039] like Figure 1 As shown, the cathode power signal PVEE transmitted by the power signal line L1 is transmitted to the cathode of the light-emitting element Q and the control end of the driving module 11 in different working periods of the pixel circuit 100. At this time, the first reset signal line can be omitted.

[0040] like Figure 2 As shown, the cathode power signal PVEE transmitted by the power signal line L1 is transmitted to the cathode of the light-emitting element Q and the anode of the light-emitting element Q respectively during different working periods of the pixel circuit 100. At this time, the second reset signal line can be omitted.

[0041] like Figure 3 As shown, the cathode power signal PVEE transmitted by the power signal line L1 is transmitted to the cathode of the light-emitting element Q, the control end of the driving module 11 and the anode of the light-emitting element Q in different working periods of the pixel circuit 100. At this time, the first reset signal line and the second reset signal line can be omitted.

[0042] In an optional embodiment of the present invention, reference Figure 4 , Figure 4 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention. In the embodiment of the present invention, the driving module 11 includes a driving transistor M1, and the driving transistor M1 is used to provide a driving current for the light emitting element Q.

[0043] The first reset module 12 includes a first reset transistor M2 , and a source or a drain of the first reset transistor M2 receives the cathode power signal PVEE.

[0044] The second reset module 13 includes a second reset transistor M3 , and a source or a drain of the second reset transistor M3 receives the cathode power signal PVEE.

[0045] Specifically, in the embodiment of the present invention, when the source of the first reset transistor M2 receives the cathode power signal PVEE, the drain of the first reset transistor M2 is electrically connected to the gate of the driving transistor M1; conversely, when the drain of the first reset transistor M2 receives the cathode power signal PVEE, the source of the first reset transistor M2 is electrically connected to the gate of the driving transistor 11. Similarly, when the source of the second reset transistor M3 receives the cathode power signal PVEE, the drain of the second reset transistor M3 is electrically connected to the anode of the light emitting element Q; conversely, when the drain of the second reset transistor M3 receives the cathode power signal PVEE, the source of the second reset transistor M3 is electrically connected to the anode of the light emitting element Q.

[0046] The gate of the first reset transistor M2 is used to receive the control signal S1. The control signal S1 received by the first reset transistor M2 is a pulse signal. The effective pulse of the control signal S1 controls the first reset transistor M2 to be in the on state, and the cathode power supply signal PVEE is written into the gate of the driving transistor M1 through the first reset transistor M2 to reset the gate of the driving transistor M1; the invalid pulse of the control signal S1 controls the first reset transistor M2 to be in the off state.

[0047] The gate of the second reset transistor M3 is used to receive the control signal S1. The control signal S1 received by the second reset transistor M3 is a pulse signal. The effective pulse of the control signal S2 controls the second reset transistor M3 to be in the on state, and the cathode power supply signal PVEE is written into the anode of the light emitting element Q through the second reset transistor M3 to reset the light emitting element Q; the invalid pulse of the control signal S1 controls the second reset transistor M3 to be in the off state.

[0048] In an optional embodiment of the present invention, reference Figure 5 , Figure 5A structural schematic diagram of another display panel provided in an embodiment of the present invention. In an embodiment of the present invention, the pixel circuit 100 also includes: a data write transistor M4, the data write transistor M4 is connected between the source of the driving transistor M1 and the data signal line L2, the source of the data write transistor M4 is used to receive the data signal Vdata, the drain of the data write transistor M4 is connected to the source of the driving transistor M1, and the gate of the data write transistor M4 is used to receive the control signal S2. Among them, the control signal S2 received by the data write transistor M4 is a pulse signal, and the effective pulse of the control signal S2 controls the data write transistor M4 to be in a conductive state to provide the data signal Vdata to the driving transistor M1; the invalid pulse of the control signal S2 controls the data write transistor M4 to be in a turned-off state. Therefore, under the control of the control signal S2, the data write transistor M4 selectively provides the data signal Vdata to the driving transistor M1.

[0049] like Figure 5 As shown, in the embodiment of the present invention, the pixel circuit 100 further includes: a compensation transistor M5, which is used to compensate for the threshold voltage of the driving transistor M1. The source of the compensation transistor M5 is connected to the gate of the driving transistor M1, the drain of the compensation transistor M5 is connected to the drain of the driving transistor M1, and the gate of the compensation transistor M5 is used to receive the control signal S2. The control signal S2 received by the compensation transistor M5 is a pulse signal. The effective pulse of the control signal S2 controls the compensation transistor M5 to be in the on state to compensate for the threshold voltage of the driving transistor M1; the invalid pulse of the control signal S2 controls the compensation transistor M5 to be in the off state. Therefore, under the control of the control signal S2, the compensation transistor M5 selectively compensates for the threshold voltage of the driving transistor M1.

[0050] like Figure 5 As shown, in the embodiment of the present invention, the pixel circuit 100 also includes: a first transistor M6 and a second transistor M7, the first transistor M6 is connected between the signal line transmitting the anode power signal PVDD and the source of the driving transistor M1, and the second transistor M7 is connected between the drain of the driving transistor M1 and the light-emitting element Q, and is used to control whether the pixel circuit 100 is in the light-emitting stage or the non-light-emitting stage.

[0051] The gates of the first transistor M6 and the second transistor M7 simultaneously receive the control signal EM. Under the control of the control signal EM, the first transistor M6 and the second transistor M7 are in an on state or an off state. The control signal EM received by the gate of the second transistor M7 is a pulse signal. In the light-emitting stage, the control signal EM outputs a valid pulse to control the first transistor M6 and the second transistor M7 to be in an on state, so that the driving current provided by the driving transistor M1 flows into the light-emitting element Q to make it emit light; in the non-light-emitting stage, the control signal EM outputs an invalid pulse to control the first transistor M6 and the second transistor M7 to be in an off state, so that the light-emitting element Q does not emit light.

[0052] like Figure 5 As shown, in the embodiment of the present invention, the pixel circuit 100 further includes: a storage capacitor C1, a first plate of the storage capacitor C1 is connected to a signal line transmitting an anode power signal PVDD, and a second plate of the storage capacitor C1 is connected to a gate of the driving transistor M1.

[0053] It should be noted that the transistors used in all embodiments of the present application may be thin film transistors or field effect transistors or other devices with the same characteristics. Since the source and drain of the transistors used here are symmetrical, their source and drain are interchangeable. In the embodiment of the present invention, in order to distinguish the two poles of the transistor other than the gate, one of the poles is called the source and the other is called the drain. In addition, the transistors used in the embodiments of the present application may include P-type transistors and / or N-type transistors. Among them, the P-type transistor is turned on when the signal received by the gate is a low-level signal, and is turned off when the signal received by the gate is a high-level signal; the N-type transistor is turned on when the signal received by the gate is a high-level signal, and is turned off when the signal received by the gate is a low-level signal.

[0054] It should be further explained that if Figure 5 The transistors in the pixel circuit shown in the embodiment of the present invention are all described by taking P-type transistors as an example. That is, the effective pulse of the control signal is the pulse corresponding to the low level period, and the invalid pulse of the control signal is the pulse corresponding to the high level period.

[0055] It should be further explained that Figure 4 and Figure 5 In the pixel circuit 100 shown, the first reset transistor M2 and the second reset transistor M3 both receive the cathode power supply signal PVEE, and thus the first reset transistor M2 and the second reset transistor M3 receive the same control signal S1. Obviously, in some other embodiments, the control signals received by the first reset transistor M2 and the second reset transistor M3 may be different.

[0056] based on Figure 5 The pixel circuit shown in Figure 2 is shown in Figure 2. Figure 6 , Figure 6 A schematic diagram of the working timing of a pixel circuit provided by an embodiment of the present invention.

[0057] In the reset stage T1, the control signal S1 is at a low level, and the first reset transistor M2 and the second reset transistor M3 are in the on state; the control signal S2 is at a high level, and the data writing transistor M4 and the compensation transistor M5 are in the off state; at this time, the cathode power supply signal PVEE is written into the gate of the driving transistor M1 and the anode of the light-emitting element Q to achieve the reset of the gate of the driving transistor M1 and the reset of the anode of the light-emitting element Q.

[0058] In the data writing stage T2, the control signal S1 is given a high level, and the first reset transistor M2 and the second reset transistor M3 are in the off state; the control signal S2 is given a low level, and the data writing transistor M4 and the compensation transistor M5 are in the on state; at this time, the data signal Vdata is written into the gate of the driving transistor M1, and the threshold voltage of the driving transistor M1 is compensated.

[0059] In the light-emitting stage T3, the control signal EM is at a low level, and the first transistor M6 and the second transistor M7 are in the on state; the control signal S1 and the control signal S2 are at a high level, and the first reset transistor M2, the second reset transistor M3, the data writing transistor M4 and the compensation transistor M5 are in the off state; at this time, the light-emitting element Q responds to the driving current provided by the driving transistor M1 to emit light.

[0060] It should be noted that the pixel circuits in the display panel are in various forms. Figure 5 The pixel circuit 100 shown is only one type of pixel circuit used in the display panel provided in the embodiment of the present application, and the same improvement can be made to other types of pixel circuits.

[0061] In an optional embodiment of the present invention, reference Figure 7 , Figure 7 A cross-sectional schematic diagram of a display panel provided by an embodiment of the present invention, referring to Figure 8 , Figure 8 A cross-sectional schematic diagram of another display panel provided by an embodiment of the present invention, referring to Fig. 9 , Fig. 9 A cross-sectional schematic diagram of another display panel provided by an embodiment of the present invention. The display panel provided by an embodiment of the present invention further includes: a substrate 21 .

[0062] The array layer is located at one side of the substrate 21 , and thin film transistors are arranged in the array layer. The thin film transistors at least include the driving transistor M1 , the first reset transistor M2 , and the second reset transistor M3 .

[0063] The thin film transistor includes an active layer Poly, and a source electrode S and a drain electrode D which are arranged in the same layer as the active layer Poly and located at two sides of the active layer Poly.

[0064] The cathode layer 29 is located on a side of the array layer away from the substrate 21 .

[0065] Specifically, in the embodiments of the present invention, Figure 7-Figure 9 As shown, the thin film transistor in the array layer includes a first reset transistor M2 and a second reset transistor M3 as an example for explanation. The array layer also includes a first insulating layer 22 and a second insulating layer 23 to achieve bottom protection of the display panel. The array layer also includes an interlayer insulating layer 24, which serves as electrical insulation between the gate G and the source S and the drain D. The array layer also includes a gate insulating layer 25, which serves as insulation protection for the top of the gate G. The array layer also includes a passivation layer 26 to protect the inside of the array layer. The array layer also includes a planarization layer 27 and an organic layer 28.

[0066] The cathode layer 29 is located on the side of the organic layer 28 away from the substrate 21 , and the cathode layer 29 is the cathode layer of the light emitting element Q.

[0067] It should be noted that the first insulating layer 22 and the second insulating layer 23 include but are not limited to inorganic material layers or organic material layers, wherein the material of the inorganic material layer includes but is not limited to silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide or aluminum nitride, etc., and the material of the organic material layer includes but is not limited to acrylic or PI, etc. In the embodiment of the present invention, the first insulating layer 22 and the second insulating layer 23 are described by taking the inorganic material layer as an example.

[0068] In an optional embodiment of the present invention, Figure 7 As shown, the cathode layer 29 is electrically connected to the power signal line L1. The cathode layer 29 is electrically connected to the target electrode terminal of the first reset transistor M2 through the first metal layer 30, and / or, the cathode layer 29 is electrically connected to the target electrode terminal of the second reset transistor M3 through the first metal layer 30; the target electrode terminal is used to receive the cathode power signal PVEE. In the embodiment of the present invention, the source of the first reset transistor M2 is used as the target electrode terminal for explanation.

[0069] like Figure 8As shown, the cathode layer 29 is electrically connected to the power signal line L1. The cathode layer 29 is electrically connected to the target electrode terminal of the first reset transistor M2 through the first metal layer 30 and at least one second metal layer 31 in sequence, and / or, the cathode layer 29 is electrically connected to the target electrode terminal of the second reset transistor M3 through the first metal layer 30 and the at least one second metal layer 31; the target electrode terminal is used to receive the cathode power signal PVEE. In the embodiment of the present invention, the source of the second reset transistor M3 is used as the target electrode terminal for explanation.

[0070] The first metal layer 30 is described by taking the anode layer of the light emitting element Q as an example.

[0071] Specifically, in the embodiment of the present invention, the cathode layer 29 is connected to the power signal line L1, and is connected to the source of the first reset transistor M2 and the second reset transistor M3 through the anode layer and the via. The anode layer can be directly connected to the source of the first reset transistor M2 and the second reset transistor M3, such as Figure 7 The anode layer can also be indirectly connected to the source of the first reset transistor M2 and the second reset transistor M3 through other metal layers, such as Figure 8 shown.

[0072] In general, in the embodiment of the present invention, when the cathode layer 29 is connected to the power signal line L1, the source of the first reset transistor M2 and the second reset transistor M3 are directly connected to the cathode layer 29 through vias based on the film layer structure of the array layer, so that the cathode power signal PVEE is transmitted to the first reset transistor M2 and the second reset transistor M3. No additional signal line for switching is required, and there is no need to connect the first reset transistor M2 and the second reset transistor M3 to the power signal line L1, so as to further simplify the wiring method of the display panel, and the frame area of ​​the display panel is not occupied, so as to realize the narrow frame design of the display panel.

[0073] In an optional embodiment of the present invention, Fig. 9 As shown, the power signal line L1 is located between the array layer and the substrate 21 .

[0074] The power signal line L1 is electrically connected to a target electrode terminal of the first reset transistor M2 , and / or the power signal line L1 is electrically connected to a target electrode terminal of the second reset transistor M3 .

[0075] The target electrode terminal is used to receive the cathode power signal PVEE.

[0076] In the embodiment of the present invention, the source of the first reset transistor M2 is used as the target electrode terminal for example for description, and the source of the second reset transistor M3 is used as the target electrode terminal for description.

[0077] Specifically, in the embodiment of the present invention, the power signal line L1 is disposed between the array layer and the substrate 21, and then the source of the first reset transistor M2 and the second reset transistor M3 are directly connected to the power signal line L1 through vias based on the film structure of the array layer, so that the cathode power signal PVEE is transmitted to the first reset transistor M2 and the second reset transistor M3. No additional signal line for switching is required, so as to further simplify the wiring method of the display panel, and the frame area of ​​the display panel is not occupied, so as to realize the narrow frame design of the display panel.

[0078] Based on the above embodiment of the present invention, another embodiment of the present invention further provides a method for driving a display panel. Fig.10 , Fig.10 A schematic diagram of a method for driving a display panel provided by an embodiment of the present invention. Figure 6 As shown, the driving method of the display panel provided by the embodiment of the present invention includes:

[0079] S101: In the reset stage T1, the first reset module 12 is controlled to be in working state, and the cathode power signal PVEE is input to the control end of the driving module 11; and / or the second reset module 13 is controlled to be in working state, and the cathode power signal PVEE is input to the anode of the light-emitting element Q.

[0080] Specifically, in the embodiment of the present invention, the cathode power signal PVEE is a dynamically adjustable cathode power signal. For example, the voltage value represented by the cathode power signal PVEE is adjustable between -2.5 volts and -4.0 volts; exemplarily, at the first moment, the voltage value represented by the cathode power signal PVEE is -2.5 volts, at the second moment, the voltage value represented by the cathode power signal PVEE is -4.0 volts, and at the third moment, the voltage value represented by the cathode power signal PVEE is -3.5 volts, so as to realize the light-emitting control of the light-emitting element Q.

[0081] In order to ensure the reset effect of the driving module 11 and / or the light emitting element Q, the reset effect of the driving module 11 and / or the light emitting element Q is best achieved by a voltage of -3.5 volts. Before controlling the first reset module 12 to be in a working state and / or controlling the second reset module 13 to be in a working state, the driving method of the display panel further includes:

[0082] The dynamically adjustable cathode power supply signal is adjusted to a fixed target cathode power supply signal.

[0083] In the reset stage, the first reset module 12 is controlled to be in a working state, and the cathode power signal PVEE is input to the control end of the driving module 11; and / or the second reset module 13 is controlled to be in a working state, and the cathode power signal PVEE is input to the anode of the light emitting element Q, including:

[0084] In the reset stage T1, the first reset module 12 is controlled to be in a working state, and the target cathode power supply signal is input to the control end of the driving module 11; and / or the second reset module 13 is controlled to be in a working state, and the target cathode power supply signal is input to the anode of the light-emitting element Q.

[0085] Specifically, in the embodiment of the present invention, the voltage value represented by the target cathode power supply signal is taken as -3.5 volts as an example to ensure the reset effect of the driving module 11 and / or the light emitting element Q.

[0086] Since the reset stage T1 and the effective period of the light emitting element T3 do not conflict, this adjustment will not affect the light emitting effect of the light emitting element Q, and can optimize the reset effect of the driving module 11 and / or the light emitting element Q.

[0087] Accordingly, the embodiment of the present application further provides a display device, referring to Fig.11 , Fig.11 The present invention provides a schematic diagram of a display device 200. The display device 200 includes the display panel described in the above embodiment of the present application, and the display device 200 can be any display device with a display function, such as a touch screen, a mobile phone, a tablet computer, a laptop, an e-book, or a television.

[0088] The display panel and its driving method, as well as the display device provided by the present invention are introduced in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

[0089] It should be noted that each embodiment in this specification is described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0090] It should also be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device that includes a series of elements is inherent to the elements, or also includes elements inherent to these processes, methods, articles or devices. In the absence of further restrictions, the elements defined by the sentence "including a..." do not exclude the presence of other identical elements in the process, method, article or device that includes the elements.

[0091] The above description of the disclosed embodiments enables one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A display panel, characterized in that: The display panel comprises: Pixel circuit and light emitting element; The pixel circuit includes a driving module, a first reset module and a second reset module; the first reset module is electrically connected to the control end of the driving module, the second reset module is electrically connected to the anode of the light-emitting element, the cathode of the light-emitting element is electrically connected to the power signal line, and the power signal line is used to transmit the cathode power signal; The reset signal provided by the first reset module to the control end of the driving module is the cathode power signal, and / or the reset signal provided by the second reset module to the anode of the light emitting element is the cathode power signal.

2. The display panel according to claim 1, characterized in that: The driving module comprises a driving transistor, and the driving transistor is used to provide a driving current for the light emitting element; The first reset module comprises a first reset transistor, a source or a drain of the first reset transistor receives the cathode power supply signal; The second reset module includes a second reset transistor, and a source or a drain of the second reset transistor receives the cathode power supply signal.

3. The display panel according to claim 2, characterized in that: The display panel further includes: substrate; an array layer located at one side of the substrate, wherein thin film transistors are arranged in the array layer, and the thin film transistors at least include the driving transistor, the first reset transistor, and the second reset transistor; The thin film transistor includes an active layer, and a source electrode and a drain electrode which are arranged in the same layer as the active layer and located on both sides of the active layer; The display panel further includes: The cathode layer is located on a side of the array layer away from the substrate.

4. The display panel according to claim 3, characterized in that: The cathode layer is electrically connected to the power signal line; The cathode layer is electrically connected to a target electrode terminal of the first reset transistor through a first metal layer, and / or the cathode layer is electrically connected to a target electrode terminal of the second reset transistor through the first metal layer; the target electrode terminal is used to receive the cathode power supply signal.

5. The display panel according to claim 3, characterized in that: The cathode layer is electrically connected to the power signal line; The cathode layer is electrically connected to the target electrode terminal of the first reset transistor through the first metal layer and at least one second metal layer in sequence, and / or the cathode layer is electrically connected to the target electrode terminal of the second reset transistor through the first metal layer and the at least one second metal layer; the target electrode terminal is used to receive the cathode power supply signal.

6. The display panel according to claim 4 or 5, characterized in that: The first metal layer is an anode layer.

7. The display panel according to claim 3, characterized in that: The power signal line is located between the array layer and the substrate; The power signal line is electrically connected to a target electrode terminal of the first reset transistor, and / or the power signal line is electrically connected to a target electrode terminal of the second reset transistor; The target electrode terminal is used to receive the cathode power supply signal.

8. A method for driving a display panel, characterized in that: The driving method of the display panel includes: In the reset stage, the first reset module is controlled to be in working state to input the cathode power signal to the control end of the driving module; and / or the second reset module is controlled to be in working state to input the cathode power signal to the anode of the light-emitting element.

9. The method for driving a display panel according to claim 8, wherein: The cathode power supply signal is a dynamically adjustable cathode power supply signal; Before controlling the first reset module to be in a working state and / or controlling the second reset module to be in a working state, the display panel driving method further includes: Adjusting the dynamically adjustable cathode power supply signal to a fixed target cathode power supply signal; In the reset stage, the first reset module is controlled to be in a working state, and the cathode power supply signal is input to the control end of the driving module; and / or the second reset module is controlled to be in a working state, and the cathode power supply signal is input to the anode of the light-emitting element, including: In the reset stage, the first reset module is controlled to be in a working state, and the target cathode power signal is input to the control end of the driving module; and / or the second reset module is controlled to be in a working state, and the target cathode power signal is input to the anode of the light-emitting element.

10. A display device, characterized in that: The display device comprises the display panel according to any one of claims 1-8.

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