Package structure and manufacturing method thereof
By setting an insulating partition between the welding pads of the packaging substrate and forming a second gap, the problem of high-density BGA pad deviation is solved, the welding quality and position accuracy are improved, and the manufacturing cost is reduced.
Patent Information
- Application Number
- CN202311013092.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-08-11
- Publication Date
- 2025-02-18
AI Technical Summary
High-density BGA pads are prone to biasing the position, which affects the soldering quality.
By providing an insulating partition between the welding pads of the packaging substrate, part of the insulating partition protrudes the welding pads to form a second gap, the solder balls of the electronic component are arranged in the second gap, and a connecting body is formed by melting and solidifying to limit the Position solder balls and electronic components.
Improves the position accuracy of electronic components, enhances welding quality, reduces the complexity of the manufacturing process, and reduces manufacturing costs.
Smart Images
Figure CN119480654A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the field of packaging, and in particular relates to a packaging structure and a manufacturing method thereof. Background Art
[0002] BGA (Ball Grid Array) packaging technology is a common electronic component packaging technology, mainly used for the packaging of integrated circuit chips and semiconductor devices. Its characteristics are that the pads are located at the bottom of the device and are arranged in a regular spherical array, and these solder balls are connected to the corresponding pads on the printed circuit board. However, high-density BGA pads are prone to misalignment, which affects the welding quality. Summary of the invention
[0003] In order to solve the above deficiencies of the prior art, the present application provides a packaging structure.
[0004] In addition, the present application also provides a method for manufacturing a packaging structure.
[0005] A method for manufacturing a packaging structure, comprising the steps of: providing a packaging substrate, the packaging substrate comprising an insulating layer and a plurality of solder pads spaced apart on the insulating layer, with a first gap between each two adjacent solder pads; arranging an insulating partition in each of the first gaps, the insulating partition comprising a first end and a second end opposite to the first end, the first end being accommodated in the first gap, and the second end protruding from the solder pad so that a second gap is provided between each two adjacent second ends; arranging electronic components at the plurality of second ends, the electronic components comprising a plurality of solder balls, each of the solder balls being accommodated in one of the second gaps; melting and solidifying the plurality of solder balls to form a plurality of connectors, the connectors connecting the solder pads.
[0006] In some possible implementations, the package substrate further includes a first circuit layer and a second circuit layer, the first circuit layer and the second circuit layer are respectively arranged on opposite sides of the insulating layer, the first circuit layer includes a plurality of the pads, and the method for manufacturing the package substrate includes the steps of: providing a substrate, the substrate including the insulating layer, a first metal layer and a second metal layer, the first metal layer and the second metal layer are respectively arranged on opposite sides of the insulating layer. Etching the first metal layer to form the first circuit layer, and etching the second metal layer to form the second circuit layer, to obtain the package substrate.
[0007] In some possible embodiments, the packaging substrate also includes a plurality of interlayer conductors, the interlayer conductors connecting the first circuit layer and the second circuit layer, and the manufacturing method of the packaging substrate also includes the steps of: setting an opening in the substrate, the opening passing through the second metal layer and the insulating layer, a portion of the first metal layer exposed at the bottom of the opening, and setting the interlayer conductor in the opening.
[0008] In some possible implementations, the step of “arranging an opening in the substrate” includes: establishing the opening in the substrate by laser ablation.
[0009] In some possible implementations, the step of “arranging the interlayer conductor in the opening” includes: forming the hollow interlayer conductor on the inner wall of the opening by electroplating.
[0010] A packaging structure includes a packaging substrate, an electronic component, and a plurality of insulating partitions. The packaging substrate includes an insulating layer and a plurality of solder pads spaced apart on the insulating layer, and a first gap is provided between each two adjacent solder pads. Each of the insulating partitions includes a first end and a second end opposite to the first end, the first end is accommodated in the first gap, and the second end protrudes from the solder pad so that a second gap is provided between each two adjacent second ends. The electronic component includes a plurality of connectors, each of which is accommodated in one of the second gaps and connected to one of the solder pads.
[0011] In some possible embodiments, the plurality of welding pads are arranged in an array at intervals to form a welding pad array, the plurality of insulating partitions include a plurality of first partitions and a plurality of second partitions, the plurality of first partitions are first connected to form a frame, the frame surrounds the welding pad array, the plurality of second partitions are longitudinally or transversely arranged in the frame, and the two ends of each of the second partitions are connected to two opposite first partitions.
[0012] In some possible embodiments, the plurality of insulating spacers are an integrally formed structure.
[0013] In some possible embodiments, the plurality of insulating spacers are made of Teflon material.
[0014] In some possible embodiments, the packaging substrate also includes a first circuit layer, a second circuit layer and an interlayer conductor, the first circuit layer and the second circuit layer are respectively arranged on opposite sides of the insulating layer, the first circuit layer includes a plurality of the welding pads, the interlayer conductor runs through the second circuit layer and the insulating layer, and the interlayer conductor connects the second circuit layer and the plurality of the welding pads.
[0015] The manufacturing method of the packaging structure provided by the present application is to set an insulating partition in the first gap between multiple solder pads, part of the insulating partition protrudes from the solder pads, and a second gap is formed between the protruding insulating partitions. The solder balls of the electronic components can be set in the second gap, and finally the solder balls are melted and solidified to form a connector filled in the second gap. In this way, the second gap can limit the solder balls and the electronic components, which is conducive to improving the position accuracy of installing the electronic components. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 A schematic cross-sectional view of a substrate provided in accordance with an embodiment of the present application.
[0017] Figure 2 for Figure 1 The cross-sectional schematic diagram of the substrate after the opening is set is shown.
[0018] Figure 3 for Figure 2 The cross-sectional schematic diagram is shown after an interlayer conductor is arranged in the opening.
[0019] Figure 4 For etching Figure 3 The substrate shown is a schematic cross-sectional view of a package substrate.
[0020] Figure 5 for Figure 4 The cross-sectional schematic diagram shown is after the insulating partition is set in the first gap.
[0021] Figure 6 for Figure 5 The schematic cross-sectional view of the insulating partition after the electronic components are set is shown.
[0022] Figure 7 for Figure 6 The electronic component is shown as a top view with the component body removed.
[0023] Figure 8 A schematic cross-sectional view of a packaging substrate provided in accordance with an embodiment of the present application.
[0024] Main component symbols
[0025] Substrate 10
[0026] The first metal layer 11
[0027] The second metal layer 12
[0028] Insulation layer 13
[0029] Opening 14
[0030] Interlayer conductor 15
[0031] Package substrate 16
[0032] The first circuit layer 111
[0033] The second circuit layer 121
[0034] Solder pad 20
[0035] Pad array 201
[0036] First gap 21
[0037] Insulation partition 30
[0038] First end 31
[0039] Second end 32
[0040] Second gap 33
[0041] First partition plate 34
[0042] Frame 340
[0043] Second partition 35
[0044] Electronic components 40
[0045] Main body part 41
[0046] Solder ball 42
[0047] Connector 50
[0048] Package structure 100
[0049] The following specific implementation methods will further illustrate the present application in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION
[0050] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.
[0051] See also Figures 1 to 8 , an embodiment of the present application provides a method for manufacturing a package structure 100, comprising the steps of:
[0052] S1: Please see Figure 1 A substrate 10 is provided, wherein the substrate 10 includes a first metal layer 11, a second metal layer 12 and an insulating layer 13. The insulating layer 13 is disposed between the first metal layer 11 and the second metal layer 12.
[0053] In this embodiment, the material of the first metal layer 11 and the second metal layer 12 includes at least one of copper, silver, gold, aluminum, carbon and conductive polymers. The material of the insulating layer 13 includes at least one of polyimide (PI), liquid crystal polymer (LCP), epoxy resin (EP), polytetrafluoroethylene (PTFE), polyether ether ketone (PEEK), polyphenylene oxide (PPO), polyester resin (PET) and polyethylene naphthalate di formic acid glycol ester (PEN). Preferably, the substrate 10 is a double-sided copper-clad substrate, the material of the first metal layer 11 and the second metal layer 12 is copper, and the material of the insulating layer 13 is polyimide.
[0054] S2: See Figure 2 A plurality of openings 14 are spaced apart on the substrate 10 , and the plurality of openings 14 penetrate the second metal layer 12 and the insulating layer 13 , so that a portion of the first metal layer 11 facing a side of the insulating layer 13 is exposed at the bottom of the opening 14 .
[0055] In this embodiment, the opening 14 is formed by laser ablation, and the cross-sectional shape of the opening 14 is approximately trapezoidal, with the upper bottom edge of the trapezoid close to the first metal layer 11, and the lower bottom edge of the trapezoid close to the second metal layer 12. That is, from the top to the bottom of the opening 14, the cross-sectional width of the opening 14 gradually narrows, and this trapezoidal design makes the opening 14 present a gradually converging shape between the first metal layer 11 and the second metal layer 12, thereby improving the performance and stability of the structure of the opening 14 to a certain extent.
[0056] S3: See Figure 3 An interlayer conductor 15 is disposed in the opening 14 , and the interlayer conductor 15 connects the first metal layer 11 and the second metal layer 12 , so that the first metal layer 11 and the second metal layer 12 are electrically conductive.
[0057] In this embodiment, the interlayer conductor 15 is formed by electroplating. Specifically, the interlayer conductor 15 is formed by electroplating to deposit continuous metal copper on the inner wall of the opening 14, so that the interlayer conductor 15 is roughly a hollow shell structure. Among them, this electroplating process can effectively form a continuous metal conductive layer on the inner surface of the opening 14, thereby realizing the electrical connection between the first metal layer 11 and the second metal layer 12. The electroplating technology can ensure that the interlayer conductor 15 is accurately arranged inside the opening 14 and matches the geometric shape of the opening 14, so as to achieve a stable electrical connection. It is worth noting that the shape of the interlayer conductor 15 presents a hollow shell structure, that is, its appearance looks similar to a hollow metal shell. This structure can provide a larger surface area, which helps to improve the conductivity and reduce the loss of signal transmission.
[0058] S4: See Figure 4 , etching the first metal layer 11 to form a first circuit layer 111, and etching the second metal layer 12 to form a second circuit layer 121, to obtain a package substrate 16. The first metal layer 11 includes a plurality of pads 20 arranged at intervals, each of the pads 20 correspondingly connected to one end of the interlayer conductor 15. The other end of the interlayer conductor 15 is connected to the second circuit layer 121.
[0059] In this embodiment, the first circuit layer 111 and the second circuit layer 121 are both formed by chemical etching. Specifically, the first circuit layer 111 and the second circuit layer 121 can be formed by setting a dry film, exposing and developing, etching, etc. It can be understood that in other embodiments of the present application, the first circuit layer 111 and the second circuit layer 121 can also be formed by laser etching, machine tool drilling, etc.
[0060] In this embodiment, the plurality of pads 20 are distributed in a matrix to form a pad array 201, a first gap 21 is provided between each two adjacent pads 20, and a portion of the insulating layer 13 is exposed at the bottom of the first gap 21 on the side facing the first circuit layer 111. It can be understood that in other embodiments of the present application, the plurality of pads 20 can also be distributed in other shapes, for example, in a circular distribution, a linear distribution, or other irregular distribution.
[0061] S5: See Figure 5, an insulating partition 30 is arranged between the plurality of the welding pads 20, and part of the insulating partition 30 protrudes from the first circuit layer 111. Specifically, the insulating partition 30 includes a first end 31 and a second end 32 opposite to the first end 31. The first end 31 is accommodated in the first gap 21, and the second end 32 protrudes from the welding pad 20 to form a second gap 33. The material of the insulating partition 30 is one of polyimide, Teflon, ceramic composite material and polyetheretherketone (PEEK). Preferably, the material of the insulating partition 30 is Teflon.
[0062] See also Figure 6 and Figure 7 In this embodiment, the insulating partition 30 includes a plurality of first partitions 34 and a plurality of second partitions 35. The plurality of first partitions 34 are connected to form a frame 340, and the frame 340 surrounds the pad array 201. The second partition 35 is disposed in the frame 340 in a horizontal or vertical direction, and the two ends of each second partition 35 are respectively connected to two opposite first partitions 34. In this way, the plurality of insulating partitions 30 are connected to form a whole, which is conducive to improving the stability of the insulating partition 30. Preferably, the plurality of insulating partitions 30 are an integrally formed structure.
[0063] S6: Please see again Figure 6 An electronic component 40 is arranged on the insulating partition 30, and the electronic component 40 includes a main body 41 and a plurality of solder balls 42 arranged on one side of the main body 41. Each solder ball 42 is accommodated in one of the second gaps 33. The second gap 33 formed by each two adjacent insulating partitions 30 can be used as a place to accommodate the solder ball 42, thereby limiting the position of the solder ball 42 and the position of the electronic component 40. In this way, the position accuracy of the electronic component 40 is improved, and the setting efficiency of the electronic component 40 can also be improved.
[0064] In the present embodiment, the electronic component 40 includes an integrated circuit, and the integrated circuit chip has various functional circuits, such as processing, storage, control and other functions. In other embodiments of the present application, the electronic component 40 can also adopt a variety of options such as transistors, diodes, sensors, storage devices, micro-electromechanical systems (MEMS) devices, optoelectronic devices, communication modules, power devices, display devices, etc. For example, the electronic component 40 can be an integrated circuit chip integrating various functional circuits for data processing, signal control and communication. On the other hand, it can also be a sensor for detecting environmental parameters, such as a temperature sensor or a pressure sensor, and a micro-electromechanical system device for realizing micro-mechanical motion. In addition, optoelectronic devices, power devices, communication modules, etc. are also possible options for the emission and detection of optical signals, power conversion and management, and wireless communication and connection. Therefore, the types of the electronic component 40 are diverse and can meet the needs of various different application scenarios, thereby realizing a wider range of functions and applications.
[0065] S7: See Figure 8 , heating and melting the plurality of solder balls 42 (see Figure 7 ), after cooling and solidification, a plurality of connectors 50 are formed, wherein the connectors 50 connect the pads 20 and the main body 41, and since the pads 20 are connected to one end of the interlayer conductor 15, the package structure 100 is obtained. In this way, the main body 41 is electrically connected to the second circuit layer 121 through the connectors 50, the pads 20 and the interlayer conductor 15.
[0066] In this embodiment, each of the connectors 50 fills the second gap 33 , and the insulating partition 30 separates two adjacent connectors 50 , thereby facilitating reducing the bridging between the connectors 50 and improving the reliability of the packaging structure 100 .
[0067] Compared with the prior art, the manufacturing method of the packaging structure 100 provided in the embodiment of the present application has the following advantages: (i) It is possible to manufacture a connector 50 with a smaller spacing: The use of an insulating partition 30 makes it possible to manufacture a connector 50 with any fine spacing. The high-precision processing performance of the insulating material can realize a circuit layout with a smaller spacing, meeting the needs for high-density and high-performance circuits. (ii) The coplanarity of the connector 50 is improved: The use of the insulating partition 30 further improves the coplanarity of the electronic component 40. The stability and mechanical strength of the insulating material help to ensure the position accuracy of the electronic component 40 during the assembly process, thereby improving the overall assembly quality. (iii) No direct vias and pull-through connection pad vias are required: Under this design, the connection of the solder pad 20 does not require direct vias or pull-through connection pad vias. This reduces the complexity of the manufacturing process and also helps to improve the reliability and connection quality of the solder pad 20. (iv) No need for filling material fixation: Due to the use of the insulating partition 30, the stability of the electronic component 40 is improved, so there is no need for additional filling material fixation. This reduces manufacturing costs and process complexity. (V) Implementation of different grid designs: The characteristics of the insulating partition 30 make it possible to flexibly manufacture different types of electronic components 40 and implement different grid designs to meet the needs of different applications. (VI) Enhanced waterproof effect: Finally, due to the sealing design of the insulating partition 30, a certain waterproof effect is also achieved. This means that the packaging structure 100 has better tolerance in a humid environment and improves overall reliability.
[0068] See also Figure 8 The embodiment of the present application also provides a packaging structure 100, which includes a packaging substrate 16, an electronic component 40 and a plurality of insulating partitions 30. The packaging substrate 16 includes an insulating layer 13 and a plurality of solder pads 20 spaced apart on the insulating layer 13. A first gap 21 is provided between each two adjacent solder pads 20. Each of the insulating partitions 30 includes a first end 31 and a second end 32 opposite to the first end 31. The first end 31 is accommodated in the first gap 21, and the second end 32 protrudes from the solder pad 20 so that a second gap 33 is provided between each two adjacent second ends 32. The electronic component 40 includes a plurality of connectors 50, each of which is accommodated in one of the second gaps 33 and connected to one of the solder pads 20.
[0069] See also Figure 8In this embodiment, the packaging substrate 16 also includes a first circuit layer 111, a second circuit layer 121 and an interlayer conductor 15. The first circuit layer 111 and the second circuit layer 121 are respectively arranged on opposite sides of the insulating layer 13. The first circuit layer 111 includes a plurality of welding pads 20. The interlayer conductor 15 penetrates the second circuit layer 121 and the insulating layer 13. The interlayer conductor 15 connects the second circuit layer 121 and the plurality of welding pads 20.
[0070] See also Figure 7 and Figure 8 In this embodiment, the plurality of welding pads 20 are arranged in an array at intervals to form a welding pad array 201, the plurality of insulating partitions 30 include a plurality of first partitions 34 and a plurality of second partitions 35, the plurality of first partitions 34 are first connected to form a frame 340, the frame 340 surrounds the welding pad array 201, the plurality of second partitions 35 are longitudinally or transversely arranged in the frame 340, and the two ends of each second partition 35 are connected to two opposite first partitions 34.
[0071] The above description is only an optimized specific implementation of the present application, but it cannot be limited to this implementation in the actual application process. For ordinary technicians in this field, other variations and changes made according to the technical concept of the present application should all fall within the protection scope of the present application.
Claims
1. A method for manufacturing a packaging structure, characterized in that: Includes steps: A packaging substrate is provided, the packaging substrate comprising an insulating layer and a plurality of welding pads spaced apart on the insulating layer, and a first gap is provided between each two adjacent welding pads; An insulating spacer is disposed in each of the first gaps, the insulating spacer comprising a first end and a second end opposite to the first end, the first end being received in the first gap, and the second end protruding from the welding pad so that a second gap exists between each two adjacent second ends; An electronic component is disposed at the plurality of second ends, wherein the electronic component comprises a plurality of solder balls, and each of the solder balls is received in one of the second gaps; The plurality of solder balls are melted and solidified to form a plurality of connection bodies, wherein the connection bodies connect the bonding pads.
2. The manufacturing method according to claim 1, characterized in that The package substrate further includes a first circuit layer and a second circuit layer, the first circuit layer and the second circuit layer are respectively arranged on opposite sides of the insulating layer, the first circuit layer includes a plurality of the pads, and the manufacturing method of the package substrate includes the steps of: Providing a substrate, the substrate comprising the insulating layer, a first metal layer and a second metal layer, wherein the first metal layer and the second metal layer are respectively disposed on opposite sides of the insulating layer; etching the first metal layer to form the first circuit layer, and The second metal layer is etched to form the second circuit layer to obtain the packaging substrate.
3. The manufacturing method according to claim 2, characterized in that: The package substrate further includes a plurality of interlayer conductors, wherein the interlayer conductors connect the first circuit layer and the second circuit layer. The method for manufacturing the package substrate further includes the steps of: An opening is provided in the substrate, the opening passes through the second metal layer and the insulating layer, and a portion of the first metal layer is exposed at the bottom of the opening, and The interlayer conductor is disposed in the opening.
4. The manufacturing method according to claim 3, characterized in that: The step of "arranging openings on the substrate" includes: The opening is arranged on the substrate by laser ablation.
5. The manufacturing method according to claim 3, characterized in that: The step of "arranging the interlayer conductor in the opening" includes: The hollow interlayer conductive body is formed on the inner wall of the opening by electroplating.
6. A packaging structure, characterized in that: include: A packaging substrate, the packaging substrate comprising an insulating layer and a plurality of welding pads spaced apart on the insulating layer, with a first gap between each two adjacent welding pads; A plurality of insulating baffles, each of the insulating baffles comprising a first end and a second end opposite to the first end, the first end being received in the first gap, and the second end protruding from the pad so that a second gap exists between each two adjacent second ends; The electronic component includes a plurality of connectors, each of which is received in one of the second gaps and connected to one of the pads.
7. The packaging structure according to claim 6, characterized in that: The multiple welding pads are arranged in an array at intervals to form a welding pad array, and the multiple insulating partitions include multiple first partitions and multiple second partitions. The multiple first partitions are first connected to form a frame, and the frame surrounds the welding pad array. The multiple second partitions are arranged longitudinally or transversely in the frame, and the two ends of each second partition are connected to two opposite first partitions.
8. The packaging structure according to claim 7, characterized in that: The plurality of insulating spacers are an integrally formed structure.
9. The packaging structure according to claim 7, characterized in that: The plurality of insulating spacers are made of Teflon material.
10. The packaging structure according to claim 6, characterized in that: The packaging substrate also includes a first circuit layer, a second circuit layer and an interlayer conductor. The first circuit layer and the second circuit layer are respectively arranged on opposite sides of the insulating layer. The first circuit layer includes a plurality of welding pads. The interlayer conductor runs through the second circuit layer and the insulating layer. The interlayer conductor connects the second circuit layer and the plurality of welding pads.