A method for depositing an insulating layer in holes of a TSV adapter board

Abstract

The present invention discloses a method for depositing an insulating layer in holes of a TSV interposer. By using an ICPCVD device and using nitrogen and silane as reaction gases, an insulating layer is deposited in the TSV holes of the TSV interposer. The method includes: setting a lower chamber pressure, DC power and a higher RF bias voltage for the ICPCVD device, and reacting the reaction gases on the inner sidewalls and the bottom of the TSV holes to generate silicon nitride, which adheres to the surface of the silicon substrate; setting the required number of process cycles, and stepwise reducing the bias power from a high bias power to a low bias power within each process cycle to deposit silicon nitride, so that the reaction gases gradually move from the lower part of the TSV holes to the upper-middle part of the TSV holes, improving the coverage rate of the silicon nitride insulating layer in the TSV holes. The present invention solves the problems of poor sidewall metal filling effect, long deposition process time, high process cost, etc. caused by the "scallop" protrusions after silicon hole etching in the existing TSV interposer preparation process by preparing a silicon nitride insulating layer with high adhesion, good uniformity and high step coverage rate.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor devices, and particularly relates to a method for depositing an insulating layer in holes of a TSV interposer. Background Art

[0002] TSV (Through Silicon Via) technology can achieve electrical connection in the vertical direction between chips. Its high reliability and optimization have become research hotspots. Using this technology, systematic integration of microwave, digital, optical, and MEMS (Micro-Electro-Mechanical System) can be realized within a single packaging system, obtaining the highest three-dimensional chip stacking integration density, with short interlayer interconnect paths. Compared with the existing SIP (System in Package) based on flip-chip and wire bonding, significant improvements are achieved in electrical performance, thermal / mechanical performance, and form factor.

[0003] The key to preparing a TSV interposer is how to obtain a reliable vertical conductive channel. This process requires the coordinated cooperation of key processes such as deep silicon etching with low roughness, deposition of a highly uniform insulating layer with good adhesion, sidewall metallization with high step coverage, and highly consistent electroplating filling. Due to the process principle of the first step - deep silicon etching, the "scallop" morphology on the sidewalls of silicon holes inevitably appears. The scallop protrusions bring significant difficulties to the continuous deposition of the metal film layer in the vertical direction on the sidewalls of the subsequent silicon holes. Within the scallop structure range on the TSV sidewalls, due to the presence of protrusions, the coverage rate at the lower part of the scallop is much lower than that at the upper part of the scallop, and as the hole type deepens, the overall coverage rate of the metal film layer at 3 / 4 of the distance from the hole bottom is poor. However, the continuity of the metal on the hole sidewalls directly determines the quality of the electroplating filling effect of the silicon holes, and thus affects the electrical performance of the TSV interposer in the vertical direction. Therefore, the preparation of the insulating layer in the holes of the TSV interposer, as an important link connecting the preceding and the following, cannot be ignored. How to obtain a high-adhesion, good-uniformity, strong anti-electric breakdown ability insulating layer through improving the process method, and at the same time improve the "scallop" - shaped protrusions to provide good metal film layer growth conditions for subsequent processes is the key to the preparation process.

[0004] At present, in the process of preparing TSV adapter plates, the insulating layer is generally deposited by thermal oxidation or PECVD (Plasma Enhanced Chemical Vapor Deposition) to deposit TEOS (Tetraethoxysilane) to generate silicon oxide. However, the problems with this technical route are: 1. The silicon oxide insulating layer prepared by thermal oxidation comes from the substrate itself, and a part of the substrate silicon is consumed during the growth process. Its reaction principle determines that the morphology of the grown silicon dioxide film maintains the original "scallop" protrusions to a certain extent, and cannot provide a good growth environment for subsequent sidewall metal deposition. 2. The thermal oxidation method is used to prepare the silicon oxide insulating layer, and the process time is long, which invisibly increases the process cost, and the growth thickness of the silicon oxide film prepared by this process method has a limit value, and it is not possible to flexibly prepare thick films according to process requirements. 3. Using the traditional PECVD method to deposit TEOS, on the one hand, the conformal coverage of this method will deteriorate as the aspect ratio of the silicon hole increases, making it difficult to obtain a uniform silicon oxide insulating layer in the hole. On the other hand, TEOS, as a deposition source, contains carbon atoms, which easily produces carbon impurities and introduces other pollution, affecting the performance and quality of the insulating layer. 4. Using the PECVD method to deposit TEOS involves high raw material and energy costs, as well as the cost of regular maintenance and cleaning of the equipment. Summary of the invention

[0005] The object of the present invention is to provide a method for depositing an insulating layer in a TSV adapter plate hole, which can increase the coverage of the insulating layer in the TSV adapter plate hole and improve the electrical performance of the TSV adapter plate in the vertical direction.

[0006] One aspect of the present invention provides a method for depositing an insulating layer in a TSV adapter plate hole, using an ICPCVD device, using nitrogen and silane as reaction gases, to deposit an insulating layer in a TSV hole of a TSV adapter plate, the method comprising:

[0007] Low-rate bottom-type overall deposition step: set a lower chamber pressure, DC power and higher RF bias voltage for the ICPCVD equipment, and the reaction gas reacts on the inner sidewall and bottom of the TSV hole to generate silicon nitride, which is attached to the surface of the silicon substrate. The chamber pressure is set to 30Pa-300Pa, the DC power is set to 300W-800W, the bias power is set to 800W-1200W, the silane gas flow rate is 30sccm-50sccm, and the nitrogen gas flow rate is 20sccm-35sccm;

[0008] Redistributed deposition step: Set the required number of process cycles, and in each process cycle, stepwise reduce the bias power from a high bias power to a low bias power to deposit silicon nitride, so that the reaction gas gradually moves from the lower part of the TSV hole to the upper middle part of the TSV hole, improving the coverage rate of the silicon nitride insulating layer in the TSV hole. Among them, the starting high bias power is set to 1500W - 2000W, the ending low bias power is set to 200W - 500W, the chamber pressure is set to 30Pa - 300Pa, and the DC power is set to 500W - 1000W.

[0009] Preferably, in the low-rate bottoming overall deposition step, the chamber temperature is set to 380°C, and the deposition time is set to 10min - 15min.

[0010] Preferably, in the redistributed deposition step, the number of process cycles is determined by the total required thickness of the insulating layer.

[0011] Preferably, the number of process cycles is 30 - 80 times.

[0012] Preferably, in the redistributed deposition step, within each process cycle, the distribution of the deposition time is set according to the thickness of the insulating layer required at the target position.

[0013] Preferably, in the redistributed deposition step, the deposition time at the high bias power is 30s - 60s.

[0014] According to the method for depositing an insulating layer in a TSV via plate hole of the above aspect of the present invention, the coverage rate of the insulating layer in the TSV via plate hole can be improved, and the electrical performance in the vertical direction of the TSV via plate can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions of the present invention, the following will briefly introduce the drawings used in the description of the embodiments of the present invention. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings:

[0016] Figure 1 is a flowchart of a method for depositing an insulating layer in a TSV via plate hole according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0017] To make the objectives, technical solutions, and advantages of the present invention clearer, the following will clearly and completely describe the technical solutions of the present invention in conjunction with the drawings. Obviously, the described embodiments are only some of the embodiments of the present invention, rather than all of them. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention.

[0018] Embodiments of the present invention provide a method for depositing an insulating layer in the holes of a TSV interposer. The method of the embodiments of the present invention uses the ICPCVD (Inductively Coupled Plasma Chemical Vapor Deposition) process, uses nitrogen and silane as reaction gas sources, and prepares a silicon nitride insulating layer by a stepwise deposition method. First, compared with the silicon oxide film, the advantages of silicon nitride as an insulating layer are: good chemical stability and mechanical properties, excellent acid and alkali corrosion resistance, stronger water vapor resistance, which helps to improve the stability and reliability of the film layer during the subsequent process, and maintain high adhesion to the silicon substrate in a harsh environment; at the same time, silicon nitride has strong anti-masking ability, can effectively prevent copper diffusion and leakage, and ensure electrical isolation. Secondly, by using the ICPCVD method and using nitrogen and silane as reaction gas sources, due to the high diffusivity of gas molecules under the action of a radio frequency electric field, a silicon nitride film layer can be generated by reaction everywhere in the hole, covering the silicon sidewall and the hole bottom, effectively improving the uniformity of the deposited film layer in the hole and improving the "scallop" protrusion phenomenon, thereby providing good metal film layer growth conditions for the subsequent process to improve the electrical performance in the vertical direction. At the same time, compared with TEOS, nitrogen and silane can effectively avoid the introduction of carbon pollution sources, which is more conducive to cleaning and cost saving. Finally, in the specific deposition process, a low-rate bottoming overall deposition step and a stepped reduced bias power re-distributed deposition step are adopted. During the re-distributed deposition process, the number of process cycles for depositing the insulating layer is set to 30-80 times. Each process cycle includes a high bias power deposition step and a low bias power deposition step, and the bias power is changed stepwise within the cycle. The starting power is 1500W-2000W, and the termination power is 200W-500W, so that the reaction gas gradually moves from the lower part of the TSV hole to the middle and upper parts of the TSV hole, to ensure the uniform coverage of the insulating layer in the whole and local parts of the TSV hole.

[0019] Specifically, the method for depositing an insulating layer in the holes of a TSV interposer according to the embodiments of the present invention uses an inductively coupled plasma chemical vapor deposition device (ICPCVD device), uses silane and nitrogen as reaction gases, and deposits an insulating layer in the silicon holes of the TSV interposer, as Figure 1As shown, the method includes a low-rate bottoming overall deposition step S1 and a redistributed deposition step S2 of stepwise reducing the bias power. By setting a lower chamber pressure, DC power and a higher RF bias in the ICPCVD equipment, a low-rate bottoming deposition inside the TSV holes is first achieved. During this low-rate deposition process, the reaction gas reacts on the inner sidewalls and bottom of the TSV holes and generates silicon nitride, which adheres to the surface of the silicon substrate, facilitating the filling of the "scallop"-shaped protrusions. Secondly, in the redistributed deposition process, a required number of process cycles are set, and within each process cycle, the bias power is stepwise reduced from a higher bias power to a lower bias power for deposition. The purpose of this process is to slowly move the deposition position of the redistribution from a position below the TSV holes to the middle and upper parts, so as to improve the coverage rate at the locally thinner film layer inside the holes. During the redistributed deposition process, by using the method of first depositing at a high bias power and then at a low bias power, the problem of excessive film thickness at the hole opening during the deposition process within a certain period of time can be effectively avoided, maintaining a large acceptance angle at the opening position to facilitate the migration and deposition of gas molecules.

[0020] In a specific embodiment, the chamber temperature in the low-rate bottoming overall deposition step is set to 380 °C, the chamber pressure range is set to 30 Pa - 300 Pa, the DC power is selected to be 300 W - 800 W, the bias power is 800 W - 1200 W, the flow rate of silane gas is 30 sccm -50 sccm, and the flow rate of nitrogen gas is 20 sccm - 35 sccm. In a lower chamber pressure environment, the film deposition rate is slower. At the same time, by applying a higher bias power, the traction force on the active groups of the plasma is strengthened, enabling the slow growth of the insulating layer at various positions inside the TSV holes. The deposition time of this step is set to 10 min - 15 min.

[0021] After the low-rate bottoming overall deposition step, the redistributed deposition step is carried out. The chamber temperature and pressure remain unchanged, the DC power is increased to 500 W - 1000 W, the initial high bias power is set to 1500 W - 2000 W, the deposition time of this process is 30 s - 60 s, and the bias power is gradually and uniformly reduced, and the termination power is about 200 W - 500 W. This is one cycle. In each cycle, the distribution of the deposition time is mainly set according to the thickness requirement of the insulating layer to be deposited at the target position. For example, at a higher bias power, it is more conducive to depositing the film layer in the middle and lower parts of the hole. By using a lower bias power, the focusing position of the film layer redistribution can be moved from the lower part of the hole to the middle and upper parts of the hole. The process cycle can be implemented 30 - 80 times, and the final number of cycles is determined by the total thickness of the required insulating layer.

[0022] In summary, the method for depositing an insulating layer in the holes of the TSV interposer board according to the embodiments of the present invention uses the ICPCVD process, nitrogen and silane as gas sources. Specifically, in the deposition process, low-rate bottoming overall deposition and stepped reduction of the bias power for re-distributed deposition are used to achieve the overall coverage of the insulating layer in the TSV holes, effectively improving the "scallop" protrusions caused by the etching process, and can deposit an insulating layer with a certain thickness according to the needs of the target position, realizing the uniform coverage of the overall and local insulating layers in the TSV holes, providing good metal film growth conditions for subsequent sidewall metal filling, achieving excellent electroplating start-up functions, and further improving the electrical performance in the vertical direction during the preparation of the TSV interposer board. This process method is simple to operate and can be used in the research and development and mass production of silicon-based packaging structures. The method for depositing an insulating layer in the holes of the TSV interposer board according to the embodiments of the present invention solves the problems of poor sidewall metal filling effect, long deposition process time, high process cost, etc. caused by the "scallop" protrusions after silicon hole etching during the preparation of the existing TSV interposer board by preparing a silicon nitride insulating layer with high adhesion, good uniformity, and high step coverage rate.

[0023] Only some exemplary embodiments of the present invention have been described above by way of illustration. Without doubt, for those of ordinary skill in the art, various different ways can be used to modify the described embodiments without departing from the spirit and scope of the present invention. Therefore, the above drawings and descriptions are illustrative in nature and should not be construed as limiting the scope of protection of the claims of the present invention.

Claims

1. A method for depositing an insulating layer in holes of a TSV interposer, characterized in that, Using an ICPCVD device, nitrogen and silane are used as reaction gases to deposit an insulating layer in the TSV holes of a TSV interposer. The method includes: Low-rate bottoming overall deposition step: Set a lower chamber pressure, DC power, and a higher RF bias voltage for the ICPCVD device. The reaction gases react on the inner sidewalls and bottom of the TSV holes to generate silicon nitride, which adheres to the surface of the silicon substrate. Among them, the chamber pressure is set to 30 Pa - 300 Pa, the DC power is set to 300 W - 800 W, the bias power is set to 800 W - 1200 W, the flow rate of silane gas is 30 sccm - 50 sccm, and the flow rate of nitrogen gas is 20 sccm - 35 sccm; Redistributed deposition step: Set the required number of process cycles, and in each process cycle, stepwise reduce the bias power from a high bias power to a low bias power to deposit silicon nitride, so that the reaction gases gradually move from the lower part of the TSV hole to the upper middle part of the TSV hole, improving the coverage rate of the silicon nitride insulating layer in the TSV hole. Among them, the starting high bias power is set to 1500 W - 2000 W, the ending low bias power is set to 200 W - 500 W, the chamber pressure is set to 30 Pa - 300 Pa, the DC power is set to 500 W - 1000 W, and the number of process cycles is 30 - 80 times.

2. The method according to claim 1, wherein In the low-rate bottoming overall deposition step, the chamber temperature is set to 380 °C, and the deposition time is set to 10 min - 15 min.

3. The method according to claim 1 or 2, characterized in that, In the redistributed deposition step, the number of process cycles is determined by the total thickness of the required insulating layer.

4. The method according to claim 1 or 2, characterized in that, In the redistributed deposition step, within each process cycle, the distribution of the deposition time is set according to the thickness of the insulating layer to be deposited at the target position.

5. The method according to claim 4, characterized in that, In the redistributed deposition step, the deposition time at the high bias power is 30 s - 60 s.

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