Mip chip structure and process method thereof, display device

Abstract

The application relates to the technical field of LED, in particular to an MIP chip structure, a process method thereof and a display device, which comprises the following steps: firstly, providing a substrate, then coating photoresist on the substrate, forming a metal wiring pattern through the exposure and development etching mode by a mask plate; evaporating a layer of metal on the metal wiring pattern, and removing the photoresist to form metal wiring; bonding and connecting the chips with the same outgoing light to the metal wiring, coating a flat glue layer after the chip bonding, and completing the chip packaging; repeating the above steps three times to form three layers of metal wiring which are vertically arranged at a certain distance and connected at one end, and the chips with the same outgoing light are bonded and connected to each layer of metal wiring; due to the vertical stacking of the chips with different outgoing lights, the overall size of the chips is effectively reduced, and the MIP chip structure with a smaller size is realized.

Description

Technical Field

[0001] This invention relates to the field of LED technology, and more specifically, to a MIP chip structure and its manufacturing process, and a display device. Background Technology

[0002] The transition from direct-view LED technology to micro LED is an inevitable trend. Micro-pitch LED direct-view products require increasingly smaller LED crystal sizes. With advancements in LED technology and improved luminous efficiency, even smaller LED crystals are needed to meet screen brightness requirements, significantly reducing costs. However, many challenges remain in the commercialization of micro LEDs. Improving yield rates, addressing wavelength uniformity, and achieving full-color microLEDs are all pressing issues. The emergence of MIP (Micro-In-Pack) technology offers a solution. MIP integrates microLEDs onto a substrate, using metal wiring to create solder pads for encapsulation, enabling their application in products. However, due to wiring and other processes, the size of MIPs generally falls between that of RGB MiniLEDs and directly applied RGB MicroLEDs. Miniaturizing MIPs is currently a crucial issue that must be addressed to expand the application scenarios of microLEDs. Summary of the Invention

[0003] The purpose of this invention is to provide a MIP chip structure and its manufacturing process, as well as a display device, to reduce the size of MIP chips.

[0004] To achieve the above objectives, the technical solutions adopted in the embodiments of the present invention are as follows:

[0005] In a first aspect, embodiments of the present invention provide a MIP chip structure, the MIP chip structure comprising: a substrate; metal wiring, the metal wiring being disposed on the substrate, the metal wiring including a first metal wiring, a second metal wiring and a third metal wiring, the first metal wiring, the second metal wiring and the third metal wiring being arranged at a certain distance from each other in the vertical direction and one end of each being connected together; and a plurality of chips emitting different light rays, chips emitting the same light ray being respectively bonded to the first metal wiring, the second metal wiring and the third metal wiring.

[0006] Secondly, embodiments of the present invention also provide a process method for a MIP chip structure, the method comprising: providing a substrate; coating the entire substrate with photoresist and etching metal wiring patterns; depositing a layer of metal and removing the photoresist to form metal wiring; bonding multiple chips with the same emitting light beam to the metal wiring, repeating the above steps to form three layers of metal wiring that are vertically spaced at a certain distance and connected together at one end, wherein each layer of metal wiring is bonded to chips with different emitting light beams.

[0007] Thirdly, embodiments of the present invention also provide a display device, the display device including the above-described MIP chip structure.

[0008] This invention provides a MIP chip structure, its fabrication method, and a display device. First, a substrate is provided. Then, photoresist is coated across the entire substrate. Using a mask, a metal wiring pattern is formed through exposure, development, and etching. A layer of metal is deposited on the metal wiring pattern, and after removing the photoresist, metal wiring is formed. Chips with the same emitting light beam are bonded to the metal wiring. After chip bonding, a planarizing adhesive layer is coated across the entire substrate to complete chip packaging. The above steps are repeated three times: fabricating the metal wiring pattern, forming the metal wiring, bonding chips with the same emitting light beam, and coating the planarizing adhesive layer. This forms three layers of metal wiring, vertically spaced at a certain distance and connected at one end. Each layer of metal wiring is bonded to chips with the same emitting light beam. Because chips with different emitting light beams are vertically stacked, the overall chip size is effectively reduced, achieving a smaller MIP chip structure.

[0009] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0010] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0011] Figure 1 The diagram shows a process flow chart of a MIP chip structure provided by an embodiment of the present invention.

[0012] Figure 2 A schematic diagram of the structure of a substrate provided in an embodiment of the present invention is shown.

[0013] Figure 3 This diagram illustrates a metal trace pattern formation according to an embodiment of the present invention.

[0014] Figure 4 A schematic diagram of the formation of a first metal wiring according to an embodiment of the present invention is shown.

[0015] Figure 5 A schematic diagram of R-chip bonding provided in an embodiment of the present invention is shown.

[0016] Figure 6 A schematic diagram of the formation of a flat adhesive layer provided in an embodiment of the present invention is shown.

[0017] Figure 7 A schematic diagram of the formation of a second metal wiring according to an embodiment of the present invention is shown.

[0018] Figure 8 A schematic diagram of G-chip bonding provided in an embodiment of the present invention is shown.

[0019] Figure 9 A schematic diagram of the formation of a flat adhesive layer provided in an embodiment of the present invention is shown.

[0020] Figure 10 A schematic diagram of the formation of the blue light absorption film provided in an embodiment of the present invention is shown.

[0021] Figure 11 A schematic diagram of the formation of a third metal wiring according to an embodiment of the present invention is shown.

[0022] Figure 12 A schematic diagram of B-chip bonding provided in an embodiment of the present invention is shown.

[0023] Figure 13 A schematic diagram of the RGB chip arrangement provided in an embodiment of the present invention is shown.

[0024] Figure 14 A schematic diagram of the metal wiring arrangement provided in an embodiment of the present invention is shown.

[0025] Figure 15 This diagram illustrates another metal wiring arrangement provided by an embodiment of the present invention.

[0026] Figure 16 A schematic diagram of a MIP chip structure provided by an embodiment of the present invention is shown.

[0027] Illustration:

[0028] 300 - MIP chip structure; 310 - substrate; 320 - first metal wiring; 330 - second metal wiring; 340 - third metal wiring; 350 - chips with different emitted light rays; 360 - flat adhesive layer; 370 - blue light absorption film. Detailed Implementation

[0029] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0030] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, in the description of this invention, terms such as "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0031] MIP (MicroLED in Package): This refers to a structure that packages three MicroLED chips (red, green, and blue) with a size of less than 50µm together. In other words, the MIP structure is obtained by packaging three MicroLED chips of different colors (red, green, and blue) together (multiple chips can also be packaged, not limited to three). Due to the extremely small size of a single MicroLED chip, both van der Waals force transfer to the driver backplane and direct laser transfer to the driver backplane are extremely difficult to implement. However, MicroLEDs offer superior light emission performance and effect compared to miniLEDs. To improve transfer yield and align with current technological advancements, multiple MicroLEDs are packaged into an MIP structure, and then transferred using adsorption or adhesion equipment. This ensures the usability of the excellent luminous efficacy of the MicroLEDs while improving transfer efficiency.

[0032] Combination Figure 1 The following is a detailed explanation of the implementation process of the MIP chip structure:

[0033] S110 provides a substrate.

[0034] like Figure 2 As shown, a substrate 310 is provided. The substrate 310 may be a sapphire substrate, a silicon substrate, a semiconductor material substrate, a glass substrate, or other carrier substrate. Further, the material of the sapphire substrate includes Al2O3.

[0035] S120 involves coating the entire substrate with photoresist and etching out metal trace patterns.

[0036] like Figure 3 As shown, photoresist is uniformly coated onto substrate 310 using a spin coating method. It should be noted that the photoresist includes positive and negative photoresist. The portion of positive photoresist exposed to light can be removed with a solution, while the portion of negative photoresist not exposed to light can be removed with a solution. A mask is then placed on top of the substrate, and the photoresist to be removed is removed through exposure, development, and solution removal, resulting in a metal trace pattern. This metal trace pattern is formed by retaining the photoresist portion.

[0037] S130, a layer of metal is deposited by vapor deposition, and the photoresist is removed to form the first metal wiring.

[0038] like Figure 4 The process involves depositing a layer of metal onto the photoresist in the retained portion. This deposited metal is uniformly distributed along the metal trace pattern. After deposition, all photoresist is removed by solution removal or laser lift-off, thus forming the first metal wiring 320 on the substrate. Further, the first metal wiring 320 includes a first N-type electrode and a first P-type electrode, which are staggered and not electrically connected to each other.

[0039] S140, bonding chips with the same emitted light beam to the first metal wiring.

[0040] It should be noted that, in this embodiment of the invention, chips with the same emitted light, i.e., chips with the same emission color, are directly transferred and bonded to a substrate after the wafer is epitaxially formed and cut into multiple chips. This improves transfer efficiency and ensures that the chips transferred in a single transaction have the same color.

[0041] like Figure 5 As shown, in this embodiment of the invention, the wafer with the entire red light (R) chip is first bonded to the first metal wiring. That is, the two electrodes of the red light chip are respectively bonded to the first N-type electrode and the first P-type electrode of the first metal wiring. After bonding, the wafer substrate is peeled off by laser.

[0042] It should be noted that, Figure 5 The structure shown is merely an example and not a limitation. For instance, light-emitting chips of other colors, such as blue chips, can also be bonded to the first metal wiring.

[0043] S150, a flat adhesive layer is coated, which encapsulates and covers the chip that emits the same light beam.

[0044] like Figure 6As shown, after the red light chip is bonded, a planar adhesive layer 360 is coated across the entire surface using a spin coat method. This planar adhesive layer 360 encapsulates the red light chip, and its thickness is 2-5 μm higher than the outer surface of the red light chip. This planar adhesive layer serves two purposes: firstly, it protects the red light chip from displacement or scratches; secondly, it ensures the planarization of the entire red light chip surface, facilitating the fabrication of the next layer.

[0045] S160, continue to coat the entire board with photoresist on the flat adhesive layer and etch out the metal wiring pattern, then evaporate another layer of metal, and remove the photoresist to form the second metal wiring.

[0046] like Figure 7 As shown, photoresist is further coated onto the cured planar adhesive layer 360, and the photoresist is removed as described in S120 to obtain the metal wiring pattern. Simultaneously, the planar adhesive layer 360 is etched to create openings, exposing a portion of the first metal wiring 320. Then, a layer of metal is deposited across the entire surface. This deposited metal is uniformly distributed along the metal wiring pattern and the openings. After the deposition is complete, all photoresist is dissolved and removed by solution removal or by laser stripping, thus forming a second metal wiring 330 on the substrate. The second metal wiring 330 is connected to the first metal wiring 320 at least at one end through the metal deposited in the openings. Further, the second metal wiring 330 includes a second N-type electrode and a second P-type electrode, which are alternately arranged and not electrically connected to each other. Furthermore, the second metal wiring 330 can be connected to the first metal wiring 320 at least at one end through the metal deposited in the opening, which can be: the second N-type electrode of the second metal wiring 330 is connected to the first N-type electrode of the first metal wiring 320, or the second P-type electrode of the second metal wiring 330 is connected to the first P-type electrode of the first metal wiring 320.

[0047] S170, another chip with the same emitted light is bonded to the second metal wiring.

[0048] like Figure 8 As shown, the wafer carrying a full-plate green light (G) chip is bonded to the second metal wiring 330, that is, the two electrodes of the green light chip are bonded to the second N-type electrode and the second P-type electrode of the second metal wiring 330 respectively. After bonding, the wafer substrate is peeled off by laser.

[0049] It should be noted that, Figure 8 The structure shown is merely an example and not a limitation. For instance, light-emitting chips of other colors, such as blue or red chips, can also be bonded to the second metal wiring 330.

[0050] S180, a flat adhesive layer is coated, which wraps and covers another chip with the same emitted light.

[0051] like Figure 9 As shown, after the green LED chip is bonded, a planar adhesive layer 360 is coated across the entire surface using a spin coater. This planar adhesive layer 360 encapsulates the green LED chip, and its thickness is 2-5 μm higher than the outer surface of the green LED chip. This planar adhesive layer 360 serves two purposes: firstly, it protects the green LED chip from displacement or scratches; secondly, it ensures the planarization of the entire green LED chip surface, facilitating the fabrication of the next layer.

[0052] S190, continue to form a blue light absorbing film on the above-mentioned flat adhesive layer.

[0053] like Figure 10 As shown, a blue light absorption film 370 is formed on the cured, flat adhesive layer 360 encapsulating the green light chip by homogenization. It should be noted that the wavelength range of red light is 622–760 nm, the wavelength range of green light is 492–577 nm, and the wavelength range of blue light is 435–450 nm. It is evident that blue light is a short wavelength, while red and green light are long wavelengths. Short-wavelength blue light easily excites the green or red light chip to emit light; conversely, the red or green light emitted by the red or green light chip is a long wavelength and therefore does not easily excite the blue light chip to emit light. Since the process will be repeated after the green light chip is bonded to continue bonding the blue light chip, in order to avoid the downward-emitted light from the blue light chip accidentally triggering the green or red light chip to emit light and affecting the display effect, a blue light absorption film 370 is first formed on the flat adhesive layer 360 that wraps the green light chip before forming the metal wiring for bonding the blue light chip. This film absorbs the downward-emitted light when the blue light chip emits light, thus preventing the green or red light chip from being accidentally triggered to emit light.

[0054] S200 continues to coat the entire board with photoresist on the blue light absorption film and etch out the metal wiring pattern, then evaporates another layer of metal, and removes the photoresist to form the third metal wiring.

[0055] like Figure 11As shown, photoresist is coated onto the cured blue light absorption film 370, and the photoresist is removed as described in S120 to obtain the metal wiring pattern. Simultaneously, openings are etched into the blue light absorption film 370 and the flat photoresist layer 360 encapsulating the green light chip to expose a portion of the second metal wiring 330. Then, a layer of metal is deposited across the entire surface. This deposited metal is uniformly distributed along the metal wiring pattern and the openings. After the deposition is complete, all photoresist is dissolved and removed by solution removal or by laser stripping, thus forming a third metal wiring 340 on the substrate. The third metal wiring 340 is connected to the second metal wiring 330 at least at one end through the metal deposited in the openings. Furthermore, the third metal wiring 340 includes a third N-type electrode and a third P-type electrode, which are alternately arranged and not electrically connected to each other. Furthermore, the connection between at least one end of the third metal wiring 340 and the second metal wiring 330 via the metal deposited in the opening can be achieved by either connecting the third N-type electrode of the third metal wiring 340 to the second N-type electrode of the second metal wiring 330, or connecting the third P-type electrode of the third metal wiring 340 to the second P-type electrode of the second metal wiring 330. It should be noted that the first metal wiring 320, the second metal wiring 330, and the third metal wiring 340 can either have their first N-type electrodes, second N-type electrodes, and third N-type electrodes connected together to achieve a common N-electrode connection, or have their first P-type electrodes, second P-type electrodes, and third P-type electrodes connected together to achieve a common P-electrode connection.

[0056] S210, another chip with the same emitted light is bonded to a third metal wiring.

[0057] like Figure 12 As shown, the wafer carrying a full-plate blue light (B) chip is bonded to the third metal wiring 340, that is, the two electrodes of the blue light chip are bonded to the third N-type electrode and the third P-type electrode of the third metal wiring 340 respectively. After bonding, the wafer substrate is peeled off by laser.

[0058] It should be noted that, Figure 12 The structure shown is merely an example and not a limitation. For instance, light-emitting chips of other colors, such as green or red chips, can also be bonded to the third metal wiring 340.

[0059] In this embodiment of the invention, an exemplary MIP structure formed by chip packaging with three different RGB colors is provided. It is readily understood that this MIP structure can also be configured with, but is not limited to, three chips and three colors, depending on actual needs. For example, the MIP structure can be configured as RGBW (red, green, blue, white). Furthermore, the MIP chip structure provided in this embodiment of the invention is manufactured using a layered process, with RGB values ​​stacked vertically. This allows the MIP chip structure to be reduced to below 200µm, enabling the fabrication of displays with smaller pitches.

[0060] Furthermore, in this MIP chip structure, the RGB chips can be offset in the vertical direction (e.g., Figure 12 As shown), or located on the same straight line in the vertical direction (as shown). Figure 13 As shown, their vertical arrangement can be adjusted according to actual needs.

[0061] Furthermore, in the embodiments of the invention, the first metal wiring 320, the second metal wiring 330, and the third metal wiring 340 can be arranged in multiple ways, one such as... Figure 14 As shown, the P-type electrodes of the first metal wiring 320, the second metal wiring 330, and the third metal wiring 340 are arranged at various corners of the substrate, while their N-type electrodes are arranged as common electrodes, separately at one corner of the substrate. The RGB chip is correspondingly bonded to the P-type and N-type electrodes of the first metal wiring 320, the second metal wiring 330, and the third metal wiring 340; another example is... Figure 15 As shown, the P-type electrodes of the first metal wiring 320, the second metal wiring 330, and the third metal wiring 340 are all located on the same side and on the same vertical line, while their N-type electrodes are configured as common electrodes and located on the opposite side from the P-type electrodes. The RGB chip is correspondingly bonded to the P-type and N-type electrodes of the first metal wiring 320, the second metal wiring 330, and the third metal wiring 340. In this embodiment of the invention, a common N-type electrode is used as an example. The first metal wiring 320, the second metal wiring 330, and the third metal wiring 340 can also be configured as a common P-type electrode, and their specific arrangement is not limited to the two examples mentioned above. Other wiring methods with common N-type electrodes or common P-type electrodes are also possible.

[0062] Please refer to Figure 16 The diagram shown is a schematic of a MIP chip structure 300 provided in an embodiment of the present invention. The MIP chip structure 300 includes:

[0063] The substrate 310 may be a sapphire substrate, a silicon substrate, a semiconductor material substrate, a glass substrate, or other carrier substrate. When it is a sapphire substrate, its material includes Al2O3.

[0064] The metal wiring includes a first metal wiring 320, a second metal wiring 330, and a third metal wiring 340. The first metal wiring 320, the second metal wiring 330, and the third metal wiring 340 are located vertically and spaced apart by a certain distance. The space formed by this "certain distance" is used to accommodate the chip corresponding to the emitted light beam bonded after each metal wiring layer is formed, as well as a planar adhesive layer encapsulating the chip. The first metal wiring 320 is disposed on a substrate 310 and includes a first N-type electrode and a first P-type electrode. The second metal wiring 330 is disposed vertically above the first metal wiring 320 at a certain distance and includes a second N-type electrode and a second P-type electrode. The third metal wiring 340 is disposed vertically above the second metal wiring 330 at a certain distance and includes a third N-type electrode and a third P-type electrode. In this embodiment of the invention, the first metal wiring 320, the second metal wiring 330, and the third metal wiring 340 are connected together at one end, that is, the first N-type electrode, the second N-type electrode, and the third N-type electrode are connected together, or the first P-type electrode, the second P-type electrode, and the third P-type electrode are connected together to form a common electrode configuration.

[0065] Furthermore, in the embodiments of the invention, the first metal wiring, the second metal wiring, and the third metal wiring can be arranged in various ways, such as... Figure 14 As shown, the P-type electrodes of the first, second, and third metal wirings are arranged at various corners of the substrate, while their N-type electrodes are arranged as common electrodes in a separate corner of the substrate. The RGB chip is then bonded to the P-type and N-type electrodes of the first, second, and third metal wirings respectively; another example is... Figure 15 As shown, the P-type electrodes of the first, second, and third metal wirings are all located on the same side and in the same vertical line, while their N-type electrodes are configured as common electrodes and located on the opposite side from the P-type electrodes. The RGB chip is correspondingly bonded to the P-type and N-type electrodes of the first, second, and third metal wirings. In this embodiment of the invention, a common N-type electrode is used as an example. The first, second, and third metal wirings can also be configured as common P-type electrodes, and their specific arrangement is not limited to the two examples mentioned above. Other common N-type or common P-type electrode wiring methods are also possible.

[0066] In this embodiment of the invention, the chip 350 with different emitted light rays, the planar adhesive layer 360, and the blue light absorption film 370 are included. The chip 350 with different emitted light rays includes an RGB three-color chip. After the first metal wiring 320 is formed, the R chip is bonded to the first N-type electrode and the first P-type electrode of the first metal wiring 320; then a planar adhesive layer 360 is formed to cover the R chip. Repeating the above steps, after the second metal wiring 330 is formed, the G chip is bonded to the second N-type electrode and the second P-type electrode of the second metal wiring 330, forming a planar adhesive layer 360 to cover the G chip. The thickness of the planar adhesive layer 360 is 2-5 μm higher than the outer surface of the chip. The planar adhesive layer 360 protects the chip from displacement or scratches and also ensures the planarization of the entire chip surface, facilitating the fabrication of the next layer.

[0067] A blue light absorption film 370 is then formed on the flat adhesive layer 360 covering the G chip. It should be noted that the wavelength range of red light is 622–760 nm, the wavelength range of green light is 492–577 nm, and the wavelength range of blue light is 435–450 nm. As can be seen, blue light is a short wavelength, while red and green light are long wavelengths. Short-wavelength blue light easily excites the green or red light chip to emit light; conversely, the long-wavelength red or green light emitted by the red or green light chip is less likely to excite the blue light chip. Since the process will be repeated to bond the blue light chip after the green light chip is bonded, to prevent the downward-emitted light from the blue light chip from accidentally triggering the green or red light chip and affecting the display effect, a blue light absorption film is first formed on the flat adhesive layer covering the green light chip before forming the metal wiring for bonding the blue light chip. This film absorbs the downward-emitted light when the blue light chip emits light, preventing accidental triggering of the green or red light chip.

[0068] Furthermore, a third metal wiring 340 is formed on the blue light absorption film 370, and the B chip is bonded to the third N-type electrode and the third P-type electrode of the third metal wiring 340.

[0069] It should be noted that in this MIP chip structure, the RGB chips can be staggered in the vertical direction (e.g., Figure 12 As shown), or located on the same straight line in the vertical direction (as shown). Figure 13 As shown, the vertical arrangement of the MIP chip can be adjusted according to actual needs. Because this MIP chip structure uses a stacked design, its chip size can be reduced to below 200µm, making it suitable for manufacturing displays with smaller pitches (P0.2-P0.4), thus broadening its application range.

[0070] Furthermore, embodiments of the present invention also provide a display device including the MIP chip structure, that is, the MIP chip structure is bonded on the driving substrate of the display device for displaying light. It is readily understood that the display device can be, but is not limited to, display devices such as computers, televisions, and outdoor displays.

[0071] In summary, the MIP chip structure, its process method, and display device provided by the embodiments of the present invention first provide a substrate, then coat the entire substrate with photoresist, and form a metal wiring pattern by exposure, development, and etching using a mask; deposit a layer of metal on the metal wiring pattern, and remove the photoresist to form metal wiring; bond chips with the same emitting light beam to the metal wiring, and after chip bonding is completed, coat the entire layer with a planarizing adhesive layer to complete chip packaging; repeat the above steps three times to create a metal wiring pattern, form metal wiring, bond chips with the same emitting light beam, and coat a planarizing adhesive layer to form three layers of metal wiring that are vertically spaced at a certain distance and connected at one end, with each layer of metal wiring bonded to chips with the same emitting light beam; because the chips with different emitting light beams are vertically stacked, the overall chip size is effectively reduced, realizing a smaller MIP chip structure.

[0072] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0073] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the invention should be included within the scope of protection of the invention. It should be noted that similar reference numerals and letters in the following figures denote similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0074] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A MIP chip structure, characterized by, The MIP chip structure comprises: a substrate; metallic wiring disposed on the substrate, the metallic wiring comprising a first metallic wiring, a second metallic wiring and a third metallic wiring, the first metallic wiring, the second metallic wiring and the third metallic wiring being disposed at a distance from each other in a vertical direction and having one end connected together; a plurality of chips of different outgoing light rays, the chips of the same outgoing light ray being bonded to the first metallic wiring, the second metallic wiring and the third metallic wiring, respectively.

2. The MIP chip structure of claim 1, wherein: the first metallic wiring is disposed on the substrate, and the first metallic wiring comprises a first N-type electrode and a first P-type electrode; the second metallic wiring is disposed at a distance from the first metallic wiring vertically above, and the second metallic wiring comprises a second N-type electrode and a second P-type electrode; the third metallic wiring is disposed at a distance from the second metallic wiring vertically above, and the third metallic wiring comprises a third N-type electrode and a third P-type electrode; the first N-type electrode, the second N-type electrode and the third N-type electrode are connected together, or the first P-type electrode, the second P-type electrode and the third P-type electrode are connected together.

3. The MIP chip structure of claim 2, wherein, the plurality of chips of different outgoing light rays comprises a red light chip, a green light chip and a blue light chip; two electrodes of the red light chip are bonded to the first N-type electrode and the first P-type electrode of the first metallic wiring, respectively; two electrodes of the green light chip are bonded to the second N-type electrode and the second P-type electrode of the second metallic wiring, respectively; two electrodes of the blue light chip are bonded to the third N-type electrode and the third P-type electrode of the third metallic wiring, respectively.

4. The MIP chip structure of any of claims 1-3, wherein, further comprising a flat adhesive layer, the flat adhesive layer is uniformly laid around the chips of different outgoing light rays and wraps the chips of different outgoing light rays.

5. The MIP chip structure of claim 4, wherein, The flat adhesive layer is 2-5um higher than the outer surface of the chips of different outgoing light rays.

6. The MIP chip structure of any of claims 1-3, wherein, further comprising a blue light absorbing film, the blue light absorbing film is disposed vertically below the blue light chip emitting blue light.

7. A display device, characterized by comprising: The display device comprises the MIP chip structure according to any one of claims 1-6.

8. A process method of a MIP chip structure, characterized in that, The method comprises: Step 1: providing a substrate; Step 2: uniformly coating photoresist on the substrate and etching a metal wiring pattern; Step 3: evaporating a layer of metal and removing the photoresist to form a metal wiring; Step 4: bonding the chips of the same outgoing light ray to the metal wiring; Repeat steps 2-4 to form three layers of metal wiring vertically spaced at a distance and having one end connected together, each layer of metal wiring bonding to the chips of different outgoing light rays.

9. The process method of claim 8, wherein, The step of bonding the chips of the same outgoing light ray to the metal wiring further comprises: uniformly coating a flat adhesive layer, the flat adhesive layer wrapping the chips of the same outgoing light ray, the thickness of the flat adhesive layer being 2-5um higher than the outer surface of the chips of the same outgoing light ray.

10. The process method of claim 9, wherein, Before forming the metal wiring bonded to the blue light chip emitting blue light, further comprising: A blue light absorbing film is formed on the flat adhesive layer that encapsulates the other emitted light from the chip in the previous layer.

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