A component layout system for a DC-DC power module

Abstract

The application relates to the technical field of circuit element layout, in particular to an element layout system of a DC-DC power module, which obtains a candidate position range according to a first preset position range and a second preset position, obtains a reference distance according to an initial value set, a target value, a preset wiring width and a preset dielectric constant, comprehensively considers different distance and angle combinations to generate a series of possible candidate positions, facilitates comprehensive exploration of the layout possibility of a target element on a target printed circuit board, respectively obtains an output voltage sequence and a response delay time corresponding to each candidate position to represent the stability, accuracy, reliability and timeliness of the circuit under different candidate positions, and then obtains a target priority corresponding to each candidate position, determines the candidate position corresponding to the maximum target priority as the target position of the target element, improves the layout rationality of the target element, and further improves the performance and reliability of the entire circuit.

Description

Technical Field

[0001] This invention relates to the field of circuit element layout technology, and in particular to an element layout system for a DC-DC power supply module. Background Technology

[0002] A DC-DC switching power supply is a power supply device that can convert DC input voltage into different DC output voltages. It has wide applications in many fields such as electronic equipment, communication equipment, industrial control, and new energy.

[0003] DC-DC switching power supplies may radiate electromagnetic interference during operation due to various reasons. For example, the switching devices in the DC-DC switching power supply will generate instantaneous high voltage and large current changes during high-speed conduction and turn-off; the inductors and capacitors in the power supply may also generate interference during operation; heat dissipation problems during operation; and the layout of components in the peripheral circuits. All of these issues may cause the DC-DC switching power supply to generate electromagnetic interference during operation, leading to interference with other devices or systems, resulting in unstable operation, malfunctions, and other problems.

[0004] To address the aforementioned issues, current DC-DC switching power supply designs employ various methods: selecting appropriate switching frequencies and utilizing soft-switching technology to reduce voltage and current surges during switching; shielding and filtering the power supply to suppress interference conduction; choosing suitable heat dissipation methods to lower the power supply's operating temperature; and relying on the designer's experience to optimize component placement in the DC-DC switching power supply's peripheral circuitry to minimize electromagnetic interference.

[0005] However, designers' experience is often based on past projects, but each DC-DC switching power supply application scenario may be different. Relying solely on experience may not be able to fully consider all the requirements and potential problems in new scenarios. Furthermore, experience-driven layout methods are difficult to establish into a unified and followable standard process, leading to differences in the experience of different designers. This increases the difficulty of project handover, subsequent maintenance, and mass production. At the same time, experience is a relatively vague basis for judgment. Compared with precise circuit analysis and simulation, relying solely on experience for component placement lacks scientific methods and precise calculations. It is difficult to accurately grasp the exact location of components and the impact of the relationships between components on circuit performance, resulting in suboptimal layout. This may also lead to problems such as signal interference and voltage instability, affecting the performance and reliability of electronic equipment.

[0006] Therefore, how to rationally arrange the DC-DC power supply module and its peripheral components to reduce electromagnetic interference in the circuit and improve the stability of the output voltage has become an urgent problem to be solved. Summary of the Invention

[0007] To address the aforementioned technical problems, the present invention provides a component placement system for a DC-DC power module. This system includes a target printed circuit board, target components, an initial component set, a DC-DC power chip, target pins on the DC-DC power chip, preset simulation software, a processor, and a memory storing a computer program. The memory also stores target values ​​for the target components, a first preset position range of the DC-DC power chip on the target printed circuit board, a second preset position of the target pins on the target printed circuit board, and an initial value set corresponding to the initial component set. When the computer program is executed by the processor, the following steps are implemented:

[0008] S1, based on the first preset position range and the second preset position, obtain the candidate position range of the target component on the target printed circuit board.

[0009] S2, based on the initial set of values, the target value, the preset trace width, and the preset dielectric constant, obtain the reference distance D0 between the target component and the target pin.

[0010] S3, based on the reference distance D0, the candidate position range, and the preset distance step size d, obtain the candidate distance set D = {D1, D2, ..., D...} between the target component and the target pin. i , ..., D N}, where D i =D0+i×d, and D i Within the candidate position range, i = 1, 2, ..., N, where N represents the total number of candidate distances.

[0011] S4. Based on the candidate distance set D, the second preset position and the preset offset angle step θ, a candidate position set is obtained, wherein the candidate position set includes several candidate positions within the candidate position range.

[0012] S5. Simulate the target printed circuit board, target components, initial component set, DC-DC power chip and candidate position set in the preset simulation software to obtain the output voltage sequence and response delay time corresponding to each candidate position.

[0013] S6. Based on the output voltage sequence and response delay time corresponding to each candidate position, obtain the target priority corresponding to each candidate position.

[0014] S7, determine the candidate position corresponding to the highest target priority as the target position of the target component, wherein the target position is used to lay out the target component on the target printed circuit board.

[0015] The present invention has at least the following beneficial effects: Based on a first preset position range and a second preset position, a candidate position range for the target component on the target printed circuit board is obtained; based on an initial value set, a target value, a preset trace width, and a preset dielectric constant, a reference distance D0 between the target component and the target pin is obtained, providing a benchmark for further determining the specific position of the target component; based on the reference distance D0, the candidate position range, and a preset distance step d, a candidate distance set D between the target component and the target pin is obtained; based on the candidate distance set D, the second preset position, and a preset offset angle step θ, a candidate position set is obtained; and by considering different combinations of distance and angle, a series of possible candidate positions are generated. It can comprehensively explore the layout possibilities of target components on the target printed circuit board, more accurately determine candidate positions, and help find the optimal layout position. Simulation is performed in preset simulation software based on the target printed circuit board, target components, initial component set, DC-DC power chip, and candidate position set. The output voltage sequence and response delay time corresponding to each candidate position are obtained to characterize the stability, accuracy, reliability, and timeliness of the circuit under different candidate positions. Then, the target priority corresponding to each candidate position is obtained, and the candidate position corresponding to the highest target priority is determined as the target position of the target component, which improves the layout rationality of the target components and thus improves the performance and reliability of the entire circuit. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a structural block diagram of a component layout system for a DC-DC power module provided in an embodiment of the present invention. Detailed Implementation

[0018] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0019] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It is understood that, where appropriate, the terms used to distinguish similar objects can be interchanged so that the invention can also be implemented in other embodiments besides the illustrated or described embodiments. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or server that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to these processes, methods, products, or devices.

[0020] This embodiment provides a component placement system for a DC-DC power module. The component placement system includes a target printed circuit board, target components, an initial component set, a DC-DC power chip, target pins on the DC-DC power chip, preset simulation software, a processor, and a memory storing a computer program. The memory also stores target values ​​for the target components, a first preset position range of the DC-DC power chip on the target printed circuit board, a second preset position of the target pins on the target printed circuit board, and an initial value set corresponding to the initial component set. When the computer program is executed by the processor, such as... Figure 1 As shown, the following steps are performed:

[0021] S1, based on the first preset position range and the second preset position, obtain the candidate position range of the target component on the target printed circuit board.

[0022] Printed circuit boards are substrates that carry and connect electronic components to achieve specific circuit functions. By arranging the DC-DC power supply chip, target components, and initial components from the initial component set on the target printed circuit board, the relevant functions of the DC-DC switching power supply can be realized.

[0023] DC-DC power supply chips have target pins. When the distance between the target pin and the target component is too close, electromagnetic interference can occur, reducing voltage stability. When the distance is too far, signal delay in the circuit increases. Therefore, the distance between the target pin and the target component needs to be set appropriately to improve circuit performance and reliability.

[0024] For example, a target pin on a DC-DC power supply chip might refer to the FB pin, the corresponding target component might be an inductor, and the target value might be the inductance value. The initial component set could include several resistors and several capacitors. Because an inductor generates an alternating magnetic field during operation, when the inductor and FB pin are too close, the alternating magnetic field is more easily coupled to the FB pin, introducing additional electromagnetic interference into the feedback signal. This causes the feedback signal to become distorted, resulting in inaccurate voltage feedback information received by the power supply chip, thus affecting its accurate regulation of the output voltage. It also causes the circuit to radiate more electromagnetic noise, potentially interfering with the normal operation of other surrounding electronic devices. When the inductor and FB pin are too far apart, the signal will attenuate to some extent during transmission between the FB pin and the inductor, resulting in a transmission delay. This may prevent the power supply chip from making timely adjustments based on the actual output voltage, affecting the stability of the output voltage, potentially leading to instability such as overshoot or undershoot.

[0025] Therefore, this embodiment arranges the DC-DC power supply chip, inductor, resistor and capacitor layout on the target printed circuit board to form a DC-DC switching power supply and its peripheral circuit. By reasonably setting the distance between the inductor and the FB pin in the DC-DC power supply chip, the electromagnetic interference and signal delay problems of the circuit signal can be comprehensively optimized, thereby improving the performance and reliability of the DC-DC switching power supply.

[0026] In one specific embodiment, the first preset position range is a rectangular range corresponding to the outer edge of the DC-DC power supply chip, and S1 includes the following steps:

[0027] S11, based on the first preset position range and the second preset position, obtain the target line segment range corresponding to the target pin within the first preset position range, wherein the target line segment range refers to the line segment range corresponding to the outer edge of the target pin.

[0028] S12, by extending the range of the target line segment, the target printed circuit board is divided into a first sub-region and a second sub-region.

[0029] S13, the sub-regions in the first and second sub-regions that do not include the second preset position are determined as the candidate position range of the target component on the target printed circuit board.

[0030] The preset coordinate system O is obtained by taking the lower left corner of the target printed circuit board as the origin, the lower edge of the target printed circuit board as the horizontal axis, and the left edge of the target printed circuit board as the vertical axis.

[0031] Based on the line segment ranges corresponding to each outer edge in the first preset position range, the coordinate ranges corresponding to each line segment range can be obtained. By comparing and searching with the coordinate ranges corresponding to the second preset position, the line segment range in which the second preset range is located can be determined, thereby obtaining the target line segment range.

[0032] By extending the target line segment, the intersection point between the target line segment and the outer edge can be obtained. Then, based on the intersection point, the target printed circuit board can be divided into a first sub-region and a second sub-region, wherein the second preset position falls within the first sub-region or the second sub-region.

[0033] To reduce the electromagnetic interference caused by the distance between the target component and the target pin, a sub-region excluding the second preset position is defined as the candidate position range of the target component on the target printed circuit board. This is used to set the specific position of the target component in order to improve the performance and reliability of the circuit.

[0034] S2, based on the initial set of values, the target value, the preset trace width, and the preset dielectric constant, obtain the reference distance D0 between the target component and the target pin.

[0035] In one specific embodiment, the initial value set corresponding to the initial element set includes a list of initial values ​​C = {C1, C2, ..., C...} corresponding to preset elements. j , ..., C M}, where C j This refers to the initial value corresponding to the j-th preset element, where j = 1, 2, ..., M, and M is the total number of preset elements. The reference distance D0 between the target element and the target pin meets the following condition:

[0036] D0=W / (2×∏ M j＝1 (L×C j ×ε r ), where W refers to the preset trace width, ε r This refers to the preset dielectric constant, C. j L refers to the initial value corresponding to the j-th preset element, and L refers to the target value.

[0037] The width of the trace determines the amount of current it can safely carry. When laying out electronic components, the trace width must be considered. Therefore, this embodiment obtains a preset trace width to determine the reference distance between the target component and the target pin. Correspondingly, the preset trace width is positively correlated with the reference distance, so as to provide sufficient layout space between the target component and the target pin when the preset trace width is large.

[0038] The specific value of the preset trace width can be set by the implementer according to the actual situation.

[0039] As described above, based on the initial set of values, the target value, the preset trace width, and the preset dielectric constant, the reference distance D0 between the target component and the target pin is obtained, which provides a benchmark for further determining the specific location of the target component, thereby improving the efficiency and accuracy of obtaining the specific location of the target component.

[0040] S3, based on the reference distance D0, the candidate position range, and the preset distance step size d, obtain the candidate distance set D = {D1, D2, ..., D...} between the target component and the target pin. i , ..., D N}, where D i =D0+i×d, and D i Within the candidate position range, i = 1, 2, ..., N, where N represents the total number of candidate distances.

[0041] In practical circuit design, different circuit components and chips may have different distance requirements. By adjusting the distance step size d and the reference distance D0, different design scenarios and needs can be adapted.

[0042] By setting the distance step size d, the distance can be gradually increased based on the reference distance D0, thereby covering various possible distance values ​​within a certain range. This facilitates a comprehensive exploration of the relationship between the target component and the target pin at different distances, so as to find the optimal layout position.

[0043] The specific value of the preset distance step size d can be set by the implementer according to the actual situation. For example, for some circuits that are sensitive to signal interference, a smaller distance step size may be needed to adjust the distance more finely in order to find the layout with minimal interference. On the other hand, for some circuits with high heat dissipation requirements, a larger distance step size may be needed to quickly determine the appropriate heat dissipation distance.

[0044] In one specific implementation, d = L / 10. Where L refers to the maximum value of the outer edge of the target printed circuit board.

[0045] As mentioned above, the generation of the candidate distance set enables subsequent analysis and comparison of layouts at multiple different distances, increasing the likelihood of finding the optimal layout solution.

[0046] S4. Based on the candidate distance set D, the second preset position and the preset offset angle step θ, a candidate position set is obtained, wherein the candidate position set includes several candidate positions within the candidate position range.

[0047] In one specific embodiment, the second preset position Z = {x0, y0}, where x0 refers to the abscissa of the target pin in the preset coordinate system O, and y0 refers to the ordinate of the target pin in the preset coordinate system O. The preset coordinate system O is a coordinate system with the lower left corner of the target printed circuit board as the origin, the lower edge of the target printed circuit board as the abscissa, and the left edge of the target printed circuit board as the ordinate. The candidate position set is obtained through the following steps:

[0048] S41, according to D i And θ, to obtain D i The corresponding candidate position list W i ={W i1 W i2 , ..., W ik , ..., W iP(i)}, where W ik =(x ik y ik ), x ik =x0+α×D i ×sin(k×θ), y ik =y0+D i ×cos(k×θ), where k×θ refers to the distance from the target pin to the candidate position W. ik The angle between the direction and the positive direction of the vertical axis in the preset coordinate system O, α is a reference coefficient. When the x-coordinate within the candidate position range is greater than x0, α ​​= 1, and when the x-coordinate within the candidate position range is less than x0, α ​​= -1.

[0049] S42, iterate through D1, D2, ..., D i , ..., D N The candidate position set W = {W1, W2, ..., W...} is obtained. i , ..., W N}

[0050] Among them, the candidate distance determines the spatial relationship between the target component and the target pin, the second preset position of the target pin is the key reference point in the circuit, and the offset angle can adjust the direction and relative position of the target component. Based on the given candidate distance set D, the second preset position and the preset offset angle step size θ, by considering different combinations of distance and angle, a series of possible candidate positions are generated. This allows for a comprehensive exploration of the layout possibilities of the target component on the target printed circuit board, thereby more accurately determining the candidate positions and improving the rationality and effectiveness of the layout.

[0051] In this embodiment, a preset coordinate system O is established with the lower left corner of the target printed circuit board as the origin, the lower edge of the target printed circuit board as the horizontal axis, and the left edge of the target printed circuit board as the vertical axis, providing a unified reference framework for determining the position of the target pin and the candidate position of the target component.

[0052] The reference coefficient α is determined based on the relationship between the x-coordinate within the candidate position range and x0. When the x-coordinate within the candidate position range is greater than x0, α ​​= 1. When the x-coordinate within the candidate position range is less than x0, α ​​= -1.

[0053] The specific value of the preset offset angle step θ can be set by the implementer according to the actual situation.

[0054] In one specific implementation, y ik <y 1 y 1 This refers to the maximum vertical coordinate corresponding to the target printed circuit board.

[0055] In one specific implementation, when α = 1, x0 < x ik <x 1 x 1 This refers to the maximum horizontal coordinate corresponding to the target printed circuit board.

[0056] In one specific implementation, when α = -1, 0 < x ik <x0.

[0057] Based on the given candidate distance set D, the second preset position, and the preset offset angle step θ, a series of possible candidate positions are generated by considering different combinations of distance and angle. This allows for a comprehensive exploration of the layout possibilities of the target component on the target printed circuit board, more accurate determination of candidate positions, and helps to find the optimal layout position, thereby improving the rationality and effectiveness of the layout to meet requirements such as circuit performance, signal integrity, and electromagnetic compatibility.

[0058] S5. Simulate the target printed circuit board, target components, initial component set, DC-DC power chip and candidate position set in the preset simulation software to obtain the output voltage sequence and response delay time corresponding to each candidate position.

[0059] In one specific embodiment, S5 includes the following steps:

[0060] S31, Set the target printed circuit board in the preset simulation software and obtain the first simulated printed circuit board.

[0061] S32, based on the first preset position range of the DC-DC power chip on the target printed circuit board and the second preset position of the target pin on the target printed circuit board, set the DC-DC power chip on the simulation printed circuit board and obtain the second simulation printed circuit board.

[0062] S33, set the target component corresponding to each candidate position in the second simulation printed circuit board, and obtain the third simulation printed circuit board corresponding to each candidate position.

[0063] S34, set the initial components in the initial component set in the third simulated printed circuit board corresponding to each candidate position, and obtain the fourth simulated printed circuit board corresponding to each candidate position.

[0064] S35, obtain the output voltage sequence and response delay time of the fourth simulated printed circuit board corresponding to each candidate position within a preset time period.

[0065] In this process, a target printed circuit board is set in the preset simulation software. For example, the design file of the target printed circuit board is imported, and parameters such as the size, number of layers, and material of the circuit board are set to obtain the first simulated printed circuit board.

[0066] Based on the first preset position range of the DC-DC power chip on the target printed circuit board and the second preset position of the target pin on the target printed circuit board, the placement position of the DC-DC power chip is determined so as to set the DC-DC power chip on the first simulated printed circuit board and obtain the second simulated printed circuit board.

[0067] Target components corresponding to each candidate position are set in the second simulation printed circuit board, and the third simulation printed circuit board corresponding to each candidate position is obtained to simulate the impact of target components on circuit performance under different candidate positions.

[0068] Initial components, such as resistors and capacitors, are set in the initial component set on the third simulated printed circuit board corresponding to each candidate position. This process generates a fourth simulated printed circuit board for each candidate position, thus forming a complete circuit. The position of each initial component on the target printed circuit board is determined based on the connection relationships between the initial components and the target component and the DC-DC power chip, thereby forming the DC-DC power chip and its complete peripheral circuitry. These connection relationships include series, parallel, mixed, and no connections.

[0069] By running circuit simulation in simulation software and recording the output voltage values ​​of each node within a preset time period, an output voltage sequence is obtained. This output voltage sequence reflects the circuit's stability, accuracy, reliability, and timeliness at different candidate locations. Therefore, by comparing the performance of the circuit at each candidate location, a basis for selecting the optimal placement of target components can be provided.

[0070] The above describes the process of setting up a target printed circuit board, target components corresponding to each candidate position, an initial component set, and a DC-DC power supply chip in the simulation software. The simulation is then run, and the output voltage values ​​of each node are recorded within a preset time period to obtain an output voltage sequence. This sequence is used to characterize the stability, accuracy, reliability, and timeliness of the circuit under different candidate positions, providing a basis for selecting the optimal layout position of the target components and thus improving the rationality of the target component layout.

[0071] S6. Based on the output voltage sequence and response delay time corresponding to each candidate position, obtain the target priority corresponding to each candidate position.

[0072] In one specific embodiment, S6 includes the following steps:

[0073] S61, based on the output voltage sequence corresponding to each candidate position, obtain the first priority corresponding to each candidate position.

[0074] S62, based on the response delay time corresponding to each candidate position, obtain the second priority corresponding to each candidate position, wherein the second priority is negatively correlated with the response delay time.

[0075] S63, based on the first priority, second priority, first preset weight corresponding to the first priority, and second preset weight corresponding to the second priority corresponding to each candidate position, obtain the target priority corresponding to each candidate position.

[0076] The algorithm analyzes factors such as output voltage stability, ripple magnitude, and whether it falls within a specified voltage range to determine the first priority for each candidate position. For example, a candidate position with a more stable output voltage, smaller ripple, and closer to the ideal voltage value is likely to have a higher first priority.

[0077] Response delay time refers to the time interval between a change in the input signal and a corresponding change in the output signal. Second priority is negatively correlated with response delay time; that is, the shorter the response delay time, the higher the timeliness of the circuit, and the higher the second priority.

[0078] A weighted summation method can be used, for example, target priority = first priority × first preset weight + second priority × second preset weight. The specific values ​​of the first and second preset weights can be set by the implementer according to the actual situation. By setting the first and second preset weights, the weight of the output voltage sequence and response delay time in the target priority calculation can be adjusted according to actual needs, allowing designers to flexibly balance different performance indicators according to specific application scenarios and circuit requirements to achieve the best layout effect.

[0079] In one specific embodiment, S61 includes the following steps:

[0080] S611, calculate the voltage variance between all output voltages in each output voltage sequence.

[0081] S612, based on the voltage variance corresponding to each output voltage sequence, obtain the first priority corresponding to each candidate position, wherein the first priority is negatively correlated with the voltage variance.

[0082] The larger the voltage variance, the lower the stability of the output voltage. Correspondingly, the first priority is negatively correlated with the voltage variance.

[0083] As described above, by comprehensively considering the output voltage sequence and response delay time to determine the target priority of each candidate position, and by more comprehensively judging the impact of each candidate position on the overall circuit performance, it is helpful to make more targeted selections among multiple candidate positions and improve the rationality of the layout of target components.

[0084] S7, determine the candidate position corresponding to the highest target priority as the target position of the target component, wherein the target position is used to lay out the target component on the target printed circuit board.

[0085] By selecting the location with the highest target priority to place the target component, it can be ensured that the circuit can provide a stable voltage output in a timely manner during operation, reduce the impact of voltage fluctuations on other electronic components, and improve the performance and reliability of the entire circuit.

[0086] As described above, based on the first preset position range and the second preset position, the candidate position range of the target component on the target printed circuit board is obtained. Based on the initial value set, the target value, the preset trace width, and the preset dielectric constant, the reference distance D0 between the target component and the target pin is obtained, providing a benchmark for further determining the specific position of the target component. Based on the reference distance D0, the candidate position range, and the preset distance step d, the candidate distance set D between the target component and the target pin is obtained. Based on the candidate distance set D, the second preset position, and the preset offset angle step θ, the candidate position set is obtained. By considering different combinations of distance and angle, a series of possible candidate positions are generated, which can comprehensively explore... By exploring the possible layouts of target components on the target printed circuit board, candidate positions can be more accurately determined, which helps to find the optimal layout position. Simulations are performed in preset simulation software based on the target printed circuit board, target components, initial component set, DC-DC power supply chip, and candidate position set. The output voltage sequence and response delay time corresponding to each candidate position are obtained to characterize the stability, accuracy, reliability, and timeliness of the circuit under different candidate positions. Then, the target priority corresponding to each candidate position is obtained, and the candidate position corresponding to the highest target priority is determined as the target position of the target component. This improves the rationality of the target component layout and thus improves the performance and reliability of the entire circuit.

[0087] While specific embodiments of the invention have been described in detail by way of example, those skilled in the art should understand that the examples are for illustrative purposes only and not intended to limit the scope of the invention. Those skilled in the art should also understand that various modifications can be made to the embodiments without departing from the scope and spirit of the invention. The scope of this invention is defined by the appended claims.

Claims

1. A component layout system for a DC-DC power supply module, characterized by, The component layout system of the DC-DC power module includes a target printed circuit board, target components, an initial component set, a DC-DC power chip, target pins on the DC-DC power chip, preset simulation software, a processor, and a memory storing a computer program. The memory also stores target values ​​for the target components, a first preset position range of the DC-DC power chip on the target printed circuit board, a second preset position of the target pins on the target printed circuit board, and an initial value set corresponding to the initial component set. When the computer program is executed by the processor, the following steps are implemented: S1, Based on the first preset position range and the second preset position, obtain the candidate position range of the target element on the target printed circuit board; S2, based on the initial set of values, the target value, the preset trace width, and the preset dielectric constant, obtain the reference distance D0 between the target element and the target pin; S3, based on the reference distance D0, the candidate position range, and the preset distance step size d, obtain the candidate distance set D={D1, D2, ..., D...} between the target element and the target pin. i , ..., D N }, where D i =D0+i×d, and D i Within the range of candidate locations, i = 1, 2, ..., N, where N represents the total number of candidate distances; S4. Based on the candidate distance set D, the second preset position, and the preset offset angle step θ, a candidate position set is obtained, wherein the candidate position set includes several candidate positions within the candidate position range; S5, Simulation is performed in the preset simulation software based on the target printed circuit board, the target component, the initial component set, the DC-DC power chip, and the candidate position set, and the output voltage sequence and response delay time corresponding to each candidate position are obtained respectively; S6. Based on the output voltage sequence and response delay time corresponding to each candidate position, obtain the target priority corresponding to each candidate position; S7, determine the candidate position corresponding to the highest target priority as the target position of the target element, wherein the target position is used to lay out the target element on the target printed circuit board.

2. The system for layout of elements of a DC-DC power supply module according to claim 1, characterized in that, The first preset position range is a rectangular range corresponding to the outer edge of the DC-DC power chip. S1 includes the following steps: S11, based on the first preset position range and the second preset position, obtain the target line segment range corresponding to the target pin within the first preset position range, wherein the target line segment range refers to the line segment range corresponding to the outer edge of the target pin; S12, by extending the range of the target line segment, the target printed circuit board is divided into a first sub-region and a second sub-region; S13, the sub-regions in the first sub-region and the second sub-region that do not include the second preset position are determined as the candidate position range of the target element on the target printed circuit board.

3. The system for layout of components of a DC-DC power supply module according to claim 1, wherein, The initial value set corresponding to the initial element set includes a list of initial values ​​C={C1, C2, ..., C...} corresponding to preset elements. j , ..., C M }, where C j This refers to the initial value corresponding to the j-th preset element, where j = 1, 2, ..., M, and M represents the total number of preset elements. The reference distance D0 between the target element and the target pin meets the following condition: D0=W / (2×∏ M j=1 (L×C j ×ε r ), where W refers to the preset trace width, ε r This refers to the preset dielectric constant, C. j refers to the initial value corresponding to the j-th preset element, and L refers to the target value.

4. The system for layout of components of a DC-DC power supply module according to claim 1, wherein, S5 includes the following steps: S31, Set the target printed circuit board in the preset simulation software and obtain the first simulated printed circuit board; S32, based on the first preset position range of the DC-DC power chip on the target printed circuit board and the second preset position of the target pin on the target printed circuit board, the DC-DC power chip is set on the simulation printed circuit board to obtain the second simulation printed circuit board; S33, set the target component corresponding to each candidate position in the second simulated printed circuit board respectively, and obtain the third simulated printed circuit board corresponding to each candidate position; S34, set the initial element in the initial element set in the third simulated printed circuit board corresponding to each candidate position, and obtain the fourth simulated printed circuit board corresponding to each candidate position; S35, obtain the output voltage sequence and response delay time of the fourth simulated printed circuit board corresponding to each candidate position within a preset time period.

5. The system for layout of components of a DC-DC power supply module according to claim 1, wherein, S6 includes the following steps: S61, based on the output voltage sequence corresponding to each candidate position, obtain the first priority corresponding to each candidate position; S62, based on the response delay time corresponding to each candidate position, obtain the second priority corresponding to each candidate position, wherein the second priority is negatively correlated with the response delay time; S63, based on the first priority, second priority, first preset weight corresponding to the first priority, and second preset weight corresponding to the second priority corresponding to each candidate position, obtain the target priority corresponding to each candidate position.

6. The system for layout of components of a DC-DC power supply module according to claim 1, wherein, S61 includes the following steps: S611, calculate the voltage variance between all output voltages in each output voltage sequence; S612, based on the voltage variance corresponding to each output voltage sequence, obtain the first priority corresponding to each candidate position, wherein the first priority is negatively correlated with the voltage variance.

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