Quadrature coupler and method of operation

Abstract

A quadrature coupler includes four ports, four inductors, and six capacitors. The first to third capacitors are coupled in series between the first port and the fourth port. The first intermediate node is located between the first capacitor and the second capacitor. The second intermediate node is located between the second capacitor and the third capacitor. The fourth to sixth capacitors are coupled in series between the second port and the third port. The third intermediate node is located between the fourth capacitor and the fifth capacitor, and the fourth intermediate node is located between the fifth capacitor and the sixth capacitor. The first inductor is coupled between the first port and the second port. A second inductor is coupled between the first intermediate node and the third intermediate node. A third inductor is coupled between the second intermediate node and the fourth intermediate node. The fourth inductor is coupled between the fourth port and the third port. A variable tuning network may be coupled between the first port and the fourth port and between the second port and the third port.

Description

Technical Field

[0001] The present invention discloses embodiments of a quadrature coupler and a method for operating the same. Background Art

[0002] In a wireless communication system, a power amplifier may include an orthogonal coupler that is used to distribute an input radio frequency (RF) signal into two output RF signals with a phase difference of 90 degrees, or alternatively, to phase align and synthesize two input RF signals received with a phase difference of 90 degrees into a single output RF signal. An orthogonal coupler typically has four ports (e.g., an input port, a through port, a coupled port, and an isolated port). An ideal orthogonal coupler with a coupling factor (K) equal to 0.5 divides the power of the input RF signal received at the input port into two RF signals at the through and coupled ports, each of which contains 50% of the power of the input RF signal. Ideally, no power is transmitted to the isolated port. In addition, in an ideal orthogonal coupler, the phase difference between the RF signals at the through and coupled ports is exactly 90 degrees. In other words, at the through and coupled ports, the amplitude distribution ratio of the ideal orthogonal coupler is exactly 50:50 and the phase difference is exactly 90 degrees.

[0003] However, in a more practical physical implementation of a conventional quadrature coupler, a perfect 50:50 power split ratio and a phase difference of exactly 90 degrees at the through and coupled ports may only be achieved within a relatively narrow bandwidth. In addition, conventional quadrature couplers cannot be adjusted to compensate for component value changes, component value drifts associated with aging, or other performance variables that the coupler may experience when in the field. The limited bandwidth and adjustability of conventional quadrature couplers limit their performance. Therefore, there is a need for an apparatus and method for achieving a higher bandwidth, adjustable quadrature coupler. Summary of the invention

[0004] According to a first aspect of the present invention, there is provided an orthogonal coupler, comprising:

[0005] a first port, a second port, a third port, and a fourth port;

[0006] a first inductor, a second inductor, a third inductor, and a fourth inductor; and

[0007] a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor and a sixth capacitor, wherein

[0008] The first capacitor, the second capacitor, and the third capacitor are coupled in series between the first port and the fourth port, a first intermediate node is located between the first capacitor and the second capacitor, and a second intermediate node is located between the second capacitor and the third capacitor,

[0009] The fourth capacitor, the fifth capacitor and the sixth capacitor are coupled in series between the second port and the third port, a third intermediate node is located between the fourth capacitor and the fifth capacitor, and a fourth intermediate node is located between the fifth capacitor and the sixth capacitor,

[0010] The first inductor is coupled between the first port and the second port,

[0011] The second inductor is coupled between the first intermediate node and the third intermediate node,

[0012] The third inductor is coupled between the second intermediate node and the fourth intermediate node, and

[0013] The fourth inductor is coupled between the fourth port and the third port.

[0014] In one or more embodiments, the orthogonal coupler is configured to receive an input RF signal, split the power of the input RF signal into a first output RF signal and a second output RF signal, apply a 90 degree phase difference between the first output RF signal and the second output RF signal, and provide the first output RF signal and the second output RF signal to the second port and the third port.

[0015] In one or more embodiments, the orthogonal coupler further comprises:

[0016] a first variable tuning network coupled between the first port and the fourth port; and

[0017] A second variable tuning network is coupled between the second port and the third port.

[0018] In one or more embodiments, the first variable tuning network is connected between the first port and the fourth port, and

[0019] The second variable tuning network is connected between the second port and the third port.

[0020] In one or more embodiments, the first variable tuning network is connected between the first intermediate node and the second intermediate node, and

[0021] The second variable tuning network is connected between the third intermediate node and the fourth intermediate node.

[0022] In one or more embodiments, the first variable tuning network includes a first nonlinear reactive component and the second variable tuning network includes a second nonlinear reactive component.

[0023] In one or more embodiments, the first nonlinear reactive component is controlled by a first bias voltage, and the second nonlinear reactive component is controlled by a second bias voltage.

[0024] In one or more embodiments, the first variable tuning network includes a first capacitor and a first switch, and the second variable tuning network includes a second capacitor and a second switch.

[0025] In one or more embodiments, the first capacitor and the first switch are connected in parallel; and

[0026] The second capacitor and the second switch are connected in parallel.

[0027] In one or more embodiments, the first capacitor and the first switch are connected in series; and

[0028] The second capacitor and the second switch are connected in series.

[0029] In one or more embodiments, the first variable tuning network and the second variable tuning network can be controlled to have the same capacitance value at any given time.

[0030] In one or more embodiments, the first variable tuning network and the second variable tuning network tune a coupling factor of the quadrature coupler.

[0031] In one or more embodiments, the first variable tuning network includes a first plurality of capacitors and switches to provide a first tunable capacitance, and the second variable tuning network includes a second plurality of capacitors and switches to provide a second tunable capacitance.

[0032] In one or more embodiments, the first capacitor, the third capacitor, the fourth capacitor, and the sixth capacitor each have a first capacitance value;

[0033] The second capacitor and the fifth capacitor each have a second capacitance value different from the first capacitance value;

[0034] The first inductor and the fourth inductor each have a first inductance value; and

[0035] The second inductor and the third inductor each have a second inductance value different from the first inductance value.

[0036] According to a second aspect of the present invention, there is provided a power amplifier, comprising:

[0037] a first amplifier having a first amplifier input;

[0038] a second amplifier having a second amplifier input;

[0039] A quadrature coupler comprising

[0040] First port,

[0041] coupled to a second port of the first amplifier input,

[0042] a third port coupled to the second amplifier input,

[0043] The fourth port,

[0044] a first inductor, a second inductor, a third inductor, and a fourth inductor, and

[0045] a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor and a sixth capacitor, wherein

[0046] The first capacitor, the second capacitor, and the third capacitor are coupled in series between the first port and the fourth port, a first intermediate node is located between the first capacitor and the second capacitor, and a second intermediate node is located between the second capacitor and the third capacitor,

[0047] The fourth capacitor, the fifth capacitor and the sixth capacitor are coupled in series between the second port and the third port, a third intermediate node is located between the fourth capacitor and the fifth capacitor, and a fourth intermediate node is located between the fifth capacitor and the sixth capacitor,

[0048] The first inductor is coupled between the first port and the second port,

[0049] The second inductor is coupled between the first intermediate node and the third intermediate node,

[0050] The third inductor is coupled between the second intermediate node and the fourth intermediate node, and

[0051] The fourth inductor is coupled between the fourth port and the third port.

[0052] In one or more embodiments, the power amplifier further comprises:

[0053] a first variable tuning network coupled between the first port and the fourth port;

[0054] a second variable tuning network coupled between the second port and the third port;

[0055] a controller to control states of the first variable tuning network and the second variable tuning network; and

[0056] A digital interface is coupled to the controller.

[0057] In one or more embodiments, the first variable tuning network includes a first capacitor and a first switch; and

[0058] The second variable tuning network includes a second capacitor and a second switch.

[0059] In one or more embodiments, the first variable tuning network includes a first nonlinear reactive component; and

[0060] The second variable tuning network includes a second nonlinear reactive component.

[0061] According to a third aspect of the present invention, there is provided a method of operating an orthogonal coupler having a first port, a second port, a third port and a fourth port, the method comprising:

[0062] controlling a capacitance value of a first variable tuning network coupled between the first port and the fourth port to tune a coupling factor of the quadrature coupler, wherein the first variable tuning network includes a first capacitor; and

[0063] controlling a capacitance value of a second variable tuning network coupled between the third port and the fourth port to tune the coupling factor of the quadrature coupler, wherein the second variable tuning network includes a second capacitor,

[0064] wherein the quadrature coupler further comprises

[0065] a first inductor, a second inductor, a third inductor, and a fourth inductor, and

[0066] a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor and a sixth capacitor, wherein

[0067] The first capacitor, the second capacitor, and the third capacitor are coupled in series between the first port and the fourth port, a first intermediate node is located between the first capacitor and the second capacitor, and a second intermediate node is located between the second capacitor and the third capacitor,

[0068] The fourth capacitor, the fifth capacitor and the sixth capacitor are coupled in series between the second port and the third port, a third intermediate node is located between the fourth capacitor and the fifth capacitor, and a fourth intermediate node is located between the fifth capacitor and the sixth capacitor,

[0069] The first inductor is coupled between the first port and the second port,

[0070] The second inductor is coupled between the first intermediate node and the third intermediate node,

[0071] The third inductor is coupled between the second intermediate node and the fourth intermediate node, and

[0072] The fourth inductor is coupled between the fourth port and the third port.

[0073] In one or more embodiments, the first variable tuning network includes a first switch connected in parallel with the first capacitor, and controlling the capacitance value of the first variable tuning network includes controlling the first switch; and

[0074] The second variable tuning network includes a second switch connected in parallel with the second capacitor, and controlling the capacitance value of the second variable tuning network includes controlling the second switch.

[0075] In one or more embodiments, the first variable tuning network includes a first switch connected in series with the first capacitor, and controlling the capacitance value of the first variable tuning network includes controlling the first switch; and

[0076] The second variable tuning network includes a second switch connected in series with the second capacitor, and controlling the capacitance value of the second variable tuning network includes controlling the second switch.

[0077] In one or more embodiments, the first variable tuning network includes a first nonlinear reactive component having a first variable capacitance value controlled by a first bias voltage, and controlling the first variable capacitance value of the first nonlinear reactive component includes providing the first bias voltage; and

[0078] The second variable tuning network includes a second nonlinear reactive component having a second variable capacitance value controlled by a second bias voltage, and controlling the second variable capacitance value of the second nonlinear reactive component includes providing the second bias voltage.

[0079] These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter. BRIEF DESCRIPTION OF THE DRAWINGS

[0080] Figure 1 A circuit diagram showing a quadrature coupler according to an example embodiment;

[0081] Figure 2A , 2B 2C shows a circuit diagram of a quadrature coupler having a variable capacitance circuit coupled between intermediate nodes according to various example embodiments;

[0082] Figure 3A , 3B and 3C show circuit diagrams of quadrature couplers having variable capacitance circuits coupled between coupler ports according to various additional example embodiments;

[0083] Figure 4 An orthogonal coupler formed in an integrated circuit according to an example embodiment is shown;

[0084] Figure 5 shows an orthogonal coupler formed of discrete components according to another example embodiment;

[0085] Figure 6 shows a simplified diagram of a power amplifier in which various embodiments of a quadrature coupler may be implemented according to an example embodiment; and

[0086] Figure 7 A flow chart illustrating a method of operating a quadrature coupler having a variable capacitance circuit according to an embodiment.

[0087] Throughout the description, the same reference numbers may be used to identify similar elements. DETAILED DESCRIPTION

[0088] The embodiments of the orthogonal couplers described herein can be used in various types of RF circuits, including power amplifier circuits. For example, the various embodiments described are well suited for use in RF power amplifiers to provide RF signal amplitude distribution, phase difference, and high isolation between output ports (e.g., between through and coupled ports).

[0089] The orthogonal coupler embodiments disclosed herein may have certain advantages over conventional orthogonal couplers. For example, the orthogonal coupler embodiments described herein are based on a unique architecture that enables a wider operating bandwidth when compared to other known orthogonal couplers. As will be described in detail below, the unique architecture includes four parallel-coupled inductors and six capacitors coupled between the parallel-coupled inductors.

[0090] In one or more additional embodiments, the quadrature coupler may include a tuning circuit system that enables the coupling factor K to be varied over a range of several decibels (dB), while the port return loss and the required 90-degree phase difference between the through and coupled ports may remain substantially constant. In other words, the phase difference between the signals at the through and coupled ports may remain at 90 degrees despite adjustments to the variable coupling factor. This enables the quadrature coupler to be tuned during operation to compensate for component value changes and component value drift associated with aging, as well as other variables. According to some embodiments, the coupling factor may be electronically varied, for example, via a digital interface (e.g., a serial peripheral interface SPI).

[0091] The tuning circuitry described herein enables quadrature coupler embodiments to be used to provide both symmetric coupling (ie, where the power provided to the two output ports is equal) and asymmetric coupling (eg, where the power provided to the two output ports is unequal).

[0092] Each embodiment of the orthogonal coupler described herein has four ports, including an input port (referred to herein as an "input port"), a through port (referred to herein as a "through port" or a "first output port"), a coupled port (referred to herein as a "coupled port" or a "second output port"), and an isolated port (referred to herein as an "isolated port"). According to one or more embodiments, the orthogonal coupler may also include six fixed-value capacitive elements (e.g., a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, and a sixth capacitor) and four fixed-value inductive elements (e.g., a first inductor, a second inductor, a third inductor, and a fourth inductor), which are electrically coupled in an arrangement that will be described in more detail later.

[0093] The capacitance value of the capacitive element and the inductance value of the inductive element at least partially determine the coupling factor K of each orthogonal coupler embodiment. For example, the coupling factor can be defined as the ratio of the input power (at the input port) to the coupled power (at the through or coupled port). For example, the coupling factor can be between 0 decibels (dB) and -<<0 dB, and the coupling factor can be defined as follows:

[0094]

[0095] Where K represents the coupling factor, p coupled represents the amount of power delivered to the through / coupled port, and p input represents the amount of power delivered from the input port. Conventional quadrature couplers are typically limited to a static (eg, constant) coupling factor. As previously mentioned, one or more embodiments include tuning circuitry that enables the coupling factor to be varied.

[0096] The fixed value components of the orthogonal coupler embodiments can be implemented using discrete capacitors and / or inductors (e.g., chip components) and / or using integrated capacitors and / or inductors (e.g., capacitors / inductors monolithically formed in a semiconductor die). In summary, in contrast to many conventional couplers, the orthogonal coupler embodiments described herein utilize only non-resistive components (e.g., capacitors and inductors), which avoids the attenuation and resistive losses inherent in other conventional couplers.

[0097] Embodiments of the orthogonal couplers described herein may be implemented in a power amplifier at an amplifier input, between amplifier stages, and / or at an amplifier output. For example, in a power amplifier, an input signal (e.g., an input RF signal) may be provided to an input port of an embodiment of an orthogonal coupler. The orthogonal coupler is configured to divide the power of the input RF signal into two RF signals of equal or unequal power (depending on a coupling factor), apply a phase shift to the two RF signals (e.g., to achieve a phase difference of approximately 90 degrees between the signals), and provide the two RF signals to two output ports (e.g., to a through port and a coupled port). The orthogonal coupler is designed so that the isolated port does not receive any significant RF power.

[0098] Figure 1 An example of a quadrature coupler 100 is depicted in accordance with an embodiment of the present invention. As will be described in greater detail below, the quadrature coupler 100 includes only fixed value components, and thus the quadrature coupler 100 may be referred to herein as a "fixed" quadrature coupler.

[0099] The orthogonal coupler 100 includes four ports implemented as an input port 101 (or first port), a first output port 102 (or second port or through port), a second output port 103 (or third port or coupled port), and an isolated port 104 (or fourth port). Figure 1 As indicated in the simplified equivalent circuit of the coupler 100 on the right, the orthogonal coupler 100 is configured to receive an input RF signal at an input port 101, split the power of the input RF signal into a first output RF signal and a second output RF signal, implement a 90 degree phase shift between the first output RF signal and the second output RF signal, and pass the phase-shifted first output RF signal and the second output RF signal to a first output port 102 and a second output port 103.

[0100] More specifically, in an embodiment, the input port 101 is configured to receive an input RF signal characterized by signal power. The orthogonal coupler 100 is configured to pass a first portion of the input signal power to the first output port 102 with a relative phase shift of substantially zero, and pass a second portion of the input signal power to the second output port 103 with a phase shift of approximately 90 degrees relative to the signal passed to the first output port 102. In an embodiment, the first output port 102 is configured to receive a first portion of the input signal power passed from the input port 101, and the second output port 103 is configured to receive a second portion of the input signal power passed from the input port 101. In addition, the orthogonal coupler 100 is configured such that the isolated port 104 does not receive any significant power from the input port 101. According to one or more embodiments, the isolated port 104 is coupled to ground (e.g., through a resistor 180).

[0101] According to one or more embodiments, the orthogonal coupler 100 includes six fixed-value capacitors implemented as a first capacitor 111, a second capacitor 112, a third capacitor 113, a fourth capacitor 114, a fifth capacitor 115, and a sixth capacitor 116. The orthogonal coupler 100 also includes four fixed-value inductors implemented as a first inductor 121, a second inductor 122, a third inductor 123, and a fourth inductor 124.

[0102] The first capacitor 111, the second capacitor 112, and the third capacitor 113 are coupled in series between the first port 101 and the fourth port 104, the first intermediate node 131 is located between the first capacitor 111 and the second capacitor 112, and the second intermediate node 132 is located between the second capacitor 112 and the third capacitor 113. The fourth capacitor 114, the fifth capacitor 115, and the sixth capacitor 116 are coupled in series between the second port 102 and the third port 103, the third intermediate node 133 is located between the fourth capacitor 114 and the fifth capacitor 115, and the fourth intermediate node 134 is located between the fifth capacitor 115 and the sixth capacitor 116.

[0103] The first inductor 121 is coupled between the first port 101 and the second port 102. The second inductor 122 is coupled between the first intermediate node 131 and the third intermediate node 133. The third inductor 123 is coupled between the second intermediate node 132 and the fourth intermediate node 134. The fourth inductor 124 is coupled between the fourth port 104 and the third port 103.

[0104] The various fixed value capacitors 111-116 and fixed value inductors 121-124 have capacitance and inductance values, respectively, that are selected based on the desired operating frequency of the circuit (e.g., amplifier) ​​that includes the quadrature coupler 100. In addition, the fixed component values ​​may be selected to ensure "symmetry" of the quadrature coupler. For illustration, Figure 1 Two symmetry lines 106, 108 are shown bisecting the components of the orthogonal coupler 100. The first (vertical) symmetry line 106 bisects the center of the inductive elements 121-124, indicating that half of the inductance of each inductive element 121-124 is to the left of line 106, and the other half of the inductance of each inductive element 121-124 is to the right of line 106. In addition, the capacitance values ​​are the same for each pair of opposing capacitors (i.e., capacitors 111, 114 have the same value as each other; capacitors 112, 115 have the same value as each other; and capacitors 113, 116 have the same value as each other).

[0105] A second (horizontal) symmetry line 108 bisects the centers of capacitive elements 112, 115, indicating that half of the capacitance of each capacitive element 112, 115 is above line 108, while the other half of the capacitance of each capacitive element 112, 115 is below line 108. Additionally, the capacitance values ​​are the same for each pair of opposing capacitors (i.e., capacitors 111, 113 have the same value as one another; and capacitors 114, 116 have the same value as one another). Finally, the inductance values ​​are the same for each pair of opposing inductors (i.e., inductors 121, 124 have the same value as one another; and inductors 122, 123 have the same value as one another). These symmetrical relationships yield the following relative values ​​for capacitors 111-116 and inductors 121-124 (capacitor and inductor reference numerals are indicated by subscripts):

[0106] C 111 =C 113 =C 114 =C 116 =C A

[0107] C 112 =C 115 =C B

[0108] L 121 =L 124 =L A

[0109] L 122 =L1 23 =L B

[0110] Among them C A is the first capacitance value; C BIt can be used with C A The value of the second capacitance is the same or different; L A is the first inductance value; and L B It can be used with L A Basically, according to one or more embodiments, the capacitance and inductance values ​​are symmetrical on both sides of the vertical symmetry line 106 and the horizontal symmetry line 108. In other embodiments, the capacitance and inductance values ​​may be asymmetrical (e.g., C 111 ≠C 113 , L 121 ≠L 124 , etc.). As used herein, the operator "=" and the terms "equal" and "substantially equal" mean that two values ​​are completely equal, or that the difference between the two values ​​is within 5%. On the other hand, the operator "≠" and the term "not equal" mean that the difference between the two values ​​is at least 5%.

[0111] The six capacitors 111-116 and the four inductors 121-124 have values ​​selected to achieve a desired coupling factor K for the orthogonal coupler 100. In some embodiments, the component values ​​are selected so that the coupler 100 has a coupling factor of 10*log 10 [0.5], which means that the input signal power is evenly divided between the first output port 102 and the second output port 103. In other embodiments, the component values ​​are selected to have different coupling factors, which means that the input signal power is unevenly divided between the first output port 102 and the second output port 103. For example, the coupling factor 10*log 10 [0.67] may correspond to the power of the signal being received at the first output port 102 being approximately half the power of the signal being received at the second output port 103 .

[0112] According to one or more embodiments, assuming a center operating frequency of about 3.5 GHz and a system impedance of about 50 ohms, C A The C B The L A may be in the range of about 2.1 nanohenry (nH) to about 3.1 nH, and L B Can be in the range of about 2.9nH to about 3.9nH. Generally, in some embodiments, C A >C B And L A <L B As used herein, the operator “>” means greater than at least 5%, and the operator “<” means less than at least 5%. In other embodiments, and particularly when the center operating frequency and / or system impedance differ from the above examples, CA , C B , L A and L B The value of may be less than and / or greater than the above given range, and / or C A , C B , L A and L B The relative values ​​of may be different from those described above.

[0113] exist Figure 1 In a "fixed" quadrature coupler of FIG. 1 , the coupling factor K is fixed because the various capacitors 111 - 116 and inductors 121 - 124 have fixed values. According to other embodiments, the coupling factor may be variable. As will be described in detail below, this may be achieved by coupling a variable tuning network to the quadrature coupler. For example, Figure 2A , 2B 2C show embodiments of quadrature couplers 200, 200', 200" that include first and second variable tuning networks 240, 240', 240" and 250, 250', 250" coupled between respective intermediate nodes 131-134 of the quadrature couplers 200, 200', 200".

[0114] Figures 2A-2C Each of the orthogonal couplers 200, 200', 200" shown includes a structure similar to that of the coupler 100 ( Figure 1 ) is substantially the same as a fixed orthogonal coupler 100 (i.e., an orthogonal coupler having a fixed coupling factor K and having fixed value components). Likewise, the fixed orthogonal coupler 100 includes four ports 101-104, six fixed value capacitors 111-116, four fixed value inductors 121-124, and four intermediate nodes 131-134, which are as shown in FIG. Figure 1 and 2A -2C. The fixed orthogonal coupler 100 is combined with the above Figure 1 The functions are as described above, and the values ​​of the various components 111-116, 121-124 can also be combined as above. Figure 1 The above combination Figure 1 The details of the structure, component values, and operation of the quadrature coupler 100 described herein are incorporated herein by reference. Figure 2A , 2B and the following description of 2C.

[0115] First from Figure 2AInitially, an embodiment of a quadrature coupler 200 is shown that includes a fixed quadrature coupler 100, a first variable tuning network 240 coupled between intermediate nodes 131 and 132, and a second variable tuning network 250 coupled between intermediate nodes 133 and 134. Basically, the variable tuning networks 240, 250 can be controlled to modify the capacitance, and thus the coupling factor K, of the quadrature coupler 200.

[0116] The first variable tuning network 240 includes a first variable capacitance circuit having a first end coupled or connected to the intermediate node 131 and a second end coupled or connected to the intermediate node 132. Similarly, the second variable tuning network 250 includes a second variable capacitance circuit having a first end coupled or connected to the intermediate node 133 and a second end coupled or connected to the intermediate node 134. In other words, the first variable tuning network 240 is connected in parallel with the fixed value capacitor 112, and the second variable tuning network 250 is connected in parallel with the fixed value capacitor 115.

[0117] The variable tuning networks 240, 250 may be implemented in various ways. For example, Figure 2B and 2C As described, each variable tuning network 240, 250 may be implemented using a switched capacitor bank. In other embodiments, each variable tuning network 240, 250 may be implemented using one or more variable capacitors or other nonlinear reactive components. For example, each variable tuning network 240, 250 may be implemented using one or more variable reactors, varactor diodes, and / or passive tunable integrated circuits (PTICs), where the capacitance value may be adjusted based on a voltage applied to or across the component. As a more specific embodiment, a PTIC including a variable capacitor having a barium strontium titanate (BST) dielectric layer may be used.

[0118] During operation, the states of the variable tuning networks 240, 250 are controlled to tune the coupling factor of the quadrature coupler 200. To tune the coupling factor, the capacitance of each of the first variable tuning network 240 and the second variable tuning network 250 may be adjusted based on the receipt of one or more control signals. Figure 4 As will be discussed, quadrature coupler 200 may be included on a module or substrate that also includes a digital interface (e.g., Figure 4 The digital interface 490 may receive digital control signals from another source (e.g., a system controller) and may (e.g., via Figure 4The controller 470 of the embodiment of the present invention processes the digital control signal to generate an analog control signal (e.g., a voltage signal), and can provide the analog control signal to the variable tuning network 240, 250. The analog control signal can cause the variable tuning network 240, 250 to modify its capacitance value, thereby causing the coupling factor K of the orthogonal coupler 200 to be modified.

[0119] According to one or more embodiments, the first variable tuning network 240 and the second variable tuning network 250 are synchronously controlled to have substantially equal capacitance values ​​at any given time. This maintains the vertical symmetry of the orthogonal coupler 200 (e.g., Figure 1 Basically, the values ​​of the fixed value capacitors 111-116 and the fixed value inductors 121-124 remain unchanged, while the capacitances of the first variable tuning network 240 and the second variable tuning network 250 are synchronously varied to adjust the coupling factor K of the orthogonal coupler 200.

[0120] In other embodiments, Figure 2B and 2C As shown, a switched capacitor circuit can be used to implement the first variable tuning network and the second variable tuning network. Figure 2B , shows an embodiment of an orthogonal coupler 200', which includes a fixed orthogonal coupler 100, a first variable tuning network 240' coupled between the intermediate nodes 131 and 132, and a second variable tuning network 250' coupled between the intermediate nodes 133 and 134. As will be explained below, the first variable tuning network 240' and the second variable tuning network 250' each include a plurality of capacitance units, wherein each unit includes a capacitor 241'-243', 251'-253' connected in series with a switching element 261'-263', 271'-273'. Likewise, the variable tuning networks 240', 250' can be controlled to modify the capacitance, and thus modify the coupling factor K of the orthogonal coupler 200'.

[0121] The first variable tuning network 240' includes a first variable capacitance circuit, and the second variable tuning network 250' includes a second variable capacitance circuit. According to an embodiment, the first variable tuning network 240' includes a first end coupled or connected to the intermediate node 131, a second end coupled or connected to the intermediate node 132, and N capacitance units coupled in parallel between the first end and the second end. Similarly, the second variable tuning network 250' includes a first end coupled or connected to the intermediate node 133, a second end coupled or connected to the intermediate node 134, and N capacitance units coupled in parallel between the first end and the second end. Basically, the first variable tuning network 240' is connected in parallel with the fixed value capacitor 112, and the second variable tuning network 250' is connected in parallel with the fixed value capacitor 115.

[0122] exist Figure 2B In the embodiment shown in FIG. 1 , each of the first variable tuning network 240 ′ and the second variable tuning network 250 ′ includes three parallel coupled capacitance units (i.e., N=3). However, in other embodiments, N may be less than 3 (e.g., N may be as small as 1), or N may be greater than 3 (e.g., N may be as large as 10 or more).

[0123] Each of the capacitive units in the first variable tuning network 240' and the second variable tuning network 250' includes a capacitor 241', 242', 243', 251', 252', 253' coupled in series with a switching element 261', 262', 263', 271', 272', 273'. For example, each capacitor 241'-243', 251'-253' may include a metal insulator metal (MIM) capacitor, a metal oxide semiconductor (MOS) capacitor, or another suitable type of capacitor. Each switching element 261'-263', 271'-273' may be a field effect transistor (FET) (e.g., an insulated gate FET, a metal oxide semiconductor FET (MOS FET), a fin FET, etc.), a complementary metal oxide semiconductor (CMOS) transistor, a bipolar junction transistor (BJT), a mechanical switch, or another suitable type of switching element. Ideally, each switching element 261 ′- 263 ′, 271 ′- 273 ′ has a minimum impact on performance with a resistance of 1 ohm to 2 ohms in order to minimize losses.

[0124] During operation, the states of the switch elements 261'-263', 271'-273' are controlled to tune the coupling factor of the quadrature coupler 200'. To tune the coupling factor, the capacitance of each of the first variable tuning network 240' and the second variable tuning network 250' may be adjusted based on the receipt of one or more control signals, as previously mentioned. More specifically, each of the switch elements 261'-263', 271'-273' is configured (e.g., from Figure 4The controller 470 of the embodiment of the present invention receives the switch control signal. Based on the value of the switch control signal (e.g., low voltage or high voltage), each switch element 261'-263', 271'-273' is configured to be in a high impedance state (e.g., open circuit) or a low impedance state (e.g., short circuit). When the switch elements 261'-263', 271'-273' are in the high impedance state, little or no current will flow through the capacitive unit, and the capacitors 241'-243', 251'-253' to which the switch elements are coupled will not affect the total capacitance of the variable tuning network 240', 250'. Conversely, when the switch elements 261'-263', 271'-273' are in the low impedance state, current will flow through the capacitive unit, and the capacitors 241'-243', 251'-253' to which the switch elements are coupled will affect the total capacitance of the variable tuning network 240', 250'. Essentially, the total capacitance of each variable tuning network 240', 250' is approximately equal to the sum of the capacitance values ​​of all parallel coupled capacitors 241'-243', 251'-253' coupled to the switching elements 261'-263', 271'-273' in the low impedance state.

[0125] As previously mentioned, according to one or more embodiments, the first variable tuning network 240' and the second variable tuning network 250' are synchronously controlled to have substantially equal capacitance values ​​at any given time in order to maintain the vertical symmetry of the quadrature coupler 200'. For example, synchronized control signals may be provided to the switch elements 261'-263', 271'-273' to ensure that the first variable tuning network 240' and the second variable tuning network 250' are configured to have the same total capacitance at any given time. The switch elements 261'-263', 271'-273' are synchronously controlled to adjust the total capacitance value of the first variable tuning network 240' and the second variable tuning network 250', and thus adjust the coupling factor K of the quadrature coupler 200'.

[0126] According to some embodiments, the minimum total capacitance value of each of the first variable tuning network 240' and the second variable tuning network 250' is 0 pF, and the maximum total capacitance value of each of the first variable tuning network 240' and the second variable tuning network 250' is in the range of about 0.2 pF to about 0.6 pF (e.g., about 0.4 pF). In addition, the capacitance value of each capacitor 241'-243', 251'-253' may be in the range of about 0.05 pF to about 0.5 pF. In other embodiments, the overall or individual capacitance values ​​may be lower or higher than the above given ranges.

[0127] In some embodiments, the capacitance value of each of the capacitors 241'-243', 251'-253' is substantially equal. For example, in an embodiment where each of the first variable tuning network 240' and the second variable tuning network 250' has three capacitance units and the maximum total capacitance of each of the first variable tuning network 240' and the second variable tuning network 250' is 0.3 pF, each capacitor 241'-243', 251'-253' may have a capacitance value of 0.1 pF. In such embodiments, each of the first variable tuning network 240' and the second variable tuning network 250' may have one of the four capacitance values ​​at any given time. More specifically, if the capacitance value of each of capacitors 241'-243', 251'-253' is "C", then at any given time, the total capacitance value of the tuning network 240', 250' can be 0*C (when 0 capacitors are switched into the tuning network), 1*C (when any 1 capacitor is switched into the tuning network), 2*C (when any 2 capacitors are switched into the tuning network), or 3*C (when all 3 capacitors are switched into the tuning network).

[0128] In one or more other embodiments, within each of the first variable tuning network 240' and the second variable tuning network 250', the capacitance value of each of the capacitors 241'-243', 251'-253' may be different. This enables each of the tuning networks 240', 250' to be configured in M ​​tuning states (M=2 N ), each state having a unique total capacitance value. For example, in an embodiment where each of the first variable tuning network 240' and the second variable tuning network 250' has three capacitance units (i.e., N=3), each of the tuning networks 240', 250' will be configured to be in any of the eight tuning states. For example, capacitors 241' and 251' may each have a capacitance value of 1*C, capacitors 242' and 252' may each have a capacitance value of 2*C, and capacitors 243' and 253' may each have a capacitance value of 4*C. By selectively switching capacitors 241'-243', 251'-253' into or out of each network 240', 250', 8 possible tuning states can produce a total capacitance value of 0*C, 1*C, 2*C, 3*C, 4*C, 5*C, 6*C or 7*C for each network 240', 250'.

[0129] Reference now Figure 2CThe embodiment shown in FIG. 1 shows another embodiment of an orthogonal coupler 200″, which includes a fixed orthogonal coupler 100, a first variable tuning network 240″ coupled between intermediate nodes 131 and 132, and a second variable tuning network 250″ coupled between intermediate nodes 133 and 134. Each of the first variable tuning network 240″ and the second variable tuning network 250″ includes three capacitor units coupled in series (i.e., N=3). However, in other embodiments, N may be less than 3 (e.g., N may be as small as 1), or N may be greater than 3 (e.g., N may be as large as 10 or more).

[0130] Each of the capacitive units in the first variable tuning network 240" and the second variable tuning network 250" includes a capacitor 241", 242", 243", 251", 252", 253" coupled in parallel with a switching element 261", 262", 263", 271", 272", 273". For example, each capacitor 241"-243", 251"-253" may include a MIM capacitor, a MOS capacitor, or another suitable type of capacitor. Each switching element 261"-263", 271"-273" may be a FET, a CMOS transistor, a BJT, a mechanical switch, or another suitable type of switching element. Ideally, each switching element 261"-263", 271"-273" has minimal impact on performance when the resistance is 1 ohm to 2 ohms so as to minimize losses.

[0131] During operation, the states of the switch elements 261"-263", 271"-273" are controlled to tune the coupling factor of the quadrature coupler 200". To tune the coupling factor, the capacitance of each of the first variable tuning network 240" and the second variable tuning network 250" may be adjusted based on the receipt of one or more control signals, as previously mentioned. More specifically, each of the switch elements 261"-263", 271"-273" is configured (e.g., from Figure 4The controller 470 of the variable tuning network 240" and 250" receives the switch control signal. Based on the value of the switch control signal (e.g., a low voltage or a high voltage), each switch element 261"-263", 271"-273" is configured to be in a high impedance state (e.g., an open circuit) or a low impedance state (e.g., a short circuit). When the switch elements 261"-263", 271"-273" are in the high impedance state, a voltage will be induced across the capacitors 241"-243", 251"-253" coupled in parallel with the high impedance switch elements, and the capacitors will affect the total capacitance of the variable tuning network 240", 250". Conversely, when the switch elements 261"-263", 271"-273" are in the low impedance state, a voltage will not be induced across the capacitors 241"-243", 251"-253" coupled in parallel with the low impedance switch elements. Alternatively, the current flowing through the variable tuning network 240", 250" will bypass the capacitors via the low impedance switching elements, and the capacitors 241"-243", 251"-253" to which the switching elements are coupled will not affect the total capacitance of the variable tuning network 240", 250". The total capacitance of each variable tuning network 240", 250" can be calculated by applying the series capacitor formula to those capacitors that are not bypassed (i.e., if the series coupled capacitors C1, C2, C3 are not bypassed, the total capacitance can be calculated as 1 / C1+1 / C2+1 / C3).

[0132] As previously mentioned, according to one or more embodiments, the first variable tuning network 240" and the second variable tuning network 250" are synchronously controlled to have substantially equal capacitance values ​​at any given time in order to maintain the vertical symmetry of the quadrature coupler 200". For example, synchronized control signals may be provided to the switch elements 261"-263", 271"-273" to ensure that the first variable tuning network 240" and the second variable tuning network 250" are configured to have the same total capacitance at any given time. The switch elements 261"-263", 271"-273" are synchronously controlled to adjust the total capacitance value of the first variable tuning network 240" and the second variable tuning network 250", and thus adjust the coupling factor K of the quadrature coupler 200".

[0133] According to some embodiments, the minimum total capacitance value of each of the first variable tuning network 240" and the second variable tuning network 250" is 0 pF, and the maximum total capacitance value of each of the first variable tuning network 240" and the second variable tuning network 250" is in the range of about 0.2 pF to about 0.6 pF (e.g., about 0.4 pF). In addition, the capacitance value of each capacitor 241"-243", 251"-253" may be in the range of about 0.05 pF to about 0.5 pF. In other embodiments, the overall or individual capacitance values ​​may be lower or higher than the above given ranges.

[0134] In some embodiments, the capacitance value of each of the capacitors 241"-243", 251"-253" is substantially equal. For example, in an embodiment where each of the first variable tuning network 240" and the second variable tuning network 250" has three capacitance units and the maximum total capacitance of each of the first variable tuning network 240" and the second variable tuning network 250" is 0.3 pF, each capacitor 241"-243", 251"-253" may have a capacitance value of 0.1 pF. In such embodiments, each of the first variable tuning network 240" and the second variable tuning network 250" may have one of four capacitance values ​​at any given time. More specifically, if the capacitance value of each of capacitors 241"-243", 251"-253" is "C", then at any given time, the total capacitance value of the tuning network 240", 250" can be 0*C (when all capacitors are bypassed), 1*C (when any 2 capacitors are bypassed), C / 2 (when any 1 capacitor is bypassed), or C / 3 (when no capacitor is bypassed).

[0135] In one or more other embodiments, within each of the first variable tuning network 240" and the second variable tuning network 250", the capacitance value of each of the capacitors 241"-243", 251"-253" may be different. This enables each of the tuning networks 240", 250" to be configured in M ​​tuning states (M=2 N ), each state having a unique total capacitance value. For example, in an embodiment where each of the first variable tuning network 240" and the second variable tuning network 250" has three capacitance units (i.e., N=3), each of the tuning networks 240", 250" will be configured to be in any of the eight tuning states. For example, capacitors 241" and 251" may each have a capacitance value of 1*C, capacitors 242" and 252" may each have a capacitance value of 2*C, and capacitors 243" and 253" may each have a capacitance value of 4*C. By selectively switching capacitors 241"-243", 251"-253" into or out of each network 240", 250", 8 possible tuning states can produce total capacitance values ​​of 0*C, 1*C, 2*C, (2*C) / (3*C), 4*C, (4*C) / (5*C), (8*C) / (6*C) or (8*C) / (7*C) for each network 240", 250".

[0136] exist Figures 2A-2CIn the embodiment of the invention, the variable tuning network 240, 240', 240", 250, 250', 250" is coupled to or connected to the intermediate nodes 131-134. In other embodiments, for example Figure 3A , 3B 3C, the variable tuning networks 240, 240', 240", 250, 250', 250" are alternatively coupled to or connected to the ports 101-104 of the orthogonal couplers 300, 300', 300". More specifically, Figure 3A , 3B 3C show embodiments of quadrature couplers 300, 300', 300" that include first and second variable tuning networks 240, 240', 240" and 250, 250', 250" coupled between respective ports 101-104 of the quadrature couplers 300, 300', 300".

[0137] Figures 3A-3C Each of the orthogonal couplers 300, 300', 300" shown includes a structure similar to that of the coupler 100 ( Figure 1 ) is substantially the same as a fixed orthogonal coupler 100 (i.e., an orthogonal coupler having a fixed coupling factor K and having fixed value components). Likewise, the fixed orthogonal coupler 100 includes four ports 101-104, six fixed value capacitors 111-116, four fixed value inductors 121-124, and four intermediate nodes 131-134, which are as shown in FIG. Figure 1 and 3A -3C. The fixed orthogonal coupler 100 is combined with the above Figure 1 The functions are as described above, and the values ​​of the various components 111-116, 121-124 can also be combined as above. Figure 1 The above combination Figure 1 The details of the structure, component values, and operation of the quadrature coupler 100 described herein are incorporated herein by reference. Figure 3A , 3B and the following description of 3C.

[0138] First from Figure 3A Initially, an embodiment of a quadrature coupler 300 is shown that includes a fixed quadrature coupler 100, a first variable tuning network 240 coupled between ports 101 and 104, and a second variable tuning network 250 coupled between ports 102 and 103. Basically, the variable tuning networks 240, 250 can be controlled to modify the capacitance, and thus the coupling factor K, of the quadrature coupler 300.

[0139] The first variable tuning network 240 includes a first variable capacitance circuit having a first end coupled or connected to port 101 and a second end coupled or connected to port 104. Similarly, the second variable tuning network 250 includes a second variable capacitance circuit having a first end coupled or connected to port 102 and a second end coupled or connected to port 103. In other words, the first variable tuning network 240 is connected in parallel with the fixed value capacitors 111, 112, 113 coupled in series, and the second variable tuning network 250 is connected in parallel with the fixed value capacitors 114, 115, 116 coupled in series.

[0140] The variable tuning networks 240, 250 may be implemented in various ways, such as in combination with Figures 2A-2C For example, if the combination Figure 3B and 3C As described, each variable tuning network 240, 250 can be implemented with a switched capacitor bank. In other embodiments, each variable tuning network 240, 250 can be implemented using one or more variable capacitors or other nonlinear reactive components. For example, as previously discussed, each variable tuning network 240, 250 can be implemented using one or more variable reactors, varactor diodes, and / or PTICs, where the capacitance value can be adjusted based on a voltage applied to or across the component.

[0141] During operation, you can Figure 2A The states of the variable tuning networks 240, 250 are controlled as discussed above to tune the coupling factor of the quadrature coupler 300. Figure 2A The details discussed in connection with controlling the variable tuning networks 240, 250 also apply to the quadrature coupler 300 and are incorporated herein by reference. Figure 3A In summary, control signals are provided to the variable tuning networks 240, 250 which cause the variable tuning networks 240, 250 to modify their capacitance values, thereby causing the coupling factor K of the quadrature coupler 300 to be modified. Likewise, the first variable tuning network 240 and the second variable tuning network 250 may be synchronously controlled to have substantially equal capacitance values ​​at any given time.

[0142] In other embodiments, Figure 3B and 3C As shown, a switched capacitor circuit can be used to implement the first variable tuning network and the second variable tuning network. Figure 3B , shows an embodiment of an orthogonal coupler 300', the orthogonal coupler 300' comprising a fixed orthogonal coupler 100, a first variable tuning network 240' coupled between ports 101 and 104, and a second variable tuning network 250' coupled between ports 102 and 103. As previously described in conjunction with Figure 2BAs illustrated, the first variable tuning network 240' and the second variable tuning network 250' each include a plurality of capacitive units, wherein each unit includes a capacitor 241', 242', 243', 251', 252', 253' connected in series with a switching element 261'-263', 271'-273'. Likewise, the variable tuning networks 240', 250' can be controlled to modify the capacitance, and thus the coupling factor K of the quadrature coupler 300'.

[0143] The first variable tuning network 240' includes a first variable capacitance circuit, and the second variable tuning network 250' includes a second variable capacitance circuit. According to an embodiment, the first variable tuning network 240' includes a first end coupled or connected to the port 101, a second end coupled or connected to the port 104, and N capacitance units (e.g., 1≤N≤10 or greater) coupled in parallel between the first end and the second end. Similarly, the second variable tuning network 250' includes a first end coupled or connected to the port 102, a second end coupled or connected to the port 103, and N capacitance units coupled in parallel between the first end and the second end. Basically, the first variable tuning network 240' is connected in parallel with the fixed value capacitors 111-113, and the second variable tuning network 250' is connected in parallel with the fixed value capacitors 114-116.

[0144] As above combined Figure 2B As discussed, each of the capacitive units in the first variable tuning network 240' and the second variable tuning network 250' includes a capacitor 241', 242', 243', 251', 252', 253' coupled in series with a switch element 261', 262', 263', 271', 272', 273'. Figure 2B The details of the structure, component values ​​and operation of the described capacitors 241'-243', 251'-253' and switching elements 261'-263', 271'-273' are incorporated into Figure 3B For the sake of brevity, these details are not repeated here.

[0145] Likewise, during operation, the states of the switch elements 261'-263', 271'-273' are controlled to tune the coupling factor of the quadrature coupler 300'. To tune the coupling factor, the capacitance of each of the first variable tuning network 240' and the second variable tuning network 250' may be adjusted based on the receipt of one or more control signals, as previously mentioned. Figure 2B The details of the control and operation of the switching elements 261'-263', 271'-273' described are incorporated into Figure 3B For the sake of brevity, these details are not repeated here.

[0146] Reference now Figure 3C The illustrated embodiment shows another embodiment of an orthogonal coupler 300 ″, which includes the fixed orthogonal coupler 100 , a first variable tuning network 240 ″ coupled between ports 101 and 104 , and a second variable tuning network 250 ″ coupled between ports 102 and 103 .

[0147] As previously combined Figure 2C As described, the first variable tuning network 240" and the second variable tuning network 250" each include a plurality of capacitive units, wherein each unit includes a capacitor 241", 242", 243", 251", 252", 253" coupled in parallel with a switching element 261"-263", 271"-273". Likewise, the variable tuning networks 240", 250" may be controlled to modify the capacitance, and thus the coupling factor K, of the quadrature coupler 300".

[0148] The first variable tuning network 240" includes a first variable capacitance circuit, and the second variable tuning network 250" includes a second variable capacitance circuit. According to an embodiment, the first variable tuning network 240" includes a first end coupled or connected to port 101, a second end coupled or connected to port 104, and N capacitance units (e.g., 1≤N≤10 or greater) coupled in series between the first end and the second end. Similarly, the second variable tuning network 250" includes a first end coupled or connected to port 102, a second end coupled or connected to port 103, and N capacitance units coupled in series between the first end and the second end. Basically, the first variable tuning network 240" is connected in parallel with the fixed value capacitors 111-113, and the second variable tuning network 250" is connected in parallel with the fixed value capacitors 114-116.

[0149] As above combined Figure 2C As discussed above, each of the capacitive units in the first variable tuning network 240" and the second variable tuning network 250" includes a capacitor 241", 242", 243", 251", 252", 253" coupled in parallel with a switching element 261", 262", 263", 271", 272", 273". Figure 2C The details of the structure, component values ​​and operation of the described capacitors 241"-243", 251"-253" and switching elements 261"-263", 271"-273" are incorporated into Figure 3C For the sake of brevity, these details are not repeated here.

[0150] Likewise, during operation, the states of the switch elements 261"-263", 271"-273" are controlled to tune the coupling factor of the quadrature coupler 300". To tune the coupling factor, the capacitance of each of the first variable tuning network 240" and the second variable tuning network 250" may be adjusted based on the receipt of one or more control signals, as previously mentioned. Figure 2C The details of the control and operation of the described switching elements 261"-263", 271"-273" are incorporated into Figure 3C For the sake of brevity, these details are not repeated here.

[0151] like Figure 2B , 2C , 3B and 3C and discussed above each include a "series" capacitance unit ( Figure 2B , 3B ), or a "parallel" capacitor unit ( Figure 2C , 3C ). In other embodiments (not shown), a variable tuning network including a combination of series capacitor cells and parallel capacitor cells may be used. Such variations are intended to be included within the scope of the present subject matter.

[0152] As previously mentioned, the various orthogonal couplers 100, 200, 200', 200", 300, 300', 300" discussed above may be implemented in an integrated circuit. For example, Figure 4 An “integrated” quadrature coupler 400 is shown formed in an integrated circuit 410 according to an example embodiment.

[0153] The integrated circuit 410 includes a semiconductor substrate 420 in or on which various components of the orthogonal coupler 400 are integrated or connected. In various embodiments, the semiconductor substrate 420 may be a silicon (Si)-based substrate (e.g., silicon, silicon germanium (SiGe), silicon on insulator, etc.), a III-V-based substrate (e.g., gallium arsenide (GaAs), gallium nitride (GaN), etc.), or another suitable type of semiconductor substrate.

[0154] The orthogonal coupler 400 includes a first port 401, a second port 402, a third port 403, and a fourth port 404 (eg, Figure 1The orthogonal coupler 400 includes a first fixed value capacitor 411, a second fixed value capacitor 412, a third fixed value capacitor 413, a fourth fixed value capacitor 414, a fifth fixed value capacitor 415, and a sixth fixed value capacitor 416, each of which may be implemented as an integrated capacitor (e.g., a MIM or MOS capacitor) within the semiconductor substrate 420. The first capacitor, the second capacitor, and the third capacitor 411-413 are coupled in series between the first port 401 and the fourth port 404 through a conductive trace or transmission line of the semiconductor substrate 420, and the first intermediate node 431 and the second intermediate node 432 are located between the capacitors. The fourth capacitor, the fifth capacitor, and the sixth capacitor 414-416 are coupled in series between the second port 402 and the third port 403 through an additional conductive trace or transmission line of the semiconductor substrate 420, and the third intermediate node 433 and the fourth intermediate node 434 are located between the capacitors.

[0155] The orthogonal coupler 400 also includes a first fixed value inductor 421, a second fixed value inductor 422, a third fixed value inductor 423, and a fourth fixed value inductor 424, each of which may be implemented as an integrated spiral inductor on or within the semiconductor substrate 420, as illustrated. The first inductor 421 is coupled between the first port 401 and the second port 402 through an additional conductive trace or transmission line of the semiconductor substrate 420. The second inductor 422 is coupled between the first intermediate node 431 and the third intermediate node 433 through other additional conductive traces or transmission lines of the semiconductor substrate 420. The third inductor 423 is coupled between the second intermediate node 432 and the fourth intermediate node 434 through other additional conductive traces or transmission lines of the semiconductor substrate 420. The fourth inductor 424 is coupled between the fourth port 404 and the third port 403 through yet other additional conductive traces or transmission lines of the semiconductor substrate 420.

[0156] According to an embodiment, the orthogonal coupler 400 further includes a first variable tuning network 440 and a second variable tuning network 450. However, the first variable tuning network 440 and the second variable tuning network 450 may be combined. Figure 1 , 2A -2C or any of the embodiments described in 3A-3C. The described embodiments correspond to Figures 2A-2CMore specifically, the first variable tuning network 440 is shown as including four (i.e., N=4) switched capacitors or nonlinear reactive components 441, 442, 443, 444 coupled between the first intermediate node 431 and the second intermediate node 432 via connection 445, and the second variable tuning network 450 is shown as including four switched capacitors or nonlinear reactive components 451, 452, 453, 454 coupled between the third intermediate node 433 and the fourth intermediate node 434 via connection 455. Alternatively, as indicated by the dashed connections 445', 455', the quadrature coupler 400 may be combined with Figures 3A-3C A configuration of any of the described embodiments wherein the first variable tuning network 440 is coupled between the first port 401 and the fourth port 404 by connection 445 ′ and the second variable tuning network 450 is coupled between the second port 402 and the third port 403 by connection 455 ′.

[0157] As combined Figure 2A and 3A As discussed, elements 441-444, 451-454 may be implemented as nonlinear reactive components, such as PTICs. Alternatively, as in combination with Figure 2B and 3B As discussed, elements 441-444, 451-454 may be implemented as "series" capacitive units (ie, capacitive units coupled in parallel, each having a capacitor coupled in series with a switching element). In yet other embodiments, such as in combination with Figure 2C and 3C As discussed, elements 441 - 444 , 451 - 454 may be implemented as “parallel” capacitive units (ie, capacitive units coupled in series, each having a capacitor coupled in parallel with a switching element).

[0158] The tuning states of the first variable tuning network 440 and the second variable tuning network 450 (and therefore the capacitance values ​​of the networks) are controlled by a controller 470, which provides control signals to the tuning networks 440, 450 via control lines 472. For example, the control signals from the controller 470 may include switch control signals (e.g., when the networks include switched capacitors) and / or bias voltages (e.g., when the networks include PTICs). When the elements 441-445 are variable reactive components, the control signals (e.g., bias voltages) cause the components to have one of a plurality of possible capacitance values. Conversely, when the elements 441-444, 451-454 are switched capacitors, the control signals cause each capacitor to be switched into or out of the tuning networks 440, 450. According to an embodiment, the controller 470 is coupled to a digital interface 490 (e.g., an SPI or other type of interface) to receive higher level control signals and / or data from external circuitry (e.g., an RF front end processor or other circuitry). Basically, the controller 470 converts digital control information from the digital interface 490 into analog control signals.

[0159] Figure 5 A "discrete" quadrature coupler 500 is shown formed from discrete components on a substrate 520 according to another example embodiment. The substrate 520 may be, for example, a small printed circuit board (PCB) or other suitable substrate.

[0160] The orthogonal coupler 500 includes a first port 501, a second port 502, a third port 503, and a fourth port 504 (eg, Figure 1 The orthogonal coupler 500 includes a first fixed value capacitor 511, a second fixed value capacitor 512, a third fixed value capacitor 513, a fourth fixed value capacitor 514, a fifth fixed value capacitor 515, and a sixth fixed value capacitor 516, each of which may be implemented as a discrete "chip" capacitor having a first end and a second end coupled to a bonding pad at the top surface of the substrate 520. The first capacitor, the second capacitor, and the third capacitor 511-513 are coupled in series between the first port 501 and the fourth port 504 through conductive traces or transmission lines on or below the surface of the substrate 520, with the first intermediate node 531 and the second intermediate node 532 located between the capacitors. The fourth, fifth and sixth capacitors 514 - 516 are coupled in series between the second port 502 and the third port 503 by additional printed conductive traces or transmission lines on or below the surface of the substrate 520 , with the third and fourth intermediate nodes 533 , 534 located between the capacitors.

[0161] The orthogonal coupler 500 also includes a first fixed value inductor 521, a second fixed value inductor 522, a third fixed value inductor 523, and a fourth fixed value inductor 524, each of which may be implemented as a discrete "chip" inductor having a first end and a second end coupled to a bonding pad at the top surface of the substrate 520. The first inductor 521 is coupled between the first port 501 and the second port 502 through additional printed conductive traces or transmission lines on or below the surface of the substrate 520. The second inductor 522 is coupled between the first intermediate node 531 and the third intermediate node 533 through other additional printed conductive traces or transmission lines on or below the surface of the substrate 520. The third inductor 523 is coupled between the second intermediate node 532 and the fourth intermediate node 534 through other additional printed conductive traces or transmission lines on or below the surface of the substrate 520. Finally, a fourth inductor 524 is coupled between the fourth port 504 and the third port 503 by yet other additional printed conductive traces or transmission lines on or below the surface of the substrate 520 .

[0162] According to an embodiment, the orthogonal coupler 500 further includes a first variable tuning network 540 and a second variable tuning network 550. However, the first variable tuning network 540 and the second variable tuning network 550 may be combined. Figure 1 , 2A -2C or 3A-3C described in any of the embodiments. The described embodiments correspond to Figures 2A-2C More specifically, the first variable tuning network 540 is shown as including four (i.e., N=4) switched capacitors or nonlinear reactive components 541, 542, 543, 544 coupled between a first intermediate node 531 and a second intermediate node 532 via a connection 545 (e.g., a printed trace), and the second variable tuning network 550 is shown as including four switched capacitors or nonlinear reactive components 551, 552, 553, 554 coupled between a third intermediate node 533 and a fourth intermediate node 534 via a connection 555 (e.g., a printed trace). Alternatively, as indicated by the dashed connections 545', 555', the quadrature coupler 500 may be combined with Figures 3A-3C A form configuration of any of the described embodiments, wherein a first variable tuning network 540 is coupled between the first port 501 and the fourth port 504 via a connection 545' (e.g., a printed trace), and a second variable tuning network 550 is coupled between the second port 502 and the third port 503 via a connection 555' (e.g., a printed trace).

[0163] As combined Figure 2A and 3A As discussed, elements 541-544, 551-554 may be implemented as nonlinear reactive components, such as PTICs. Alternatively, as in combination Figure 2B and 3B As discussed, elements 541-544, 551-554 may be implemented as "series" capacitive units (ie, capacitive units coupled in parallel, each having a capacitor coupled in series with a switching element). In yet other embodiments, such as in combination with Figure 2C and 3C As discussed, elements 541 - 544 , 551 - 554 may be implemented as “parallel” capacitive units (ie, capacitive units coupled in series, each having a capacitor coupled in parallel with a switching element).

[0164] The tuning states of the first variable tuning network 540 and the second variable tuning network 550 (and therefore the capacitance values ​​of the networks) are controlled by a controller 570, which provides control signals via control lines 572. For example, the control signals from the controller 570 may include switch control signals (e.g., when the networks include switched capacitors) and / or bias voltages (e.g., when the networks include PTICs). When the elements 541-545 are variable reactive components, the control signals (e.g., bias voltages) cause the components to have one of a plurality of possible capacitance values. Conversely, when the elements 541-544, 551-554 are switched capacitors, the control signals cause each capacitor to be switched into or out of the tuning networks 540, 550. According to an embodiment, the controller 570 is coupled to a digital interface 590 (e.g., an SPI or other type of interface) to receive higher level control signals and / or data from external circuitry (e.g., an RF front end processor or other circuitry). Basically, the controller 570 converts digital control information from the digital interface 590 into analog control signals.

[0165] Figure 6 A simplified diagram of an embodiment of a power amplifier 600 is shown in which various embodiments of orthogonal couplers 100, 200, 200', 200", 300, 300', 300", 400, 500 may be implemented. More specifically, Figure 6 is a schematic depiction of a Doherty power amplifier 600. In an embodiment, the Doherty amplifier 600 includes an RF input node 601, an RF output node 602, a quadrature coupler 630, a first stage amplifier 610, a carrier amplifier 620, a peaking amplifier 650, an impedance inversion element 670, and a combining node 672.

[0166] When incorporated into a larger RF system, the RF input node 601 is coupled to an RF signal source, and the RF output node 602 is coupled to a load 690 (e.g., an antenna or other load). The RF signal source provides an input RF signal, which is an analog signal that includes spectral energy typically centered around one or more carrier frequencies. Basically, the Doherty amplifier 600 is configured to amplify the input RF signal and produce an amplified RF signal at the RF output node 602.

[0167] The first stage amplifier 610 has an input coupled to the RF input node 601. The first stage amplifier 610 is configured to receive and amplify (eg, pre-amplify) an input RF signal and generate an amplified RF signal, which is then provided to the quadrature coupler 630.

[0168] The orthogonal coupler 630 may have the above combination Figure 1 , 2A -2C and 3A-3C. The orthogonal coupler 630 has a first port 631, a second port 632, a third port 633 and a fourth port 634 (eg, Figure 1 , 2A -2C, 3A-3C ports 101-104). A first port 631 (input port) of the orthogonal coupler 630 is coupled to the output of the first stage amplifier 610 (if included) to receive the amplified input RF signal. Basically, the orthogonal coupler 630 is configured to divide the power of the amplified input RF signal received at port 631 into a first RF signal and a second RF signal (or a carrier signal and a peaking signal), which are provided to the carrier amplifier 620 and the peaking amplifier 630 through ports 622, 623 (a first output port and a second output port, or a through port and a coupled port). The carrier signal and the peaking signal are provided at ports 622, 623 with a phase difference of about 90 degrees. A fourth port 634 (isolation port) of the orthogonal coupler 630 is coupled to ground (e.g., through a resistor 680).

[0169] When the Doherty amplifier 600 has a symmetrical configuration (i.e., a configuration in which the carrier amplifier power transistors and the peaking amplifier power transistors are substantially the same size), the quadrature coupler 630 can divide or distribute the input RF signal received at port 631 into two very similar and, in some embodiments, equal power signals. Conversely, when the Doherty amplifier 600 has an asymmetrical configuration (i.e., a configuration in which one of the amplifier power transistors (typically the peaking amplifier transistor) is significantly larger), the quadrature coupler 630 can output the carrier signal and the peaking signal with unequal powers. As discussed in detail above, this can be achieved by controlling the coupling factor K of the quadrature coupler 630 to achieve unequal power distribution.

[0170] The output ports 632, 633 of the quadrature coupler 630 are connected to the carrier amplifier 620 and the peaking amplifier 650, respectively. The carrier amplifier 620 is configured to amplify the carrier signal from the port 632 of the quadrature coupler 630 and provide the amplified carrier signal to the power combining node 672 through the impedance inversion element 670. Similarly, the peaking amplifier 650 is configured to amplify the peaking signal from the port 633 of the quadrature coupler 630 and provide the amplified peaking signal to the power combining node 672.

[0171] The impedance inversion element 670 is designed so that the amplified carrier signal and the peaking signal arrive in phase with each other at the power combining node 672. For example, the impedance inversion element 670 may include a lambda / 4 (λ / 4) transmission line phase shift element (e.g., a microstrip line) that applies a relative phase shift of about 90 degrees to the carrier signal after amplification by the carrier amplifier 620. Thus, the amplified carrier RF signal and the peaking RF signal are combined in phase at the combining node 672.

[0172] The combining node 672 is electrically coupled to the RF output node 602 to provide the amplified and combined output RF signal to the RF output node 602. The output RF signal generated at the RF output node 602 may then be provided to an output load 690 (eg, an antenna).

[0173] Amplifier 600 is configured such that carrier amplifier 620 provides amplification for relatively low level input signals, and both carrier amplifier 620 and peaking amplifier 650 operate in combination to provide amplification for relatively high level input signals. This can be achieved, for example, by biasing carrier amplifier 620 such that carrier amplifier 620 operates in class AB mode, and biasing peaking amplifier 650 such that peaking amplifier 650 operates in class C mode.

[0174] Although the orthogonal coupler (eg, Figure 1 ,2A -2C, 3A-3C, 4, 5) are examples of embodiments of orthogonal couplers 100, 200, 200', 200", 300, 300', 300", 400, 500), but alternatively, the embodiments of the orthogonal couplers can be used in other types of circuit systems that can benefit from low-loss distribution of an input signal into two signals with equal or unequal power and a phase difference of about 90 degrees. Therefore, the example Doherty power amplifier 600 described herein is not meant to limit the scope of applicability of the orthogonal coupler embodiments described herein.

[0175] Figure 7 A flow chart showing a method of operating a quadrature coupler (e.g., quadrature coupler 200, 200', 200", 300, 300', 300", 400, 500, 630) having a variable capacitance circuit according to an embodiment. Operation of the quadrature coupler begins at block 702 when an input RF signal is received at a first port (e.g., port 101). In block 704, the quadrature coupler divides the input RF signal into a first output RF signal and a second output RF signal, applies a phase shift of approximately 90 degrees between the signals, and provides the output RF signals to a second port and a third port (e.g., ports 102, 103) in block 706.

[0176] The percentage of power delivered to each of the first output RF signal and the second output RF signal depends on the coupling factor K of the quadrature coupler. In various embodiments discussed previously, the quadrature coupler may include a first variable tuning network and a second variable tuning network (e.g., circuits 240, 240', 240", 250, 250', 250") that enable the coupling factor to be varied.

[0177] Thus, before, after, or simultaneously with blocks 702, 704, and 706, the quadrature coupler (and more specifically, the tuning network) may receive one or more analog control signals (e.g., bias voltages and / or switch control signals from controllers 470, 570), which may cause the coupling factor of the quadrature coupler to be modified. More specifically, when the tuning network receives analog control signals for the first tuning network and the second tuning network, as indicated in block 710, this causes, in block 712, the capacitance values ​​of the tuning networks to be modified (e.g., by changing the capacitance values ​​of the variable reactive components and / or switching capacitors into or out of the switched capacitor network). In turn, changing the capacitance values ​​of the tuning networks causes the coupling factor of the quadrature coupler to be modified. Thus, the relative amounts of signal power delivered to the second port and the third port are also modified.

[0178] Although at least one exemplary embodiment has been presented in the foregoing specific embodiments, it should be understood that there are a large number of variations. It should also be understood that the exemplary embodiments described herein are not intended to limit the scope, applicability or configuration of the claimed subject matter in any way. In fact, the foregoing specific embodiments will provide a convenient guide for implementing the described embodiments to those skilled in the art. It should be understood that various changes can be made to the function and arrangement of the elements without departing from the scope defined by the claims, and the scope defined by the claims includes known equivalents and foreseeable equivalents at the time of filing this patent application.

[0179] The foregoing detailed description is merely illustrative in nature and is not intended to limit the embodiments of the subject matter or the application and use of such embodiments. As used herein, the word "exemplary" means "serving as an example, instance, or illustration". Any embodiment described herein as exemplary should not necessarily be construed as being preferred or advantageous over other embodiments. In addition, it is not intended to be bound by any expressed or implied theory presented in the foregoing technical field, background technology, or detailed description.

[0180] The connecting lines shown in the various figures included herein are intended to represent exemplary functional relationships and / or physical couplings between the various elements. It should be noted that many replaceable or additional functional relationships or physical connections may be present in the embodiments of the subject matter. In addition, certain terms may also be used herein only for reference purposes, and therefore these terms are not intended to be restrictive, and unless the context clearly indicates, the terms "first", "second" and other such numerical terms referring to structures do not imply order or sequence.

[0181] The foregoing description refers to elements or features being "connected" or "coupled" together. As used herein, unless otherwise expressly stated, "connected" means that one element is directly joined to another element (or is directly communicated with another element), and not necessarily mechanically. Likewise, unless otherwise expressly stated, "coupled" means that one element is directly or indirectly joined to another element (or is directly or indirectly communicated with another element electrically or otherwise), and not necessarily mechanically. Thus, although the schematic diagrams shown in the figures depict an exemplary arrangement of elements, additional intervening elements, devices, features, or assemblies may be present in embodiments of the depicted subject matter.

[0182] Although specific embodiments of the invention have been described and illustrated, the invention is not to be limited to the specific forms or arrangements of parts so described and illustrated. The scope of the invention is to be defined by the claims appended hereto and their equivalents.

Claims

1. An orthogonal coupler, characterized in that: include: a first port, a second port, a third port, and a fourth port; a first inductor, a second inductor, a third inductor, and a fourth inductor; as well as a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor and a sixth capacitor, wherein The first capacitor, the second capacitor, and the third capacitor are coupled in series between the first port and the fourth port, a first intermediate node is located between the first capacitor and the second capacitor, and a second intermediate node is located between the second capacitor and the third capacitor, The fourth capacitor, the fifth capacitor and the sixth capacitor are coupled in series between the second port and the third port, a third intermediate node is located between the fourth capacitor and the fifth capacitor, and a fourth intermediate node is located between the fifth capacitor and the sixth capacitor, The first inductor is coupled between the first port and the second port, The second inductor is coupled between the first intermediate node and the third intermediate node, The third inductor is coupled between the second intermediate node and the fourth intermediate node, and The fourth inductor is coupled between the fourth port and the third port.

2. The orthogonal coupler according to claim 1, characterized in that: The orthogonal coupler is configured to receive an input RF signal, split the power of the input RF signal into a first output RF signal and a second output RF signal, apply a 90 degree phase difference between the first output RF signal and the second output RF signal, and provide the first output RF signal and the second output RF signal to the second port and the third port.

3. The orthogonal coupler according to claim 1, characterized in that: Also includes: a first variable tuning network coupled between the first port and the fourth port; as well as A second variable tuning network is coupled between the second port and the third port.

4. The orthogonal coupler according to claim 3, characterized in that: The first variable tuning network includes a first nonlinear reactive component and the second variable tuning network includes a second nonlinear reactive component.

5. The orthogonal coupler according to claim 3, characterized in that: The first variable tuning network includes a first capacitor and a first switch, and the second variable tuning network includes a second capacitor and a second switch.

6. The orthogonal coupler according to claim 3, characterized in that: The first variable tuning network and the second variable tuning network tune a coupling factor of the quadrature coupler.

7. The orthogonal coupler according to claim 3, characterized in that: The first variable tuning network includes a first plurality of capacitors and switches to provide a first tunable capacitance, and the second variable tuning network includes a second plurality of capacitors and switches to provide a second tunable capacitance.

8. The orthogonal coupler according to claim 1, characterized in that: The first capacitor, the third capacitor, the fourth capacitor and the sixth capacitor each have a first capacitance value; The second capacitor and the fifth capacitor each have a second capacitance value different from the first capacitance value; The first inductor and the fourth inductor each have a first inductance value; and The second inductor and the third inductor each have a second inductance value different from the first inductance value.

9. A power amplifier, characterized in that: include: a first amplifier having a first amplifier input; a second amplifier having a second amplifier input; A quadrature coupler comprising First port, coupled to a second port of the first amplifier input, a third port coupled to the second amplifier input, The fourth port, a first inductor, a second inductor, a third inductor, and a fourth inductor, and a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor and a sixth capacitor, wherein The first capacitor, the second capacitor, and the third capacitor are coupled in series between the first port and the fourth port, a first intermediate node is located between the first capacitor and the second capacitor, and a second intermediate node is located between the second capacitor and the third capacitor, The fourth capacitor, the fifth capacitor and the sixth capacitor are coupled in series between the second port and the third port, a third intermediate node is located between the fourth capacitor and the fifth capacitor, and a fourth intermediate node is located between the fifth capacitor and the sixth capacitor, The first inductor is coupled between the first port and the second port, The second inductor is coupled between the first intermediate node and the third intermediate node, The third inductor is coupled between the second intermediate node and the fourth intermediate node, and The fourth inductor is coupled between the fourth port and the third port.

10. A method of operating an orthogonal coupler having a first port, a second port, a third port and a fourth port, characterized in that, The method comprises: controlling a capacitance value of a first variable tuning network coupled between the first port and the fourth port to tune a coupling factor of the quadrature coupler, wherein the first variable tuning network includes a first capacitor; and controlling a capacitance value of a second variable tuning network coupled between the third port and the fourth port to tune the coupling factor of the quadrature coupler, wherein the second variable tuning network includes a second capacitor, wherein the quadrature coupler further comprises a first inductor, a second inductor, a third inductor, and a fourth inductor, and a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor and a sixth capacitor, wherein The first capacitor, the second capacitor, and the third capacitor are coupled in series between the first port and the fourth port, a first intermediate node is located between the first capacitor and the second capacitor, and a second intermediate node is located between the second capacitor and the third capacitor, The fourth capacitor, the fifth capacitor and the sixth capacitor are coupled in series between the second port and the third port, a third intermediate node is located between the fourth capacitor and the fifth capacitor, and a fourth intermediate node is located between the fifth capacitor and the sixth capacitor, The first inductor is coupled between the first port and the second port, The second inductor is coupled between the first intermediate node and the third intermediate node, The third inductor is coupled between the second intermediate node and the fourth intermediate node, and The fourth inductor is coupled between the fourth port and the third port.

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