High-power-factor and stroboflash-free LED linear constant-current driving chip and circuit

Abstract

The invention relates to the technical field of LED constant-current driving, and discloses a high-power-factor and stroboflash-free LED linear constant-current driving chip and circuit. The circuit comprises a voltage attenuation unit, a zero cross detection unit, a pulse voltage generation unit, an adder, a comparator, a pulse delay unit, an RS latch, a first current control unit, a second current control unit, a switch S1, a switch S2, a switch S3, a switch S4, a rectification unit, an energy storage capacitor CAP and a starting resistor RST. During actual use, the charging current of the energy storage capacitor CAP in a starting state is only about 10% of that in a stable state, so that even if the MOS tube Q1 bears all bus voltages VBUS during starting, the peak power consumption of the MOS tube Q1 is greatly attenuated due to low-current work, and the reliability of the control circuit is improved. Once starting is completed and a stable state is entered, the current returns to normal, so that the stable state is not influenced.

Description

Technical Field

[0001] The invention relates to the technical field of LED constant current driving, and in particular to a high power factor and flicker-free LED linear constant current driving chip and circuit. Background Art

[0002] The 5th edition of the standard of the International Electrotechnical Commission IEC Technical Branch specifically stipulates that LED lighting products with a rated power range of 5W≤P≤25W need to increase the input harmonic current test requirements; the input current waveform requirements are: before the conduction angle is 60°, the current must reach at least 5% of the current peak value, before 65°, the current must reach the maximum value, and at 90°, the current value cannot be less than 5%.

[0003] In order to meet the above standards, the existing high-power non-flash circuit topology is as follows Figure 1 As shown, it includes a rectifier bridge, a storage capacitor (CAP for short), a load (LED for short) and a control circuit unit. The control circuit unit includes a high-voltage power supply unit, a reference unit, a current control unit 1, a current control unit 2, a zero-crossing detection unit, a pulse voltage unit and an adder.

[0004] for Figure 1 In the structure shown, the node voltage at which the negative end of CAP is connected to the current control unit 1 is recorded as VCAP-, and the negative end of the LED is connected to the current control unit 2;

[0005] When the bus voltage (VBUS for short) is higher than the energy storage capacitor voltage, the input power charges the energy storage capacitor through the rectifier bridge. At the same time, because the bus voltage is also higher than the working voltage of the LED (LED voltage drop for short), the bus voltage also supplies power to the LED.

[0006] When the bus voltage drops below the LED voltage drop, the positive electrode of the CAP provides current to the LED, and the current returns to the negative electrode of the Cap through the body diode of Q1 inside the current control unit 1. By setting a reasonable charging current, it can be ensured that the LED is always in working state even if the Cap supplies power to the LED until VBUS is higher than the voltage of the Cap again. At the same time, the negative end of the LED can also power the entire system and generate the required reference source.

[0007] In addition, the current control unit 1 includes a MOS tube (referred to as Q1), an operational amplifier (referred to as EA1), a sampling resistor (referred to as R CS1 ); the current control unit 2 includes a MOS tube (referred to as Q2), an operational amplifier (referred to as EA2), a sampling resistor (referred to as R CS2 ).

[0008] The inverting input of EA1 is connected to the source of Q1 and R CS1 One end, R CS1The other end of EA1 is connected to the ground. The output end of EA1 is connected to the gate of Q1.

[0009] The positive input terminal of EA1 in the current control unit 1 is connected to the output terminal of the adder. EA1 controls the gate of Q1 to adjust the equivalent resistance of Q1 so that the voltage on the source of Q1 is always the voltage V of the positive input terminal of EA1. EA1+ , R CS1 In the case of a constant value, the CAP charging current is controlled at V EA1+ / R CS1 .

[0010] In order to meet the requirement that the current reaches the maximum value before the 65° phase, the control circuit unit samples VCAP- through the zero-crossing detection unit. When it is detected that VCAP- exceeds the zero point, the zero-crossing detection unit outputs a high level, and the pulse voltage unit outputs a high level pulse V PULSE , V PULSE and another reference V REF1 are respectively transmitted to the two input terminals of the adder, and the output V REF1 +V PULSE The current control unit 1 controls the current flowing through CAP to (V REF1 +V PULSE ) / R CS1 .

[0011] Since V PULSE It is a pulse voltage, so it presents a pulse current when CAP is charged. This current will be superimposed with the LED current (ILED for short) as the input current, so the input current will present a pulse state to meet the phase requirements.

[0012] The positive input terminal of EA2 in current control unit 2 is connected to a fixed reference V REF2 , the output of EA controls the gate of Q2 to adjust the equivalent resistance of Q2. When the DRN voltage of Q1 is sufficient, the voltage on the source of MOS is always the reference of the positive input of EA. In this way, the current flowing through EA is V REF2 / R CS2 , and the current of ILED and MOS tube is the same, so the current flowing through the LED can be controlled. Figure 1 The waveforms of the relevant nodes during the use of the structure shown are as follows: Figure 2 shown.

[0013] However, during the startup process, the capacitance of CAP cannot change suddenly, so it must start from zero. Therefore, during startup, VBUS is fully loaded on Q1 in the current control unit 1, causing the instantaneous power consumption of MOS tube Q1 to exceed the limit and Q1 to fail. Summary of the invention

[0014] In view of the shortcomings of the background technology, the present invention provides a high power factor and flicker-free LED linear constant current drive chip and circuit, and aims to solve the problem that during the startup process of the existing high power factor and flicker-free LED linear constant current drive circuit, the transistor of the current control unit will fail due to high instantaneous power consumption.

[0015] To solve the above technical problems, in the first aspect, the present invention provides the following technical solutions: a high power factor and flicker-free LED linear constant current driver chip, comprising a voltage attenuation unit, a zero-crossing detection unit, a pulse voltage generating unit, an adder, a comparator, a pulse delay unit, an RS latch, a first current control unit, a second current control unit, a switch S1, a switch S2, a switch S3 and a switch S4;

[0016] The input end of the first current control unit is electrically connected to the input end of the voltage attenuation unit and the detection end of the zero-crossing detection unit respectively;

[0017] The output end of the voltage attenuation unit is electrically connected to the negative input end of the comparator CMP, the positive input end of the comparator CMP is used to input the reference voltage VREF1, the output end of the comparator CMP is electrically connected to the input end of the pulse delay unit, the output end of the pulse delay unit is electrically connected to the R input end of the RS latch, the QN output end of the RS latch is electrically connected to the control end of the switch S1 and the control end of the switch S3 respectively, the output ends of the switch S1 and the switch S2 are electrically connected to the control end of the first current control unit respectively, the QP output end of the RS latch is electrically connected to the control end of the switch S2 and the control end of the switch S4 respectively, and the output end of the switch S3 and the output end of the switch S4 are electrically connected to the control end of the second current control unit respectively;

[0018] The output end of the zero-crossing detection unit is electrically connected to the input end of the pulse voltage generating unit, the output end of the pulse voltage generating unit is electrically connected to an input end of an adder, the other input end of the adder is used to input a reference voltage VREF2, the output end of the adder is electrically connected to the input end of a switch S1, the input end of the switch S2 is used to input a reference voltage VREF3, the input end of the switch S3 is used to input a reference voltage VREF4, and the input end of the switch S4 is used to input a reference voltage VREF5.

[0019] In a certain embodiment of the first aspect, the present invention also includes a high-voltage power supply unit and a reference unit, the input end of the high-voltage power supply unit is electrically connected to the input end of the second current control unit, the reference unit is electrically connected to the output end of the high-voltage power supply unit, and reference voltages VREF1, VREF2, VREF3, VREF4 and VREF5 are generated based on the output voltage of the high-voltage power supply unit.

[0020] In certain implementations of the first aspect, an attenuation coefficient α of the voltage attenuation unit is less than 1.

[0021] In certain implementation manner of the first aspect, the delay time of the pulse delay unit is 30 ms.

[0022] In a certain embodiment of the first aspect, the first current control unit includes an operational amplifier EA1, a MOS tube Q1 and a resistor RCS1, the positive electrode of the operational amplifier EA1 is the control end of the first current control unit, the negative electrode of the operational amplifier EA1 is electrically connected to the source of the MOS tube Q1 and is grounded through the resistor RCS1, the output end of the operational amplifier EA1 is electrically connected to the gate of the MOS tube Q1, and the drain of the MOS tube Q1 is the input end of the first current control unit.

[0023] In a certain embodiment of the first aspect, the second current control unit includes an operational amplifier EA2, a MOS tube Q2 and a resistor RCS2, the positive electrode of the operational amplifier EA2 is the control end of the second current control unit, the negative electrode of the operational amplifier EA2 is electrically connected to the source of the MOS tube Q2 and is grounded through the resistor RCS2, the output end of the operational amplifier EA2 is electrically connected to the gate of the MOS tube Q2, and the drain of the MOS tube Q2 is the input end of the second current control unit.

[0024] In a certain implementation manner of the first aspect, both the MOS transistor Q1 and the MOS transistor Q2 are NMOS transistors.

[0025] In a certain implementation manner of the first aspect, the switch S1 , the switch S2 , the switch S3 and the open transistor S4 are all NMOS transistors.

[0026] In a certain implementation manner of the first aspect, the output end of the high-voltage power supply unit is also grounded via an output capacitor.

[0027] In the second aspect, the present invention provides a high power factor and flicker-free LED linear constant current drive circuit, including the above-mentioned high power factor and flicker-free LED linear constant current drive chip, and also including a rectifier unit, an energy storage capacitor CAP and a starting resistor RST; the rectifier unit is used to convert the input alternating current into direct current, the DC output end of the rectifier unit is respectively electrically connected to the positive electrode of the energy storage capacitor CAP and one end of the starting resistor RST, the negative electrode of the energy storage capacitor CAP is electrically connected to the input end of the first current control unit, and the other end of the starting resistor RST is electrically connected to the input end of the second current control unit.

[0028] In actual use, when the bus voltage VBUS output by the rectifier unit after rectifying the input AC power exceeds the LED voltage drop, the voltage at the input end of the second current control unit rises to the working voltage, and the output end of the reference unit outputs the reference voltage after the circuit is started. The reference voltage VREF3 is 10% of the reference voltage VREF2, and the reference voltage VREF5 is 5% of the reference voltage VREF4.

[0029] At the same time, the QP output terminal and the QN output terminal of the RS latch are set to a high level state and a low level state by default, respectively; at this time, the switch S2 and the switch S4 are closed, and the switch S1 and the switch S3 are opened. The reference voltage VREF3 and the reference voltage VREF5 are connected to the positive input terminals of the operational amplifier EA1 and the operational amplifier EA2, respectively. The first current control unit and the second current control unit control the charging current of the energy storage capacitor CAP and the current flowing through the LED to be relatively small currents. At this time, the circuit works in the startup state.

[0030] At the same time, since the starting voltage of the energy storage capacitor CAP is zero, the input end of the first current control unit in the startup phase bears all the bus voltages, that is, Vcap-≈VBUS. The Vcap- peak value passes through the voltage attenuation unit and is connected to the negative electrode of the comparator CMP. At this time, the input of the comparator CMP is at a low level, and the pulse delay unit is not started.

[0031] When the bus voltage VBUS is in the falling phase of the cycle, when the output of the voltage attenuation unit is less than the reference voltage VREF1, the comparator CMP output is high level, and the pulse delay unit starts timing. After the bus voltage VBUS is less than the LED voltage drop, since the LED is in the disconnected state, the energy storage capacitor CAP is powered through the startup resistor RST circuit. Because the LED current at this stage is much smaller than that in the normal working state, the energy storage capacitor CAP will not drop quickly due to the power supply to the LED, causing the voltage of the energy storage capacitor CAP to decrease rapidly.

[0032] Since the pulse delay unit in the circuit is set to delay the output pulse by 30ms after being started, and the pulsating voltage cycle of the rectifier unit is between 8ms and 10.7ms, the pulsating voltage of the rectifier unit will definitely rise again during the delay stage, and the energy storage capacitor CAP will be charged again during the rising stage. The voltage of the energy storage capacitor CAP continues to increase during the second pulsating cycle of the peak value. If VCAP- in the second pulsating cycle is still greater than the reference voltage VREF1 after passing through the voltage attenuation unit, the comparator CMP output will return to the level and the pulse delay unit will be reset. The charging current of the energy storage capacitor CAP is still a small current, the output current of the load is still a small current, and the control circuit is still working in the startup state.

[0033] Until the voltage of the energy storage capacitor CAP increases to a level that makes the output of the voltage attenuation unit always lower than the reference voltage VREF1 in a certain pulsation cycle, the comparator CMP no longer outputs a high level and the RS latch is no longer reset. After the pulse delay unit completes the delay, the pulse output inputs a high level pulse to the R terminal of the RS latch. According to the RS latch principle, the output values ​​of QP and QN at its output terminal are reversed, switches S1 and S3 are closed, and switches S2 and S4 are opened. The positive input terminal of the operational amplifier EA1 is connected to the output terminal of the adder, and the positive input terminal of the operational amplifier EA2 is connected to the reference voltage VREF4. The subsequent working mode is restored to the existing control circuit mode, and the control circuit unit enters a stable state.

[0034] Compared with the prior art, the present invention has the following beneficial effects: from the working state of the above circuit, it can be known that since the charging current of the energy storage capacitor CAP in the startup state is only about 10% of that in the stable state, even if the MOS tube Q1 bears all the bus voltage VBUS during startup, the peak power consumption of the MOS tube Q1 is greatly attenuated due to the low current operation, thereby improving the reliability of the control circuit. Once the startup is completed and the stable state is entered, the current returns to normal, so there is no impact in the stable state. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 The present invention is a schematic diagram of an existing LED linear constant current driving circuit with high power factor and no flicker;

[0036] Figure 2 The waveform diagram of the relevant signals when the existing high power factor and flicker-free LED linear constant current drive circuit is working;

[0037] Figure 3 Schematic diagram of the structure of a high power factor and flicker-free LED linear constant current driver chip in an embodiment;

[0038] Figure 4 Schematic diagram of the structure of a high power factor and flicker-free LED linear constant current drive circuit and an LED load in an embodiment;

[0039] Figure 5 for Figure 4 Waveform diagram of relevant nodes when the circuit is working. DETAILED DESCRIPTION

[0040] The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic diagrams, which only illustrate the basic structure of the present invention in a schematic manner, and therefore only show the components related to the present invention.

[0041] Embodiment 1

[0042] like Figure 3As shown, this embodiment provides a high power factor and flicker-free LED linear constant current driver chip, including a voltage attenuation unit 5, a zero-crossing detection unit 6, a pulse voltage generating unit 7, an adder 8, a comparator CMP, a pulse delay unit 9, an RS latch 10, a first current control unit 3, a second current control unit 4, a switch S1, a switch S2, a switch S3 and a switch S4;

[0043] The input end of the first current control unit 3 is electrically connected to the input end of the voltage attenuation unit 5 and the detection end of the zero-crossing detection unit 6 respectively;

[0044] The output end of the voltage attenuation unit 5 is electrically connected to the negative input end of the comparator CMP, the positive input end of the comparator CMP is used to input the reference voltage VREF1, the output end of the comparator CMP is electrically connected to the input end of the pulse delay unit 9, the output end of the pulse delay unit 9 is electrically connected to the R input end of the RS latch 10, the QN output end of the RS latch 10 is electrically connected to the control end of the switch S1 and the control end of the switch S3, respectively, the output ends of the switch S1 and the switch S2 are electrically connected to the control end of the first current control unit 3, the QP output end of the RS latch is electrically connected to the control end of the switch S2 and the control end of the switch S4, respectively, the output end of the switch S3 and the output end of the switch S4 are electrically connected to the control end of the second current control unit 4, respectively;

[0045] The output end of the zero-crossing detection unit 6 is electrically connected to the input end of the pulse voltage generating unit 7, the output end of the pulse voltage generating unit 7 is electrically connected to one input end of the adder, the other input end of the adder is used to input the reference voltage VREF2, the output end of the adder 8 is electrically connected to the input end of the switch S1, the input end of the switch S2 is used to input the reference voltage VREF3, the input end of the switch S3 is used to input the reference voltage VREF4, and the input end of the switch S4 is used to input the reference voltage VREF5.

[0046] In this embodiment, when the sampling voltage sampled by the zero-crossing detection unit 5 exceeds the zero point, the zero-crossing detection unit 5 outputs a high level, and the pulse voltage generating unit 7 outputs a high level pulse.

[0047] In this embodiment, if Figure 2As shown, the present invention also includes a high-voltage power supply unit 1 and a reference unit 2, the input end of the high-voltage power supply unit 1 is electrically connected to the input end of the second current control unit 4, the reference unit 2 is electrically connected to the output end of the high-voltage power supply unit 1, and the reference voltage VREF1, the reference voltage VREF2, the reference voltage VREF3, the reference voltage VREF4 and the reference voltage VREF5 are generated based on the output voltage of the high-voltage power supply unit 1, and the output end of the high-voltage power supply unit 1 is also grounded through an output capacitor. The reference voltage VREF3 is 10% of the reference voltage VREF2, and the reference voltage VREF5 is 5% of the reference voltage VREF4.

[0048] It should be noted that any one of the high-voltage power supply unit 1 and the reference unit 2 in this embodiment is an existing circuit and will not be described redundantly here.

[0049] In this embodiment, the attenuation coefficient α of the voltage attenuation unit 5 is less than 1, that is, the output voltage of the voltage attenuation unit 5 is less than the input voltage thereof, and illustratively, the attenuation coefficient α may be 0.8, 0.75 or 0.5. In addition, the specific structure of the voltage attenuation unit 5 is not described again, and those skilled in the art may set it according to a simple resistor voltage divider circuit, or may output it as long as the input voltage can be attenuated at a ratio less than 1.

[0050] In this embodiment, the delay time of the pulse delay unit 9 is 30 ms.

[0051] exist Figure 2 In the figure, the first current control unit 3 includes an operational amplifier EA1, a MOS tube Q1 and a resistor RCS1, the positive electrode of the operational amplifier EA1 is the control end of the first current control unit 3, the negative electrode of the operational amplifier EA1 is electrically connected to the source of the MOS tube Q1 and is grounded through the resistor RCS1, the output end of the operational amplifier EA1 is electrically connected to the gate of the MOS tube Q1, and the drain of the MOS tube Q1 is the input end of the first current control unit 3.

[0052] exist Figure 2 In the figure, the second current control unit 4 includes an operational amplifier EA2, a MOS tube Q2 and a resistor RCS2, the positive electrode of the operational amplifier EA2 is the control end of the second current control unit 4, the negative electrode of the operational amplifier EA2 is electrically connected to the source of the MOS tube Q2 and is grounded through the resistor RCS2, the output end of the operational amplifier EA2 is electrically connected to the gate of the MOS tube Q2, and the drain of the MOS tube Q2 is the input end of the second current control unit 4.

[0053] In addition, in this embodiment, the MOS transistor Q1 and the MOS transistor Q2 are both NMOS transistors. The switch S1, the switch S2, the switch S3 and the switch S4 may also be NMOS transistors.

[0054] The principle and implementation effect of the chip in this example are explained in the circuit of the second embodiment, and will not be described in detail here.

[0055] Embodiment 2

[0056] like Figure 4 As shown, this embodiment provides a high power factor and flicker-free LED linear constant current drive circuit, including the high power factor and flicker-free LED linear constant current drive chip in the first embodiment, and also includes a rectifier unit 11, an energy storage capacitor CAP and a start resistor RST; the rectifier unit 11 is used to convert the input AC power into DC power, and the DC output end of the rectifier unit 11 is electrically connected to the positive electrode of the energy storage capacitor CAP and one end of the start resistor RST respectively, the negative electrode of the energy storage capacitor CAP is electrically connected to the input end of the first current control unit 3, and the other end of the start resistor RST is electrically connected to the input end of the second current control unit 4. Wherein, an LED load branch 12 (hereinafter referred to as LED) is connected in parallel at both ends of the start resistor RST.

[0057] In actual use, when the bus voltage VBUS output by the rectifying unit 11 after rectifying the input AC power exceeds the LED voltage drop, the voltage at the input end of the second current control unit 4 rises to the working voltage, that is, the voltage at the node DRN rises to the working voltage, and after the circuit is started, the output end of the reference unit 2 outputs the reference voltage VREF1-reference voltage VREF5;

[0058] At the same time, the QP output terminal and the QN output terminal of the RS latch 10 are set to a high level state and a low level state by default, respectively; at this time, the switch S2 and the switch S4 are closed, and the switch S1 and the switch S3 are opened. The reference voltage VREF3 and the reference voltage VREF5 are connected to the positive input terminals of the operational amplifier EA1 and the operational amplifier EA2, respectively, and the first current control unit 3 and the second current control unit 4 control the charging current of the energy storage capacitor CAP and the current flowing through the LED to be relatively small currents. At this time, the circuit works in the startup state.

[0059] At the same time, since the starting voltage of the energy storage capacitor CAP is zero, the input end of the first current control unit 3 bears all the bus voltages, that is, Vcap-≈VBUS, during the startup phase. The Vcap- peak value passes through the voltage attenuation unit 5 and is connected to the negative electrode of the comparator CMP. At this time, the input of the comparator CMP is at a low level, and the pulse delay unit 9 is not started.

[0060] When the bus voltage VBUS is in the falling stage of the cycle, when the output of the voltage attenuation unit 5 is less than the reference voltage VREF1, the comparator CMP output is high level, and the pulse delay unit 9 starts timing. After the bus voltage VBUS is less than the LED voltage drop, since the LED is in the disconnected state, the energy storage capacitor CAP is powered through the startup resistor RST circuit. Because the current of the LED in this stage is much smaller than that in the normal working state, the energy storage capacitor CAP will not drop quickly due to the power supply to the LED, resulting in a rapid decrease in the voltage of the energy storage capacitor CAP.

[0061] Since the pulse delay unit 9 in the circuit is set to delay the output pulse by 30ms after being started, and the pulsating voltage cycle of the rectifier unit 11 is between 8ms and 10.7ms, the pulsating voltage of the rectifier unit 11 will definitely rise again during the delay stage, and the energy storage capacitor CAP will be charged again during the rising stage, and the voltage of the energy storage capacitor CAP will continue to increase during the second pulsating cycle of the peak value. If VCAP- in the second pulsating cycle is still greater than the reference voltage VREF1 after passing through the voltage attenuation unit 5, the output of the comparator CMP will be restored to the level, and the pulse delay unit will be reset. The charging current of the energy storage capacitor CAP is still a small current, the output current of the load is still a small current, and the control circuit is still working in the startup state.

[0062] Until the voltage of the energy storage capacitor CAP increases to a level that makes the output of the voltage attenuation unit 5 always lower than the reference voltage VREF1 in a certain pulsation cycle, the comparator CMP no longer outputs a high level and the RS latch is no longer reset. After the pulse delay unit 9 completes the delay, the pulse output inputs a high level pulse to the R terminal of the RS latch. According to the RS latch principle, the output values ​​of QP and QN at its output terminal are reversed, switches S1 and S3 are closed, and switches S2 and S4 are opened. The positive input terminal of the operational amplifier EA1 is connected to the output terminal of the adder 8, and the positive input terminal of the operational amplifier EA2 is connected to the reference voltage VREF4. The subsequent working mode is restored to the work in the existing control circuit mode, and the control circuit unit enters a stable state.

[0063] From the working state of the above circuit, we can know that since the charging current of the energy storage capacitor CAP in the startup state is only about 10% of that in the stable state, even if the MOS tube Q1 bears all the bus voltage VBUS during startup, the peak power consumption of the MOS tube Q1 is greatly attenuated because of the small current operation, which improves the reliability of the control circuit. Once the startup is completed and the stable state is entered, the current returns to normal, so there is no impact in the stable state.

[0064] The circuit of the present invention is simulated, and the signal waveforms of the relevant nodes are as follows: Figure 5 As shown, Figure 2 and Figure 5For comparison, the details are as follows:

[0065] first Figure 5 The input voltage and input current in are the instantaneous voltage and instantaneous current of the input AC power, the LED current is the current flowing through the LED load branch 12, the CAP current is the current flowing through the energy storage capacitor CAP, V CAP- is the negative terminal voltage of the energy storage capacitor CAP, and the instantaneous power consumption of Q1 is the instantaneous power consumption of the MOS tube Q1.

[0066] exist Figure 2 In the instantaneous power consumption curve of MOS tube Q1, each unit on the vertical axis represents 5W. When the input AC voltage starts, the loss of MOS tube Q1 in the circuit of the existing product is very large. The maximum power consumption value after startup is about 7 units, totaling 35W, and about 1 / 3 units after stabilization is about 1.6W. Comparing the instantaneous power consumption during startup and stable state, the former is about 21 times that of the latter. In actual applications, the MOS tube Q1 in the control circuit of the existing product must be equipped with an external protection device, otherwise it is very easy to cause the MOS tube to break down once it is turned on.

[0067] exist Figure 5 In the instantaneous power consumption curve of the MOS tube Q1, each unit of the vertical axis represents 0.5W. In the stage from the startup state to the stable state, the maximum power consumption value after startup is about 9 units, totaling 4.5W, and after stabilization, there are about 3.3 units, totaling about 1.6W. The maximum instantaneous power consumption of the MOS tube Q1 in the startup stage is only 2.7 times the instantaneous power consumption in the steady state, which greatly attenuates the instantaneous power consumption in the startup process and ensures the reliability of the circuit.

[0068] In addition, after entering the stable state stage, the input current and load current of the control circuit of the present invention are the same as those of the existing products, meeting the input current waveform requirements, and the output current is stable and has no ripple current and also meets the no flicker requirements. That is, the control circuit part added in the present invention has no effect on the stable state.

[0069] The above is based on the present invention as an inspiration. Through the above description, relevant staff can make various changes and modifications without departing from the technical idea of ​​this invention. The technical scope of this invention is not limited to the content in the specification, and its technical scope must be determined according to the scope of the claims.

Claims

1. High power factor and flicker-free LED linear constant current driver chip, characterized by: It includes a voltage attenuation unit, a zero-crossing detection unit, a pulse voltage generating unit, an adder, a comparator, a pulse delay unit, an RS latch, a first current control unit, a second current control unit, a switch S1, a switch S2, a switch S3 and a switch S4; The input end of the first current control unit is electrically connected to the input end of the voltage attenuation unit and the detection end of the zero-crossing detection unit respectively; The output end of the voltage attenuation unit is electrically connected to the negative input end of the comparator CMP, the positive input end of the comparator CMP is used to input the reference voltage VREF1, the output end of the comparator CMP is electrically connected to the input end of the pulse delay unit, the output end of the pulse delay unit is electrically connected to the R input end of the RS latch, the QN output end of the RS latch is electrically connected to the control end of the switch S1 and the control end of the switch S3 respectively, the QP output end of the RS latch is electrically connected to the control end of the switch S2 and the control end of the switch S4 respectively, the output ends of the switch S1 and the switch S2 are electrically connected to the control end of the first current control unit respectively, and the output end of the switch S3 and the output end of the switch S4 are electrically connected to the control end of the second current control unit respectively; The output end of the zero-crossing detection unit is electrically connected to the input end of the pulse voltage generating unit, the output end of the pulse voltage generating unit is electrically connected to an input end of an adder, the other input end of the adder is used to input a reference voltage VREF2, the output end of the adder is electrically connected to the input end of a switch S1, the input end of the switch S2 is used to input a reference voltage VREF3, the input end of the switch S3 is used to input a reference voltage VREF4, and the input end of the switch S4 is used to input a reference voltage VREF5.

2. The high power factor and flicker-free LED linear constant current driver chip according to claim 1, characterized in that: It also includes a high-voltage power supply unit and a reference unit, wherein the input end of the high-voltage power supply unit is electrically connected to the input end of the second current control unit, and the reference unit is electrically connected to the output end of the high-voltage power supply unit, and a reference voltage VREF1, a reference voltage VREF2, a reference voltage VREF3, a reference voltage VREF4 and a reference voltage VREF5 are generated based on the output voltage of the high-voltage power supply unit.

3. The high power factor and flicker-free LED linear constant current driver chip according to claim 1, characterized in that: The attenuation coefficient α of the voltage attenuation unit is less than 1.

4. The high power factor and flicker-free LED linear constant current driver chip according to claim 1, characterized in that: The delay time of the pulse delay unit is 30ms.

5. The high power factor and flicker-free LED linear constant current driver chip according to claim 1, characterized in that: The first current control unit includes an operational amplifier EA1, a MOS tube Q1 and a resistor RCS1. The positive electrode of the operational amplifier EA1 is the control end of the first current control unit, the negative electrode of the operational amplifier EA1 is electrically connected to the source of the MOS tube Q1 and is grounded through the resistor RCS1, the output end of the operational amplifier EA1 is electrically connected to the gate of the MOS tube Q1, and the drain of the MOS tube Q1 is the input end of the first current control unit.

6. The high power factor and flicker-free LED linear constant current driver chip according to claim 5, characterized in that: The second current control unit includes an operational amplifier EA2, a MOS tube Q2 and a resistor RCS2, wherein the positive electrode of the operational amplifier EA2 is the control end of the second current control unit, the negative electrode of the operational amplifier EA2 is electrically connected to the source of the MOS tube Q2 and is grounded through the resistor RCS2, the output end of the operational amplifier EA2 is electrically connected to the gate of the MOS tube Q2, and the drain of the MOS tube Q2 is the input end of the second current control unit.

7. The high power factor and flicker-free LED linear constant current driver chip according to claim 6, characterized in that: The MOS transistor Q1 and the MOS transistor Q2 are both NMOS transistors.

8. The high power factor and flicker-free LED linear constant current driver chip according to claim 1, characterized in that: The switch S1 , the switch S2 , the switch S3 and the open transistor S4 are all NMOS transistors.

9. The high power factor and flicker-free LED linear constant current driver chip according to claim 2, characterized in that: The output end of the high voltage power supply unit is also grounded via an output capacitor.

10. High power factor and flicker-free LED linear constant current drive circuit, characterized in that: A high power factor and flicker-free LED linear constant current driver chip comprising any one of claims 1 to 9, and further comprising a rectifier unit, an energy storage capacitor CAP and a starting resistor RST; the rectifier unit is used to convert input alternating current into direct current, the DC output end of the rectifier unit is electrically connected to the positive electrode of the energy storage capacitor CAP and one end of the starting resistor RST, respectively, the negative electrode of the energy storage capacitor CAP is electrically connected to the input end of the first current control unit, and the other end of the starting resistor RST is electrically connected to the input end of the second current control unit.

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