Electronic device, voltage management method and electronic equipment

By adjusting the power supply voltage in the clock oscillator, the problem of high power consumption in low-power states such as standby is solved, and effective reduction of power consumption and extended battery life is achieved.

CN119493463APending Publication Date: 2025-02-21HUAWEI TECH CO LTD
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Patent Information

Application Number
CN202311043629.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-08-17
Publication Date
2025-02-21

AI Technical Summary

Technical Problem

The power consumption of mobile terminals is still high in low-power states such as standby, which affects battery life and environmental resource consumption.

Method used

The power consumption of the clock oscillator is reduced by adjusting the supply voltage in the clock oscillator. When the target functional module enters a low power state, the power management unit PMU lowers the operating voltage of the clock oscillator to reduce power consumption.

Benefits of technology

It effectively reduces the power consumption of electronic devices in low power consumption state, extends battery life, and reduces the consumption of environmental resources.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiment of the invention discloses an electronic device, a voltage management method and electronic equipment, and the electronic device can comprise a clock oscillator and a power management unit (PMU), and the clock oscillator and the PMU are connected with a target function module. The clock oscillator is used for providing a clock signal for the target function module; the PMU is used for providing a first working voltage for the clock oscillator; when the target function module enters the first working state, the first working voltage is adjusted to a second working voltage, and the second working voltage is smaller than the first working voltage. The power consumption of the electronic device in some application scenes can be reduced.
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Description

Technical Field

[0001] The present application relates to the technical field of clock oscillators, and in particular to an electronic device, a voltage management method and an electronic device. Background Art

[0002] As mobile terminals develop towards greater intelligence, higher integration and stronger functions, high power consumption of mobile terminals has become an increasingly prominent problem. As the service integration of mobile terminal products becomes higher and higher, for example, smart phones integrate multiple functions such as audio and video calls, text messages, multimedia, Internet access, electronic games, photography, recording, computing, and file management. While bringing more convenience to users, the power consumption of mobile terminals has also increased exponentially. High energy consumption poses more severe challenges to the capacity of batteries, the heat dissipation of products and other reliability designs, and the consumption of environmental resources is also increasing. Therefore, under the general trend of promoting low-carbon life, protecting the earth and the extremely popularization of mobile terminals, how to effectively manage the power consumption of mobile terminals or design more energy-saving products has become a hot topic in the industry.

[0003] For example, the standby scenario is one of the important scenarios of the communication system. The standby power consumption directly affects the standby time of the system. Reducing the standby power consumption can significantly increase the battery life of the communication system. How to further reduce the system power consumption is still an urgent problem to be solved. Summary of the invention

[0004] Embodiments of the present application provide an electronic device, a voltage management method, and an electronic device to reduce the power consumption of the electronic device in some application scenarios.

[0005] In a first aspect, an embodiment of the present application provides an electronic device, characterized in that it includes: a clock oscillator and a power management unit PMU, the clock oscillator and the PMU are respectively connected to a target functional module; the clock oscillator is used to provide a clock signal for the target functional module; the PMU is used to: provide a first operating voltage for the clock oscillator; when the target functional module enters a first operating state, the first operating voltage is adjusted to a second operating voltage, and the second operating voltage is lower than the first operating voltage.

[0006] In the embodiment of the present application, by adjusting the power supply voltage of the clock oscillator that provides the clock signal to the target functional module, when the target functional module enters some working states (such as standby, sleep, low power mode, etc.), the power consumption of the clock oscillator can be reduced by reducing the working voltage of the clock oscillator, thereby further reducing the power consumption of the electronic device. That is, when the low power consumption requirement of the target functional module in certain scenarios is greater than the work quality requirement, the low power consumption requirement of the electronic device can be preferentially met by appropriately lowering the working voltage of the clock oscillator.

[0007] In a possible implementation, the clock signal quality of the clock oscillator at the first operating voltage is better than the clock signal quality at the second operating voltage. That is, the first operating voltage and the second operating voltage in the embodiment of the present application not only have a relationship that the first operating voltage is greater than the second operating voltage, but also further satisfy that the clock signal quality of the clock oscillator at the first operating voltage is better than the clock signal quality at the second operating voltage. In the embodiment of the present application, after lowering the operating voltage of the clock oscillator, although the quality of the clock signal provided by it has decreased, since the current working state of the target functional module does not require high clock signal quality (such as standby, sleep, hibernation, flight or low power consumption scenarios), therefore, the clock signal quality of some clock oscillators (such as phase noise, waveform, etc.) can be appropriately sacrificed to meet lower clock signal quality requirements, while reducing the power consumption of the electronic device.

[0008] In a possible implementation, the PMU is further used to: when the target functional module enters the second working state, adjust the second working voltage to the first working voltage; wherein the clock signal quality requirement of the target functional module in the second working state is higher than the clock signal quality requirement in the first working state. In an embodiment of the present application, when the target functional module re-enters the second working state (such as a wake-up state, a normal working state, etc.) with a higher clock signal quality requirement, it is necessary to adjust and restore the voltage of the clock oscillator so that the target functional module can operate under better clock signal quality, thereby improving the working accuracy and precision of the target functional module.

[0009] In a possible implementation, the PMU is further used to: receive first indication information sent by the target functional module, the first indication information is used to indicate to the PMU that the target functional module enters the first working state; or, receive second indication information sent by the target functional module, the second indication information is used to indicate to the PMU that the target functional module enters the second working state. In an embodiment of the present application, the PMU specifically senses when the target functional module enters the first working state or the second working state by receiving indication information sent by the target functional module, so that after sensing the above state, the operating voltage on the clock oscillator is regulated to reduce system power consumption. Optionally, the PMU can not only obtain the working state of the target functional module by passively receiving indication information sent by the target functional module, but also obtain the working state of the target functional module by actively sensing, for example, real-time monitoring of the working state of the target functional module, monitoring of the signal bit or status bit of the working state of the target functional module, etc.

[0010] In one possible implementation, the PMU includes a DC voltage module, and the DC voltage module is connected to the clock oscillator; the PMU is specifically used to provide the first operating voltage to the clock oscillator through the DC voltage module; wherein the output voltage of the DC voltage module is the first operating voltage. In an embodiment of the present application, the power management module PMU may specifically include a DC voltage module for providing a first operating voltage to the clock oscillator, wherein the DC voltage module can convert a higher input voltage into a stable output voltage in a variety of applications, that is, in an embodiment of the present application, the input voltage can be stabilized to a fixed output voltage through the DC voltage module to provide a stable operating voltage for the clock oscillator, so that the clock oscillator can output a clock signal with high quality. For example, the DC voltage module is a low voltage difference linear regulator LDO or a high-precision DC voltage output module.

[0011] In a possible implementation, the PMU is specifically used to adjust the first operating voltage to the second operating voltage by lowering the output voltage of the DC voltage module; and is specifically used to adjust the second operating voltage to the first operating voltage by increasing the output voltage of the DC voltage module. In the embodiment of the present application, the clock oscillator is powered by the output voltage of the DC voltage module. Therefore, when it is necessary to reduce the operating voltage on the clock oscillator, it can be achieved by lowering the output voltage of the DC voltage module; when it is necessary to increase the operating voltage on the clock oscillator, it can be achieved by increasing the output voltage of the DC voltage module.

[0012] In a possible implementation, the input voltage of the DC voltage module is greater than the output voltage; the PMU further includes a voltage regulating module, which is connected to the DC voltage module to provide the input voltage to the DC voltage module; when the target functional module enters the first working state, the PMU is further used to adjust the input voltage through the voltage regulating module after adjusting the first working voltage to the second working voltage by lowering the output voltage of the DC voltage module. Since the quality requirements for the clock signal are relatively low when the target functional module enters the first working state, in the embodiment of the present application, the working voltage of the clock oscillator can be reduced by lowering the output voltage of the DC voltage module, thereby reducing the power consumption of the clock oscillator. However, since the voltage difference between the input voltage and the output voltage of the DC voltage module increases due to the reduction of its output voltage, and the increase in the voltage difference may cause the power consumption loss of the DC voltage module itself to increase, in the embodiment of the present application, the voltage value of the input voltage provided to the DC voltage module can be further reduced synchronously, so as to reduce the voltage difference on the DC voltage module, thereby compensating for the power consumption loss of the DC voltage module itself. In the above process of lowering the input and output voltages of the DC voltage module, the output voltage of the DC voltage module is first lowered, and then the input voltage is further lowered (i.e., the corresponding voltage regulating module is then lowered). The reason is that since the input voltage of the DC voltage module is higher than the output voltage, if the input voltage is lowered first at this time, the pressure difference on the DC voltage module will be further reduced, which will cause the quality and stability of the supply voltage on the DC voltage output module to decrease. When the output voltage is lowered first, since its output voltage is at a smaller value, the pressure difference of the DC voltage module can be kept at a larger value, thereby improving the quality and stability of the supply voltage of the DC voltage module. In addition, when the target functional module needs to enter the first working state, that is, when it has a high demand for low power consumption, the output voltage is lowered first, so that the working voltage on the clock oscillator can be quickly reduced to achieve the effect of rapidly reducing power consumption. In summary, in the embodiment of the present application, by reducing the input voltage and output voltage of the DC voltage module, not only can the power consumption on the clock oscillator be reduced, but also the power consumption of the DC voltage module itself can be further reduced and the quality and stability of the supply voltage can be guaranteed at the same time, thereby greatly reducing the overall power consumption of the electronic device.

[0013] In a possible implementation, the input voltage of the DC voltage module is greater than the output voltage; the PMU further includes a voltage regulating module, which is connected to the DC voltage module to provide the input voltage to the DC voltage module; when the target functional module enters the second working state, the PMU is also used to increase the input voltage through the voltage regulating module before adjusting the second working voltage to the first working voltage by increasing the output voltage of the DC voltage module. Since the quality requirements for the clock signal are relatively high when the target functional module enters the second working state, in the embodiment of the present application, the working voltage of the clock oscillator can be increased by increasing the output voltage of the DC voltage module, thereby ensuring the clock signal quality of the clock oscillator to ensure the normal working state of the target functional module, but because the voltage difference between the input voltage and the output voltage on the DC voltage module becomes smaller due to the increase of its output voltage, and because the voltage difference is reduced, the power supply ripple rejection ratio (PSRR) of the DC voltage module itself may be reduced, that is, the power supply quality and stability are deteriorated. Therefore, in the embodiment of the present application, the voltage value of the input voltage provided to the DC voltage module can be further increased synchronously, so as to improve the power supply ripple rejection ratio (PSRR) on the DC voltage module, thereby improving the quality and stability of the voltage supply of the DC voltage module. In summary, in the embodiment of the present application, by increasing the input voltage and output voltage of the DC voltage module, not only the clock signal quality of the clock oscillator can be guaranteed, but also the voltage supply quality of the DC voltage module itself can be further improved, thereby greatly improving the working accuracy and precision of the electronic device. In the above process of increasing the input and output voltages of the DC voltage module, the input voltage is first increased (i.e., the supply voltage of the voltage regulating module is increased first), and then the output voltage of the DC voltage module is further increased. The reason is that before entering the second working state, the DC voltage module is in a state where the output voltage is a relatively low value. If the output voltage is increased first at this time, the voltage difference on the DC voltage module will be further reduced, which will cause the quality and stability of the voltage supply on the DC voltage module to decrease. When the input voltage is increased first (i.e., the supply voltage of the voltage regulating module is increased first), since its output voltage is at a relatively small value, the voltage difference of the DC voltage module can be kept at a relatively large value, thereby improving the quality and stability of the voltage supply of the DC voltage module. In addition, when the target functional module needs to enter the second working state, that is, when it has a relatively high requirement on the quality of the clock signal, it is more necessary for the clock oscillator to work under a stable working voltage. Therefore, increasing the input voltage first is conducive to stabilizing and restoring the working voltage on the clock oscillator and improving the quality of the clock signal.

[0014] In a possible implementation, the DC voltage module is a low-dropout linear regulator LDO or a high-precision DC voltage output module; the voltage regulation module is an AC-DC converter (AC-DC) or a DC-DC converter (DC-DC). In the embodiment of the present application, the DC voltage module can be a high-precision or high-quality regulator, and the voltage regulation module can be a DC converter such as BUCK, BOOST, etc.

[0015] In a possible implementation, the target functional module is one or more of a processor, a SoC chip, a vehicle-mounted device chip, a customer terminal device CPE chip, a modem chip, a radio frequency chip, and an accelerator. The embodiment of the present application can be applied to a variety of scenarios, such as chip systems on a chip, vehicle-mounted customer terminal device chips, modems, processors, various accelerators, sensors, and other application scenarios.

[0016] In one possible implementation, the first working state includes one or more of standby, sleep, hibernation, flight mode and low power consumption state; or, the second working state includes one or more of wake-up, lighting state, normal operation state and normal power consumption state. In an embodiment of the present application, the first working state of the target functional module may include entering standby, sleep, hibernation, flight or some low power consumption states that keep a small part of the functions powered on (such as payment or clock functions, etc.). That is, under these working states, the target functional module has relatively low requirements on the quality of the clock signal, which will not have a significant impact on the normal function of the target functional module.

[0017] In the second aspect, an embodiment of the present application provides a voltage management method, which can be applied to an electronic device, wherein the electronic device includes: a clock oscillator and a power management unit PMU, wherein the clock oscillator and the PMU are respectively connected to a target functional module; the method may include: the PMU provides a first operating voltage for the clock oscillator; a clock signal is provided to the target functional module through the clock oscillator; when the target functional module enters a first operating state, the first operating voltage is adjusted to a second operating voltage through the PMU, and the second operating voltage is lower than the first operating voltage.

[0018] In a possible implementation manner, quality of a clock signal of the clock oscillator at the first operating voltage is better than quality of a clock signal at the second operating voltage.

[0019] In a possible implementation, the method further includes: when the target functional module enters a second working state, adjusting the second working voltage to the first working voltage through the PMU; wherein the clock signal quality requirement of the target functional module in the second working state is higher than the clock signal quality requirement in the first working state.

[0020] In a possible implementation, the method further includes: receiving, through the PMU, first indication information sent by the target functional module, the first indication information being used to indicate to the PMU that the target functional module enters the first working state; or, receiving, through the PMU, second indication information sent by the target functional module, the second indication information being used to indicate to the PMU that the target functional module enters the second working state.

[0021] In a possible implementation, the PMU includes a DC voltage module, which is connected to the clock oscillator; adjusting the first operating voltage to the second operating voltage through the PMU includes: the PMU provides the first operating voltage to the clock oscillator through the DC voltage module; wherein the output voltage of the DC voltage module is the first operating voltage.

[0022] In a possible implementation, adjusting the first operating voltage to the second operating voltage through the PMU includes: the PMU adjusting the first operating voltage to the second operating voltage by lowering the output voltage of the DC voltage module; the PMU, adjusting the second operating voltage to the first operating voltage through the PMU includes: the PMU adjusting the second operating voltage to the first operating voltage by raising the output voltage of the DC voltage module.

[0023] In a possible implementation, the input voltage of the DC voltage module is greater than the output voltage; the PMU also includes a voltage regulating module, which is connected to the DC voltage module to provide the input voltage to the DC voltage module; the method also includes: when the target functional module enters the first working state, the PMU adjusts the first working voltage to the second working voltage by lowering the output voltage of the DC voltage module, and then lowers the input voltage through the voltage regulating module.

[0024] In a possible implementation, the input voltage of the DC voltage module is greater than the output voltage; the PMU also includes a voltage regulating module, which is connected to the DC voltage module to provide the input voltage to the DC voltage module; the method also includes: when the target functional module enters the second working state, the PMU increases the input voltage through the voltage regulating module before adjusting the second working voltage to the first working voltage by increasing the output voltage of the DC voltage module.

[0025] In a possible implementation, the DC voltage module is a low dropout linear regulator LDO or a high-precision DC voltage output module; the voltage regulation module is an AC-DC converter (AC-DC) or a DC-DC converter (DC-DC).

[0026] In a possible implementation, the target functional module is one or more of a processor, a SoC chip, a vehicle-mounted device chip, a customer terminal equipment CPE chip, a modem chip, a radio frequency chip and an accelerator.

[0027] In one possible implementation, the first working state includes one or more of standby, sleep, hibernation, flight mode and low power consumption state; or, the second working state includes one or more of wake-up, lighting state, normal operation state and normal power consumption state.

[0028] In the third aspect, an embodiment of the present application provides a chip, which is connected to a clock oscillator, and the chip and the clock oscillator are respectively connected to a target functional module; the clock oscillator is used to provide a clock signal for the target functional module; the chip can be used to: provide a first operating voltage for the clock oscillator; when the target functional module enters a first operating state, adjust the first operating voltage to a second operating voltage, and the second operating voltage is lower than the first operating voltage.

[0029] In a possible implementation, the chip is also used to: when the target functional module enters a second working state, adjust the second working voltage to the first working voltage; wherein the clock signal quality requirement of the target functional module in the second working state is higher than the clock signal quality requirement in the first working state.

[0030] In a possible implementation, the chip is further used to: receive first indication information sent by the target functional module, the first indication information is used to indicate to the chip that the target functional module enters the first working state; or, receive second indication information sent by the target functional module, the second indication information is used to indicate to the chip that the target functional module enters the second working state.

[0031] In one possible implementation, the chip includes a DC voltage module, which is connected to the clock oscillator; the chip is specifically used to provide the first operating voltage to the clock oscillator through the DC voltage module; wherein the output voltage of the DC voltage module is the first operating voltage.

[0032] In a possible implementation, the chip is specifically used to adjust the first operating voltage to the second operating voltage by lowering the output voltage of the DC voltage module, and to adjust the second operating voltage to the first operating voltage by increasing the output voltage of the DC voltage module.

[0033] In one possible implementation, the input voltage of the DC voltage module is greater than the output voltage; the chip also includes a voltage regulating module, which is connected to the DC voltage module to provide the input voltage to the DC voltage module; when the target functional module enters the first working state, the chip is also used to lower the input voltage through the voltage regulating module after adjusting the first working voltage to the second working voltage by lowering the output voltage of the DC voltage module.

[0034] In one possible implementation, the input voltage of the DC voltage module is greater than the output voltage; the chip also includes a voltage regulating module, which is connected to the DC voltage module to provide the input voltage to the DC voltage module; when the target functional module enters the second working state, the chip is also used to increase the input voltage through the voltage regulating module before adjusting the second working voltage to the first working voltage by increasing the output voltage of the DC voltage module.

[0035] In a possible implementation, the DC voltage module is a low dropout linear regulator LDO or a high-precision DC voltage output module; the voltage regulation module is an AC-DC converter (AC-DC) or a DC-DC converter (DC-DC).

[0036] In a possible implementation, the target functional module is one or more of a processor, a SoC chip, a vehicle-mounted device chip, a customer terminal equipment CPE chip, a modem chip, a radio frequency chip and an accelerator.

[0037] In one possible implementation, the first working state includes one or more of standby, sleep, hibernation, flight mode and low power consumption state; or, the second working state includes one or more of wake-up, lighting state, normal operation state and normal power consumption state.

[0038] In a fourth aspect, an embodiment of the present application provides an electronic device, which may include an electronic device provided by any one of the implementation methods in the above-mentioned first aspect, and a target functional module coupled to the electronic device; the target functional module is used to operate under the clock signal.

[0039] In a possible implementation, the electronic device further includes a memory; the memory is coupled to the target functional module and is used to store instructions and data generated by the target functional module when it is running.

[0040] In a possible implementation, the target functional module is further used to: send first indication information to the PMU, wherein the first indication information is used to indicate to the PMU that the target functional module enters the first working state; or send second indication information to the PMU, wherein the second indication information is used to indicate to the PMU that the target functional module enters the second working state.

[0041] In a fifth aspect, the present application provides a system on chip (SoC), the SoC comprising an electronic device provided by any one of the implementations in the first aspect above; optionally, the SoC further comprises an internal memory or an external memory coupled to the electronic device. The SoC may be composed of a chip, or may include a chip and other discrete devices.

[0042] In a sixth aspect, the present application provides a chip system, which may include an electronic device provided by any one of the implementations of the first aspect. In one possible design, the chip system also includes a memory, which is used to store program instructions and data necessary or related to the electronic device during operation. The chip system may be composed of a chip, or may include a chip and other discrete devices.

[0043] In a seventh aspect, the present application provides an intelligent device having the function of implementing the voltage management method provided by any one of the implementations in the second aspect above. The function can be implemented by hardware, or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions.

[0044] In an eighth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable medium is used to store program code, and when the program code is executed by a processor, the voltage management method provided by any one of the implementation methods in the above-mentioned second aspect can be implemented.

[0045] In a ninth aspect, an embodiment of the present application provides a computer program, which includes instructions. When the instructions are executed by a processor, the processor can execute the voltage management method provided by any one of the implementations in the second aspect above. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the background technology, the drawings required for use in the embodiments of the present application or the background technology will be described below.

[0047] Figure 1 It is a structural schematic diagram of an electronic device provided in an embodiment of the present application.

[0048] Figure 2A It is a structural schematic diagram of an electronic device provided in an embodiment of the present application.

[0049] Figure 2B It is a schematic diagram of the structure of another electronic device provided in an embodiment of the present application.

[0050] Figure 2C It is a structural schematic diagram of another electronic device provided in an embodiment of the present application.

[0051] Figure 2D A schematic diagram of the chip layout structure of an electronic device provided in an embodiment of the present application.

[0052] Figure 2E A schematic diagram of the chip layout structure of another electronic device provided in an embodiment of the present application.

[0053] Figure 2F A schematic diagram of the chip layout structure of another electronic device provided in an embodiment of the present application.

[0054] Figure 2G A schematic diagram of the structure of another electronic device provided in an embodiment of the present application.

[0055] Figure 3A A schematic diagram of the interface of some electronic devices entering the first working state provided in an embodiment of the present application.

[0056] Figure 3B A schematic diagram of an interface for some users to set a low power consumption mode in an embodiment of the present application.

[0057] Figure 4 A voltage control timing diagram for a target functional module entering a sleep state and a wake-up state provided in an embodiment of the present application.

[0058] Figure 5 It is a flow chart of a voltage management method provided in an embodiment of the present application.

[0059] Figure 6 It is a flow chart of another voltage management method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0060] The embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

[0061] The terms "first", "second", "third" and "fourth" etc. in the specification and claims of the present application and the drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes steps or units that are not listed, or optionally includes other steps or units inherent to these processes, methods, products or devices.

[0062] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0063] The terms "component", "module", "system", etc. used in this specification are used to represent computer-related entities, hardware, firmware, a combination of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process running on a processor, a processor, an object, an executable file, an execution thread, a program and / or a computer. By way of illustration, both applications running on a computing device and a computing device can be components. One or more components may reside in a process and / or an execution thread, and a component may be located on a computer and / or distributed between two or more computers. In addition, these components may be executed from various computer-readable media having various data structures stored thereon. Components may, for example, communicate through local and / or remote processes according to signals having one or more data packets (e.g., data from two components interacting with another component between a local system, a distributed system and / or a network, such as the Internet interacting with other systems through signals).

[0064] First, some terms in this application are explained to facilitate understanding by those skilled in the art.

[0065] (1) An integrated circuit is a miniature electronic device or component. Using a certain process, the transistors, resistors, capacitors, inductors and other components and wiring required in a circuit are interconnected and made on a small piece or several small pieces of semiconductor wafers or dielectric substrates, and then packaged in a tube shell to become a miniature structure with the required circuit function.

[0066] (2) Customer-premises equipment (CPE) refers to terminal equipment such as computer equipment, gateways, and wireless access points installed on the user side to provide data transmission or access services to users. CPE equipment is usually located indoors and includes routers, switches, network cards, modems, wireless access devices, fiber optic terminal equipment, TV boxes, and vehicle-mounted terminals.

[0067] (3) Modem (Modulator and Demodulator, Modem): A modem is an important device for remote communication via a public telecommunications network. It is mainly used to convert binary digital information into analog signals that can be transmitted through ordinary public information systems, or to convert received analog signals into digital information.

[0068] (4) Power Supply Rejection Ratio (PSRR) is the ratio of the two voltage gains obtained when the input and output power supplies are regarded as two independent signal sources. It is the ratio of the input power change (in volts) to the converter output change (in volts), usually expressed in decibels. For high-quality D / A converters, it is required that when the power supply voltage used by the switching circuit and operational amplifier changes, the output voltage has little effect. The ratio of the percentage change of the full-scale voltage to the percentage change of the power supply voltage is usually called the power supply ripple rejection ratio.

[0069] (5) A DC to DC converter is a circuit or electromechanical device that converts a DC power source into a DC (or near-DC) power source of a different voltage. The power range can be from very small (small battery) to very large (high voltage power conversion).

[0070] (6) An AC to DC (alternating current to direct current) converter is a device that converts alternating current into direct current. The power flow can be bidirectional. The power flow from the power source to the load is called rectification, and the power flow from the load back to the power source is called active inversion.

[0071] Based on the above, see Figure 1 , Figure 11 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. The electronic device 10 may include a clock oscillator 101 and a power management unit (PMU) 102. The electronic device 10 may specifically be a chip or a chipset or a circuit board equipped with a chip or a chipset. The chip or chipset or the circuit board equipped with a chip or a chipset may work under the necessary software drive. The electronic device 10 may be located in any electronic device, such as a computer, a mobile phone, a tablet, a smart wearable device, and other types of devices. For example, see Figure 2A , Figure 2A 1 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application, wherein a clock oscillator 101 and a PMU 102 in an electronic device 10 are respectively connected to a target functional module 20 in an electronic device 30.

[0072] The clock oscillator 101, its function is to generate a periodic electrical signal, that is, an oscillation signal, which can be used in many applications, for example, in digital electronic systems, the signal can be used as a clock signal to synchronize the operation of various circuits; in radio communication systems, the signal can be used as a radio frequency signal to transmit information between a transmitter and a receiver; in sensors: the signal can be used to drive sensors, such as pressure sensors, temperature sensors and acceleration sensors; in audio equipment: the signal can be used as an audio signal, such as a music player and an electronic piano. In this application, the oscillation signal is mainly used as a clock signal to discuss, and the power consumption of the clock signal provided by it is optimized. In the embodiment of the present application, the clock oscillator 101 can generate a clock pulse with a stable frequency and constant amplitude at a determined oscillation frequency, and provide it to each unit or circuit inside the target functional module 20, so that each unit and circuit with different structures and functions in the target functional module is under the control of the "clock signal", according to a unified "beat" and a prescribed timing (time sequence), cooperate and work in coordination with each other, thereby completing the function of the target functional module in the system.

[0073] The power management unit PMU 102 can be used to manage the conversion, distribution, detection, etc. of the electric energy in the electronic device 30 under the input of a power source such as a battery, a power adapter or an inverter, and can also provide an operating voltage (such as a first operating voltage or a second operating voltage) for the clock oscillator 101, and regulate its operating voltage (for example, adjusting the first operating voltage to the second operating voltage, etc.). Optionally, the PMU 102 can also be used to power the target functional module 20. Further, when the target functional module 20 is a system on chip (SoC), it can also provide corresponding voltages for other peripherals connected to the SoC (such as various sensors, memories, etc.). Optionally, the PMU 102 can also further have a power supply protection function, such as charging control, etc., and have additional protection circuits for overvoltage, undervoltage, overtemperature, etc., so that all units or modules can work normally. Optionally, PMU 102 can be connected to the SoC via multiple power pins and a system power management interface SPMI, wherein the multiple power pins are used to power the SoC, and the SPMI is used to receive commands such as control commands from the SoC. For example, the first indication information and the second indication information in the embodiment of the present application can be transmitted via SPMI.

[0074] For further information, see Figure 2B , Figure 2B 1 is a schematic diagram of the structure of another electronic device provided in an embodiment of the present application, wherein the power management unit PMU102 may include a DC voltage module 1021, and optionally, may also include a voltage regulating module 1022. The DC voltage module 1021 is capable of converting an input voltage into a stable output voltage for use by the clock oscillator 101, that is, providing a stable operating voltage for the clock oscillator 101 through its output voltage. The function of the voltage regulating module 1022 is to provide an input voltage to the DC voltage module 1021 and to control its input voltage. In one possible implementation, the DC voltage module 1021 is a low-dropout linear regulator LDO or a high-precision DC voltage output module; the voltage regulating module 1022 is an AC-DC converter (AC-DC) or a DC-DC converter (DC-DC), wherein the DC-DC may specifically be a BUCK or a Boost.

[0075] Alternatively, if Figure 2BAs shown, the clock oscillator 101 may include a clock generating circuit 1011 and a peripheral device 1012. Among them, since the crystal oscillator (i.e., crystal oscillator) in the clock oscillator 101 is usually made of a quartz crystal, and the chip is usually integrated through a silicon-based substrate, therefore, in some possible implementations, the clock oscillator 101 may be divided into two parts, namely, a peripheral device part including a crystal oscillator, and a clock generating circuit part that can be integrated inside the chip. For example, the clock generating circuit 1011 of the clock oscillator 101 is integrated inside the chip, and the crystal oscillator is mounted outside the chip as a peripheral device 1012. Exemplarily, the power management unit 102 and the clock generating circuit 1011 are integrated in one chip, and the peripheral device 1012 is mounted outside the chip, or the target functional module 20 and the clock generating circuit 1011 are integrated in one chip, and the peripheral device 1012 is mounted outside the chip. It can be understood that other component arrangements can also be used, and the embodiments of the present application are not specifically limited to this.

[0076] For example, see Figure 2C , Figure 2C is a structural diagram of another electronic device provided in an embodiment of the present application, Figure 2C The electronic device is described by taking the DC voltage module 1021 as a low dropout regulator (LDO), the voltage regulating module 1022 as a Buck in a DC-DC converter (DC-DC), and the clock oscillator 101 as a Pierce crystal oscillator (negative resistance oscillator) as an example.

[0077] LDO can convert high voltage input to low voltage output. Its working principle is to reduce the input voltage to the required output voltage. Specifically, there is a feedback circuit inside the LDO, which will continuously detect the output voltage. If the output voltage is lower than the set value, the feedback circuit will adjust the output voltage to keep the output voltage stable.

[0078] Buck circuit is also called step-down circuit. It can convert high voltage input into low voltage output. Its working principle is realized through PWM (pulse width modulation) technology. Specifically, Buck achieves output voltage stability by controlling the voltage duty cycle within each cycle. When the input voltage changes, Buck will automatically adjust the duty cycle to keep the output voltage stable. Buck and LDO have different working principles, but both can convert input voltage into stable output voltage for use in electronic devices. In practical applications, you can choose the appropriate power IC according to specific needs to achieve the best power management effect.

[0079] The circuit of the clock oscillator 101 is generally composed of a crystal oscillator, a control chip, a capacitor, and the like. Figure 2C The clock oscillator in shows a circuit diagram of a Pierce oscillator, such as Figure 2C As shown, X1 is a crystal oscillator, R1 is a feedback resistor, U1 is an inverter, C1 and C2 are parallel capacitors, and the crystal oscillator X1 is in parallel mode with C1 and C2, and works in the inductive region. Optionally, the circuit may also include a phase co-converter A1 and a phase co-converter A2. The crystal oscillator X1 and the two capacitors C1 and C2 form a bandpass filter in the form of a π-type network, which provides a 180-degree phase shift and the required voltage gain at about the resonant frequency of the crystal oscillator. R1 is a bias resistor, which allows the inverter U1 to work in the linear region and become a high-gain inverting amplifier, and ensures the occurrence of oscillation. In addition, the phase co-converters A1 and A2 can be used to enhance the driving capability, and the size of C1 and C2 will affect the output frequency. It can be understood that the above circuit structure is only one possible implementation method, and the embodiment of the present application does not specifically limit the circuit structure inside the clock oscillator.

[0080] For example, see Figure 2D , Figure 2D A schematic diagram of a chip layout structure of an electronic device provided in an embodiment of the present application, in Figure 2D In the embodiment, the clock oscillator 101 includes a clock generating circuit 1011 (i.e., including A1, A2, C1, C2, U1, and R1) and a peripheral device 1012 (i.e., a crystal oscillator X1). Figure 2D In the embodiment, the power management unit 102 and the clock generating circuit 1011 in the clock oscillator 101 can be integrated on the same chip, namely, chip 1, while the target functional module 20 can be integrated on chip 2 alone, and the crystal oscillator X1 in the clock oscillator 101 is mounted on the outside of chip 1 as a peripheral device 1012. For another example, see Figure 2E , Figure 2E A schematic diagram of a chip layout structure of another electronic device provided in an embodiment of the present application, in Figure 2E In the embodiment, the power management unit 102 can be used as a separate chip 1, and the clock generation circuit 1011 in the clock oscillator 101 can be integrated with the target functional module 20 on the same chip, namely, chip 2, and the crystal oscillator X1 in the clock oscillator 101 is mounted on the outside of chip 2 as a peripheral device 1012. For another example, see Figure 2F , Figure 2F A schematic diagram of a chip layout structure of another electronic device provided in an embodiment of the present application, in Figure 2F In the embodiment, the power management unit 102, the clock generating circuit 1011 of the clock oscillator 101 and the target functional module 20 can all be integrated on the same chip, namely, chip 1, while the crystal oscillator X1 in the clock oscillator 101 is mounted outside the chip 1 as a peripheral device.

[0081] The structures shown in the above embodiments do not constitute specific limitations on the clock oscillator 101. In other embodiments of the present application, the clock oscillator 101 may include more or fewer components than shown, or combine or split some components, or arrange the components differently.

[0082] The target functional module 20 may be a processor, a SoC chip, a vehicle-mounted device chip, a customer terminal device CPE chip, a modem chip, a radio frequency chip or an accelerator. Optionally, the target functional module 20 may also be a circuit module with a certain function, or the target functional module 20 may also be a module or circuit inside a chip. When the target functional module 20 is a module or circuit inside a chip, the clock generating circuit 1011 and / or the power management unit PMU102 in the clock oscillator 101 may be integrated in the same chip as the target functional module 20. For details, please refer to the above Figure 2D-2F The relevant description in will not be repeated here. The composition and function of the SoC chip are described by taking the target functional module 20 as an example of a SoC chip.

[0083] A SoC chip can be an integrated circuit with a dedicated purpose, which contains a complete system and all the contents of the embedded software. For example, the SOC can specifically include the following modules:

[0084] Processor (Central Processing Unit, CPU): The processor is the core part of the SoC and is responsible for performing various computing and control tasks.

[0085] Graphics Processing Unit (GPU): Responsible for processing graphics and image data in the device, providing high-performance graphics rendering and image processing capabilities. For example, it can handle graphics-intensive tasks such as games, graphical interfaces, and high-definition videos, providing a smooth graphics experience.

[0086] Communication module: For example, when the electronic device is a mobile communication terminal, the communication module in the SoC may include a baseband processor, a modem, and a radio frequency transceiver. The baseband processor is responsible for processing the communication signals of the device, including mobile networks (such as 4G, 5G) and Wi-Fi. The modem is responsible for encoding and decoding signals, and the radio frequency transceiver is responsible for sending and receiving wireless signals.

[0087] Multimedia module: may include image signal processing unit (ISP), video codec and audio processor, etc. For example, ISP is responsible for camera image processing and optimization, video codec supports decoding and encoding of various video formats, and audio processor provides high-quality audio processing and sound effects.

[0088] Storage controller: The storage controller is used to manage the memory in the device, including flash memory and random access memory (RAM). It is responsible for reading and writing data, allocating and managing memory.

[0089] Sensor controller: The sensor controller is used to manage various sensors in the device, such as accelerometers, gyroscopes, magnetometers, and light sensors. It is responsible for the collection, processing, and transmission of sensor data, providing various sensing and positioning functions for the device.

[0090] Memory: SoC may also include some memory for caching data, such as static random access memory (SRAM), dynamic random access memory (DRAM), double data rate synchronous dynamic random access memory (Double Data Rate SDRAM), flash memory, etc.

[0091] In addition to the above main functional modules, SoC may also include other functional modules such as security module, power management unit, touch controller and various interface controllers. These modules work together to provide various functions and performances of SoC, which are not listed here one by one. It is understandable that the internal structure and function of SoC in different application scenarios or different electronic devices may be different, and the embodiments of this application do not specifically limit this.

[0092] See also Figure 2G , Figure 2G This is a schematic diagram of the structure of another electronic device provided in an embodiment of the present application. The electronic device 30 may further include various memories, various sensors and other peripherals.

[0093] Various types of memory, such as Universal Flash Storage (UFS), Dynamic Random Access Memory (DRAM), NAND Flash or Solid State Drive (SSD).

[0094] Various sensors, such as gyroscope sensors, acceleration sensors, displays, touch screens or camera sensors, etc.

[0095] Peripherals may include various communication modules, such as a modem, a radio frequency integrated circuit (RFIC), a wireless network (WIFI) module, or a near field communication (NFC) module.

[0096] It can be understood that, in a possible implementation, the electronic device 10 in the present application can also form the above-mentioned SoC together with the target functional module 20 and the above-mentioned related devices.

[0097] The structures illustrated in the above embodiments do not constitute specific limitations of the electronic device 10 or the electronic device 30. In other embodiments of the present application, the electronic device 10 or the electronic device 30 may include more or fewer components than shown in the figure, or combine some components, or split some components, or arrange the components differently. The components illustrated in the above figures may be implemented in hardware, software, or a combination of software and hardware.

[0098] Based on the above Figures 1 to 2G The hardware structure of any electronic device 10 or electronic device 30 in the embodiment of the present application may include the following functions:

[0099] The clock oscillator 101 is used to provide a clock signal for the target functional module 20; the PMU 102 is used to provide a first working voltage for the clock oscillator 101; when the target functional module 20 enters the first working state, the first working voltage is adjusted to a second working voltage, and the second working voltage is less than the first working voltage. Optionally, the values ​​of the first working voltage and the second working voltage are related to the specific type, function and performance requirements of the target functional module, and the embodiment of the present application does not specifically limit this, and the operating frequency of the clock oscillator under the above-mentioned first working voltage or second working voltage may not change, but the quality of its clock signal will be affected to some extent, that is, the quality of the clock signal can be sacrificed from a certain dimension (such as stability or accuracy, etc.) without affecting the operating frequency of the clock oscillator. Exemplarily, the first working state of the target functional module may include entering standby, sleep, hibernation, flight or some low-power states that keep a small part of the functions powered on (such as payment or clock functions, etc.). That is, in these working states, the target functional module has relatively low requirements on the quality of the clock signal, and will not have a significant impact on the normal function of the target functional module. Optionally, a certain time difference can be set between the time when the target functional module 20 enters the first working state and the time when the PMU 102 adjusts the working voltage (adjusts the first working voltage to the second working voltage), and the time difference can be matched with the working state. For example, when the first working state is the standby state, the time difference can be set to a larger value. The reason is that after the user is on standby, he may use the electronic device again in a short time (that is, the electronic device 30 where the electronic device 10 is located, which will not be repeated later). If the voltage on the clock oscillator has been lowered at this time, it may need to be increased again in a short time. Therefore, in the case of uncertainty about the user's intention, a larger time difference can be set to reduce the possibility of frequent voltage adjustment, thereby obtaining better power consumption benefits; when the first working state is the sleep or hibernation state, the time difference can be set to a smaller value. The reason is that after the user sets sleep or hibernation, it is very likely that the electronic device will not be used again in a short time. Therefore, the voltage on the clock oscillator can be immediately controlled to be lowered to better save the power consumption of the electronic device.

[0100] In the embodiment of the present application, by adjusting the power supply voltage of the clock oscillator that provides the clock signal to the target functional module, when the target functional module enters some working states (such as standby, sleep, low power mode, etc.), the power consumption of the clock oscillator can be reduced by reducing the working voltage of the clock oscillator, thereby further reducing the power consumption of the electronic device. That is, when the low power consumption requirement of the target functional module in certain scenarios is greater than the work quality requirement, the low power consumption requirement of the electronic device can be preferentially met by appropriately lowering the working voltage of the clock oscillator.

[0101] In a possible implementation, the clock signal quality of the clock oscillator 101 at the first operating voltage is better than the clock signal quality at the second operating voltage. That is, the first operating voltage and the second operating voltage in the embodiment of the present application not only have a relationship that the first operating voltage is greater than the second operating voltage, but also further satisfy that the clock signal quality of the clock oscillator at the first operating voltage is better than the clock signal quality at the second operating voltage. In the embodiment of the present application, after lowering the operating voltage of the clock oscillator, although the quality of the clock signal provided by it has decreased, since the current working state of the target functional module does not require high clock signal quality (such as standby, sleep, hibernation, flight or low power consumption scenarios), therefore, the clock signal quality of some clock oscillators (such as phase noise, waveform, etc.) can be appropriately sacrificed to meet the lower clock signal quality requirements, while reducing the power consumption of the electronic device.

[0102] In a possible implementation, PMU102 is further used to: when the target functional module 20 enters the second working state, adjust the second working voltage to the first working voltage; wherein the clock signal quality requirement of the target functional module 20 in the second working state is higher than the clock signal quality requirement in the first working state. In the embodiment of the present application, when re-entering the second working state (such as the awakening state, the normal working state, etc.) with higher clock signal quality requirements, it is necessary to adjust and restore the voltage of the clock oscillator so that the target functional module can work under better clock signal quality, thereby improving the working accuracy and precision of the target functional module.

[0103] In a possible implementation, the PMU 102 is further used to: receive first indication information sent by the target functional module, the first indication information is used to indicate to the PMU 102 that the target functional module enters the first working state; or, receive second indication information sent by the target functional module, the second indication information is used to indicate to the PMU 102 that the target functional module enters the second working state. Optionally, the first indication information or the second indication information can be indicated before the target functional module has not entered the corresponding working state, or can be prompted after the target functional module has entered the corresponding working state. That is, the first indication information received by the PMU can be an indication that the target functional module is about to enter the first working state, or an indication that the target functional module has entered the first working state. Similarly, the second indication information also has similar characteristics, which will not be repeated here. In the embodiment of the present application, the PMU specifically senses when the target functional module enters the first working state or the second working state by receiving the indication information sent by the target functional module, so that after sensing the above state, the working voltage on the clock oscillator is adjusted to reduce system power consumption. Optionally, the PMU can not only obtain the working status of the target functional module by passively receiving indication information sent by the target functional module, but also obtain the working status of the target functional module by active perception, for example, real-time monitoring of the working status of the target functional module, monitoring the signal bit or status bit of the working status of the target functional module, etc.

[0104] In a possible implementation, the PMU 102 includes a DC voltage module 1021, and the DC voltage module 1021 is connected to the clock oscillator 101; the PMU 102 is specifically used to provide the first working voltage to the clock oscillator 101 through the DC voltage module 1021; wherein the output voltage of the DC voltage module 1021 is the first working voltage. In the embodiment of the present application, the power management module PMU 102 may specifically include a DC voltage module for providing the first working voltage to the clock oscillator, wherein the DC voltage module can convert a higher input voltage into a stable output voltage in a variety of applications, that is, in the embodiment of the present application, the input voltage can be stabilized to a fixed output voltage through the DC voltage module to provide a stable working voltage for the clock oscillator, so that the clock oscillator can output a clock signal with high quality. For example, the DC voltage module is a low dropout linear regulator LDO or a high-precision DC voltage output module.

[0105] In a possible implementation, the PMU 102 is specifically used to adjust the first operating voltage to the second operating voltage by lowering the output voltage of the DC voltage module 1021; and is specifically used to adjust the second operating voltage to the first operating voltage by increasing the output voltage of the DC voltage module 1021. In the embodiment of the present application, since the clock oscillator is powered by the output voltage of the DC voltage module, when it is necessary to reduce the operating voltage on the clock oscillator, it can be achieved by lowering the output voltage of the DC voltage module. In the embodiment of the present application, since the clock oscillator is powered by the output voltage of the DC voltage module, when it is necessary to increase the operating voltage on the clock oscillator, it can be achieved by increasing the output voltage of the DC voltage module.

[0106] In a possible implementation, the input voltage of the DC voltage module 1021 is greater than the output voltage; the PMU also includes a voltage regulating module 1022, which is connected to the DC voltage module 1021 and is used to provide the input voltage to the DC voltage module 1021; when the target functional module 20 enters the first working state, the PMU 102 is also used to lower the input voltage through the voltage regulating module after adjusting the first working voltage to the second working voltage by lowering the output voltage of the DC voltage module 1021. Since the quality requirements for the clock signal are relatively low when the target functional module enters the first working state, in the embodiment of the present application, the working voltage of the clock oscillator can be reduced by lowering the output voltage of the DC voltage module, thereby reducing the power consumption of the clock oscillator. However, since the voltage difference between the input voltage and the output voltage of the DC voltage module increases due to the reduction in its output voltage, and the increase in the voltage difference may cause the power consumption loss of the DC voltage module itself to increase, therefore, in the embodiment of the present application, the voltage value providing the input voltage to the DC voltage module can be further reduced synchronously, so as to reduce the voltage difference on the DC voltage module, thereby compensating for the power consumption loss of the DC voltage module itself. In the above process of lowering the input and output voltages of the DC voltage module, the output voltage of the DC voltage module is first lowered, and then the input voltage is further lowered (i.e., the corresponding voltage regulating module is then lowered). The reason is that since the input voltage of the DC voltage module is higher than the output voltage, if the input voltage is lowered first at this time, the pressure difference on the DC voltage module will be further reduced, which will cause the quality and stability of the supply voltage on the DC voltage output module to decrease. When the output voltage is lowered first, since its output voltage is at a smaller value, the pressure difference of the DC voltage module can be kept at a larger value, thereby improving the quality and stability of the supply voltage of the DC voltage module. In addition, when the target functional module needs to enter the first working state, that is, when it has a high demand for low power consumption, the output voltage is lowered first, so that the working voltage on the clock oscillator can be quickly reduced to achieve the effect of rapidly reducing power consumption. In summary, in the embodiment of the present application, by reducing the input voltage and output voltage of the DC voltage module, not only can the power consumption on the clock oscillator be reduced, but also the power consumption of the DC voltage module itself can be further reduced and the quality and stability of the supply voltage can be guaranteed at the same time, thereby greatly reducing the overall power consumption of the electronic device. Optionally, the voltage regulating module 1022 is also connected to other modules (such as other LDOs). Therefore, after lowering the voltage through the above-mentioned voltage regulating module, power consumption benefits of other LDO planes can be further obtained, that is, power consumption losses on other LDO planes are also reduced.

[0107] In a possible implementation, the input voltage of the DC voltage module 1021 is greater than the output voltage; the PMU 102 further includes a voltage regulating module 1022, which is connected to the DC voltage module 1021 to provide the input voltage to the DC voltage module 1021; when the target functional module 20 enters the second working state, the PMU 102 is further used to increase the input voltage through the voltage regulating module 1022 before adjusting the second working voltage to the first working voltage by increasing the output voltage of the DC voltage module 1021. Since the quality requirements for the clock signal are relatively high when the target functional module enters the second working state, in the embodiment of the present application, the working voltage of the clock oscillator can be increased by increasing the output voltage of the DC voltage module, thereby ensuring the clock signal quality of the clock oscillator to ensure the normal working state of the target functional module, but because the voltage difference between the input voltage and the output voltage on the DC voltage module becomes smaller due to the increase of its output voltage, and because the voltage difference is reduced, the power supply ripple rejection ratio (PSRR) of the DC voltage module itself may be reduced, that is, the power supply quality and stability are deteriorated. Therefore, in the embodiment of the present application, the voltage value of the input voltage provided to the DC voltage module can be further increased synchronously, so as to improve the power supply ripple rejection ratio (PSRR) on the DC voltage module, thereby improving the quality and stability of the voltage supply of the DC voltage module. In summary, in the embodiment of the present application, by increasing the input voltage and output voltage of the DC voltage module, not only the clock signal quality of the clock oscillator can be guaranteed, but also the voltage supply quality of the DC voltage module itself can be further improved, thereby greatly improving the working accuracy and precision of the electronic device. In the above process of increasing the input and output voltages of the DC voltage module, the input voltage is first increased (i.e., the supply voltage of the voltage regulating module is increased first), and then the output voltage of the DC voltage module is further increased. The reason is that before entering the second working state, the DC voltage module is in a state where the output voltage is a relatively low value. If the output voltage is increased first at this time, the voltage difference on the DC voltage module will be further reduced, which will cause the quality and stability of the voltage supply on the DC voltage module to decrease. When the input voltage is increased first (i.e., the supply voltage of the voltage regulating module is increased first), since its output voltage is at a relatively small value, the voltage difference of the DC voltage module can be kept at a relatively large value, thereby improving the quality and stability of the voltage supply of the DC voltage module. In addition, when the target functional module needs to enter the second working state, that is, when it has a relatively high requirement on the quality of the clock signal, it is more necessary for the clock oscillator to work under a stable working voltage. Therefore, increasing the input voltage first is conducive to stabilizing and restoring the working voltage on the clock oscillator and improving the quality of the clock signal.

[0108] In a possible implementation, the DC voltage module 1021 is a low-dropout linear regulator LDO or a high-precision DC voltage output module; the voltage regulating module 1022 is an AC-DC converter (AC-DC) or a DC-DC converter (DC-DC). In the embodiment of the present application, the DC voltage module can be a high-precision or high-quality regulator, and the voltage regulating module can be a DC converter such as Buck, BOOST, etc.

[0109] In a possible implementation, the target functional module 20 is one or more of a SoC chip, a vehicle-mounted device chip, a customer terminal device CPE chip, a modem chip, and a radio frequency chip. The embodiment of the present application can be applied to a variety of scenarios, such as chip-on-chip systems, vehicle-mounted customer terminal device chips, modems, microprocessors, sensors, and other application scenarios.

[0110] In one possible implementation, the first working state includes one or more of standby, sleep, hibernation, flight mode and low power consumption state; or, the second working state includes one or more of wake-up, lighting state, normal operation state and normal power consumption state. In an embodiment of the present application, the first working state of the target functional module may include entering standby, sleep, hibernation, flight or some low power consumption states that keep a small part of the functions powered on (such as payment or clock functions, etc.). That is, under these working states, the target functional module has relatively low requirements on the quality of the clock signal, which will not have a significant impact on the normal function of the target functional module.

[0111] See also Figure 3A , Figure 3A This is a schematic diagram of an interface of some electronic devices entering a first working state provided in an embodiment of the present application. Figure 3A As shown, the user interface 40 may be an interface normally used by the user, that is, corresponding to the second working state (such as wake-up, lighting, normal operation, etc.), which may include basic application icons such as date, clock display, power display, etc. When the user triggers the electronic device to enter the first working state (such as standby, sleep or hibernation, etc.) through some operations (such as locking the screen, setting, etc.), the electronic device may present the state of the user interface 41, and the electronic device will implement the relevant functions of the above-mentioned electronic device 10 in the background, that is, adjust the working voltage on the clock oscillation from the first working voltage to the second working voltage. For details, please refer to the relevant adjustment scheme after the above-mentioned electronic device enters the first working state, which will not be repeated here.

[0112] See also Figure 3B , Figure 3B This is a schematic diagram of an interface for some users to set low power consumption mode in an embodiment of the present application. Figure 3BAs shown, user interface 50 can be an interface for users to unlock the electronic device, which may include basic application icons, clock display, network display, APP application display and other functions, which will not be described in detail here. User interface 501 can be a user interface for the shortcut function of "setting" electronic device 30 that pops up by the user by pulling down, which can be used for users to set related functions, such as wireless network switch, Bluetooth switch, flashlight switch, electric ring setting, low power mode setting, etc. When the electronic device 30 detects a touch operation of the icon 502 acting on the low power mode (such as a click operation on the icon 502), in response to the operation, it can display Figure 3B The user interface 60 is shown as an example. The user interface 60 may include specific items set in the low power mode (in the embodiment of the present application, corresponding to the first working state), that is, functions that can still be used in the low power mode, such as clock function, emergency call, flashlight or screen unlocking functions. After the user turns on the function, the function set by the user can still remain turned on after the above-mentioned electronic device 10 or electronic device 30 in the present application enters the first working state. For example, after the user sets the relevant functions in the low power mode, the low power mode is triggered by some operations (such as the user manually turns it on through icon 601, or is triggered by long standby). At this time, the relevant voltage regulation function of the electronic device 10 in the present application is executed in the low power mode, and the user can still turn on some functions that do not require high clock signal quality in this mode, such as the clock function (manually turned on by icon 602), flashlight function and screen unlocking function set in the user interface 60. That is, if the user only uses the functions in the low power mode set above, it will not trigger to enter the second working state, that is, it still stays in the first working state without exiting, and maintains the voltage regulation parameters in the first working state to reduce power consumption to a greater extent. In specific situations, users can make settings based on their own usage habits or needs, such as whether to enable the above-mentioned low power mode function and which functions to enable in this mode, which will not be listed one by one here.

[0113] See also Figure 4 , Figure 4 A voltage control timing diagram for a target functional module entering a sleep and wake-up state provided in an embodiment of the present application is based on the above Figure 1-2D The structure of any electronic device 10 or electronic device 30 in the embodiment of the present invention is described below as an example, when the electronic device 10 or electronic device 30 enters different working states (such as the first working state and the second working state), the adjustment process of the control line of the target functional module, the LDO output and the BUCK plane in the timeline dimension may specifically include the following process:

[0114] 1. Before time t1, the system corresponding to the electronic device 10 or the electronic device 30 (hereinafter referred to as the system for ease of description) is currently in a normal working state, that is, a second working state (for example, a normal working state, a wake-up working state, and other working states with relatively high requirements for clock signal quality), and the clock oscillator currently providing a clock signal to the target functional module is operating at a first working voltage (compared to the second working voltage, the first working voltage value is larger). That is, the current output voltage of the LDO is the first working voltage.

[0115] 2. At time t1, the system currently needs to enter the second working state (such as the sleep state) from the first working state (such as the normal working state), then the clock oscillator that provides the clock signal for the target functional module can be switched to the second working voltage (the second working voltage is smaller than the first working voltage) at a time after time t1, that is, at time t2, that is, the current output voltage of the LDO is adjusted from the first working voltage to the second working voltage. In the embodiment of the present application, the purpose of reducing system power consumption is achieved by reducing the working voltage on the clock oscillator.

[0116] 3. Further, at a time after time t2, i.e., at time t3, after the operating voltage on the clock oscillator drops, that is, after the output voltage of the LDO that provides voltage to it is lowered, the front-stage BUCK plane that provides input voltage to it can also reduce the voltage, that is, the voltage regulating module BUCK that provides input voltage to the LDO can also reduce the voltage at time t3 to reduce the voltage difference on the LDO, so as to further reduce the power consumption of the system.

[0117] 4. After the above voltage regulation process, that is, after time t3 and between time t4, the system enters the ultra-low power consumption mode provided in the embodiment of the present application, which can save system power consumption and extend the time of normal use of the system.

[0118] 5. At time t4, when the system currently needs to recover from the second working state to the first working state, for example, when it is awakened from the sleep state to the normal state, the voltage of the BUCK plane, that is, the input voltage of the LDO, can be raised at time t5, a period of time after t4, to avoid the voltage difference on the LDO being too small to work stably in the subsequent voltage regulation process. Then, at time t6, the output voltage of the LDO can be increased, that is, the working voltage on the clock oscillator can be restored from the second working voltage to the first working voltage, so that the system can resume normal operation.

[0119] It should be noted that the specific time differences between t1 and t2, between t2 and t3, between t4 and t5, and between t5 and t6 can be set according to the needs of the system. The time differences corresponding to different systems, different application scenarios or different functions and performance requirements may be different, which are not listed here one by one.

[0120] Below, in combination with specific working voltage values ​​(including the first working voltage and the second working voltage) and the voltage regulation value, the voltage regulation process in the embodiment of the present application is illustrated. For example, when the first working voltage is 1.0V and the second working voltage is 0.7V, that is, the output voltages of the corresponding DC voltage output modules are 1.0V and 0.7V respectively, assuming that the corresponding input voltages are 1.5V and 1.2V respectively, then the specific processes and parameters under different voltage regulation modes can be referred to the following four modes:

[0121] Method 1: Enter the first working state (such as standby state) and lower the output voltage of LDO

[0122] After the target functional module or the electronic device where the target functional module is located enters the first working state from the second working state, the present embodiment mainly adjusts the output voltage of the LDO. The specific working state involved in the voltage regulation process, the input voltage of the LDO, the output voltage of the LDO, the voltage difference of the LDO, the working voltage on the clock oscillator, and the corresponding voltage characteristics and power consumption characteristics are shown in the following Table 1:

[0123] Table 1

[0124]

[0125] In the above method 1, when the target functional module is in the second working state, the input voltage on the LDO is 1.5V, the output voltage is 1.0V, the voltage difference is 0.5V, and the working voltage on the clock oscillator is the first working voltage, that is, the output voltage of the LDO, which is 1.0V. At this time, the output voltage of the LDO is in a normal state, the voltage difference is also in a normal state, and the power consumption on the clock oscillator is relatively large. When the target functional module enters the first working state, the input voltage of the LDO remains unchanged at 1.5V, and the output voltage of the LDO is adjusted from 1.0V to 0.7V. The voltage difference on the LDO is 0.8V, that is, the voltage difference increases. Correspondingly, the working voltage on the clock oscillator is adjusted to the second working voltage, which is the output voltage of the LDO, 0.7V. At this time, the power consumption on the clock oscillator is reduced due to the reduction of the working voltage, while the LDO will have some power consumption loss due to the increase of the voltage difference. However, since the input voltage of the LDO remains unchanged, the output voltage decreases, resulting in a smaller output current. The input current and output current of the LDO are equal, so its input current also decreases. According to the formula of power = voltage × current, the value of the input voltage × input current of the LDO decreases, that is, the power received by the LDO decreases, so the system power consumption is reduced. In other words, overall, there is a power consumption benefit on the electronic device after the above voltage regulation.

[0126] Method 2: Enter the standby state, lower the output voltage of LDO + lower the input voltage of LDO

[0127] After the target functional module or the electronic device where the target functional module is located enters the first working state from the second working state, the present embodiment mainly adjusts both the output voltage and the input voltage of the LDO. The specific working state involved in the voltage regulation process, the input voltage of the LDO, the output voltage of the LDO, the voltage difference of the LDO, the working voltage on the clock oscillator, and the corresponding voltage characteristics and power consumption characteristics are shown in the following Table 2:

[0128] Table 2

[0129]

[0130] In the above-mentioned method 2, when the target functional module is in the second working state, the input voltage on the LDO is 1.5V, the output voltage is 1.0V, the voltage difference is 0.5V, and the working voltage on the clock oscillator is the first working voltage, that is, the output voltage of the LDO, which is 1.0V. At this time, the output voltage of the LDO is in a normal state, the voltage difference is also in a normal state, and the power consumption on the clock oscillator is relatively large. When the target functional module enters the first working state, the output voltage of the LDO is first adjusted down from 1.0V to 0.7V. At this time, the voltage difference on the LDO is 0.8V, that is, the voltage difference becomes larger. Correspondingly, the working voltage on the clock oscillator is adjusted to the second working voltage, which is the output voltage of the LDO, 0.7V. At this time, the power consumption on the clock oscillator is reduced due to the reduction of the working voltage, while the LDO will have some power consumption loss due to the increase of the voltage difference. Furthermore, the input voltage of the LDO is lowered from 1.5V to 1.2V. At this time, the voltage difference on the LDO drops to 0.5V, that is, the voltage difference returns to normal. Not only is the supply voltage more stable, but the power consumption loss is also compensated. In summary, the system power consumption is further reduced and the system performance is further optimized.

[0131] It should be noted that in the above method three, the output voltage of the LDO is first lowered and then the input voltage of the LDO is lowered. In this way, the problem of poor power supply stability and poor power supply quality on the LDO caused by too small voltage difference on the LDO can be avoided.

[0132] Method 3: Enter the standby state, lower the output voltage of LDO + lower the input voltage of LDO

[0133] After the target functional module or the electronic device where the target functional module is located enters the second working state from the first working state, the present embodiment mainly adjusts the output voltage of the LDO. The specific working state involved in the voltage regulation process, the input voltage of the LDO, the output voltage of the LDO, the voltage difference of the LDO, the working voltage on the clock oscillator, and the corresponding voltage characteristics and power consumption characteristics are shown in the following Table 3:

[0134] Table 3

[0135]

[0136] In the above method three, when the target functional module is in the first working state, the input voltage on the LDO is 1.2V, the output voltage is 0.7V, the voltage difference is 0.5V, and the working voltage on the clock oscillator is the second working voltage, that is, the output voltage of the LDO, which is 0.7V. At this time, the output voltage of the LDO is small, the voltage difference is in a normal state, and the power consumption on the clock oscillator is small. When the target functional module is restored to the second working state, the input voltage of the LDO is 1.2V unchanged, and the output voltage of the LDO is increased from 0.7V to 1.0V. The voltage difference on the LDO is 0.2V, that is, the voltage difference becomes smaller. Correspondingly, the working voltage on the clock oscillator is adjusted to the first working voltage, which is the output voltage of the LDO, 1.0V. At this time, the power consumption on the clock oscillator increases due to the increase in the working voltage to support the target functional module to return to a normal working state.

[0137] Method 4: Enter normal working state, increase LDO input voltage + increase LDO output voltage

[0138] After the target functional module or the electronic device where the target functional module is located enters the second working state from the first working state, the present embodiment mainly adjusts both the output voltage and the input voltage of the LDO. The specific working state involved in the voltage regulation process, the input voltage of the LDO, the output voltage of the LDO, the voltage difference of the LDO, the working voltage on the clock oscillator, and the corresponding voltage characteristics and power consumption characteristics are shown in the following Table 4:

[0139] Table 4

[0140]

[0141] In the above-mentioned fourth method, when the target functional module is in the first working state, the input voltage on the LDO is 1.2V, the output voltage is 0.7V, the voltage difference is 0.5V, and the working voltage on the clock oscillator is the second working voltage, that is, the output voltage of the LDO, which is 0.7V. At this time, the output voltage of the LDO is small, the voltage difference is in a normal state, and the power consumption on the clock oscillator is small. When the target functional module enters the second working state, the input voltage of the LDO is first increased from 1.2V to 1.5V, at which time the voltage difference on the LDO increases to 0.8V, that is, the voltage difference becomes larger. Further, the output voltage of the LDO is increased from 0.7V to 1.0V, at which time the voltage difference on the LDO is 0.5V, that is, the voltage difference returns to normal. Correspondingly, the working voltage on the clock oscillator is adjusted to the second working voltage, which is the output voltage of the LDO, 1.0V, to support the target functional module to return to a normal working state. At this time, the power consumption on the clock oscillator increases due to the increase in the working voltage, and the power consumption on the LDO is also normal because the voltage difference returns to normal.

[0142] It should be noted that in the fourth method, the input voltage of the LDO is first increased and then the output voltage of the LDO is decreased. In this way, the problem of poor power supply stability and poor power supply quality on the LDO caused by too small voltage difference on the LDO can be avoided.

[0143] In summary, the above-mentioned method 1 and method 2 are two voltage regulation methods when the target functional module switches from the second working state to the first working state, and the above-mentioned method 3 and method 4 are two voltage regulation methods when the target functional module switches from the first working state to the second working state. The above-mentioned methods under different state switching can be combined with each other, for example, method 1 + method 3, method 1 + method 4, method 2 + method 3, method 2 + method 4, all of which can be implemented and will not be repeated here.

[0144] It can be understood that the various voltage values ​​and voltage regulation amplitude values ​​in the above-mentioned embodiments are merely exemplary descriptions, and do not constitute limitations on the increase and decrease values ​​of the first working voltage, the second working voltage, and the input voltage of the LDO. Their specific values ​​can be adaptively adjusted according to the actual application scenarios, performance requirements, or power consumption requirements. The specific values ​​of the above-mentioned voltages in the embodiments of the present application are not limited.

[0145] See also Figure 5 , Figure 5 is a flow chart of a voltage management method provided in an embodiment of the present application, which can be applied to the above Figure 1 or Figure 2D In the electronic device or power supply equipment described in, the electronic device may specifically include: a clock oscillator and a power management unit PMU, the clock oscillator and the PMU are respectively connected to the target functional module; the voltage management method may include the following steps S501-S503, and optionally, may also include step S504.

[0146] Step S501: The PMU provides a first operating voltage for the clock oscillator.

[0147] Step S502: providing a clock signal to the target functional module through the clock oscillator.

[0148] Step S503: When the target functional module enters the first working state, the first working voltage is adjusted to a second working voltage through the PMU, and the second working voltage is lower than the first working voltage.

[0149] Step S504: When the target functional module enters the second working state, the second working voltage is adjusted to the first working voltage through the PMU; wherein the clock signal quality requirement of the target functional module in the second working state is higher than the clock signal quality requirement in the first working state.

[0150] In a possible implementation manner, quality of a clock signal of the clock oscillator at the first operating voltage is better than quality of a clock signal at the second operating voltage.

[0151] In a possible implementation, the method further includes: receiving, through the PMU, first indication information sent by the target functional module, the first indication information being used to indicate to the PMU that the target functional module enters the first working state; or, receiving, through the PMU, second indication information sent by the target functional module, the second indication information being used to indicate to the PMU that the target functional module enters the second working state.

[0152] In a possible implementation, the PMU includes a DC voltage module, which is connected to the clock oscillator; adjusting the first operating voltage to the second operating voltage through the PMU includes: the PMU provides the first operating voltage to the clock oscillator through the DC voltage module; wherein the output voltage of the DC voltage module is the first operating voltage.

[0153] In a possible implementation, adjusting the first operating voltage to the second operating voltage through the PMU includes: the PMU adjusting the first operating voltage to the second operating voltage by lowering the output voltage of the DC voltage module; the PMU, adjusting the second operating voltage to the first operating voltage through the PMU includes: the PMU adjusting the second operating voltage to the first operating voltage by raising the output voltage of the DC voltage module.

[0154] In a possible implementation, the input voltage of the DC voltage module is greater than the output voltage; the PMU also includes a voltage regulating module, which is connected to the DC voltage module to provide the input voltage to the DC voltage module; the method also includes: when the target functional module enters the first working state, the PMU adjusts the first working voltage to the second working voltage by lowering the output voltage of the DC voltage module, and then lowers the input voltage through the voltage regulating module.

[0155] In a possible implementation, the input voltage of the DC voltage module is greater than the output voltage; the PMU also includes a voltage regulating module, which is connected to the DC voltage module to provide the input voltage to the DC voltage module; the method also includes: when the target functional module enters the second working state, the PMU increases the input voltage through the voltage regulating module before adjusting the second working voltage to the first working voltage by increasing the output voltage of the DC voltage module.

[0156] In a possible implementation, the DC voltage module is a low dropout linear regulator LDO or a high-precision DC voltage output module; the voltage regulation module is an AC-DC converter (AC-DC) or a DC-DC converter (DC-DC).

[0157] In a possible implementation, the target functional module is one or more of a SoC chip, a vehicle-mounted device chip, a customer terminal equipment CPE chip, a modem chip, and a radio frequency chip.

[0158] In one possible implementation, the first working state includes one or more of standby, sleep, hibernation, flight mode and low power consumption state; or, the second working state includes one or more of wake-up, lighting state, normal operation state and normal power consumption state.

[0159] It should be noted that the specific process of the voltage management method described in the embodiment of the present application can be found in the above Figure 1-Figure 4 The relevant descriptions in the application embodiments described in will not be repeated here.

[0160] See also Figure 6 , Figure 6 is a flow chart of another voltage management method provided in an embodiment of the present application, which can be applied to the above Figure 1 or Figure 2G In the electronic device or power supply equipment described in, the electronic device may specifically include: a clock oscillator and a power management unit PMU, the clock oscillator and the PMU are respectively connected to the target functional module; the voltage management method may include the following steps S601-S608.

[0161] Step S601: The PMU provides a first operating voltage for the clock oscillator.

[0162] Step S602: providing a clock signal to the target functional module through the clock oscillator.

[0163] Step S603: When the target functional module enters the first working state, first indication information sent by the target functional module is received through the PMU.

[0164] Step S604: the PMU adjusts the first operating voltage to the second operating voltage by lowering the output voltage of the DC voltage module.

[0165] Step S605: the PMU lowers the input voltage through the voltage regulating module.

[0166] Step S606: When the target functional module enters the second working state, second indication information sent by the target functional module is received through the PMU.

[0167] Step S607: the PMU increases the input voltage through the voltage regulating module.

[0168] Step S608: the PMU adjusts the second operating voltage to the first operating voltage by increasing the output voltage of the DC voltage module.

[0169] It should be noted that the specific process of the voltage management method described in the embodiment of the present application can be found in the above Figure 1-Figure 4 The relevant descriptions in the application embodiments described in will not be repeated here.

[0170] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0171] It should be noted that, for the above-mentioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that the present application is not limited by the described action sequence, because according to the present application, some steps may be performed in other sequences or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present application.

[0172] In the several embodiments provided in the present application, it should be understood that the disclosed device can be implemented in other ways. For example, the device embodiments described above are only schematic, such as the division of the above-mentioned units, which is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, and the indirect coupling or communication connection of devices or units can be electrical or other forms.

[0173] The units described above as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0174] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0175] If the above-mentioned integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, a server or a network device, etc., specifically a processor in a computer device) to perform all or part of the steps of the above-mentioned methods of each embodiment of the present application. Among them, the aforementioned storage medium may include: U disk, mobile hard disk, magnetic disk, optical disk, read-only memory (Read-Only Memory, abbreviated: ROM) or random access memory (Random Access Memory, abbreviated: RAM) and other media that can store program codes.

[0176] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. An electronic device, characterized in that: include: A clock oscillator and a power management unit PMU, wherein the clock oscillator and the PMU are respectively connected to a target functional module; The clock oscillator is used to provide a clock signal for the target functional module; The PMU is used to: Providing a first operating voltage to the clock oscillator; When the target functional module enters a first working state, the first working voltage is adjusted to a second working voltage, and the second working voltage is lower than the first working voltage.

2. The device according to claim 1, characterized in that The quality of the clock signal of the clock oscillator at the first operating voltage is better than the quality of the clock signal at the second operating voltage.

3. The device according to claim 1 or 2, characterized in that: The PMU is also used to: When the target functional module enters the second working state, the second working voltage is adjusted to the first working voltage; wherein the clock signal quality requirement of the target functional module in the second working state is higher than the clock signal quality requirement in the first working state.

4. The device according to claim 3, characterized in that The PMU is also used to: Receive first indication information sent by the target functional module, wherein the first indication information is used to indicate to the PMU that the target functional module enters the first working state; or receive second indication information sent by the target functional module, wherein the second indication information is used to indicate to the PMU that the target functional module enters the second working state.

5. The device according to claim 3 or 4, characterized in that The PMU includes a DC voltage module, and the DC voltage module is connected to the clock oscillator; The PMU is specifically configured to provide the first operating voltage to the clock oscillator through the DC voltage module; wherein the output voltage of the DC voltage module is the first operating voltage.

6. The device according to claim 5, characterized in that The PMU is specifically used to adjust the first operating voltage to the second operating voltage by lowering the output voltage of the DC voltage module; and is specifically used to adjust the second operating voltage to the first operating voltage by increasing the output voltage of the DC voltage module.

7. The device according to claim 6, characterized in that The input voltage of the DC voltage module is greater than the output voltage; the PMU further comprises a voltage regulating module, which is connected to the DC voltage module to provide the input voltage to the DC voltage module; When the target functional module enters the first working state, the PMU is further used to lower the input voltage through the voltage regulating module after adjusting the first working voltage to the second working voltage by lowering the output voltage of the DC voltage module.

8. The device according to claim 6 or 7, characterized in that The input voltage of the DC voltage module is greater than the output voltage; the PMU further comprises a voltage regulating module, which is connected to the DC voltage module to provide the input voltage to the DC voltage module; When the target functional module enters the second working state, the PMU is further used to increase the input voltage through the voltage regulating module before adjusting the second working voltage to the first working voltage by increasing the output voltage of the DC voltage module.

9. The device according to claim 7 or 8, characterized in that The DC voltage module is a low-dropout linear regulator LDO or a high-precision DC voltage output module; the voltage regulation module is an AC-DC converter (AC-DC) or a DC-DC converter (DC-DC).

10. The device according to any one of claims 1 to 9, characterized in that: The target functional module is one or more of a processor, a SoC chip, a vehicle-mounted device chip, a customer terminal equipment CPE chip, a modem chip, a radio frequency chip and an accelerator.

11. The device according to any one of claims 1 to 10, characterized in that: The first working state includes one or more of standby, sleep, hibernation, flight mode and low power consumption state; or, the second working state includes one or more of wake-up, lighting state, normal running state and normal power consumption state.

12. A voltage management method, characterized in that: Applied to an electronic device, the electronic device comprises: a clock oscillator and a power management unit PMU, the clock oscillator and the PMU are respectively connected to a target functional module; the method comprises: The PMU provides a first operating voltage for the clock oscillator; Providing a clock signal to the target functional module through the clock oscillator; When the target functional module enters the first working state, the first working voltage is adjusted to a second working voltage through the PMU, and the second working voltage is lower than the first working voltage.

13. The method according to claim 12, characterized in that The method further comprises: When the target functional module enters the second working state, the second working voltage is adjusted to the first working voltage through the PMU; wherein the clock signal quality requirement of the target functional module in the second working state is higher than the clock signal quality requirement in the first working state.

14. The method according to claim 13, characterized in that The method further comprises: The PMU receives first indication information sent by the target functional module, wherein the first indication information is used to indicate to the PMU that the target functional module enters the first working state; or, the PMU receives second indication information sent by the target functional module, wherein the second indication information is used to indicate to the PMU that the target functional module enters the second working state.

15. The method according to claim 13 or 14, characterized in that The PMU includes a DC voltage module, and the DC voltage module is connected to the clock oscillator; The adjusting the first operating voltage to a second operating voltage by the PMU includes: The PMU provides the first operating voltage to the clock oscillator through the DC voltage module; wherein the output voltage of the DC voltage module is the first operating voltage.

16. The method according to claim 15, characterized in that The adjusting the first operating voltage to the second operating voltage by the PMU includes: The PMU adjusts the first operating voltage to the second operating voltage by lowering the output voltage of the DC voltage module; The PMU, wherein adjusting the second operating voltage to the first operating voltage by the PMU includes: The PMU adjusts the second operating voltage to the first operating voltage by increasing the output voltage of the DC voltage module.

17. The method according to claim 16, characterized in that The input voltage of the DC voltage module is greater than the output voltage; the PMU further includes a voltage regulating module, which is connected to the DC voltage module to provide the input voltage to the DC voltage module; the method further includes: When the target functional module enters the first working state, the PMU adjusts the first working voltage to the second working voltage by lowering the output voltage of the DC voltage module, and then lowers the input voltage through the voltage regulating module.

18. The method according to claim 16 or 17, characterized in that The input voltage of the DC voltage module is greater than the output voltage; the PMU further includes a voltage regulating module, which is connected to the DC voltage module to provide the input voltage to the DC voltage module; the method further includes: When the target functional module enters the second working state, the PMU increases the input voltage through the voltage regulating module before adjusting the second working voltage to the first working voltage by increasing the output voltage of the DC voltage module.

19. The method according to any one of claims 12 to 18, characterized in that: The first working state includes one or more of standby, sleep, hibernation, flight mode and low power consumption state; or, the second working state includes one or more of wake-up, lighting state, normal running state and normal power consumption state.

20. A chip, characterized in that: The chip is connected to a clock oscillator, and the chip and the clock oscillator are respectively connected to a target functional module; the clock oscillator is used to provide a clock signal for the target functional module; The chip is used for: Providing a first operating voltage to the clock oscillator; When the target functional module enters a first working state, the first working voltage is adjusted to a second working voltage, and the second working voltage is lower than the first working voltage.

21. The chip according to claim 20, characterized in that: The chip is also used for: When the target functional module enters the second working state, the second working voltage is adjusted to the first working voltage; wherein the clock signal quality requirement of the target functional module in the second working state is higher than the clock signal quality requirement in the first working state.

22. The chip according to claim 21, characterized in that: The chip is also used for: Receive first indication information sent by the target functional module, wherein the first indication information is used to indicate to the chip that the target functional module enters the first working state; or receive second indication information sent by the target functional module, wherein the second indication information is used to indicate to the chip that the target functional module enters the second working state.

23. The chip according to claim 21 or 22, characterized in that: The chip includes a DC voltage module, and the DC voltage module is connected to the clock oscillator; The chip is specifically used to provide the first operating voltage for the clock oscillator through the DC voltage module; wherein the output voltage of the DC voltage module is the first operating voltage.

24. The chip according to claim 23, characterized in that: The chip is specifically used to adjust the first working voltage to the second working voltage by lowering the output voltage of the DC voltage module, and to adjust the second working voltage to the first working voltage by increasing the output voltage of the DC voltage module.

25. The chip according to claim 24, characterized in that: The input voltage of the DC voltage module is greater than the output voltage; the chip further comprises a voltage regulating module, which is connected to the DC voltage module to provide the input voltage to the DC voltage module; When the target functional module enters the first working state, the chip is further used to lower the input voltage through the voltage regulating module after adjusting the first working voltage to the second working voltage by lowering the output voltage of the DC voltage module.

26. The chip according to claim 24 or 25, characterized in that: The input voltage of the DC voltage module is greater than the output voltage; the chip further comprises a voltage regulating module, which is connected to the DC voltage module to provide the input voltage to the DC voltage module; When the target functional module enters the second working state, the chip is further used to increase the input voltage through the voltage regulating module before adjusting the second working voltage to the first working voltage by increasing the output voltage of the DC voltage module.

27. An electronic device, characterized in that: include: The electronic device according to any one of claims 1 to 11, and a target functional module coupled to the electronic device; The target functional module is used to operate under the clock signal.

28. The device according to claim 27, characterized in that The electronic device further comprises a memory; The memory is coupled to the target functional module and is used to store instructions and data generated by the target functional module during operation.

29. A computer-readable storage medium, characterized in that: The computer-readable medium is used to store program codes, and when the program codes are executed by an electronic device, the method described in any one of claims 12 to 19 is implemented.

30. A computer program, characterized in that The computer program includes instructions, and when the instructions are executed by an electronic device, the electronic device executes the method according to any one of claims 12 to 19.

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