Pixel circuit, driving method thereof and display panel

Abstract

The application discloses a pixel circuit, a driving method thereof and a display panel. The pixel circuit comprises a time control module, a potential control module and a first coupling unit. The first control end of the potential control module is connected with the output end of the time control module, the second control end is connected with the first light-emitting control signal line, and the potential control module is used for outputting the first power voltage or the second power voltage in response to the potential of the output end of the time control module and the first light-emitting control signal on the first light-emitting control signal line. The first coupling unit is connected between the output end of the potential control module and the control end of the time control module, and the first coupling unit is used for controlling the potential of the control end of the time control module according to the potential of the output end of the potential control module, so as to control the potential of the output end of the time control module. The scheme is beneficial to improving the display color deviation or display uneven phenomenon of the pixel circuit caused by the shutdown delay when the pixel circuit is turned off, and is beneficial to improving the display effect.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the technical field of display, and in particular, to a pixel circuit, a driving method thereof and a display panel. BACKGROUND

[0002] With the continuous development of display technology, people's requirements for the display effect of display devices are also getting higher and higher.

[0003] The display driving mode includes PWM (Pulse Width Modulation), PAM (Pulse Amplitude Modulation) and a mixture of the two. At present, in the existing PWM driving mode or digital-analog hybrid driving mode, there is a problem of poor display effect. SUMMARY

[0004] Embodiments of the present application provide a pixel circuit, a driving method thereof and a display panel to improve the display effect.

[0005] According to an aspect of the present application, a pixel circuit is provided, comprising:

[0006] a time control module comprising a control end, a data write-in end and an output end, the time control module being configured to write a first data signal inputted at the data write-in end to the control end in a first data write-in stage, and control the potential of the output end according to the first data signal and a sweep signal in a light-emitting stage to control the light-emitting time of a light-emitting element;

[0007] a potential control module comprising a first control end, a second control end, a first input end, a second input end and an output end, the first control end of the potential control module being connected with the output end of the time control module, the second control end being connected with a first light-emitting control signal line, the first input end being connected with a first power supply line, the second input end being connected with a second power supply line, the potential control module being configured to output a first power supply voltage on the first power supply line or a second power supply voltage on the second power supply line in response to the potential of the output end of the time control module and a first light-emitting control signal on the first light-emitting control signal line;

[0008] a first coupling unit comprising a first end and a second end, the first end being connected with the output end of the potential control module, the second end being connected with the control end of the time control module, the first coupling unit being configured to control the potential of the control end of the time control module according to the potential of the output end of the potential control module to control the potential of the output end of the time control module.

[0009] According to another aspect of the present application, a driving method of a pixel circuit is provided, the pixel circuit comprising a time control module, a potential control module and a first coupling unit, the time control module comprising a control terminal, a data writing terminal and an output terminal, the potential control module comprising a first control terminal, a second control terminal, a first input terminal, a second input terminal and an output terminal, the first control terminal of the potential control module being connected with the output terminal of the time control module, the second control terminal being connected with a first light emitting control signal line, the first input terminal being connected with a first power supply line, the second input terminal being connected with a second power supply line, a first terminal of the first coupling unit being connected with the output terminal of the potential control module, a second terminal of the first coupling unit being connected with the control terminal of the time control module.

[0010] The driving method of the pixel circuit comprises:

[0011] In a first data writing stage, the time control module is controlled to write the data writing terminal with a first data signal to the control terminal;

[0012] In a light emitting stage, the time control module is controlled to control the potential of the output terminal according to the first data signal and a sweep signal, to control the light emitting time of a light emitting element, and at the end of the light emitting, the potential control module is controlled to output the first power supply voltage on the first power supply line or the second power supply voltage on the second power supply line to the first terminal of the first coupling unit in response to the potential of the output terminal of the time control module and the first light emitting control signal on the first light emitting control signal line, and the potential of the control terminal of the time control module is controlled through the first coupling unit, so as to control the potential of the output terminal of the time control module.

[0013] According to another aspect of the present application, a display panel is provided, comprising the pixel circuit provided by any of the embodiments of the present application.

[0014] The technical scheme provided by the embodiments of the present application associates the output terminal and the control terminal of the time control module by arranging the potential control module and the first coupling unit between the output terminal and the control terminal of the time control module, at the end of the light emitting, the potential control module is controlled to change the voltage (i.e. the voltage of the output terminal of the potential control module) of the first terminal of the first coupling unit in response to the potential of the output terminal of the time control module and the first light emitting control signal on the first light emitting control signal line, and the voltage of the control terminal of the time control module is synchronously changed through the first coupling unit, so that the time control module can quickly switch the on-off state of itself, and thus the voltage of the output terminal of the time control module can be switched at a faster speed, to control the light emitting element to be quickly extinguished, to reduce the duration of the end of the light emitting, and thus to be beneficial to improving the phenomenon of display color deviation or display unevenness of the pixel circuit caused by the closing delay when the pixel circuit is closed, and to be beneficial to improving the display effect.

[0015] It is to be understood that the details set forth herein do not limit the scope of the embodiments of the application to the specific embodiments described. The foregoing detailed description has been presented for purposes of clarity and description. It is not intended to be exhaustive or to limit the application to the precise form described. BRIEF DESCRIPTION OF DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative effort based on these drawings.

[0017] Figure 1 A structural schematic diagram of a pixel circuit provided by an embodiment of the present application is shown in the figure.

[0018] Figure 2 A structural schematic diagram of another pixel circuit provided by an embodiment of the present application is shown in the figure.

[0019] Figure 3 A structural schematic diagram of another pixel circuit provided by an embodiment of the present application is shown in the figure.

[0020] Figure 4 A structural schematic diagram of another pixel circuit provided by an embodiment of the present application is shown in the figure.

[0021] Figure 5 A structural schematic diagram of another pixel circuit provided by an embodiment of the present application is shown in the figure.

[0022] Figure 6 A structural schematic diagram of another pixel circuit provided by an embodiment of the present application is shown in the figure.

[0023] Figure 7 A structural schematic diagram of another pixel circuit provided by an embodiment of the present application is shown in the figure.

[0024] Figure 8 A structural schematic diagram of a current control module provided by an embodiment of the present application is shown in the figure.

[0025] Figure 9 A structural schematic diagram of another pixel circuit provided by an embodiment of the present application is shown in the figure.

[0026] Figure 10 A driving timing schematic diagram of a pixel circuit provided by an embodiment of the present application is shown in the figure.

[0027] Figure 11 A waveform schematic diagram of a node voltage and a driving current provided by an embodiment of the present application is shown in the figure.

[0028] Figure 12A flow chart of a driving method of a pixel circuit provided for an embodiment of the present application is shown in FIG. 1.

[0029] Figure 13 A flow chart of a driving method of a pixel circuit provided for another embodiment of the present application is shown in FIG. 2.

[0030] Figure 14 A flow chart of a driving method of a pixel circuit provided for another embodiment of the present application is shown in FIG. 3.

[0031] Figure 15 A structural schematic diagram of a display panel provided for an embodiment of the present application is shown in FIG. 4. DETAILED DESCRIPTION

[0032] In order to make the personnel in the art better understand the present application, the technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by the personnel in the art without creative labor should belong to the scope of protection of the present application.

[0033] It should be noted that the terms "first", "second", and the like in the specification and claims of the present application and the above-described drawings are used to distinguish similar objects, and do not have to be used to describe a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or device including a series of steps or units does not have to be limited to only those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products, or devices.

[0034] As described in the background, the existing PWM driving mode has the problem of poor display effect. The inventor found that the reason for the above problem is that, for the pixel circuit using the existing PWM driving mode, the pixel circuit at least includes a PWM driving module and a light emitting element, wherein the PWM driving module is used to convert an analog gray scale voltage into a time signal through PWM modulation. In the process of controlling the light emitting time of the light emitting element by the PWM driving module, due to the limited slope of the sweep signal SWEEP and the existence of the sub-threshold swing of the controlled transistor, the controlled transistor presents a slow turn-off process, so that the light emitting ends slowly and the low gray scale display color deviation phenomenon is easy to occur, which reduces the display effect.

[0035] To solve the above problems, the embodiment of the present application provides a pixel circuit. Figure 1 A structure diagram of the pixel circuit provided by the embodiment of the present application is shown in Figure 1 The pixel circuit provided by the embodiment comprises:

[0036] The time control module 10 comprises a control end G1, a data writing end N1 and an output end PW, and is used for writing the first data signal Vdata_t input by the data writing end N1 to the control end G1 in a first data writing stage, and controlling the potential of the output end PW according to the first data signal Vdata_t and the sweep signal SWEEP in a light emitting stage, so as to control the light emitting time of the light emitting element. The light emitting element can be connected with the output end PW of the time control module 10, or can be connected with the output end PW of the time control module 10 through the PAM module.

[0037] The potential control module 20 comprises a first control end, a second control end, a first input end, a second input end and an output end, the first control end of the potential control module 20 is connected with the output end PW of the time control module 10, the second control end is connected with the first light emitting control signal line, so as to respond to the first light emitting control signal EM1 output by the first light emitting control signal line, the first input end is connected with the first power supply line, so as to input the first power supply voltage VDDW transmitted on the first power supply line, the second input end is connected with the second power supply line, so as to input the second power supply voltage VSS transmitted on the second power supply line, and the potential control module 20 is used for responding to the potential of the output end PW of the time control module 10 and the first light emitting control signal EM1 on the first light emitting control signal line, and outputting the first power supply voltage VDDW on the first power supply line or the second power supply voltage VSS on the second power supply line.

[0038] Specifically, the first power supply voltage VDDW on the first power supply line and the second power supply voltage VSS on the second power supply line are two different voltages, and the first power supply voltage VDDW and the second power supply voltage VSS have a voltage difference. The pixel circuit further comprises a first coupling unit 30, the first coupling unit 30 comprises a first end and a second end, the first end is connected with the output end of the potential control module 20, and the second end is connected with the control end G1 of the time control module 10, and the first coupling unit 30 is used for controlling the potential of the control end G1 of the time control module 10 according to the potential of the output end of the potential control module 20, so as to control the potential of the output end PW of the time control module 10.

[0039] Exemplarily, before the light emitting stage, the potential control module 20 is configured to transmit the first power voltage VDDW on the first power supply line to the first end of the first coupling unit 30 in response to the potential of the output terminal PW of the time control module 10 and the first light emitting control signal EM1 on the first light emitting control signal line. When the light emitting ends, the potential control module 20 is configured to transmit the second power voltage VSS on the second power supply line to the first end of the first coupling unit 30 in response to the potential of the output terminal PW of the time control module 10 and the first light emitting control signal EM1 on the first light emitting control signal line. Therefore, the voltage at the first end of the first coupling unit 30 jumps from the first power voltage VDDW to the second power voltage VSS, and under the coupling effect of the first coupling unit 30, the voltage at the control terminal of the time control module 10 changes synchronously with the voltage at the first end of the first coupling unit 30, so that the voltage at the control terminal G1 of the time control module 10 changes rapidly, thereby rapidly switching the on-off state of the time control module 10, so that the voltage at the output terminal PW of the time control module 10 has a faster switching speed, so as to ensure that the output terminal PW of the time control module 10 can be pulled to the off voltage rapidly when the light emitting ends, thereby controlling the light emitting element to extinguish rapidly and accurately controlling the light emitting time.

[0040] The technical scheme provided by the embodiment of the present application associates the output terminal and the control terminal of the time control module by arranging the potential control module and the first coupling unit between the output terminal and the control terminal of the time control module, and controls the potential control module to change the voltage (i.e. the voltage at the output terminal of the potential control module) at the first end of the first coupling unit in response to the potential of the output terminal of the time control module and the first light emitting control signal on the first light emitting control signal line when the light emitting ends, and synchronously changes the voltage at the control terminal of the time control module through the first coupling unit, so that the time control module can rapidly switch the on-off state of itself, thereby making the voltage at the output terminal of the time control module have a faster switching speed, so as to control the light emitting element to extinguish rapidly, reduce the duration of the light emitting ends, and thereby improve the display color deviation or display unevenness phenomenon of the pixel circuit caused by the shutdown delay when the pixel circuit is turned off, and improve the display effect.

[0041] Figure 2 Another structure schematic diagram of a pixel circuit provided by the embodiment of the present application is shown in FIG. 6. Figure 2On the basis of the above technical solution, the potential control module 20 comprises a first subunit 201 and a second subunit 202, the control end of the first subunit 201 is connected with the output end PW of the time control module 10, the first end of the first subunit 201 is connected with the first power line, the second end of the first subunit 201 and the second end of the second subunit 202 are connected to the first node A, the first end of the second subunit 202 is connected with the second power line, the control end of the second subunit 202 is connected with the first light-emitting control signal line, and the first end of the first coupling unit 30 is connected with the first node A.

[0042] Specifically, the control end of the first subunit 201 is the first control end of the potential control module 20, the first end of the first subunit 201 is the first input end of the potential control module 20, and the second end of the first subunit 201 and the second end of the second subunit 202 are connected together as the output end of the potential control module 20. The control end of the second subunit 202 is the second control end of the potential control module 20, and the first end of the second subunit 202 is the second input end of the potential control module 20. The first subunit 201 is used for transmitting the first power voltage VDDW to the first node A in response to the voltage of the output end PW of the time control module 10, and the second subunit 202 is used for transmitting the second power voltage VSS to the first node A in response to the first light-emitting control signal.

[0043] Optionally, in the embodiment, the first power voltage VDDW transmitted on the first power line can be greater than the second power voltage VSS transmitted on the second power line.

[0044] Figure 3 Another structure schematic diagram of a pixel circuit provided by the embodiment of the present application is provided, specifically Figure 2 The potential control module 20 shown in the structure schematic diagram of the device is detailed, referring to Figure 3 The first subunit 201 comprises a first transistor M1, the gate of the first transistor M1 is the control end of the first subunit 201, the first pole of the first transistor M1 is the first end of the first subunit 201, and the second pole of the first transistor M1 is the second end of the first subunit 201; the second subunit 202 comprises a second transistor M2, the gate of the second transistor M2 is the control end of the second subunit 202, the first pole of the second transistor M2 is the first end of the second subunit 202, and the second pole of the second transistor M2 is the second end of the second subunit 202.

[0045] The first coupling unit 30 comprises a first capacitor C1, the first pole of the first capacitor C1 is the first end of the first coupling unit 30, and the second pole of the first capacitor C1 is the second end of the first coupling unit 30.

[0046] The width-length ratio of the first transistor M1 is greater than the width-length ratio of the second transistor M2, and the first transistor M1 and the second transistor M2 jointly constitute an inverting amplifier. Taking the turn-on of the time control module 10 in response to the low level of the control terminal G1 as an example, in the light-emitting stage, the time control module 10 is in an off state, the output terminal PW of the time control module 10 is at a low level, the first transistor M1 is turned on, and although the second transistor M2 is also turned on in response to the first light-emitting control signal EM1, the driving capability of the first transistor M1 is stronger than the driving capability of the second transistor M2 because the width-length ratio of the first transistor M1 is greater than the width-length ratio of the second transistor M2, the potential of the first node A is dominated by the first transistor M1, and the voltage of the first node A is the first power supply voltage VDDW. When the light-emitting ends, the control terminal G1 of the time control module 10 is gradually pulled low under the action of the sweep signal SWEEP, the time control module 10 is slowly turned on, and the PW node is gradually pulled high to the off voltage. In this process, when the voltage of the PW node makes the first transistor M1 off, the second transistor M2 dominates the potential of the first node A, the voltage of the first node A is pulled low from the first power supply voltage VDDW to the second power supply voltage VSS, the voltage of the control terminal G1 of the time control module 10 is synchronously pulled low through the coupling of the first capacitor C1, the time control module 10 is quickly turned on, the voltage of the output terminal PW of the time control module 10 is quickly switched to the off voltage, and thus the light-emitting element is quickly extinguished, and the duration of the light-emitting end is reduced.

[0047] In the embodiment, the first transistor M1 and the second transistor M2 can be transistors of the same channel type, for example, the first transistor M1 and the second transistor M2 can both be P-type tubes, without being set as N-type tubes, which is beneficial to simplify the process, reduce the process complexity, and will not increase the layout area.

[0048] In the digital-analog hybrid driving mode, if the time control module 10 is slowly turned on, the falling edge of the driving current waveform will be large, and the same problem of poor low gray scale display will be caused.

[0049] Figure 4 Another structure diagram of a pixel circuit provided by the embodiment of the present application is provided, and the pixel circuit is shown in FIG. 6. Figure 4 On the basis of the above technical solutions, the pixel circuit provided by the embodiment can further include a current control module 40, the current control module 40 is connected between the third power supply line and the first end of the light-emitting element 50, the second end of the light-emitting element 50 is connected with the second power supply line, the control terminal of the current control module 40 is connected with the output terminal PW of the time control module 10, and the current control module 40 is used for driving the light-emitting element 50 to emit light according to the second data signal Vdata_I.

[0050] The third power line is used for transmitting the third power voltage VDDA. In the light emitting stage, the current control module 40 generates the driving current according to the second data signal Vdata_I, and drives the light emitting element 50 to emit light. When the light emitting ends, the time control module 10 is controlled by the sweep signal SWEEP, the potential of the control end G1 of the time control module 10 gradually decreases, the time control module 10 gradually turns on, and the voltage of the output end PW of the time control module 10 gradually increases (the first power voltage VDDW is gradually transmitted to the output end PW through the time control module 10), when the voltage of the PW node is such that the first transistor M1 is turned off, the voltage of the first node A is jumped from the first power voltage VDDW to the second power voltage VSS, and the potential of the control end G1 of the time control module 10 is quickly pulled down through the coupling effect of the first capacitor C1, so that the time control module 10 is quickly turned on, so that the voltage of the PW node can be quickly switched to the first power voltage VDDW. Under the action of the voltage of the PW node, the current control module 40 is quickly turned off, the falling edge of the driving current is reduced, the attenuation of the driving current is reduced, and the uniformity of the display brightness is improved.

[0051] Figure 5 Another structure schematic diagram of a pixel circuit provided by the embodiment of the present application is shown in FIG. 4. Figure 5 On the basis of the above technical solution, the time control module 10 comprises a first driving unit 101 and a second coupling unit 102, the control end of the first driving unit 101 is the control end G1 of the time control module 10, the first driving unit 101 is connected between the first power line and the output end PW of the time control module 10, the first end of the second coupling unit 102 is connected with the first data line and the data writing end N1 of the time control module 10, and the second end of the second coupling unit 102 is connected with the control end of the first driving unit 101. The second coupling unit 102 is used for coupling the first data signal Vdata_t to the control end of the first driving unit 101 before the light emitting stage, and controlling the voltage of the control end of the first driving unit 101 according to the sweep signal SWEEP when the light emitting ends. The first data line is used for transmitting the first data signal Vdata_t and the sweep signal SWEEP in time. Here, the second end of the first driving unit 101 can be used as the output end PW of the time control module 10.

[0052] Of course, in other embodiments, the first data signal Vdata_t and the sweep signal SWEEP can also be transmitted by two different signal lines.

[0053] The current control module 40 comprises a second driving unit 401 and a third light emitting control unit 402, a control end of the third light emitting control unit 402 is a control end of the current control module 40, and the third light emitting control unit 402 and the second driving unit 401 are connected in series between the third power line and the first end of the light emitting element 50. The second driving unit 401 is configured to generate a driving current according to a second data signal Vdata_I to drive the light emitting element 50 to emit light when the third light emitting control unit 402 is turned on.

[0054] Figure 6 Another structure schematic diagram of a pixel circuit provided by an embodiment of the present application is shown in FIG. 4, which is described as follows. Figure 6 On the basis of the above technical solution, optionally, the time control module 10 further comprises a first compensation unit 103, a control end of the first compensation unit 103 is connected with the first scan line to respond to a first scan signal S1 transmitted on the first scan line, a first end of the first compensation unit 103 is connected with a second end of the first driving unit 101, and a second end of the first compensation unit 103 is connected with the control end of the first driving unit 101. In the threshold compensation stage, the first power voltage VDDW on the first power line is written to the control end of the first driving unit 101 through the first driving unit 101 and the first compensation unit 103, so as to realize threshold compensation of the first driving unit 101, thereby improving the accuracy of the time signal output by the time control module 10.

[0055] Continuing to refer to Figure 6 Optionally, the time control module 10 further comprises a reset unit 104, a control end of the reset unit 104 is connected with a reset signal line to respond to a reset signal Set transmitted on the reset signal line, a first end of the reset unit 104 is connected with the first initialization signal line, and a second end of the reset unit 104 is connected with an output end PW of the time control module 10. The reset unit 104 is configured to turn on to transmit the first initialization voltage Vref1 on the first initialization signal line to the output end PW of the time control module 10 to initialize the output end PW of the time control module 10 and turn on the third light emitting control unit 402 before the light emitting stage, so as to prepare for the light emitting stage.

[0056] Figure 7 Another structure schematic diagram of a pixel circuit provided by an embodiment of the present application is shown in FIG. 4, which is described as follows. Figure 7On the basis of the above technical solutions, optionally, the time control module 10 further comprises a first initialization unit 107, a first light-emitting control unit 105 and a second light-emitting control unit 106, the control end of the first initialization unit 107 is connected with the second scan line, the first end of the first initialization unit 107 is connected with the second initialization signal line, and the second end of the first initialization unit 107 is connected with the control end of the first drive unit 101; the control end of the first light-emitting control unit 105 is connected with the first scan line, the first end of the first light-emitting control unit 105 is connected with the first power supply line, the second end of the first light-emitting control unit 105 is connected with the first end of the first drive unit 101, the control end of the second light-emitting control unit 106 is connected with the first light-emitting control signal line, the first end of the second light-emitting control unit 106 is connected with the first power supply line, and the second end of the second light-emitting control unit 106 is connected with the first end of the first drive unit 101. The purpose of arranging the first light-emitting control unit 105 and the second light-emitting control unit 106 is to cut off the connection between the first end of the first drive unit 101 and the first power supply line after the threshold value compensation stage, so as to prevent the open-state capacitance between the control end and the first end of the first drive unit 101 from causing adverse effects on the potential of the control end of the first drive unit 101.

[0057] Figure 8 A structural schematic diagram of a current control module provided for an embodiment of the present application is shown in FIG. 4. Figure 8 On the basis of the above technical solutions, optionally, the current control module 40 further comprises a second compensation unit 404 and a data writing unit 403, the control end of the second compensation unit 404 and the control end of the data writing unit 403 are both connected with the second scan line, the second compensation unit 404 is connected between the second end and the control end of the second drive unit 401, and the data writing unit 403 is connected between the second data line and the first end of the second drive unit 401, the data writing unit 403 being used for writing the second data signal Vdata_I to the control end of the second drive unit 401 in the second data writing stage.

[0058] The current control module 40 further comprises a fourth light-emitting control unit 405 and a second initialization unit 406, the control end of the fourth light-emitting control unit 405 is connected with the second light-emitting control signal line, the fourth light-emitting control unit 405 is connected between the second end of the second drive unit 401 and the first end of the light-emitting element 50, the control end of the second initialization unit 406 is connected with the third scan line, the second initialization unit 406 is connected between the third initialization signal line and the control end of the second drive unit 401, and the second initialization unit 406 is used for transmitting the third initialization voltage Vref3 on the third initialization signal line to the control end of the second drive unit 401, so as to initialize the control end of the second drive unit 401.

[0059] Optionally, the current control module 40 further comprises a first storage unit 407 and a second storage unit 408, the first storage unit 407 is connected between the control end of the third light-emitting control unit 402 and the third power line, and the second storage unit 408 is connected between the control end of the second driving unit 401 and the third power line.

[0060] Figure 9 Another structure schematic diagram of a pixel circuit provided by an embodiment of the present application is shown in FIG. 6. Figure 9 On the basis of the above technical solutions, optionally, the first driving unit 101 comprises a third transistor M3, the first compensation unit 103 comprises a fourth transistor M4, the reset unit 104 comprises a fifth transistor M5, the first light-emitting control unit 105 comprises a sixth transistor M6, the second light-emitting control unit 106 comprises a seventh transistor M7, the first initialization unit 107 comprises an eighth transistor M8, and the second coupling unit 102 comprises a second capacitor C2. The first pole of the second capacitor C2 is connected to the first data signal Vdata_t and the sweep signal in time division, the second pole of the second capacitor C2 is connected to the gate of the third transistor M3, the first pole of the third transistor M3 is connected to the first power line through the sixth transistor M6 and the seventh transistor M7, the gate of the sixth transistor M6 is connected to the first scan line, and the gate of the seventh transistor M7 is connected to the first light-emitting control signal line.

[0061] The gate of the fourth transistor M4 is connected to the first scan line, the first pole of the fourth transistor M4 is connected to the second pole of the third transistor M3, and the second pole of the fourth transistor M4 is connected to the gate of the third transistor M3. The gate of the fifth transistor M5 is connected to the reset signal line, the first pole of the fifth transistor M5 is connected to the first initialization signal line, and the second pole of the fifth transistor M5 is connected to the second pole of the third transistor M3. The gate of the eighth transistor M8 is connected to the second scan line, the first pole of the eighth transistor M8 is connected to the second initialization signal line, and the second pole of the eighth transistor M8 is connected to the gate of the third transistor M3.

[0062] Continuing to refer to Figure 9 , the second driving unit 401 comprises a ninth transistor M9, the third light-emitting control unit 402 comprises a tenth transistor M10, the data writing unit 403 comprises an eleventh transistor M11, the second compensation unit 404 comprises a twelfth transistor M12, the fourth light-emitting control unit 405 comprises a thirteenth transistor M13, the second initialization unit 406 comprises a fourteenth transistor M14, the first storage unit 407 comprises a third capacitor C3, and the second storage unit 408 comprises a fourth capacitor C4. The light-emitting element 50 comprises a light-emitting diode D1.

[0063] The tenth transistor M10, the ninth transistor M9, and the thirteenth transistor M13 are connected in series between the third power supply line and the first terminal of the light-emitting diode D1. The second terminal of the light-emitting diode D1 is connected to the second power supply line, and the gate of the thirteenth transistor M13 is connected to the second light-emitting control signal line. The gates of the eleventh transistor M11 and the twelfth transistor M12 are both connected to the second scan line. The first terminal of the eleventh transistor M11 is connected to the second data line, and the second terminal of the eleventh transistor M11 is connected to the first terminal of the ninth transistor M9. The first terminal of the twelfth transistor M12 is connected to the second terminal of the ninth transistor M9, and the second terminal of the twelfth transistor M12 is connected to the gate of the ninth transistor M9. The first terminal of the fourteenth transistor M14 is connected to the third initialization signal line, the second terminal of the fourteenth transistor M14 is connected to the gate of the ninth transistor M9, and the gate of the fourteenth transistor M14 is connected to the third scan line.

[0064] Figure 10 This is a driving timing diagram of a pixel circuit provided in an embodiment of the present invention, which can be used for... Figure 9 The pixel circuit shown is used to Figure 9 Taking the example of a pixel circuit where all transistors are P-type transistors, combined with... Figure 10 The specific working process of the pixel circuit includes a voltage writing stage T1, a voltage normalization stage T2, a reset stage T3, and an emission stage T4. The voltage writing stage T1 includes stages t1, t2, and t3.

[0065] In phase t1 (corresponding to the initialization phase), the first scan signal line is configured to transmit a high-level first scan signal S1, the second scan signal line is configured to transmit a high-level second scan signal S2, the third scan signal line is configured to transmit a low-level third scan signal S3, the reset signal line is configured to transmit a high-level reset signal Set, the first light emission control signal line is configured to transmit a high-level first light emission control signal EM1, and the second light emission control signal line is configured to transmit a high-level second light emission control signal EM2. Therefore, the fourteenth transistor M14 is turned on, and the third initialization voltage Vref3 transmitted on the third initialization signal line is written to the gate of the ninth transistor M9 via the fourteenth transistor M14, thus initializing the gate potential of the ninth transistor M9 and turning it on.

[0066] In the t2 stage (corresponding to the second data writing stage), the first scan signal line is configured to transmit the first scan signal S1 at a high level, the second scan signal line is configured to transmit the second scan signal S2 at a low level, the third scan signal line is configured to transmit the third scan signal S3 at a high level, the reset signal line is configured to transmit the reset signal Set at a high level, the first light-emitting control signal line is configured to transmit the first light-emitting control signal EM1 at a high level, and the second light-emitting control signal line is configured to transmit the second light-emitting control signal EM2 at a high level. Therefore, the eleventh transistor M11, the twelfth transistor M12, and the eighth transistor M8 are turned on. The second data signal Vdata_I is transmitted to the gate of the ninth transistor M9 through the eleventh transistor M11, the ninth transistor M9, and the twelfth transistor M12, and the ninth transistor M9 is turned off when the voltage at the gate of the ninth transistor M9 is Vdata_I+Vth9, so as to realize data writing and threshold compensation. Here, Vth9 is the threshold voltage of the ninth transistor M9.

[0067] Meanwhile, the second initialization voltage Vref2 on the second initialization signal line is transmitted to the gate of the third transistor M3 through the eighth transistor M8, so as to initialize the gate of the third transistor M3.

[0068] In the t3 stage (corresponding to the threshold compensation stage), the first scan signal line is configured to transmit the first scan signal S1 at a low level, the second scan signal line is configured to transmit the second scan signal S2 at a high level, the third scan signal line is configured to transmit the third scan signal S3 at a high level, the reset signal line is configured to transmit the reset signal Set at a high level, the first light-emitting control signal line is configured to transmit the first light-emitting control signal EM1 at a high level, and the second light-emitting control signal line is configured to transmit the second light-emitting control signal EM2 at a high level. Therefore, the fourth transistor M4 and the sixth transistor M6 are turned on, the first power supply voltage VDDW is written to the gate of the third transistor M3 (the control end G1 of the time control module 10) through the sixth transistor M6, the third transistor M3, and the fourth transistor M4, and the third transistor M3 is turned off when the voltage at the gate of the third transistor M3 is VDDW+Vth3, so as to stabilize the voltage at the gate of the third transistor M3 at VDDW+Vth3, wherein Vth3 is the threshold voltage of the third transistor M3, and threshold compensation of the third transistor M3 is realized. Meanwhile, the first data signal Vdata_t transmitted on the first data line is written to the first end of the second capacitor C2, and at this time, the voltage difference between the two ends of the second capacitor C2 is VDDW+Vth3-Vdata_t.

[0069] The t4 stage is the time period of the voltage writing stage T1 performed by each row of sub-pixels in turn, so as to complete data writing of all pixel rows.

[0070] In the voltage normalization stage T2 (corresponding to the first data writing stage), the first scan signal line is configured to transmit the first scan signal S1 at a high level, the second scan signal line is configured to transmit the second scan signal S2 at a high level, the third scan signal line is configured to transmit the third scan signal S3 at a high level, the reset signal line is configured to transmit the reset signal Set at a high level, the first light-emitting control signal line is configured to transmit the first light-emitting control signal EM1 at a high level, and the second light-emitting control signal line is configured to transmit the second light-emitting control signal EM2 at a high level. The first data signal Vdata_t transmitted on the first data line jumps to the high level SWEEP-H of the sweep signal SWEEP. In this embodiment, the high level SWEEP-H of the sweep signal SWEEP is greater than or equal to the maximum value of the first data signal Vdata_t, for example, SWEEP-H = Vdata’. The voltage at the first end of the second capacitor C2 is pulled up to Vdata’ by Vdata_t, and the voltage at the second end of the second capacitor C2 is Vdata’ + VDDW + Vth3 – Vdata_t, and the first data signal Vdata_t is written to the gate of the third transistor M3. Here, since the seventh transistor M7 and the sixth transistor M6 are both turned off, there is no on-state capacitance between the gate and the first electrode of the third transistor M3, which does not affect the charging and discharging rate of the third transistor M3, and the accuracy of the gate voltage of the third transistor M3 can be ensured.

[0071] In the reset stage T3, the first scan signal line is configured to transmit the first scan signal S1 at a high level, the second scan signal line is configured to transmit the second scan signal S2 at a high level, the third scan signal line is configured to transmit the third scan signal S3 at a high level, the reset signal line is configured to transmit the reset signal Set at a low level, the first light-emitting control signal line is configured to transmit the first light-emitting control signal EM1 at a high level, and the second light-emitting control signal line is configured to transmit the second light-emitting control signal EM2 at a high level. Therefore, the fifth transistor M5 is turned on to transmit the first initialization voltage Vref1 on the first initialization signal line to the gate of the tenth transistor M10, reset the gate of the tenth transistor M10, and make the tenth transistor M10 in a conductive state. At the same time, the first transistor M1 is turned on in response to the voltage of the PW node to transmit the first power supply voltage VDDW to the first node A.

[0072] In the light emitting stage T4, the first scan signal line is configured to transmit the first scan signal S1 at a high level, the second scan signal line is configured to transmit the second scan signal S2 at a high level, the third scan signal line is configured to transmit the third scan signal S3 at a high level, the reset signal line is configured to transmit the reset signal Set at a high level, the first light emitting control signal line is configured to transmit the first light emitting control signal EM1 at a low level, and the second light emitting control signal line is configured to transmit the second light emitting control signal EM2 at a low level. Therefore, the second transistor M2, the seventh transistor M7 and the thirteenth transistor M13 are turned on. The ninth transistor M9 generates a driving current according to the second data signal Vdata_I to drive the light emitting diode D1 to emit light.

[0073] In the light emitting process, the second transistor M2 is in a turned-on state, but since the width-length ratio of the first transistor M1 is greater than that of the second transistor M2, the potential of the first node A is still dominated by the first transistor M1, and the potential of the first node A is still the first power supply voltage VDDW or a voltage close to the first power supply voltage VDDW.

[0074] Meanwhile, the sweep signal SWEEP gradually changes from the high level SWEEP-H to the low level SWEEP-L, and due to the coupling effect of the second capacitor C2, the gate potential of the third transistor M3 changes synchronously. When the light emitting ends, the sweep signal SWEEP makes the third transistor M3 gradually turn on, and the PW node is gradually pulled high to the off voltage. Figure 11 A waveform diagram of a node voltage and a driving current provided by an embodiment of the present application is shown in FIG. 6. Figure 11 In this process, when the voltage of the PW node makes the first transistor M1 turn off, the second transistor M2 dominates the potential of the first node A, and the voltage of the first node A is pulled low to the second power supply voltage VSS from the first power supply voltage VDDW. Through the coupling of the first capacitor C1, the voltage of the gate of the third transistor M3 is synchronously pulled low, forming a cycle process of G1 node voltage reduction—PW node voltage reduction—first node A voltage reduction—G1 node voltage reduction, so as to quickly turn on the third transistor M3, make the voltage of the output end PW of the time control module 10 quickly switch to the off voltage (for example, the first power supply voltage VDDW), thereby controlling the light emitting diode D1 to quickly extinguish, reducing the duration of the light emitting end, and preventing the display effect from being affected by the large (current attenuation) driving current falling edge caused by the delayed turn-off of the pixel circuit.

[0075] Optionally, the present application also provides a driving method of a pixel circuit, which can be applied to the pixel circuit provided by any embodiment of the present application. Figure 12 A flow chart of the driving method of the pixel circuit provided by an embodiment of the present application is shown in FIG. 7. Figure 12The driving method of the pixel circuit comprises the following steps:

[0076] In the first data writing stage, the time control module is controlled to write the first data signal into the control end through the data writing end.

[0077] In the light emitting stage, the time control module is controlled to output a potential according to the first data signal and the sweep signal, so as to control the light emitting time of the light emitting element.

[0078] The technical scheme provided by the embodiment of the present application associates the output end and the control end of the time control module by arranging the potential control module and the first coupling unit between the output end and the control end of the time control module.

[0079] Figure 13 The flow chart of another driving method of the pixel circuit provided by the embodiment of the present application is shown in Figure 2 Figure 13 The step S120 specifically comprises the following steps:

[0080] In the light emitting stage, the second sub-unit is controlled to be turned on in response to the first light emitting control signal on the first light emitting control signal line, the first sub-unit is controlled to be turned on in response to the potential of the output end of the time control module, and the first power supply voltage on the first power supply line is transmitted to the first node.

[0081] In the light emitting stage, the second sub-unit is controlled to be turned on in response to the first light emitting control signal on the first light emitting control signal line, the first sub-unit is controlled to be turned on in response to the potential of the output end of the time control module, and the first power supply voltage on the first power supply line is transmitted to the first node. ​

[0082] wherein, Figure 13 The specific process of the driving method of the pixel circuit shown in the figure can refer to the above-mentioned embodiments of the pixel circuit Figure 2 The related description of the pixel circuit shown in the figure is not repeated here, and also has the beneficial effects described in the above-mentioned embodiments.

[0083] Figure 14 The flow chart of another driving method of the pixel circuit provided by the embodiment of the present application is shown in the figure, and the driving method of the pixel circuit provided by the embodiment of the present application includes: Figure 14 The driving method of the pixel circuit provided by the embodiment of the present application includes:

[0084] S310, in the second initialization stage, the second initialization unit is controlled to be turned on in response to the third scan signal on the third scan line, and the third initialization voltage on the third initialization signal line is transmitted to the control end of the second driving unit.

[0085] S210, in the first initialization stage, the first initialization unit is controlled to be turned on in response to the second scan signal on the second scan line, and the second initialization voltage on the second initialization signal line is transmitted to the control end of the first driving unit; and in the second data writing stage, the data writing unit and the second compensation unit are controlled to be turned on in response to the second scan signal respectively, and the second data signal is transmitted to the control end of the second driving unit through the second compensation unit.

[0086] S220, in the compensation stage, the first compensation unit and the first light-emitting control unit are controlled to be turned on in response to the first scan signal on the first scan line respectively, so that the first power supply voltage on the first power supply line is transmitted to the control end of the first driving unit through the first compensation unit.

[0087] S1101, in the first data writing stage, the voltage on the first data line is controlled to jump from the first data signal to the frequency sweeping signal, and the first data signal is written to the control end of the first driving unit through the second coupling unit.

[0088] S230, in the reset stage, the reset unit is controlled to be turned on in response to the reset signal on the reset signal line, and the first initialization voltage on the first initialization signal line is transmitted to the output end of the time control module.

[0089] S120, in the light-emitting stage, the time control module is controlled to control the potential of its output end according to the first data signal and the frequency sweeping signal, so as to control the light-emitting time of the light-emitting element, and at the end of the light-emitting, the potential control module is controlled to output the first power supply voltage on the first power supply line or the second power supply voltage on the second power supply line to the first end of the first coupling unit in response to the potential of the output end of the time control module and the first light-emitting control signal on the first light-emitting control signal line, and the potential of the control end of the time control module is controlled through the first coupling unit, thereby controlling the potential of the output end of the time control module.

[0090] wherein, Figure 14 The specific process of the driving method of the pixel circuit shown in the above embodiment can refer to the related description of the pixel circuit shown in the above embodiment, which will not be repeated here, and also has the beneficial effects described in the above embodiment. Figure 9 The specific process of the driving method of the pixel circuit shown in the above embodiment can refer to the related description of the pixel circuit shown in the above embodiment, which will not be repeated here, and also has the beneficial effects described in the above embodiment.

[0091] Optionally, the embodiment of the present application also provides a display panel, which comprises the pixel circuit provided by any of the embodiments of the present application, Figure 15 The structure of the display panel provided by the embodiment of the present application is shown in the schematic diagram of the display panel 200, which can be not only the mobile phone panel shown in the above embodiment, but also the display panel of the electronic device such as the tablet computer, the mobile phone, the watch, the wearable device, the vehicle-mounted display, the camera display, the television and the computer screen. Since the display panel comprises the pixel circuit provided by any of the embodiments of the present application, the display panel provided by the embodiment of the present application also has the beneficial effects described in any of the embodiments of the present application. Figure 15 The structure of the display panel provided by the embodiment of the present application is shown in the schematic diagram of the display panel 200, which can be not only the mobile phone panel shown in the above embodiment, but also the display panel of the electronic device such as the tablet computer, the mobile phone, the watch, the wearable device, the vehicle-mounted display, the camera display, the television and the computer screen. Since the display panel comprises the pixel circuit provided by any of the embodiments of the present application, the display panel provided by the embodiment of the present application also has the beneficial effects described in any of the embodiments of the present application.

[0092] It should be understood that the steps shown above can be reordered, added or deleted using various forms of flow. For example, the steps described in the present application can be executed in parallel, sequentially or in different order, as long as the desired results of the technical solutions of the present application can be achieved, which is not limited herein.

[0093] The above detailed description does not constitute a limitation on the protection scope of the present application. Those skilled in the art should understand that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent replacement and improvement within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A pixel circuit, characterized by comprising: The application relates to a time control module, a potential control module and a coupling unit. The time control module comprises a control end, a data writing end and an output end, and is used for writing a first data signal connected to the data writing end to the control end in a first data writing stage, and controlling the potential of the output end according to the first data signal and a sweep signal in a light-emitting stage, so as to control the light-emitting time of a light-emitting element. The potential control module comprises a first control end, a second control end, a first input end, a second input end and an output end, the first control end is connected with the output end of the time control module, the second control end is connected with a first light-emitting control signal line, the first input end is connected with a first power supply line, the second input end is connected with a second power supply line, and the potential control module is used for outputting a first power supply voltage on the first power supply line or a second power supply voltage on the second power supply line in response to the potential of the output end of the time control module and a first light-emitting control signal on the first light-emitting control signal line. The coupling unit comprises a first end and a second end, the first end is connected with the output end of the potential control module, and the second end is connected with the control end of the time control module. The potential control module comprises a first subunit and a second subunit. The control end of the first subunit is connected with the output end of the time control module, the first end of the first subunit is connected with the first power supply line, the second end of the first subunit is connected with the second end of the second subunit at a first node, the first end of the second subunit is connected with the second power supply line, the control end of the second subunit is connected with the first light-emitting control signal line, and the first end of the coupling unit is connected with the first node. The first subunit comprises a first transistor, the gate of the first transistor is the control end of the first subunit, the first pole of the first transistor is the first end of the first subunit, and the second pole of the first transistor is the second end of the first subunit. The second subunit comprises a second transistor, the gate of the second transistor is the control end of the second subunit, the first pole of the second transistor is the first end of the second subunit, and the second pole of the second transistor is the second end of the second subunit. The channel type of the first transistor is the same as that of the second transistor, and the width-length ratio of the first transistor is greater than that of the second transistor.

2. The pixel circuit of claim 1, wherein, The first power supply voltage transmitted on the first power supply line is greater than the second power supply voltage transmitted on the second power supply line.

3. The pixel circuit of claim 1, wherein, The coupling unit comprises a first capacitor, the first pole of the first capacitor is the first end of the coupling unit, and the second pole of the first capacitor is the second end of the coupling unit.

4. The pixel circuit of claim 1, wherein, The time control module comprises a first driving unit, a second coupling unit, a control end of the first driving unit being a control end of the time control module, the first driving unit being connected between the first power supply line and an output end of the time control module, a first end of the second coupling unit being connected with a data write-in end and a first data line of the time control module, and a second end of the second coupling unit being connected with the control end of the first driving unit.

5. The pixel circuit of claim 4, wherein, The time control module further comprises a first compensation unit, a control end of the first compensation unit being connected with a first scan line, a first end of the first compensation unit being connected with a second end of the first driving unit, and a second end of the first compensation unit being connected with the control end of the first driving unit.

6. The pixel circuit of claim 4, wherein, The time control module further comprises a reset unit, a control end of the reset unit being connected with a reset signal line, a first end of the reset unit being connected with a first initialization signal line, and a second end of the reset unit being connected with the output end of the time control module.

7. The pixel circuit of claim 5, wherein, The time control module further comprises a first initialization unit, a first light-emitting control unit and a second light-emitting control unit, a control end of the first initialization unit being connected with a second scan line, a first end of the first initialization unit being connected with a second initialization signal line, and a second end of the first initialization unit being connected with the control end of the first driving unit; a control end of the first light-emitting control unit being connected with the first scan line, a first end of the first light-emitting control unit being connected with the first power supply line, a second end of the first light-emitting control unit being connected with a first end of the first driving unit, a control end of the second light-emitting control unit being connected with the first light-emitting control signal line, a first end of the second light-emitting control unit being connected with the first power supply line, and a second end of the second light-emitting control unit being connected with the first end of the first driving unit.

8. The pixel circuit of claim 1, wherein, The current control module is connected between a third power supply line and a first end of the light-emitting element, a second end of the light-emitting element being connected with the second power supply line, a control end of the current control module being connected with the output end of the time control module, and the current control module being used for driving the light-emitting element to emit light according to a second data signal.

9. The pixel circuit of claim 8, wherein, The current control module comprises a second driving unit and a third light-emitting control unit, a control end of the third light-emitting control unit being a control end of the current control module, and the third light-emitting control unit and the second driving unit being connected in series between the third power supply line and the first end of the light-emitting element.

10. The pixel circuit of claim 9, wherein, The current control module further comprises a second compensation unit and a data write-in unit, a control end of the second compensation unit and a control end of the data write-in unit being connected with a second scan line, the second compensation unit being connected between a second end and the control end of the second driving unit, and the data write-in unit being connected between a second data line and a first end of the second driving unit, and the data write-in unit being used for writing the second data signal into the control end of the second driving unit in a second data write-in stage.

11. The pixel circuit of claim 9, wherein, The current control module further comprises a fourth light-emitting control unit and a second initialization unit, a control end of the fourth light-emitting control unit is connected with a second light-emitting control signal line, the fourth light-emitting control unit is connected between a second end of the second driving unit and a first end of the light-emitting element, and a control end of the second initialization unit is connected with a third scanning line, the second initialization unit is connected between a third initialization signal line and a control end of the second driving unit.

12. The pixel circuit of claim 9, wherein, The current control module further comprises a first storage unit and a second storage unit, the first storage unit is connected between a control end of the third light-emitting control unit and the third power supply line, and the second storage unit is connected between a control end of the second driving unit and the third power supply line.

13. A driving method of a pixel circuit, characterized by, The pixel circuit comprises a time control module, a potential control module and a first coupling unit, the time control module comprises a control end, a data writing end and an output end, the potential control module comprises a first control end, a second control end, a first input end, a second input end and an output end, the first control end of the potential control module is connected with the output end of the time control module, the second control end is connected with a first light-emitting control signal line, the first input end is connected with a first power supply line, the second input end is connected with a second power supply line, a first end of the first coupling unit is connected with the output end of the potential control module, and a second end of the first coupling unit is connected with the control end of the time control module. The driving method of the pixel circuit comprises: In a first data writing stage, the data writing end of the time control module is connected with a first data signal line, and the time control module is controlled to write the first data signal to the control end. In a light-emitting stage, the time control module is controlled to output a potential of the output end according to the first data signal and a sweep signal, to control a light-emitting time of the light-emitting element, and when the light-emitting time ends, the potential control module is controlled to output a first power supply voltage on the first power supply line or a second power supply voltage on the second power supply line to the first end of the first coupling unit according to the potential of the output end of the time control module and a first light-emitting control signal on the first light-emitting control signal line, so as to control the potential of the control end of the time control module through the first coupling unit, thereby controlling the potential of the output end of the time control module. The potential control module comprises a first sub-unit and a second sub-unit, a control end of the first sub-unit is connected with the output end of the time control module, a first end of the first sub-unit is connected with the first power supply line, a second end of the first sub-unit and a second end of the second sub-unit are connected with a first node, a first end of the second sub-unit is connected with the second power supply line, a control end of the second sub-unit is connected with the first light-emitting control signal line, and a first end of the first coupling unit is connected with the first node. In the light-emitting stage, the driving method of the pixel circuit comprises: In the light emitting stage, the second sub-unit is controlled to be turned on in response to the first light emitting control signal on the first light emitting control signal line, the first sub-unit is controlled to be turned on in response to the potential of the output terminal of the time control module, and the first power supply voltage on the first power supply line is transmitted to the first node; At the end of the light emitting stage, the first sub-unit is controlled to be turned off in response to the potential of the output terminal of the time control module, the second sub-unit is controlled to transmit the second power supply voltage on the second power supply line to the first node, and the first coupling unit is controlled to adjust the potential of the control terminal of the time control module to control the potential of the output terminal of the time control module.

14. The driving method of the pixel circuit according to claim 13, wherein The time control module comprises a first driving unit, a second coupling unit, a first compensation unit, a first initialization unit, a reset unit, a first light emitting control unit and a second light emitting control unit. The first driving unit is connected between the first power supply line and the output terminal of the time control module. The first end of the second coupling unit is connected with the data write-in terminal of the time control module and the first data line. The second end of the second coupling unit is connected with the control terminal of the first driving unit. The control terminal of the first compensation unit is connected with the first scan line. The first end of the first compensation unit is connected with the second end of the first driving unit. The second end of the first compensation unit is connected with the control terminal of the first driving unit. The control terminal of the reset unit is connected with the reset signal line. The first end of the reset unit is connected with the first initialization signal line. The second end of the reset unit is connected with the output terminal of the time control module. The control terminal of the first light emitting control unit is connected with the first scan line. The first end of the first light emitting control unit is connected with the first power supply line. The second end of the first light emitting control unit is connected with the first end of the first driving unit. The control terminal of the second light emitting control unit is connected with the first light emitting control signal line. The first end of the second light emitting control unit is connected with the first power supply line. The second end of the second light emitting control unit is connected with the first end of the first driving unit. The control terminal of the first initialization unit is connected with the second scan line. The first end of the first initialization unit is connected with the second initialization signal line. The second end of the first initialization unit is connected with the control terminal of the first driving unit. Before the light emitting stage, the driving method of the pixel circuit comprises: In the first initialization stage, the first initialization unit is controlled to be turned on in response to the second scan signal on the second scan line, and the second initialization voltage on the second initialization signal line is transmitted to the control terminal of the first driving unit. In the compensation stage, the first compensation unit and the first light emitting control unit are controlled to be turned on in response to the first scan signal on the first scan line, respectively, so that the first power supply voltage on the first power supply line is transmitted to the control terminal of the first driving unit. In the first data writing stage, the voltage on the first data line is controlled to jump from the first data signal to the sweep signal, and the first data signal is written to the control end of the first driving unit through the second coupling unit; In the reset stage, the reset unit is controlled to turn on in response to the reset signal on the reset signal line, and the first initialization voltage on the first initialization signal line is transmitted to the output end of the time control module.

15. The driving method of the pixel circuit according to claim 14, wherein The pixel circuit further comprises a current control module, the current control module comprising a second driving unit, a second compensation unit, a data writing unit and a third light emitting control unit, the control end of the third light emitting control unit being the control end of the current control module, the third light emitting control unit and the second driving unit being connected in series between the third power supply line and the first end of the light emitting element, the data writing unit being connected with the second driving unit, the control end of the second compensation unit and the control end of the data writing unit both being connected with the second scan line, the second compensation unit being connected between the second end and the control end of the second driving unit, the data writing unit being connected between the second data line and the first end of the second driving unit; the current control module further comprises a fourth light emitting control unit and a second initialization unit, the control end of the fourth light emitting control unit being connected with the second light emitting control signal line, the fourth light emitting control unit being connected between the second end of the second driving unit and the first end of the light emitting element, the control end of the second initialization unit being connected with the third scan line, the second initialization unit being connected between the third initialization signal line and the control end of the second driving unit; Before the light emitting stage, the driving method of the pixel circuit further comprises: In the second initialization stage, the second initialization unit is controlled to turn on in response to the third scan signal on the third scan line, and the third initialization voltage on the third initialization signal line is transmitted to the control end of the second driving unit; In the second data writing stage, the data writing unit and the second compensation unit are controlled to turn on in response to the second scan signal respectively, and the second data signal is transmitted to the control end of the second driving unit through the second compensation unit.

16. The driving method of the pixel circuit according to claim 15, wherein The second data writing stage coincides with the first initialization stage, and the second initialization stage is located before the second data writing stage.

17. A display panel, characterized by The pixel circuit comprises the pixel circuit according to any one of claims 1-12. The pixel circuit comprises the pixel circuit according to any one of claims 1-12.

Images