Packaging adapter plate, preparation method thereof and packaging structure

Abstract

The invention provides a packaging adapter plate, a preparation method thereof and a packaging structure.The preparation method comprises the steps that a first substrate and a second substrate are provided, the first substrate comprises a first semiconductor layer and a first metal layer, and the second substrate comprises a second semiconductor layer and a second metal layer; the first substrate and the second substrate are mutually bonded to obtain a bonding structure, the free surfaces of the first metal layer and the second metal layer serve as bonding surfaces, and then metal conductive columns are formed in the bonding structure to meet the electrical connection requirement of the packaging adapter plate. The first metal layer and the second metal layer which are in bonding connection are embedded in the packaging structure, a transverse heat conduction channel is added for the packaging adapter plate, the heat conduction capacity of the subsequent packaging structure can be effectively improved, and then the stability and reliability of the packaging structure are improved.

Description

Technical Field

[0001] The present application relates to the technical field related to semiconductor packaging, and in particular to a packaging adapter board and a preparation method and a packaging structure thereof. Background Art

[0002] As people's requirements for the performance of electronic products continue to increase, semiconductor packaging structures are developing in the direction of miniaturization, high density, multi-function and systematization. The existing packaging structure is to directly connect the chip vertically on the substrate through an adapter plate. In this case, the method of further reducing the feature size of the integrated circuit and the line width of the interconnection line to improve performance is limited by the physical properties of the material and the equipment process. The traditional Moore's Law has been difficult to continue to develop.

[0003] At present, advanced packaging methods include: Wafer Level Chip Scale Packaging (WLCSP), Fan-Out Wafer Level Package (FOWLP), Flip Chip, Package on Package (POP), etc. Usually, the chip is flipped on the upper surface of the passive adapter, and then mounted on the substrate through the pads or solder balls on the lower surface of the adapter to form a packaging structure. As the chip technology node continues to shrink, the power density of the chip continues to increase, especially the application of vertical through-hole adapter technology in 2.5D / 3D integrated packaging, the heat dissipation problem is becoming more and more important.

[0004] Therefore, how to provide a packaging adapter plate and its preparation method and packaging structure to improve the heat dissipation problem of 2.5D / 3D integrated packaging and improve the stability and reliability of the packaging structure has become a research focus for technical personnel in this field. Summary of the invention

[0005] The purpose of the present application is to provide a packaging adapter plate and its preparation method and packaging structure, which effectively improves the integration of the product, realizes the multifunctionality of the product, and has the advantages of good heat dissipation, high product reliability, small packaging volume, low production cost and high product yield.

[0006] In a first aspect, an embodiment of the present application provides a method for preparing a package adapter plate, which includes:

[0007] Providing a first substrate and a second substrate having flat surfaces, wherein the first substrate comprises a first semiconductor layer and a first metal layer formed on the surface of the first semiconductor layer, and the second substrate comprises a second semiconductor layer and a second metal layer formed on the surface of the second semiconductor layer;

[0008] Bonding the first substrate and the second substrate to each other to obtain a bonding structure, wherein free surfaces of the first metal layer and the second metal layer are bonding surfaces;

[0009] forming a plurality of blind holes in the bonding structure, wherein the blind holes penetrate the first substrate, avoid the first metal layer and the second metal layer, and extend toward one side of the free surface of the second substrate;

[0010] The blind hole is filled with metal material to form a metal conductive column.

[0011] In a possible implementation manner, the first substrate and the second substrate are formed in the same steps, and the steps of forming the first substrate include:

[0012] providing a silicon substrate;

[0013] Etching a groove on the surface of the silicon substrate to form a first semiconductor layer;

[0014] A metal material is filled in the trench to form a first metal layer.

[0015] In a possible implementation manner, before the first metal layer is formed, an insulating layer and a barrier layer are sequentially formed in the groove, and the first metal layer is formed on the barrier layer.

[0016] In a possible implementation manner, after the first metal layer is formed, the method further includes grinding the first metal layer to make the upper surface of the first metal layer flush with the upper surface of the first semiconductor layer.

[0017] In a possible implementation manner, the depth of the groove is 5 μm to 100 μm.

[0018] In a possible implementation, before the step of forming a plurality of blind holes in the bonding structure, the step further includes thinning one side of the free surface of the first substrate using a thinning process, wherein the blind holes vertically extend from the thinned surface of the first substrate to one side of the free surface of the second substrate.

[0019] In a second aspect, the present application further provides a packaging adapter board, including:

[0020] A substrate, comprising a first sub-portion, a second sub-portion and a connecting portion; the connecting portion is arranged between the first sub-portion and the second sub-portion;

[0021] A metal heat-conducting layer is embedded between the first sub-section and the second sub-section, and surrounds and covers the peripheral side of the connecting portion to separate the first sub-section and the second sub-section;

[0022] The metal conductive column is arranged in the connecting portion and vertically penetrates the substrate.

[0023] In a possible implementation, the substrate is a silicon wafer substrate, the metal thermal conductive layer is a copper thermal conductive layer, and the metal conductive column is a copper conductive column.

[0024] In a third aspect, the present application further provides a packaging adapter board, including the above-mentioned packaging adapter board, and further including:

[0025] A substrate, on which the packaging adapter plate is arranged;

[0026] a wiring layer, arranged on the first sub-portion, in which metal wiring is arranged, and the metal wiring is electrically connected to the metal conductive column;

[0027] a chip stacking layer, located on the wiring layer and electrically connected to the substrate through the metal wiring and the metal conductive pillars;

[0028] A packaging cover is arranged on the substrate to form a sealed cavity, and a stacking structure consisting of the packaging adapter board, the wiring layer, and the chip stacking layer is located in the sealed cavity;

[0029] A thermal interface layer is disposed between the stacking structure and the packaging cover.

[0030] In a possible embodiment, the thermal interface layer includes a first heat conducting portion and a second heat conducting portion, the first heat conducting portion is arranged on the chip stacking layer and contacts the top of the packaging cover, and the second heat conducting portion is arranged between the side wall of the packaging adapter plate and the side wall of the packaging cover to cover the exposed side wall surface of the metal heat conducting layer.

[0031] Compared with the prior art, the present invention has at least the following beneficial effects:

[0032] The present application provides a packaging adapter board and a preparation method and packaging structure thereof. The preparation method first provides a first substrate and a second substrate, wherein the first substrate includes a first semiconductor layer and a first metal layer, and the second substrate includes a second semiconductor layer and a second metal layer. Then, the first substrate and the second substrate are bonded to each other to obtain a bonding structure, and the free surfaces of the first metal layer and the second metal layer are used as bonding surfaces. Then, metal conductive columns are formed in the bonding structure to meet the electrical connection requirements of the packaging adapter board. The present application adds a lateral heat conduction channel to the packaging adapter board by embedding the first metal layer and the second metal layer bonded in the packaging structure, which can effectively improve the heat conduction capacity of the subsequent packaging structure, thereby improving the stability and reliability of the packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0034] Figure 1 The present invention is a flowchart of a method for preparing a packaging adapter plate according to an embodiment of the present application.

[0035] Figure 2 to Figure 12 It is a structural schematic diagram of different preparation processes of a packaging adapter board according to an embodiment of the present application.

[0036] Fig.13 It is a structural schematic diagram of a packaging structure according to an embodiment of the present application.

[0037] Fig.14 Based on Fig.13 Schematic diagram of the cross-sectional structure of the package structure taken along the cutting line BB

[0038] Illustration Description:

[0039] 10 silicon substrate; 11 groove; 12 protrusion; 100' bonding structure; 100 package adapter; 101 first division; 102 second division; 103 connection part; 110 first substrate; 111 first semiconductor layer; 112 first metal layer; 120 second substrate; 121 second semiconductor layer; 122 second metal layer; 130 metal thermal conductive layer; 140 blind hole; 150 metal conductive column; 200 base; 300 wiring layer; 400 chip stacking layer; 410 chip; 500 package cover; 600 thermal interface layer; 610 first thermal conductive part; 620 second thermal conductive part. DETAILED DESCRIPTION

[0040] The following describes the implementation of the present application through specific embodiments, and those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification. The present application can also be implemented or operated through other different specific implementations, and the details in the present application can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application.

[0041] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the term "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be internal communication between two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to the specific circumstances. In addition, the terms "first" and "second" are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0042] In the existing integrated packaging structure, the chip stacking layer mainly relies on the upper packaging cover 500 and the heat sink structure for heat dissipation. The heat dissipation path below the chip stacking layer is mainly composed of low thermal conductivity materials such as the bottom filling material and the silicon substrate 10, so the thermal resistance below the chip stacking layer is relatively large. As the chip performance and power increase, the heat generated by the chip stacking layer will further increase, and the top heat dissipation alone can no longer meet the performance and heat dissipation requirements of the existing 2.5D / 3D integrated packaging structure.

[0043] Based on the above analysis, the present application provides a packaging adapter plate and its preparation method and packaging structure, which can conduct the heat generated by the chip in a divergent manner, solve the problem of the single heat dissipation direction of the existing stacked chip middle layer chipset, and realize the lateral heat conduction of the chip heat from the side of the adapter plate, thereby better improving the heat dissipation capacity of the 2.5D / 3D integrated package and improving the stability and reliability of the product. The following will be specifically explained in conjunction with the embodiments.

[0044] According to one aspect of the present application, see Figure 1 , a method for preparing a packaging adapter plate is provided.

[0045] First, step S1 is performed to provide a first substrate 110 and a second substrate 120 .

[0046] See also Figure 4 The first substrate 110 and the second substrate 120 both have planarized surfaces. The first substrate 110 includes a first semiconductor layer 111 and a first metal layer 112 formed on the surface of the first semiconductor layer 111 , and the second substrate 120 includes a second semiconductor layer 121 and a second metal layer 122 formed on the surface of the second semiconductor layer 121 .

[0047] In one embodiment, the first substrate 110 and the second substrate 120 are formed in the same steps, wherein the first substrate 110 and the second substrate 120 are both made of silicon or glass as substrate materials, and the first metal layer 112 and the second metal layer 122 are both formed by a damascene process, thereby obtaining the first substrate 110 and the second substrate 120 with a flat surface. Figure 2 to Figure 4 , the surface of the silicon substrate 10 can be etched in advance to form a plurality of mutually spaced protrusions 12 and patterned grooves 11 between the protrusions 12, that is, to form a first semiconductor layer 111 and a second semiconductor layer 121, and the plurality of protrusions 12 and the grooves 11 together form a patterned surface of the first semiconductor layer 111 or the second semiconductor layer 121. Then, metal materials are filled in the grooves 11 on the surfaces of the first semiconductor layer 111 and the second semiconductor layer 121, respectively, to form a first metal layer 112 and a second metal layer 122. After the first metal layer 112 and the second metal layer 122 are formed, the step of grinding the surfaces of the first metal layer 112 and the second metal layer 122 by a grinding process should also be included, so that the surfaces of the first substrate 110 and the second substrate 120 are flattened, and the surfaces of the first metal layer 112 and the first semiconductor layer 111, and the surfaces of the second metal layer 122 and the second semiconductor layer 121 are located in the same plane.

[0048] Furthermore, the first metal layer 112 is formed in the grooves 11 between the protrusions 12 on the surface of the first semiconductor layer 111, and the second metal layer 122 is formed in the grooves 11 between the protrusions 12 on the surface of the second semiconductor layer 121. In other words, during the formation of the first metal layer 112 and the second metal layer 122, no additional metal etching process is required to obtain the patterned morphology, which solves the problem of difficulty in metal patterning etching, and the patterned morphologies of the two are exactly the same.

[0049] In one embodiment, before the step of filling the groove 11 on the surface of the first semiconductor layer 111 and the second semiconductor layer 121 with metal material to form the first metal layer 112 and the second metal layer 122, an insulating layer and a diffusion barrier layer (not shown in the figure) are sequentially formed on the bottom of the groove 11 and the side wall of the protrusion 12 to prevent the subsequently formed first metal layer 112 or second metal layer 122 from directly contacting the silicon substrate 10, causing the metal elements in the metal material to diffuse into the silicon substrate 10, thereby affecting the stability of the subsequent electrical connection between the chip and the packaging adapter board 100.

[0050] In one embodiment, see Figure 5The first metal layer 112 and the second metal layer 122 are both continuous layer structures and extend to cover the edge of the silicon substrate 10. In a specific embodiment, the first metal layer 112 and the second metal layer 122 are preferably made of metal materials with good thermal conductivity. For example, metal copper can be filled in the groove 11.

[0051] In one embodiment, the depth of the trench 11 formed on the surface of the silicon substrate 10 is between 5 μm and 100 μm.

[0052] Then, step S2 is performed to bond the first substrate 110 and the second substrate 120 to each other to obtain a bonding structure 100 ′.

[0053] In one embodiment, see Figure 6-7 , with one side of the free surface of the first metal layer 112 and the second metal layer 122 as the bonding surface, the first substrate 110 and the second substrate 120 are bonded to each other through a bonding process, so that the patterns of the first metal layer 112 and the second metal layer 122 correspond to each other and are in direct contact, forming a metal heat-conducting layer 130, providing a heat-conducting channel for the subsequent heat of the chip to be transversely thermally conducted through the metal heat-conducting layer 130, which is conducive to improving the stability and reliability of the packaged product. The bonding process can be silicon-silicon bonding or polymer bonding. The protrusions 12 located on the surface of the first semiconductor layer 111 and the second semiconductor layer 121 also correspond to each other one by one and abut against each other, providing a channel for the subsequent metal conductive column 150 to avoid the metal heat-conducting layer and penetrate the bonding structure 100'.

[0054] Furthermore, before the first substrate 110 and the second substrate 120 are bonded, the surfaces of the first substrate 110 and the second substrate 120 are flattened by a grinding process to increase the contact area between the first metal layer 112 and the second metal layer 122 , thereby increasing the thermal conductivity of the metal thermal conductive layer 130 .

[0055] Next, step S3 is performed to form a plurality of blind holes 140 in the bonding structure 100 ′.

[0056] In one embodiment, see Figure 8 , the blind hole 140 includes a first end and a second end opposite to each other, wherein the first end is located on the surface of the bonding structure 100' close to the free surface of the first substrate 110, and the second end is located inside the second substrate 120, and maintains a preset distance from the surface of the free surface of the second substrate 120. In other words, the blind hole 140 extends from the first end through the first substrate 110 to the second end, and avoids the first metal layer 112 and the second metal layer 122, so as to avoid the risk of the subsequent metal conductive column 150 contacting the metal heat conductive layer 130 and causing a short circuit connection of the package adapter 100.

[0057] Furthermore, before the blind hole 140 is formed, the step of thinning the side of the bonding structure 100' close to the free surface of the first substrate 110 is included, until the free surface of the first substrate 110 maintains a preset distance with the metal heat-conducting layer 130, and the blind hole 140 extends vertically from the thinned surface of the first substrate 110 to the free surface of the second substrate 120. By reducing the gap distance between the free surface of the first substrate 110 and the metal heat-conducting layer 130 through the thinning process, the distance between the subsequent chip and the metal heat-conducting layer 130 in the vertical direction is reduced, and the ability of the chip to conduct heat through the metal heat-conducting layer 130 is improved, which is conducive to improving the heat conduction ability of the packaging adapter 100.

[0058] In one embodiment, the blind holes 140 are all formed in one process, and the punching process of the one-time forming process includes laser punching and mechanical punching, preferably laser punching. The forming methods of the blind holes 140 can be the same or different, and preferably the same method is used for forming. In a specific embodiment, during the laser drilling process, the positioning device provided by the laser equipment can be used to first determine the opening position, and then the hole is punched, or a mask with a defined opening area can be used for laser irradiation drilling. If the opening position is defined by a mask, the opening position of the mask should correspond to the position of the etched protrusion 12 on the silicon substrate 10.

[0059] Furthermore, during the laser drilling process, the size of the blind hole 140 can be controlled by precisely controlling the size of the laser beam, so that small-sized aperture processing can be achieved, and thus it can be suitable for chip packaging. In addition, during the laser irradiation and drilling process of the same blind hole 140, the size of the blind hole 140 can also be adjusted by adjusting the size of the laser beam to meet the size requirements of different parts of the blind hole 140. After the preparation of each blind hole 140 is completed, the bonding structure 100' is also cleaned to remove processing residues, and / or surface polishing is performed to make each blind hole 140 have a smooth and flat surface.

[0060] Finally, step S4 is performed to fill the blind hole 140 with metal material to form a metal conductive column 150 .

[0061] In one embodiment, see Figure 9-10 , Fig.10 for Fig. 9Schematic diagram of the top view of the bonding structure. The metal material is filled in the blind hole 140 at one time to form the metal conductive column 150, and the top of the metal conductive column 150 is flush with the first end of the blind hole 140, that is, the top surface of the metal conductive column 150 is exposed on one side of the free surface of the first substrate 110. In order to ensure the formation quality of the metal conductive column 150, the inside of the blind hole 140 can be filled at one time by electroplating, chemical plating or liquid metal filling, and then the surface is flattened to make the top surface of the formed metal conductive column 150 flush with the free surface of the first substrate 110.

[0062] In one embodiment, before completing the step of filling the blind hole 140 with metal material, an insulating layer and a diffusion barrier layer (not shown in the figure) are also pre-formed in sequence on the bottom and side walls of the blind hole to prevent the subsequent formation of a metal conductive column from directly contacting the silicon substrate 10, causing the metal elements in the metal material to diffuse into the silicon substrate 10, affecting the stability of the subsequent electrical connection between the chip and the packaging adapter board 100.

[0063] In a specific embodiment, molten liquid metal can be injected into each blind hole 140, and in order to further improve the filling quality, the bonding structure 100' can be rotated during the liquid metal filling process to accelerate the liquid metal to flow into the blind hole 140, so as to avoid defects such as holes during the filling process. The filling process of this step is set to be carried out under a vacuum or inert gas atmosphere to avoid metal oxidation contamination. The filled metal material layer can be a commonly used interconnection metal material such as copper, aluminum, tungsten, etc., and copper is preferably used as the material of the metal conductive column 150. In another embodiment, a metal seed layer can be formed on the diffusion barrier layer in the blind hole 140 in advance, and then the metal conductive column 150 is formed in the blind hole 140 by electroplating or chemical plating. During the metal filling process, the bonding structure 100' can be heated to prevent the metal material from being locally cooled and affecting the filling quality. Furthermore, after the metal conductive column 150 is formed, the top of the metal conductive column 150 is mechanically ground so that the top of the metal conductive column 150 does not exceed the first end of the blind hole 140 and is flush with the free surface of the first substrate 110 .

[0064] In one embodiment, see Figure 11-12 , Fig.12 for Fig.11Schematic diagram of the cross-sectional structure of the package adapter board taken along the cutting line AA in FIG. After the metal conductive column 150 is formed, the step of thinning the side of the bonding structure 100' close to the free surface of the second substrate 120 should also be included until the bottom surface of the metal conductive column 150 is exposed, forming a package adapter board 100 with an embedded metal thermal conductive layer 130, and the metal conductive column 150 can penetrate the upper and lower surfaces of the package adapter board 100, not only providing a conductive channel for the subsequent electrical connection between the chip and the package substrate, but also providing a heat dissipation channel for lateral heat conduction for the chip, further improving the thermal stability of the packaged product. In a specific embodiment, during the process of thinning the second substrate 120 and before exposing the bottom surface of the metal conductive column 150, the second substrate 120 near the bottom of the metal conductive column 150 is also modified by ion implantation, and the modification is made to have a property that the metal elements of the metal conductive column 150 are difficult to diffuse, so as to avoid the metal elements in the metal conductive column 150 diffusing into the nearby silicon substrate 10 during the subsequent process of continuous thinning and exposing the bottom surface of the metal conductive column 150, thereby effectively improving the electrical properties and reliability of the subsequent packaging structure.

[0065] In the second aspect, the present application also provides a packaging adapter board, see Figure 11-12 The package adapter board is prepared by the above-mentioned method for preparing the package adapter board, and specifically includes a substrate, a metal thermal conductive layer 130 and a metal conductive column 150. The substrate includes a first section 101, a second section 102 and a plurality of mutually spaced connecting sections 103, and is arranged between the first section 101 and the second section 102. The metal thermal conductive layer 130 is embedded between the first section 101 and the second section 102, and surrounds and covers the peripheral side of the connecting section 103, so that the first section 101 and the second section 102 are connected only through the connecting section 103. The metal conductive column 150 is arranged in the connecting section 103, and vertically passes through the upper and lower surfaces of the substrate.

[0066] By embedding the metal heat-conducting layer 130 inside the substrate, the heat of the subsequent chip can be transversely conducted through the metal heat-conducting layer 130 inside the adapter, which is beneficial to improve the reliability of the packaged product. The metal conductive column 150 is arranged in the connection part 103 to avoid the metal heat-conducting layer 130, avoiding the risk of the metal conductive column 150 contacting the metal heat-conducting layer 130 inside the substrate and causing a short circuit inside the package adapter 100. At the same time, the pattern morphology of the metal heat-conducting layer 130 in the substrate can be appropriately adjusted according to the setting density and line width of the metal conductive column 150, thereby adjusting the position of the chip inside the packaged product and improving the integration of the chip inside the packaged product.

[0067] In a third aspect, the present application also provides a packaging structure, see Figure 13-14 , Fig.14 for Fig.13 A schematic cross-sectional view taken along the cutting line BB in FIG. The packaging structure includes a substrate 200, a wiring layer 300, a chip stacking layer 400, a packaging cover 500, a thermal interface layer 600, and the above-mentioned packaging adapter board 100. Among them, the packaging adapter board 100 is arranged on the substrate 200, and the substrate 200 is electrically connected to the bottom end of the metal conductive column 150 through a solder ball. The wiring layer 300 is arranged on the packaging adapter board 100, and the metal wire inside it is electrically connected to the top of the metal conductive column 150. The wiring layer 300 can be a single wiring layer or a multiple wiring layer. The chip stacking layer 400 is arranged on the wiring layer 300, and a plurality of chips 410 are arranged inside it. Each chip 410 can be the same or different, and is electrically connected to the metal wire in the wiring layer 300 through solder balls. The package cover 500 is configured as a cavity structure with an opening at the bottom, which is arranged on the substrate and combined with the substrate to form a sealed cavity, and the stacking structure composed of the package adapter plate 100, the wiring layer 300, and the chip stacking layer 400 is sealed in the sealed cavity to protect the stacking structure. The thermal interface layer 600 is located in the gap between the package cover 500 and the stacking structure, so that the heat of the chip 410 during operation can be quickly transferred to the package cover 500 through the thermal interface layer 600, so as to avoid the temperature in the sealed cavity being too high, which affects the stability and reliability of the package structure.

[0068] In one embodiment, the thermal cross-section layer is composed of a thermal interface material, which is filled in the gap between the package cover 500 and the stacking structure to achieve the effect of reducing the contact thermal resistance between the chip stacking layer 400 and the package cover 500. The thermal interface material can be a material with high thermal conductivity and impact resistance, including silicone grease, silica gel, resin or composite phase change material. In a specific embodiment, the thermal interface layer 600 includes at least a first heat conducting portion 610 and a second heat conducting portion 620, wherein the first heat conducting portion 610 covers the upper surface of the chip stacking layer 400, and is used to transfer the heat at the top of the chip stacking layer 400 to the packaging cover 500 via the first heat conducting portion 610, thereby realizing heat exchange between the chip stacking layer 400 and the outside, and the second heat conducting portion 620 is arranged around the side wall of the packaging adapter plate 100 and the side wall of the packaging cover 500, and covers the exposed surface of the metal heat conducting layer 130, so that the heat at the bottom of the chip stacking layer 400 can be transferred to the second heat conducting portion 620, and then transferred from the second heat conducting portion 620 to the side wall of the packaging cover 500, thereby further improving the heat exchange between the stacking layer and the outside.

[0069] The present application provides a packaging adapter board and a preparation method and packaging structure thereof. The preparation method first provides a first substrate 110 and a second substrate 120, wherein the first substrate 110 includes a first semiconductor layer 111 and a first metal layer 112, and the second substrate 120 includes a second semiconductor layer 121 and a second metal layer 122. Then, the first substrate 110 and the second substrate 120 are bonded to each other to obtain a bonding structure 100', and the free surfaces of the first metal layer 112 and the second metal layer 122 are used as bonding surfaces. Then, a metal conductive column 150 is formed in the bonding structure 100' to meet the electrical connection requirements of the packaging adapter board 100. The present application adds a lateral heat conduction channel to the packaging adapter board 100 by embedding the first metal layer 112 and the second metal layer 122 bonded in the packaging structure, which can effectively improve the heat conduction capacity of the subsequent packaging structure, thereby improving the stability and reliability of the packaging structure.

[0070] The above is only a preferred implementation of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and substitutions can be made without departing from the technical principles of the present application. These improvements and substitutions should also be regarded as the scope of protection of the present application.

Claims

1. A method for preparing a packaging adapter plate, characterized in that: Includes steps: Providing a first substrate and a second substrate having flat surfaces, wherein the first substrate comprises a first semiconductor layer and a first metal layer formed on the surface of the first semiconductor layer, and the second substrate comprises a second semiconductor layer and a second metal layer formed on the surface of the second semiconductor layer; Bonding the first substrate and the second substrate to each other to obtain a bonding structure, wherein the free surfaces of the first metal layer and the second metal layer are bonding surfaces; forming a plurality of blind holes in the bonding structure, wherein the blind holes penetrate the first substrate, avoid the first metal layer and the second metal layer, and extend toward one side of the free surface of the second substrate; The blind hole is filled with metal material to form a metal conductive column.

2. The preparation method according to claim 1, characterized in that: The steps of forming the first substrate and the second substrate are the same, and the steps of forming the first substrate or the second substrate include: providing a silicon substrate; Etching a groove on the surface of the silicon substrate to form a first semiconductor layer or a second semiconductor layer; A metal material is filled in the trench to form a first metal layer or a second metal layer.

3. The preparation method according to claim 2, characterized in that: Before the first metal layer is formed, the method further includes sequentially forming an insulating layer and a barrier layer in the groove, and the first metal layer is formed on the barrier layer.

4. The preparation method according to claim 2, characterized in that: After the first metal layer is formed, the method further includes a step of flattening the surface of the first metal layer by a grinding process, so that the upper surface of the first metal layer is flush with the upper surface of the first semiconductor layer.

5. The preparation method according to claim 2, characterized in that: The depth of the groove is 5 μm to 100 μm.

6. The preparation method according to claim 1, characterized in that: Before the step of forming a plurality of blind holes in the bonding structure, the method further includes thinning one side of the free surface of the first substrate using a thinning process, wherein the blind holes vertically extend from the thinned surface of the first substrate to one side of the free surface of the second substrate.

7. A packaging adapter board, characterized in that: include: A substrate, comprising a first sub-portion, a second sub-portion and a connecting portion; the connecting portion is arranged between the first sub-portion and the second sub-portion; A metal heat-conducting layer is embedded between the first sub-section and the second sub-section, and surrounds and covers the peripheral side of the connecting portion to separate the first sub-section and the second sub-section; The metal conductive column is arranged in the connecting portion and vertically penetrates the substrate.

8. The packaging adapter board according to claim 7, characterized in that: The metal heat-conducting layer includes a copper heat-conducting layer, and the metal conductive column includes a copper conductive column.

9. A packaging structure, comprising the packaging adapter plate according to any one of claims 7 to 8, characterized in that: Also includes: A substrate, on which the packaging adapter plate is arranged; A wiring layer, arranged on the first sub-portion, wherein metal wiring is arranged in the wiring layer, and the metal wiring is electrically connected to the metal conductive column; a chip stacking layer, disposed on the wiring layer and electrically connected to the substrate through the metal wiring and the metal conductive pillars; A packaging cover is arranged on the substrate to form a sealed cavity, and a stacking structure consisting of the packaging adapter board, the wiring layer, and the chip stacking layer is located in the sealed cavity; A thermal interface layer is disposed between the stacking structure and the packaging cover.

10. The packaging structure according to claim 9, characterized in that: The thermal interface layer includes a first heat conducting portion and a second heat conducting portion, wherein the first heat conducting portion is arranged on the chip stacking layer and contacts the top of the packaging cover, and the second heat conducting portion is arranged between the side wall of the packaging adapter plate and the side wall of the packaging cover to cover the exposed side wall surface of the metal heat conducting layer.

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