Treatment of tungsten surfaces for tungsten gap filling

Abstract

Methods and apparatus for tungsten gap filling in semiconductor devices are provided. The method includes performing a gradient oxidation process to oxidize an exposed portion of the liner layer, where the gradient oxidation process preferentially oxidizes an overhang portion of the liner layer, the overhang portion obstructing or blocking a top opening of one or more features formed within a field region of the substrate. The method further includes performing an etch-back process to remove or reduce an oxidized overhang portion of the liner layer; exposing the liner layer to a chemical vapor transport (CVT) process to remove metal oxides remaining in the gradient oxidation process and the etch-back process; and performing a tungsten gap filling process to fill or partially fill the one or more features.

Description

Technical Field

[0001] The present disclosure relates to a method and apparatus for forming a thin film. More particularly, the present disclosure relates to a method and apparatus for tungsten gapfill in a semiconductor device. Background Art

[0002] The manufacture of microelectronic devices typically involves a complex process sequence that requires hundreds of individual processes to be performed on semiconductor, dielectric, and conductive substrates. Examples of these processes include oxidation, diffusion, ion implantation, thin film deposition, cleaning, etching, photolithography, and other operations. Each operation is time-consuming and expensive.

[0003] As the critical dimensions of microelectronic devices continue to decrease, the design and manufacture of these devices on substrates become increasingly complex. Control of critical dimensions and process uniformity becomes increasingly important. Complex multilayer stacks involve precise process monitoring of critical dimensions such as thickness, roughness, stress, density, and potential defects. Multiple incremental processes in the process recipe used to form the device ensure that the critical dimensions are maintained. However, each recipe process may utilize one or more processing chambers, which adds additional time for forming the device in the processing system and also provides additional opportunities for defects to form. Therefore, each process increases the total manufacturing cost of the completed microelectronic device.

[0004] Additionally, as the critical dimensions of these devices shrink, past manufacturing techniques encounter new obstacles. For example, when a liner and / or nucleation layer is prepared to grow a metal gap fill, the liner and / or nucleation layer may still be present on the sides of the gap, causing the fill material to close the gap before it is fully filled, resulting in seams in the fill material.

[0005] For at least the foregoing reasons, there continues to be a need for improved manufacturing methods to minimize costs while maintaining critical dimensions of microelectronic devices. Summary of the invention

[0006] The present disclosure relates to a method and apparatus for forming a thin film. More particularly, the present disclosure relates to a method and apparatus for tungsten gapfill in a semiconductor device.

[0007] In one aspect, a method for filling features on a substrate is provided. The method includes: performing a gradient oxidation process to oxidize exposed portions of a liner layer, wherein the gradient oxidation process preferentially oxidizes overhanging portions of the liner layer, the overhanging portions obstructing or blocking top openings of one or more features formed in a field region of the substrate. The method further includes: performing an etch-back process to remove or reduce the oxidized overhanging portions of the liner layer; exposing the liner layer to a chemical vapor transport (CVT) process to remove metal oxides remaining from the gradient oxidation process and the etch-back process; and performing a tungsten gap fill process to fill or partially fill one or more features.

[0008] Embodiments may include one or more of the following. The liner layer is a tungsten-containing layer, and the metal oxide is tungsten oxide. The CVT process is a plasma process that reduces tungsten oxide to tungsten. The CVT process includes exposing the tungsten-containing layer to an inductively coupled plasma (ICP) containing hydrogen and oxygen. Exposing the tungsten-containing layer to the ICP is performed at a temperature of 400 degrees Celsius or less, and includes supplying a processing gas that contains hydrogen greater than or equal to 90% of the total flow rate of hydrogen and oxygen. A gradient oxidation process, an etch-back process, and exposing the liner layer to the CVT process are performed in a processing chamber without breaking vacuum. One or more features include a bottom surface and at least one sidewall, and the liner layer is formed on at least one sidewall and the bottom surface.

[0009] In another aspect, a method for filling a feature formed on a substrate is provided. The method includes: depositing one or more tungsten-containing layers on a surface of a substrate. The substrate includes a plurality of features formed in a field region of a surface of the substrate, each of the plurality of features including a sidewall surface and a bottom surface, and forming one or more deposited tungsten-containing layers on the field region, the sidewall surface, and the bottom surface of the plurality of features. The method further includes: exposing the surface of the substrate to a gradient oxidation process, wherein the gradient oxidation process forms a preferential oxidation region of the tungsten-containing layer disposed on the field region of the plurality of features. The method further includes: preferentially etching the preferential oxidation region of the deposited one or more tungsten-containing layers formed on the surface of the substrate. After performing a process of preferentially etching the preferential oxidation region, a first portion of the deposited one or more tungsten-containing layers remains on the bottom surface of each of the plurality of features, and a second portion of the deposited one or more tungsten-containing layers remains on the sidewall surface of each of the plurality of features. The method further includes: exposing at least a second portion of the deposited one or more tungsten-containing layers to a post-etching treatment process to reduce the oxidized tungsten to tungsten and remove contaminants from the surface of the deposited one or more tungsten-containing layers. The method further includes: filling the feature with a second tungsten layer. The process of filling the features with the second tungsten layer includes preferentially growing the second tungsten layer from second portions of the deposited one or more tungsten-containing layers on the sidewall surfaces and first portions of the deposited one or more tungsten-containing layers remaining on the bottom surface of each feature.

[0010] Embodiments may include one or more of the following. The post-etch treatment process includes an inductively coupled plasma. The post-etch treatment process further includes: exposing the tungsten-containing layer to one or more of H2, O2, Ar, or a combination thereof. The post-etch treatment process includes: exposing the tungsten-containing layer to a hydrogen and oxygen plasma treatment. The hydrogen and oxygen plasma treatment is performed at a temperature of 400 degrees Celsius or less and includes supplying a processing gas, the processing gas containing hydrogen gas greater than or equal to 90% of the total flow rate of hydrogen and oxygen. The sidewall surface is defined by a dielectric material selected from silicon oxide, silicon nitride, silicon oxynitride, or a combination thereof. Depositing one or more tungsten-containing layers on the surface of the substrate includes the following steps: depositing a tungsten liner layer on multiple features via a physical vapor deposition process; and depositing a boron-tungsten nucleation layer on the tungsten liner layer via an atomic layer deposition (ALD) process. Filling the features with a second tungsten layer includes a chemical vapor deposition (CVD) gap filling process. The post-etch treatment process includes a chemical vapor transport (CVT) process. The CVT process includes a volatilization process and a reduction process. The volatilization process is performed via the following reaction: (I) WO2+2H2O→ WO2(OH)2+H2, and the reduction process is performed via the following reaction: (II) WO2(OH)2+3H2→W+4H2O. Exposing the surface of the substrate to a gradient oxidation process, preferentially etching a preferentially oxidized region of one or more deposited tungsten-containing layers formed on the surface of the substrate, and exposing at least a second portion of the deposited one or more tungsten-containing layers to a post-etching treatment process are performed in a first processing chamber disposed on the cluster tool.

[0011] In yet another embodiment, a cluster tool is provided. The cluster tool includes a first processing chamber. The first processing chamber includes: an oxygen source, the oxygen source fluid is coupled to the processing area of ​​the first processing chamber, wherein the oxygen source is configured to deliver an oxygen-containing gas to the processing area. The first processing chamber includes: a first flow control valve, the first flow control valve is configured to control the flow of the oxygen-containing gas provided from the oxygen source to the processing area. The first processing chamber further includes: a hydrogen source, the hydrogen source fluid is coupled to the processing area of ​​the first processing chamber, wherein the hydrogen source is configured to deliver a hydrogen-containing gas to the processing area. The first processing chamber further includes: a second flow control valve, the second flow control valve is configured to control the flow of the hydrogen-containing gas provided from the hydrogen source to the processing area. The first processing chamber further includes: an etching gas source, the etching gas source fluid is coupled to the processing area of ​​the first processing chamber, wherein the etching gas source is configured to deliver an etching gas to the processing area. The first processing chamber further includes: a third flow control valve, the third flow control valve is configured to control the flow of the etching gas provided from the etching gas source to the processing area. The first processing chamber further includes: an inductively coupled plasma source, the inductively coupled plasma source is configured to generate plasma in the processing region, wherein the plasma includes a hydrogen-containing gas and an oxygen-containing gas. The cluster tool further includes a controller. The controller is configured to: control the first flow control valve so that a certain amount of oxygen-containing gas is provided to the surface of the substrate disposed in the processing region of the first processing chamber to preferentially oxidize one or more tungsten-containing layers disposed on the sidewalls and field regions of the features formed in the substrate by generating plasma in the processing region of the first processing chamber. The controller is further configured to: control the third flow control valve so that a certain amount of etching gas is provided to the surface of the substrate to perform preferential etching of the preferentially oxidized portion of the one or more tungsten-containing layers disposed on the sidewalls and field regions of the features formed in the substrate in the first processing chamber. The controller is further configured to: control the first flow control valve and the second flow control valve to deliver a certain amount of oxygen-containing gas and hydrogen-containing gas to the processing region to expose the one or more tungsten-containing layers to a post-etching treatment process, the post-etching treatment process including: exposing the tungsten-containing layer to a hydrogen and oxygen plasma treatment process by generating an inductively coupled plasma containing oxygen-containing gas and hydrogen-containing gas.

[0012] In another aspect, a non-transitory computer-readable medium having instructions stored thereon, which when executed by a processor, cause a process to perform the operations of the apparatus and / or method described above. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] A more particular description of the various aspects briefly summarized above may be obtained with reference to the embodiments, so that the above-mentioned features of the present disclosure can be understood in detail, some of which are illustrated in the accompanying drawings. It should be noted, however, that the drawings illustrate only typical embodiments of the present disclosure and are therefore not to be considered limiting of the scope of the present disclosure, as the present disclosure may admit to other equally effective embodiments.

[0014] Figure 1 A flow chart of a method for manufacturing a semiconductor device according to one or more embodiments of the present disclosure is shown.

[0015] Figures 2A to 2F Illustrated are views of various stages in fabricating a semiconductor device according to one or more embodiments of the present disclosure.

[0016] Figure 3 A schematic top view of one example of a multi-chamber processing tool according to one or more embodiments of the present disclosure is shown.

[0017] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation. DETAILED DESCRIPTION

[0018] In the above summary and in the following detailed description and claims and drawings, reference is made to specific features (including method operations) of the present disclosure. It should be understood that the disclosure in this specification includes all possible combinations of these specific features. For example, where a specific feature is disclosed in the context of a particular aspect or embodiment of the present disclosure or a particular claim, the feature can generally also be used in combination with and / or in the context of other specific aspects of the present disclosure or of the present disclosure to the extent possible.

[0019] As used herein, the term "comprising" and its equivalents indicate the optional presence of other components, ingredients, operations, etc. For example, an article "comprising" (or "including") components A, B, and C may consist of (i.e., only contain) components A, B, and C, or may contain not only components A, B, and C but also one or more other components.

[0020] When this document refers to a method that includes two or more defined operations, the defined operations may be performed in any order or simultaneously (unless the context excludes such a possibility), and the method may include one or more other operations that are performed before any defined operation, between two defined operations, or after all defined operations (unless the context excludes such a possibility).

[0021] At earlier nodes, larger dimensions made tungsten (W) fill possible, which used nucleation followed by conformal CVD deposition. However, as the critical dimensions of features continue to shrink, the tops of ultra-small features can easily overhang, so conformal processes that grow films uniformly across the field area or surface close or pinch off the opening before fill is complete, leaving voids in the tungsten gapfill. Even without voids, a center seam is a typical result of conformal deposition because the tungsten gapfill grows from the sidewalls. Tungsten gapfill can also be adversely affected by impurities. For example, fluorine-terminated (F-terminated) impurities are present on the surface of a tungsten liner or seed layer present in the feature. Other impurities such as boron, nitrogen, and tungsten oxide can also adversely affect tungsten gapfill. One way to achieve good gapfill is by coating the contaminated tungsten surface with a nucleation layer (e.g., a boron-tungsten nucleation layer) to hide the damage. However, the presence of boron in the nucleation layer can increase resistivity loss due to the high boron level in the nucleation layer.

[0022] Various embodiments provide improved tungsten gap fill in features with reduced critical dimensions. In various embodiments, this can be achieved by performing a chemical vapor transport (CVT) process. This CVT process cleans or restores the tungsten surface by reducing tungsten oxide to tungsten while also reducing impurities (e.g., boron, fluorine, and nitrogen) that may be present on the tungsten surface to achieve good gap fill. In addition, various embodiments can be used to reopen or expand feature openings that have reduced critical dimensions due to the presence of previously deposited layers (e.g., barrier layers, liner layers, and / or adhesion layers that overhang the feature opening).

[0023] Various embodiments utilize hydrogen and oxygen plasma treatment to restore the tungsten surface, for example, via chemical vapor transport to reduce fluorine levels that show a significant increase after etching back. By this method, the tungsten surface is cleaned, for example, by reducing or removing contaminants such as boron, nitrogen and / or fluorine. The hydrogen and oxygen plasma treatment may include a saturated conformal treatment that includes a longer soak time and / or a high reactant treatment to demonstrate good gap filling. In various embodiments, the hydrogen and oxygen plasma treatment may be performed at a temperature below 400 degrees Celsius. In various embodiments, the hydrogen and oxygen plasma treatment includes H2% greater than or equal to 90% of the total flow of hydrogen and oxygen. During the plasma treatment process, tungsten may be oxidized to form a volatile compound WO2(OH)2, which is immediately reduced back to tungsten. By this mechanism, the surface of tungsten can be restored and good gap filling can be achieved without sacrificing resistance. Therefore, in some embodiments, not only good gap filling is achieved, but also impurities are reduced because the tungsten surface is restored by the CVT mechanism.

[0024] Figure 1A flow chart of a method 100 for fabricating a semiconductor device according to one or more embodiments of the present disclosure is shown. The method 100 may be used to fill various features, such as trenches or vias, with a gap-fill metal, such as tungsten.

[0025] At operation 110, a substrate is provided. The substrate may be a device substrate or a semiconductor substrate as described herein. The substrate may include a plurality of layers. The substrate has one or more features formed therein. The one or more features may include a sidewall surface and a bottom surface. The sidewall surface may be defined by a dielectric material, and the bottom surface may be defined by a dielectric material or other material, such as a silicide layer, a metal silicide layer, a semiconductor layer, or a metal layer.

[0026] At operation 120, a liner layer is formed over the surface of one or more features. The liner layer may be a tungsten layer or a tungsten-containing layer. The liner layer may be formed over the sidewall surfaces and bottom surface of the one or more features and over the field region of the substrate. The liner layer may be a seed layer and / or an adhesion layer. The liner layer may be a conformal layer. The liner layer may be deposited using any suitable liner deposition process. In one example, a physical vapor deposition (PVD) process is used to deposit the liner layer. The liner layer may create an overhang in the field region that obstructs or blocks the top opening of the one or more features.

[0027] At operation 130, a nucleation layer may be formed over the liner layer. The nucleation layer may be used to repair any damage or discontinuity in the liner layer. The nucleation layer may be a boron-tungsten nucleation layer or a tungsten-containing nucleation layer. The nucleation layer may be deposited using any suitable deposition process. In some embodiments, the nucleation layer is deposited using an atomic layer deposition (ALD) process. In one example, one cycle of the ALD process includes a boron pulse / boron purge / tungsten pulse / tungsten purge. The ALD process may be repeated for any number of cycles sufficient to deposit a nucleation layer of a target thickness. In one example, the ALD cycle is repeated for 3 to 5 cycles. The nucleation layer may also contribute to the thickness of the overhang (if any) formed by the liner layer during operation 120.

[0028] At operation 140, the liner layer and the nucleation layer (e.g., together a tungsten-containing layer or a first tungsten layer) are exposed to a gradient oxidation and etch-back process. The gradient oxidation process oxidizes the portion of the tungsten-containing layer to be removed, and the etch-back process selectively removes the oxidized portion. The gradient oxidation and etch-back process can reduce the thickness of the overhanging portion that blocks the opening of one or more features or eliminate the overhanging portion. The thickness of the tungsten-containing layer formed above the field region can be reduced at a greater rate than the thickness of the tungsten-containing layer formed above the sidewall surface and the bottom surface of the feature. The gradient oxidation and etch-back process can selectively reduce the thickness of the tungsten-containing layer formed above the sidewall surface of the feature. The thickness of the tungsten-containing layer formed above the sidewall surface can be reduced at a greater rate than the thickness of the tungsten-containing layer formed above the bottom surface. The tungsten-containing layer can be reduced from an initial thickness to a reduced thickness. The gradient oxidation process can selectively oxidize the tungsten-containing layer formed on the sidewall surface and the field region of the substrate. The gradient oxidation process may include exposing one or more tungsten-containing layers to a plasma oxidation process to oxidize portions of the tungsten-containing layer. The etch-back process may include exposing the tungsten-containing layer to an etchant process to remove the oxidized portion of the tungsten-containing layer. The gradient oxidation process and the etch-back process may be cyclic processes. For example, one cycle may include a gradient oxidation process followed by an etch-back process. The gradient oxidation and etch-back process may be repeated for a number of cycles sufficient to reduce the thickness of the one or more tungsten-containing layers from an initial thickness to a target reduced thickness. For example, the gradient oxidation and etch-back process may be repeated for two to four cycles, such as two cycles.

[0029] At operation 150, after the gradient oxidation and etch-back process of operation 140, the tungsten-containing layer is exposed to a post-etching treatment process. During the post-etching treatment process, the exposed surface of the tungsten-containing layer may be oxidized to form tungsten oxide (e.g., WO2). This tungsten oxide may interfere with a subsequently performed tungsten gap fill process. The post-etching treatment process reduces the tungsten oxide to tungsten. In addition, the post-etching treatment process cleans or restores the tungsten surface, for example, by reducing or removing contaminants such as fluorine, boron, and / or nitrogen that may be present on the tungsten surface. The post-etching treatment process may include a chemical vapor transport (CVT) process. The CVT process may restore or clean the surface of the tungsten-containing layer to achieve good gap fill while maintaining or improving the resistivity of the formed device. In one example, the CVT process includes a volatilization process and a reduction process. The volatilization process may be performed via the following reaction (I):

[0030] (I) WO2+2H2O→WO2(OH)2+H2

[0031] The reduction process can be carried out via the following reaction:

[0032] (II) WO2(OH)2+3H2→W+4H2O

[0033] In some embodiments, the post-etch treatment process may include exposing the tungsten-containing layer to a plasma treatment process. In some embodiments, the plasma treatment process may include exposing the tungsten-containing layer to a hydrogen and oxygen plasma treatment. The hydrogen and oxygen plasma treatment may include a saturated conformal treatment, which includes a longer soak time and / or a high reactant treatment to demonstrate good gap filling. In some embodiments, the hydrogen and oxygen plasma treatment is performed at a temperature below 400 degrees Celsius. In various embodiments, the hydrogen and oxygen plasma treatment includes H2% greater than or equal to 90% of the total flow of hydrogen and oxygen. In some embodiments, the hydrogen and oxygen plasma treatment is an inductively coupled plasma process. In alternative embodiments, the hydrogen and oxygen plasma treatment is a capacitively coupled plasma process. In other embodiments, the hydrogen and oxygen plasma is formed in a remote plasma source (RPS). In other embodiments, the plasma is generated in the processing chamber (direct plasma).

[0034] In some embodiments, the treated tungsten is oxidized and forms a volatile compound WO2(OH)2, which is immediately reduced back to tungsten. Through this mechanism, the surface of the tungsten can be restored and good gap fill can be achieved without sacrificing resistance. Therefore, not only is good gap fill achieved, but impurities are also reduced because the tungsten surface is restored through the CVT mechanism.

[0035] At operation 160, one or more features are filled with a second tungsten layer. The second tungsten layer may be a tungsten gap fill layer. The tungsten gap fill layer may be deposited using any suitable tungsten deposition process. The second tungsten layer may be deposited via a chemical vapor deposition (CVD) gap fill process. The second tungsten layer may partially or completely fill the one or more features. The clean surface of the tungsten-containing layer allows for good gap fill of the second tungsten layer.

[0036] refer to Figures 2A to 2F , cross-sectional views of some embodiments of device structures of semiconductor devices at different stages of fabrication are provided to illustrate Figure 1 Although the method 100 is described Figures 2A to 2F , but it should be understood that Figures 2A to 2F The structure disclosed in is not limited to the method 100, but can exist independently as a structure independent of the method 100. Figures 2A to 2F The method 100 is described, but it should be understood that the method 100 is not limited to Figures 2A to 2F The structure revealed in Figures 2A to 2F The structure revealed in .

[0037] Figures 2A to 2F Illustrated are views of various stages in fabricating a semiconductor device according to one or more embodiments of the present disclosure.

[0038] Figure 2A A cross-sectional view of a semiconductor device structure 200 during an intermediate stage of fabrication corresponding to operation 110 is shown according to some embodiments. The semiconductor device structure 200 includes a device substrate 210 having a dielectric layer 220 formed thereon. The device substrate 210 may be or include a bulk semiconductor substrate, a semiconductor-on-insulator (SOI) substrate, or a similar substrate, which may be doped (e.g., with a p-type dopant or an n-type dopant) or undoped. In some embodiments, the semiconductor material of the device substrate 210 may include: an elemental semiconductor, such as silicon (Si) or germanium (Ge); a compound semiconductor, such as silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, and / or indium antimonide; an alloy semiconductor, such as SiGe, GaAsP, AlInAs, GaInAs, GaInP, and / or GaInAsP; combinations thereof or the like. The device substrate 210 may include additional materials, such as a silicide layer, a metal silicide layer, a metal layer, a dielectric layer, or a combination thereof.

[0039] The device substrate 210 may further include integrated circuit devices (not shown). As will be appreciated by those skilled in the art, a variety of integrated circuit devices such as transistors, diodes, capacitors, resistors, etc. or combinations thereof may be formed in and / or on the device substrate 210 to produce the structural and functional requirements of the final semiconductor device structure 200 design.

[0040] The device substrate 210 has a front side 210f (also referred to as a front surface) and a back side 210b (also referred to as a back surface) opposite the front side 210f. A dielectric layer 220 is formed on the front side 210f of the device substrate 210. The dielectric layer 220 may include a plurality of layers. The dielectric layer 220 includes an upper surface or field region 220u. In some embodiments, the dielectric layer 220 includes silicon oxide, silicon oxynitride, silicon nitride, or a combination thereof. In some embodiments, the dielectric layer 220 is primarily composed of silicon oxide. It should be noted that the foregoing descriptors (e.g., silicon oxide) should not be interpreted as revealing any particular stoichiometric ratio. Therefore, "silicon oxide" and the like will be understood by those skilled in the art as a material consisting essentially of silicon and oxygen without revealing any particular stoichiometric ratio.

[0041] The dielectric layer 220 is patterned to form one or more features 222. In some embodiments, the features 222 may be selected from trenches, vias, holes, or combinations thereof. In a particular embodiment, the features 222 are vias. In some embodiments, the features 222 extend from the field region 220u of the dielectric layer 220 to the front surface 210f of the device substrate 210. The features 222 include sidewall surfaces 222s and a bottom surface 222b extending between the sidewall surfaces 222s. In some embodiments, the sidewall surfaces 222s are tapered. The sidewall surfaces 222s may be defined by the dielectric layer 220, and the bottom surface may be defined by the device substrate 210. In some embodiments, the sidewall surfaces 222s may be defined by the dielectric layer 220 and the bottom surface may also be defined by the dielectric layer 220. The features 222 have a first depth "D1" from the field region 220u to the bottom surface 222b and a width "W1" between the two sidewall surfaces 222s. In some embodiments, depth D1 is in a range of 2 nm to 200 nm, 3 nm to 200 nm, 5 nm to 100 nm, 2 nm to 100 nm, or 50 nm to 100 nm. In some embodiments, width W1 is in a range of 10 nm to 100 nm, 10 nm to 20 nm, 10 nm to 50 nm, or 50 nm to 100 nm. In some embodiments, feature 222 has a depth to width ratio (D / W) in a range of 1 to 20, 5 to 20, 10 to 20, or 15 to 20.

[0042] Figure 2B A cross-sectional view of a semiconductor device structure 200 during an intermediate stage of fabrication corresponding to operation 120 is shown according to some embodiments. At operation 120, a liner layer, such as liner layer 230, is formed over a surface of feature 222. Liner layer 230 may serve as a barrier layer and / or an adhesion layer. Liner layer 230 may be a tungsten liner layer. Liner layer 230 may be formed by an ALD process or a PVD process 232. Liner layer 230 may be formed over sidewall surfaces 222s and bottom surface 222b of feature 222 and on field region 220u of dielectric layer 220. Liner layer 230 may be a conformal layer. The initial thickness of liner layer 230 may be in a range of about 1 angstrom to about 100 angstroms, for example, in a range of about 20 angstroms to about 50 angstroms. In some embodiments, liner layer 230 may be discontinuous along, for example, sidewall surfaces 222s and / or bottom surface 222b. The liner layer 230 may be deposited using any suitable tungsten deposition process. In one example, the liner layer 230 is deposited using a PVD process. The liner layer 230 may create an overhang 234 in the field region 220u that obstructs or blocks the top opening of the feature 222. Figure 2B As shown, the overhang portion 234 reduces the width of the top opening from W1 to W2.

[0043] Figure 2C A cross-sectional view of a semiconductor device structure 200 during an intermediate stage of fabrication corresponding to operation 130 is shown in accordance with some embodiments. At operation 130, a nucleation layer, such as nucleation layer 240, is formed over a surface of feature 222, such as over a surface of liner layer 230. Nucleation layer 240 may serve as a seed layer for subsequent deposition of a tungsten gap fill material. Additionally, in some embodiments where a previously deposited liner layer 230 is discontinuous (e.g., discontinuous along sidewall surface 222s), nucleation layer 240 may repair the discontinuous portion of liner layer 230. Nucleation layer 240 may be a tungsten-containing layer, such as a boron-tungsten nucleation layer. Nucleation layer 240 may be a conformal layer. Nucleation layer 240 may be deposited using any suitable nucleation layer deposition process 242. In some embodiments, nucleation layer 240 is deposited using an ALD process. In other embodiments, a PVD process may be used. In alternative embodiments, a low temperature and low pressure CVD process may be used. As Figure 2C As shown, the liner layer 230 and the nucleation layer 240 may be individually or collectively referred to as a tungsten-containing layer 246 .

[0044] In some embodiments, forming the nucleation layer 240 includes exposing the semiconductor device structure 200 to a tungsten-containing precursor gas at a first precursor gas flow rate. In some embodiments, forming the nucleation layer 240 includes exposing the semiconductor device structure 200 to a reducing agent. In some embodiments, the reducing agent includes boron and is introduced into the processing region at a reducing agent flow rate. In some embodiments, the tungsten-containing precursor gas and the reducing agent are cycled alternately at the reducing agent flow rate to form the nucleation layer 240 on the semiconductor device structure 200 within the feature 222. In some embodiments, the reducing agent and the tungsten-containing precursor gas are cycled alternately, starting with the reducing agent or the tungsten-containing precursor gas, and ending with the same starting gas or ending with a gas different from the starting gas. In some embodiments, the reducing agent or the tungsten-containing precursor gas are cycled alternately, starting with the tungsten-containing precursor gas and ending with the reducing agent.

[0045] In some embodiments, the nucleation layer 240 is deposited using an ALD process. The ALD process includes alternating exposure of the feature 222 to a tungsten-containing precursor and exposing the feature 222 to a reductant. In some embodiments, the processing area is purged between alternating exposures. In some embodiments, the processing area is continuously purged. Examples of suitable tungsten-containing precursors include tungsten halides, such as tungsten hexafluoride (WF6), tungsten hexachloride (WCl6), or a combination thereof. In some embodiments, the tungsten-containing precursor includes WF6, and the reductant includes a boron-containing reagent, such as B2H6. In some embodiments, the tungsten-containing precursor includes an organometallic precursor and / or a fluorine-free precursor, such as MDNOW (methylcyclopentadienyl-dicarbonylnitrosyl-tungsten), EDNOW (ethylcyclopentadienyl-dicarbonylnitrosyl-tungsten), hexacarbonyl tungsten (W(CO)6), or a combination thereof.

[0046] In some embodiments, during the nucleation layer deposition process 242, the processing region is maintained at a pressure of less than about 120 Torr, such as in a range of about 900 mTorr to about 120 Torr, in a range of about 1 Torr to about 100 Torr, or, for example, in a range from about 1 Torr to about 50 Torr. Exposing the substrate 400 to the tungsten-containing precursor includes flowing the tungsten-containing precursor into the processing region at a flow rate of about 100 sccm or less, such as in a range of about 10 sccm to about 60 sccm, or in a range of about 20 sccm to about 80 sccm. Exposing the semiconductor device structure 200 to the reducing agent includes flowing the reducing agent into the processing region at a flow rate of about 200 sccm to about 1000 sccm, such as between about 300 sccm and about 750 sccm. It should be noted that the flow rates of the various deposition and processing processes described herein are for a processing system configured to process a 300 mm diameter substrate. Appropriate scaling can be used for processing systems configured to process substrates of different sizes.

[0047] In some embodiments, the tungsten-containing precursor and the reducing agent are each flowed into the processing region for a duration in the range of about 0.1 seconds to about 10 seconds, such as a duration in the range of about 0.5 seconds to about 5 seconds. The processing region may be purged between alternating exposures by flowing a purge gas, such as argon (Ar) or hydrogen, into the processing region for a duration in the range of about 0.1 seconds to about 10 seconds, such as a duration in the range of from about 0.5 seconds to about 5 seconds. Typically, repeated cycles of the nucleation process are continued until the thickness of the nucleation layer 240 is in the range of about 10 angstroms to about 200 angstroms, such as in the range of about 10 angstroms to about 150 angstroms, or in the range of about 20 angstroms to about 150 angstroms. In one example, the ALD cycle is repeated for 3 to 5 cycles. The nucleation layer 240 is disposed along the sidewall surface 222s and / or the bottom surface 222b of the feature 222, such as above the liner layer 230. The nucleation layer 240 may also contribute to the thickness of the overhang portion 234 formed by the liner layer during operation 120.

[0048] Figure 2DA cross-sectional view of a semiconductor device structure 200 during an intermediate stage of fabrication corresponding to operation 140 is shown according to some embodiments. At operation 140, the semiconductor device structure 200 is exposed to a gradient oxidation and etch-back process 252. The gradient oxidation process oxidizes exposed portions of the liner layer 230 and the nucleation layer 240 (if present) to be removed, and the etch-back process selectively removes the oxidized portions. The gradient oxidation process may preferentially oxidize the overhanging portion 234, which obstructs or blocks the opening of the feature 222. The gradient oxidation and etch-back process 252 may reduce the thickness of the overhanging portion 234 that obstructs the opening of the feature 222 or eliminate the overhanging portion 234. The thickness of the layer formed over the field region 220u may decrease at a greater rate than the thickness of the layer formed over the sidewall surface 222s and / or the bottom surface 222b. The gradient oxidation and etch-back process 252 may selectively reduce the thickness of the layer formed over the sidewall surface 222s of the substrate. The thickness of the layer formed on the sidewall surface 222s can be reduced at a greater rate than the thickness of the layer formed on the bottom surface 222b. The tungsten-containing layer 246 can be reduced from an initial thickness to a reduced thickness. The gradient oxidation process can selectively oxidize the layer formed on the sidewall surface 222s and the field region 220u of the dielectric layer 220. The gradient oxidation process may include exposing the tungsten-containing layer 246 to a plasma oxidation process to selectively oxidize a portion of the layer. In some embodiments, the gradient oxidation process also includes a plasma reduction process performed before the plasma oxidation process. The etch-back process may include exposing the layer to an etchant process to selectively remove the oxidized portion of the tungsten-containing layer 246. The gradient oxidation process and the etch-back process may be cyclic processes. For example, one cycle may include a gradient oxidation process and an etch-back process thereafter. The gradient oxidation and etch-back processes may be repeated for a number of cycles sufficient to reduce the thickness of the layer from the initial thickness to the target reduced thickness. For example, the gradient oxidation and etch-back processes may be repeated for two to four cycles, such as two cycles.

[0049] In some embodiments, the gradient oxidation process includes using an O2 inductively coupled plasma (ICP) that includes a limited gas flow to produce an oxygen-deficient reaction mode on an exposed metal layer (e.g., a tungsten layer). The O2 ICP provides a low-power O2 plasma with a high ion / radical ratio that enhances field oxidation and kills reactive species before reaching the tungsten-containing layer 246 above the bottom surface 222b. In this mode, the field region 220u is oxidized or more heavily oxidized, which allows the oxidized region to be preferentially etched, leaving a tungsten layer along the sidewall surface 222s and the bottom surface 222b of the feature 222. Therefore, in the tungsten gap fill process performed in the subsequent operation 160, a high-quality bottom seed and sidewall seed are formed by performing a gradient oxidation and an oxidized metal removal sequence, so that a gap fill process can then be performed on the bottom seed layer and the sidewall seed layer. The remaining layer on the sidewall surface 222s and the bottom surface 222b also serves as a protective layer for any underlying structure present during the process.

[0050] In some embodiments, the gradient oxidation process and the etch back (e.g., oxide removal process) can be performed in two processing chambers. In other embodiments, the gradient oxidation and etch back process 252 can be performed in the same chamber, such as an ICP reactor, which enables multi-cycle capabilities with high wafer throughput advantages. In addition, the gradient oxidation and etch back process 252 can overcome the challenges of seams and voids during subsequent metal gap fill by removing the field metal while maintaining the formation of metal seeds along the sidewall surface 222s and the bottom surface 222b of the feature 222. Therefore, a seamless tungsten gap fill can be achieved.

[0051] In some embodiments, the gradient oxidation process includes a reduction process, and a subsequent oxidation process. In some embodiments, the gradient oxidation process includes an oxidation process without a reduction process. The reduction process includes exposing the substrate to a reducing gas, such as hydrogen. The oxidation process includes exposing the substrate to an oxidizing gas, such as oxygen. In some embodiments, during the reduction process, the processing area is maintained at a pressure of less than about 120mTorr, such as in a range of about 50mTorr to about 110mTorr, in a range of about 60mTorr to about 100mTorr, or, for example, in a range from about 70mTorr to about 90mTorr. Exposing the semiconductor device structure 200 to the reducing gas includes causing the reducing gas to flow into the processing area at a flow rate of about 200sccm or less, such as in a range from about 100sccm to about 170sccm, or in a range from about 120sccm to about 80sccm. Exposing the semiconductor device structure 200 to the reducing agent may further include flowing a carrier gas (e.g., an inert gas such as argon) into the processing region at a flow rate of about 300 sccm or less, such as in a range of about 100 sccm to about 200 sccm, or in a range of about 120 sccm to about 150 sccm. During the reduction process, the temperature of the semiconductor device structure 200 may be maintained at about 450 degrees Celsius or less, such as in a range of about 200 degrees Celsius to about 450 degrees Celsius, in a range of about 250 degrees Celsius to about 400 degrees Celsius, or, for example, in a range from about 300 degrees Celsius to about 350 degrees Celsius. During the reduction process, an ICP plasma power of 2000 watts or less may be used, such as in a range of about 500 watts to 1500 watts, or, for example, in a range of about 850 watts to about 1000 watts. The reduction process may be performed for a period of 60 seconds or less, such as in a range of about 10 seconds to about 40 seconds, or such as in a range of about 10 seconds to about 30 seconds.

[0052] In some embodiments, during the oxidation process, the processing region is maintained at a pressure of less than about 10 mTorr, such as in a range of about 1 mTorr to about 5 mTorr, or, for example, in a range of about 1 mTorr to about 2 mTorr. Exposing the semiconductor device structure 200 to the oxidizing gas includes flowing the oxidizing gas into the processing region at a flow rate of about 20 sccm or less, such as in a range from about 1 sccm to about 10 sccm, or in a range from about 1 sccm to about 5 sccm. Exposing the semiconductor device structure 200 to the reducing agent may further include flowing a carrier gas (e.g., an inert gas such as argon) into the processing region at a flow rate of about 100 sccm or less, such as in a range of about 50 sccm to about 100 sccm, or in a range of about 50 sccm to about 100 sccm. During the oxidation process, the temperature of the semiconductor device structure 200 may be maintained at about 450 degrees Celsius or less, such as in a range of about 200 degrees Celsius to about 450 degrees Celsius, in a range of about 250 degrees Celsius to about 400 degrees Celsius, or such as in a range from about 300 degrees Celsius to about 350 degrees Celsius. During the oxidation process, the ICP plasma power is 300 watts or less, such as in a range of about 100 watts to 300 watts, or such as in a range of about 180 watts to about 210 watts. The oxidation process may be performed for a period of 60 seconds or less, such as in a range of about 10 seconds to about 40 seconds, or such as in a range of about 12 seconds to about 30 seconds.

[0053] In some embodiments, the reduction process is performed under processing conditions of a pressure in a range of about 70 mTorr to about 90 mTorr, an ICP power in a range of about 900 Watts to about 1200 Watts, an argon gas flow rate into the processing region in a range of about 250 sccm to about 300 sccm, a hydrogen gas flow rate into the processing region in a range of about 200 sccm to about 250 sccm, and a temperature in a range of about 300 degrees Celsius to about 400 degrees Celsius, for a time period of about 15 seconds to about 30 seconds.

[0054] In some embodiments, the oxidation process is performed under processing conditions of a pressure in a range of about 2 mTorr to about 7 mTorr, an ICP power in a range of about 210 Watts to about 350 Watts, an argon gas flow rate into the processing region in a range of about 900 sccm to about 1000 sccm, an oxygen gas flow rate into the processing region in a range of about 5 sccm to about 10 sccm, and a temperature in a range of about 300 degrees Celsius to about 400 degrees Celsius, for a time period of about 90 seconds to about 180 seconds.

[0055] In some embodiments, the etch-back process includes flowing an etching gas and an optional inert gas into the processing area. The etching gas may include Cl2, WF6, WOCl4, WCl5, WCl6, or a combination thereof. In a specific embodiment, the etching gas is WF6. In some embodiments, the processing conditions for performing the etch-back process are a pressure in the range of about 5 mTorr to about 20 mTorr, an ICP power in the range of about 300 watts to about 400 watts, an argon gas flow rate into the processing area in the range of about 450 sccm to about 500 sccm, a WF6 gas flow rate into the processing area in the range of about 5 sccm to about 10 sccm, a temperature in the range of about 300 degrees Celsius to about 400 degrees Celsius, and a time period of about 15 seconds to about 30 seconds.

[0056] The gradient oxidation process and the etch-back process of operation 140 may be repeated until the thickness of the tungsten-containing layer 246 (eg, the liner layer 230 and the nucleation layer 240 ) is reduced, such as Figure 2E As shown, or completely removed from the field region 220u of the dielectric layer 220.

[0057] Figure 2E A cross-sectional view of the semiconductor device structure 200 is shown during an intermediate stage of fabrication corresponding to operation 150, in accordance with some embodiments. At operation 150, the semiconductor device structure 200 is exposed to a post-etch treatment process 262.

[0058] During the post-etch treatment process 262, the exposed surface of the tungsten-containing layer 246 may be oxidized to form a metal oxide, such as tungsten oxide (e.g., WO2). This tungsten oxide may interfere with the tungsten gap fill process subsequently performed in operation 160. The post-etch treatment process 262 may reduce this tungsten oxide to tungsten. In addition, the post-etch treatment process 262 may clean or restore the tungsten surface, for example by reducing fluorine, boron and / or nitrogen contaminants 264 that may be present on the surface of the tungsten-containing layer 246. The post-etch treatment process 262 may include a chemical vapor transport (CVT) process. The CVT process may restore or clean the surface of the tungsten-containing layer 246 to achieve good gap fill while maintaining or improving the resistivity of the formed device. In some embodiments, the CVT process includes a volatilization process and a reduction process. The volatilization process may be performed via the following reaction (I):

[0059] (I) WO2+2H2O→WO2(OH)2+H2

[0060] The reduction process can be carried out via the following reaction:

[0061] (II) WO2(OH)2+3H2→W+4H2O

[0062] In some embodiments, the post-etch treatment process 262 may include exposing the tungsten-containing layer 246 to a plasma treatment process. In some embodiments, the plasma treatment process is an inductively coupled plasma process. In some embodiments, the plasma treatment process is a capacitively coupled plasma process. In some embodiments, the plasma treatment process is formed in a remote plasma source (RPS). In some embodiments, the plasma treatment process is generated in a treatment region (e.g., direct plasma). In some embodiments, the plasma treatment process may include exposing the tungsten-containing layer 246 to an ICP including a hydrogen-containing gas and an oxygen-containing gas. In some embodiments, the plasma treatment process may include exposing the tungsten-containing layer 246 to a plasma including one or more of H2, O2, Ar, or a combination thereof. In some embodiments, the plasma treatment process may include exposing the tungsten-containing layer to a hydrogen and oxygen plasma treatment. The hydrogen and oxygen plasma treatment may include a saturated conformal treatment including a longer soak time and / or a high reactant treatment to provide good gap fill in operation 160.

[0063] In some embodiments, the plasma treatment process is performed at a temperature of 400 degrees Celsius or less. In some embodiments, the plasma treatment process includes supplying a process gas containing H2% greater than or equal to 90% of a total flow of hydrogen and oxygen.

[0064] In some embodiments, during the post-etch treatment process 262, the processing region is maintained at a pressure of less than about 120 mTorr, such as in a range of about 50 mTorr to about 110 mTorr, in a range of about 60 mTorr to about 100 mTorr, or, for example, in a range from about 70 mTorr to about 90 mTorr. In some embodiments, the post-etch treatment process 262 includes flowing hydrogen gas into the processing region at a flow rate of about 300 sccm or less, such as in a range of about 100 sccm to about 250 sccm, or in a range from about 150 sccm to about 200 sccm. In some embodiments, the post-etch treatment process 262 further includes flowing oxygen gas into the processing region at a flow rate of about 30 sccm or less, such as in a range from about 10 sccm to about 25 sccm, or in a range from about 15 sccm to about 20 sccm. During the post-etch treatment process 262, the temperature of the semiconductor device structure 200 may be maintained in a range of about 400 degrees Celsius or less, such as in a range of about 200 degrees Celsius to about 400 degrees Celsius, or in a range of about 250 degrees Celsius to about 400 degrees Celsius, or such as in a range from about 300 degrees Celsius to about 350 degrees Celsius. During the post-etch treatment process 262, the ICP plasma power is 2000 watts or less, such as in a range of about 500 watts to 1500 watts, or such as in a range of about 850 watts to about 1000 watts. The post-etch treatment process 262 may be performed for a period of 60 seconds or less, such as in a range of about 10 seconds to about 40 seconds, or such as in a range of about 15 seconds to about 30 seconds.

[0065] During the post-etch treatment process 262, tungsten is oxidized and forms a volatile compound WO2(OH)2, which is immediately reduced back to tungsten. In addition, surface contaminants such as fluorine, nitrogen and / or boron can be removed. Through these mechanisms, the surface of the tungsten can be restored and good gap fill can be achieved without sacrificing resistance. Therefore, not only is good gap fill achieved, but impurities are also reduced because the tungsten surface is restored through the CVT mechanism.

[0066] In other embodiments, the post-etch treatment process 262 includes a thermal treatment process. The thermal treatment process may include exposing the semiconductor device structure 200 to a gas including H2 and H2O.

[0067] In some embodiments, the post-etch treatment process of operation 150 is performed in the same processing chamber as the gradient oxidation and etch-back of operation 140 without breaking vacuum.

[0068] Figure 2FA cross-sectional view of semiconductor device structure 200 is shown during an intermediate stage of fabrication corresponding to operation 160 , in accordance with some embodiments. At operation 160 , tungsten gapfill material 274 is optionally at least partially deposited into feature 222 via tungsten gapfill process 272 .

[0069] In some embodiments, the tungsten gap fill material 274 is formed using a chemical vapor deposition (CVD) process that includes simultaneously flowing (co-flowing) a tungsten-containing precursor gas and a reducing agent into a processing region and exposing the semiconductor device structure 200. The tungsten-containing precursor and reducing agent used in the tungsten gap fill CVD process can include any combination of tungsten-containing precursors and reducing agents described herein. In some embodiments, the tungsten-containing precursor includes WF6, and the reducing agent includes hydrogen. In some embodiments, the tungsten gap fill material 274 partially fills the feature 222.

[0070] In some embodiments, the tungsten-containing precursor flows into the processing region at a flow rate of about 10 sccm to about 1200 sccm, or greater than about 50 sccm, or less than about 1000 sccm, or in a range of about 100 sccm to about 900 sccm. The reducing agent flows into the processing region at a flow rate greater than about 500 sccm, such as greater than about 750 sccm, greater than about 1000 sccm, or in a range of about 500 sccm to about 10000 sccm, such as in a range from about 1000 sccm to about 9000 sccm, or in a range from about 1000 sccm to about 8000 sccm.

[0071] In some embodiments, the tungsten gapfill CVD process conditions are selected to provide a tungsten feature with relatively low residual film stress compared to a conventional tungsten CVD process. For example, in some embodiments, the tungsten gapfill CVD process includes heating the substrate to a temperature of about 250° C. or higher, such as about 300° C. or higher, or in a range of about 250° C. to about 500° C., or in a range of about 300° C. to about 500° C. During the CVD process, the pressure of the processing region can be maintained at less than about 500 Torr, less than about 600 Torr, less than about 500 Torr, less than about 400 Torr, or in a range of about 1 Torr to about 500 Torr, such as in a range of about 1 Torr to about 450 Torr, or in a range of about 1 Torr to about 400 Torr, or in a range of about 1 Torr to about 300 Torr.

[0072] In another embodiment, the tungsten gapfill material 274 is deposited using an atomic layer deposition (ALD) process at operation 160. The tungsten gapfill ALD process includes repeated cycles of alternatingly exposing the semiconductor device structure 200 to a tungsten-containing precursor gas and a reducing agent and purging the process region between alternating exposures.

[0073] The tungsten-containing precursor and the reducing agent are each flowed into the processing region for a duration between about 0.1 seconds and about 10 seconds, such as a duration between about 0.5 seconds and about 5 seconds. The processing region can be purged between alternating exposures by flowing an inert purge gas, such as argon (Ar) or hydrogen, into the processing region for a duration in the range of about 0.1 seconds to about 10 seconds, such as in the range of from about 0.5 seconds to about 5 seconds.

[0074] In other embodiments, the tungsten gapfill material 274 is deposited using a pulsed CVD method that includes repeated cycles of alternating exposure of the semiconductor device structure 200 to a tungsten-containing precursor gas and a reducing gas without purging the process region. The processing conditions for the tungsten gapfill pulsed CVD method can be the same, substantially the same, or within the same range as those described above for the tungsten gapfill ALD process.

[0075] In some embodiments, Figure 2F As shown, the liner layer 230, the nucleation layer 240, and the tungsten gap fill material 274 are monolithic and have no interface therebetween. The tungsten gap fill material 274, the liner layer 230, and the nucleation layer 240 together form a tungsten-containing layer.

[0076] In a typical semiconductor manufacturing approach, a chemical mechanical polishing (CMP) process may be used to remove an overburden of tungsten material (and a barrier layer disposed thereunder) from the field region 220 u of the semiconductor device structure 200 after depositing the tungsten gapfill material 274 into the feature 222 .

[0077] Examples of processing systems that may be suitably modified in light of the teachings provided herein include integrated processing systems or other suitable processing systems available from Applied Materials, Inc. located in Santa Clara, Calif. It is contemplated that other processing systems, including those from other manufacturers, may be adapted to benefit from the aspects described herein. Figure 3 1 shows a schematic top view of an example multi-chamber processing system 300 or cluster tool that can be used to perform gradient oxidation and etching of PVD metals, and subsequent post-etch treatment processes, according to an embodiment of the present disclosure. Figure 3As shown, a plurality of processing chambers 302 are coupled to a first transfer chamber 304. The first transfer chamber 304 is also coupled to a first pair of pass-through chambers 306. The first transfer chamber 304 has a centrally disposed transfer robot (not shown) for transferring substrates between the pass-through chamber 306 and the processing chamber 302. The pass-through chamber 306 is coupled to a second transfer chamber 310, which is coupled to a processing chamber 314 configured to perform a pre-cleaning process and a processing chamber 316 configured to perform an epitaxial (or alternatively, PVD deposition) process. The second transfer chamber 310 has a centrally disposed transfer robot (not shown) for transferring substrates between a set of load lock chambers 312 and the processing chambers 314 or the processing chambers 316. The factory interface 320 is connected to the second transfer chamber 310 through the load lock chamber 312. The factory interface 320 is coupled to one or more bays 330 on the side opposite the load lock chamber 312. The bays 330 are typically front opening pods (FOUPs) accessible from a clean room.

[0078] Prior to various operations, the substrate may first be transferred to a processing chamber 314 where a pre-cleaning process is performed to remove contaminants, such as carbon or oxide contaminants, from exposed surfaces of source / drain regions of transistors of the substrate.

[0079] The substrate is then transferred to one or more processing chambers 302. In some embodiments, the processing chamber 302 can etch a through hole or a trench in the substrate. In some embodiments, the substrate is provided to an etching chamber to perform a trench formation process, and the etching chamber is not part of a processing system that includes the processing chambers 314, 316 and the one or more processing chambers 302. In other operations, the substrate has a trench formed therein. Once the trench is formed in the dielectric material, the substrate is transferred to the processing chamber 314 for cleaning.

[0080] The substrate is then transferred to at least one of the processing chambers 316 and / or the processing chambers 302, where an operation is performed. For example, the substrate is transferred to at least one of the processing chambers 302, where a metal deposition operation is performed to form a seed layer. The metal may be deposited in any suitable chamber, such as PVD, atomic layer deposition (ALD), epitaxy (EPI), or other suitable chamber.

[0081] The substrate may be transferred to one of the processing chambers 302, where a gradient oxidation operation may be performed. The gradient oxidation may be performed in an inductively coupled plasma (ICP) reactor or other suitable plasma processing chamber. The gradient oxidation operation is configured to oxidize unwanted portions of a metal layer formed on the substrate.

[0082] The substrate may be transferred to one of the processing chambers 302, where an etching operation is performed to selectively remove the oxidized portion of the deposited metal layer. For example, the etching operation may be performed in an etching chamber. Alternatively, the etching operation may be performed in an ICP reactor that performs a gradient oxidation.

[0083] After the etching operation, the substrate can be transferred to one of the processing chambers 302, where a post-etch treatment process is performed to reduce the tungsten oxide to tungsten and optionally remove contaminants from the tungsten surface. For example, the post-etch treatment process can be performed in an ICP reactor that performs gradient oxidation and etch back. The post-etch treatment process can be a CVT process, for example, a hydrogen and oxygen treatment process as described herein.

[0084] After the post-etch treatment process, a portion of the deposited metal layer (e.g., seed material) will remain along the sidewall surfaces and bottom surface of the feature or trench. The substrate can then be transferred to one of the processing chambers 302 or 316, where a gap fill operation is performed. The gap fill operation can be performed in a CVD, ALD, or other suitable chamber. For example, the processing chamber 302 or 316 can deposit a metal such as tungsten or other suitable material that grows from the seed layer at the bottom of the trench or feature to form a portion of a microelectronic device.

[0085] The system controller 380 is coupled to the processing system 300 for controlling the processing system 300 or components thereof. For example, the system controller 380 may control the operation of the processing system 300 using direct control of the processing chambers 302, 304, 306, 310, 312, 314, 316, 320, 330 of the processing system 300, or by controlling controllers associated with the processing chambers 302, 304, 306, 310, 312, 314, 316, 320, 330, 360. In operation, the system controller 380 enables data and feedback to be collected from the various chambers to coordinate the performance of the processing system 300.

[0086] The system controller 380 typically includes a central processing unit (CPU) 382, ​​a memory 384, and a support circuit 386. The CPU 382 may be one of any form of general purpose processor that may be used in an industrial environment. The memory 384, a non-transitory computer readable medium or a machine readable storage medium may be accessed by the CPU 382 and may be one or more memories, such as a random access memory (RAM), a read-only memory (ROM), a floppy disk, a hard disk, or any other form of digital storage located locally or remotely. The support circuit 386 is coupled to the CPU 382 and may include caches, clock circuits, input / output subsystems, power supplies, and the like. The various embodiments disclosed in the present disclosure may typically be implemented by executing computer instruction codes (e.g., computer program products or software routines) stored in the memory 384 (or the memory of a particular processing chamber) under the control of the CPU 382. In other words, the computer program product is tangibly embodied on the memory 384 (or a non-transitory computer readable medium or a machine readable storage device). When the CPU 382 executes the computer instruction code, the CPU 382 controls the chamber to perform operations according to various embodiments.

[0087] System controller 380 is configured to execute methods such as method 100 stored in memory 384 .

[0088] In some embodiments, the first process chamber 302 includes an oxygen source 332 fluidly coupled to a process region 340 of the first process chamber 302, wherein the oxygen source 332 is configured to deliver an oxygen-containing gas to the process region 340. The first process chamber 302 may further include a first flow control valve 333 configured to control a flow rate of the oxygen-containing gas provided from the oxygen source 332 to the process region 340. In some embodiments, the first process chamber 302 further includes a hydrogen source 334 fluidly coupled to the process region 340 of the first process chamber 302, wherein the hydrogen source 334 is configured to deliver a hydrogen-containing gas to the process region 340. The first process chamber 302 may further include a second flow control valve 335 configured to control a flow rate of the hydrogen-containing gas provided from the hydrogen source 334 to the process region 340. The first processing chamber 302 may further include an etching gas source 336 fluidly coupled to a processing region 340 of the first processing chamber 302, wherein the etching gas source 336 is configured to deliver the etching gas to the processing region 340. The first processing chamber 302 may further include a third flow control valve 337, wherein the third flow control valve 337 is configured to control the flow of the etching gas provided from the etching gas source 336 to the processing region 340. The first processing chamber 302 may further include an inductively coupled plasma source 338, wherein the inductively coupled plasma source 338 is configured to generate plasma in the processing region 340, wherein the plasma includes a hydrogen-containing gas and an oxygen-containing gas.

[0089] In some embodiments, the system controller 380 is configured to control the first flow control valve 333 so that a certain amount of oxygen-containing gas is provided to the surface of the substrate disposed in the processing area 340 of the first processing chamber 302, so as to preferentially oxidize one or more tungsten-containing layers disposed on the sidewalls and field regions of the features formed in the substrate by generating plasma in the processing area 340 of the first processing chamber 302; control the third flow control valve 337 so that a certain amount of etching gas is provided to the surface of the substrate, so as to perform preferential etching of the preferentially oxidized portions of one or more tungsten-containing layers disposed on the sidewalls and field regions of the features formed in the substrate in the first processing chamber 302; and control the first flow control valve 333 and the second flow control valve 335 to deliver a certain amount of oxygen-containing gas and hydrogen-containing gas to the processing area 340, so as to expose the one or more tungsten-containing layers to a post-etching treatment process, the post-etching treatment process comprising: exposing the tungsten-containing layer to a hydrogen and oxygen plasma treatment process by generating an inductively coupled plasma containing oxygen-containing gas and hydrogen-containing gas.

[0090] In some embodiments, XPS analysis comparing impurity levels on tungsten surfaces treated with the oxidation / etch back / post-etch treatment described herein shows that the fluorine percentage decreases from 4.1% after etch back to 0.3% after the post-etch treatment, the nitrogen percentage decreases from 8.0% after etch back to 0.9% after the post-etch treatment, and the boron percentage decreases from 0.8% after etch back to 0.4% after the post-etch treatment.

[0091] The previously described embodiments of the present disclosure have many advantages, including that the method utilizes an inductively coupled plasma (ICP) O2 plasma, which includes a diffusion-limited gas flow within a feature (e.g., a trench or via) formed on a substrate to produce an oxygen-deficient reaction. In some embodiments, the use of an ICP O2 plasma (a low, weak energy O2 plasma with a high ion / radical ratio) is created to enhance oxidation in the field region and deplete reactive oxygen species before reaching the bottom of the trench structure or gap. This provides good selectivity (>7) in the feature and achieves top field metal removal while seed material remains on the sidewall surface and bottom surface of the feature for metal gap filling. The method achieves multi-cycle capability with high wafer throughput. These methods overcome the challenges of seams and voids during metal gap filling by removing field metal while retaining seed metal at the bottom of the gap or trench. In addition, the post-etch treatment process removes contaminants such as fluorine, boron and / or nitrogen from the surface of the tungsten-containing layer while reducing tungsten oxide to tungsten. In this way, seamless bottom-up metal gap filling can be performed. However, the present disclosure does not require that all advantageous features and all advantages be incorporated into every embodiment of the present disclosure.

[0092] While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the present disclosure may be devised without departing from the basic scope thereof, and the scope of the present disclosure is determined by the following claims.

Claims

1. A method of filling a feature on a substrate, the method comprising: performing a gradient oxidation process to oxidize exposed portions of the liner layer, wherein the gradient oxidation process preferentially oxidizes overhanging portions of the liner layer that obstruct or block top openings of one or more features formed in a field region of the substrate; performing an etch-back process to remove or reduce the oxidized overhanging portion of the liner layer; exposing the liner layer to a chemical vapor transport (CVT) process to remove residual metal oxide from the gradient oxidation process and the etch-back process; and A tungsten gapfill process is performed to fill or partially fill the one or more features. 2 . The method of claim 1 , wherein the liner layer is a tungsten-containing layer, and the metal oxide is tungsten oxide.

3. The method of claim 2, wherein the CVT process is a plasma process that reduces the tungsten oxide to tungsten. 4 . The method of claim 2 , wherein the CVT process comprises exposing the tungsten-containing layer to an inductively coupled plasma (ICP) containing hydrogen and oxygen.

5. The method of claim 4, wherein exposing the tungsten-containing layer to ICP is performed at a temperature of 400 degrees Celsius or less and includes supplying a process gas comprising greater than or equal to 90% of a total flow of hydrogen and oxygen. 6 . The method of claim 5 , wherein the gradient oxidation process, the etch-back process, and the exposing the liner layer to the CVT process are performed in a processing chamber without breaking vacuum. 7 . The method of claim 6 , wherein the one or more features include a bottom surface and at least one sidewall, and the liner layer is formed over the at least one sidewall and the bottom surface.

8. A method of filling a feature formed on a substrate, the method comprising: One or more tungsten-containing layers are deposited over a surface of a substrate, wherein the substrate comprising a plurality of features formed within a field region of the surface of the substrate, Each of the plurality of features includes a sidewall surface and a bottom surface, and forming one or more tungsten-containing layers deposited over the field regions, sidewall surfaces, and bottom surfaces of the plurality of features; exposing the surface of the substrate to a gradient oxidation process, wherein the gradient oxidation process forms preferentially oxidized regions of the tungsten-containing layer disposed over the field regions of the plurality of features; preferentially etching the preferentially oxidized regions of the deposited one or more tungsten-containing layers formed on the surface of the substrate, wherein after performing the process of preferentially etching the preferentially oxidized regions, a first portion of the deposited one or more tungsten-containing layers remains on the bottom surface of each of the plurality of features, and a second portion of the deposited one or more tungsten-containing layers remains on the sidewall surface of each of the plurality of features; exposing at least the second portion of the deposited one or more tungsten-containing layers to a post-etch treatment process to reduce oxidized tungsten to tungsten and remove contaminants from surfaces of the deposited one or more tungsten-containing layers; and Filling the features with a second tungsten layer, wherein the process of filling the features with the second tungsten layer includes preferentially growing the second tungsten layer from the second portions of the deposited one or more tungsten-containing layers on the sidewall surfaces and the first portions of the deposited one or more tungsten-containing layers remaining on the bottom surface of each of the features.

9. The method of claim 8, wherein the post-etch treatment process comprises inductively coupled plasma.

10. The method of claim 9, wherein the post-etching treatment process further comprises: The tungsten-containing layer is exposed to one or more of H2, O2, Ar, or a combination thereof.

11. The method of claim 9, wherein the post-etching treatment process comprises: The tungsten-containing layer is exposed to a hydrogen and oxygen plasma treatment.

12. The method of claim 11, wherein the hydrogen and oxygen plasma treatment is performed at a temperature of 400 degrees Celsius or less and includes supplying a process gas comprising greater than or equal to 90% of a total flow of hydrogen and oxygen.

13. The method of claim 12, wherein the sidewall surface is defined by a dielectric material selected from silicon oxide, silicon nitride, silicon oxynitride, or combinations thereof.

14. The method of claim 13, wherein depositing the one or more tungsten-containing layers over the surface of the substrate comprises: depositing a tungsten liner layer over the plurality of features via a physical vapor deposition process; and A boron-tungsten nucleation layer is deposited over the tungsten liner layer via an atomic layer deposition (ALD) process.

15. The method of claim 14, wherein filling the feature with the second tungsten layer comprises a chemical vapor deposition (CVD) gap fill process.

16. The method of claim 8, wherein the post-etch treatment process comprises a chemical vapor transport (CVT) process. The method of claim 16 , wherein the CVT process comprises a volatilization process and a reduction process.

18. The method of claim 17, wherein the volatilization process is performed via the following reaction: (I) WO2+2H2O→WO2(OH)2+H2, and the reduction process is performed via the following reaction: (II) WO2(OH)2+3H2→W+4H2O.

19. The method of claim 8, wherein exposing the surface of the substrate to a gradient oxidation process, preferentially etching the preferentially oxidized regions of the deposited one or more tungsten-containing layers formed on the surface of the substrate, and exposing at least the second portion of the deposited one or more tungsten-containing layers to a post-etching treatment process are performed in a first processing chamber disposed on a cluster tool.

20. A clustering tool comprising: The first processing chamber comprises: an oxygen source fluidly coupled to a processing region of the first processing chamber, wherein the oxygen source is configured to deliver an oxygen-containing gas to the processing region; a first flow control valve configured to control a flow rate of an oxygen-containing gas provided from the oxygen source to the processing region; a hydrogen source fluidly coupled to the processing region of the first processing chamber, wherein the hydrogen source is configured to deliver a hydrogen-containing gas to the processing region; a second flow control valve configured to control a flow rate of the hydrogen-containing gas provided from the hydrogen source to the processing region; an etching gas source fluidly coupled to the processing region of the first processing chamber, wherein the etching gas source is configured to deliver an etching gas to the processing region; a third flow control valve configured to control a flow rate of the etching gas provided from the etching gas source to the processing region; and an inductively coupled plasma source configured to generate a plasma in the processing region, wherein the plasma comprises the hydrogen-containing gas and the oxygen-containing gas; and A controller configured to: controlling the first flow control valve so that a certain amount of oxygen-containing gas is provided to a surface of a substrate disposed in the processing region of the first processing chamber to preferentially oxidize one or more tungsten-containing layers disposed on sidewalls and field regions of features formed in the substrate by generating the plasma in the processing region of the first processing chamber; controlling the third flow control valve so that a certain amount of etching gas is provided to the surface of the substrate to perform, in the first processing chamber, preferential etching of the preferentially oxidized portions of the one or more tungsten-containing layers disposed on the sidewalls of the features formed in the substrate and the field regions; and The first flow control valve and the second flow control valve are controlled to deliver a certain amount of the oxygen-containing gas and the hydrogen-containing gas to the processing area to expose the one or more tungsten-containing layers to the post-etching treatment process, and the post-etching treatment process includes: exposing the tungsten-containing layer to a hydrogen and oxygen plasma treatment process by generating an inductively coupled plasma containing the oxygen-containing gas and the hydrogen-containing gas.

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