Voltage regulation method and circuit

By obtaining the maximum current of the adjustment tube in the LDO circuit and the load current of the chip, and adjusting the reference voltage in the voltage regulation circuit, the problem of poor flexibility caused by fixed reference voltage in the prior art is solved, and more efficient voltage regulation is achieved.

CN119512304BActive Publication Date: 2025-05-13SUZHOU SASAMAI SEMICON CO LTD +3
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Patent Information

Application Number
CN202510062578.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-01-15
Publication Date
2025-05-13
Estimated Expiration
2045-01-15

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Abstract

The present invention discloses a voltage regulation method and circuit, which are applied to the field of integrated circuits. In this method, after obtaining a first maximum current that can be provided by a first adjustment tube, a second maximum current that can be provided by a second adjustment tube, and a load current required for the chip to operate in a target period after the current moment, a controller can adjust the magnitude relationship between a first reference voltage at a first reference voltage end and a second reference voltage at a second reference voltage end based on the first maximum current, the second maximum current, and the load current. Since the magnitude relationship between the first reference voltage and the second reference voltage can be adjusted based on the first maximum current, the second maximum current, and the load current, the flexibility of controlling the first reference voltage and the second reference voltage is improved.
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Description

Technical Field

[0001] The present application relates to the field of integrated circuits, and in particular to a voltage regulation method and circuit. Background Art

[0002] Currently, a voltage regulation circuit may include two low dropout regulator (LDO) circuits connected in parallel, wherein the driving capability of one of the two LDO circuits is higher than the driving capability of the other LDO circuit.

[0003] However, currently, the reference voltages at the reference voltage terminals of the two LDO circuits are usually adjusted to a fixed voltage, and this adjustment method has poor flexibility. Summary of the invention

[0004] The present invention provides a voltage regulation method and circuit, which can solve the problem that the reference voltage of the reference voltage terminal of two LDO circuits is usually adjusted to a fixed voltage in the related art, resulting in poor flexibility. The technical solution includes:

[0005] On the one hand, a voltage regulation method is provided, which is applied to a controller in a voltage regulation circuit, wherein the voltage regulation circuit further includes a first LDO circuit and a second LDO circuit, the controller is connected to a first reference voltage terminal of the first LDO circuit and a second reference voltage terminal of the second LDO circuit respectively, and an output terminal of the first LDO circuit and an output terminal of the second LDO circuit are both used to connect a chip; the method includes:

[0006] Obtaining a first maximum current that can be provided by the adjustment tube in the first LDO circuit and a second maximum current that can be provided by the adjustment tube in the second LDO circuit, wherein the first maximum current is greater than the second maximum current;

[0007] Obtain the load current required for the chip to operate within a target period after the current moment;

[0008] Based on the first maximum current, the second maximum current and the load current, a magnitude relationship between a first reference voltage at the first reference voltage terminal and a second reference voltage at the second reference voltage terminal is adjusted.

[0009] Optionally, when the maximum value of the load current is greater than the second maximum current and less than the first maximum current, and the minimum value of the load current is less than the first maximum current; or,

[0010] When the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is greater than the second maximum current and less than the first maximum current, adjust the first reference voltage or the second reference voltage so that the adjusted first reference voltage is greater than the adjusted second reference voltage.

[0011] Optionally, when the maximum value of the load current is greater than the second maximum current and less than the first maximum current, and the minimum value of the load current is less than the first maximum current, the adjusted first reference voltage is equal to the first voltage divider feedback value of the maximum load voltage, and the adjusted second reference voltage is less than or equal to the second voltage divider feedback value of the minimum load voltage.

[0012] Optionally, when the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is greater than the second maximum current and less than the first maximum current, the adjusted first reference voltage is equal to the first voltage divider feedback value of the maximum load voltage, and the adjusted second reference voltage is between the second voltage divider feedback value of the minimum load voltage and the second voltage divider feedback value of the maximum load voltage.

[0013] Optionally, adjusting the first reference voltage or the second reference voltage includes:

[0014] If the first reference voltage before adjustment is equal to the first voltage-divided feedback value of the maximum load voltage, and the second reference voltage before adjustment is equal to the second voltage-divided feedback value of the maximum load voltage, then lowering the second reference voltage;

[0015] If the first reference voltage before adjustment is less than the second reference voltage before adjustment, and the second reference voltage before adjustment is equal to the second voltage-dividing feedback value of the maximum load voltage, then the first reference voltage is increased so that the increased first reference voltage is equal to the first voltage-dividing feedback value of the maximum load voltage, and the second reference voltage is decreased;

[0016] If the first reference voltage before adjustment is equal to the first voltage-dividing feedback value of the maximum load voltage, and the second reference voltage before adjustment is less than or equal to the second voltage-dividing feedback value of the minimum load voltage, then the second reference voltage is increased so that the increased second reference voltage is between the second voltage-dividing feedback value of the minimum load voltage and the second voltage-dividing feedback value of the maximum load voltage;

[0017] If the first reference voltage before adjustment is equal to the first voltage divider feedback value of the maximum load voltage, and the second reference voltage before adjustment is between the second voltage divider feedback value of the minimum load voltage and the second voltage divider feedback value of the maximum load voltage, the second reference voltage is reduced so that the reduced second reference voltage is less than or equal to the second voltage divider feedback value of the minimum load voltage.

[0018] Optionally, adjusting the magnitude relationship between the first reference voltage at the first reference voltage terminal and the second reference voltage at the second reference voltage terminal includes:

[0019] If the maximum value and the minimum value of the load current are both greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, the first reference voltage or the second reference voltage is adjusted so that the adjusted first reference voltage is equal to the first voltage divider feedback value of the maximum load voltage, and the adjusted second reference voltage is equal to the second voltage divider feedback value of the maximum load voltage.

[0020] Optionally, adjusting the magnitude relationship between the first reference voltage at the first reference voltage terminal and the second reference voltage at the second reference voltage terminal includes:

[0021] In the case where the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is less than the second maximum current; or,

[0022] When both the maximum value and the minimum value of the load current are smaller than the second maximum current, the first reference voltage or the second reference voltage is adjusted so that the adjusted first reference voltage is smaller than the adjusted second reference voltage.

[0023] Optionally, when the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is less than the second maximum current, the adjusted second reference voltage is equal to the second voltage divider feedback value of the maximum load voltage, and the adjusted first reference voltage is between the first voltage divider feedback value of the minimum load voltage and the first voltage divider feedback value of the maximum load voltage.

[0024] Optionally, when the maximum and minimum values ​​of the load current are both less than the second maximum current, the adjusted second reference voltage is equal to the second voltage divider feedback value of the maximum load voltage, and the adjusted first reference voltage is less than or equal to the first voltage divider feedback value of the minimum load voltage.

[0025] Optionally, adjusting the first reference voltage or the second reference voltage includes:

[0026] If the first reference voltage before adjustment is equal to the first voltage-divided feedback value of the maximum load voltage, and the second reference voltage before adjustment is equal to the second voltage-divided feedback value of the maximum load voltage, then lowering the first reference voltage;

[0027] If the first reference voltage before adjustment is greater than the second reference voltage before adjustment, and the first reference voltage before adjustment is equal to the first voltage-dividing feedback value of the maximum load voltage, then the second reference voltage is increased so that the increased second reference voltage is equal to the second voltage-dividing feedback value of the maximum load voltage, and the first reference voltage is decreased;

[0028] If the second reference voltage before adjustment is equal to the second voltage-dividing feedback value of the maximum load voltage, and the first reference voltage before adjustment is between the first voltage-dividing feedback value of the minimum load voltage and the first voltage-dividing feedback value of the maximum load voltage, then the first reference voltage is reduced so that the reduced first reference voltage is less than or equal to the first voltage-dividing feedback value of the minimum load voltage;

[0029] If the second reference voltage before adjustment is equal to the second voltage divider feedback value of the maximum load voltage, and the first reference voltage before adjustment is less than or equal to the first voltage divider feedback value of the minimum load voltage, the first reference voltage is increased so that the increased first reference voltage is between the first voltage divider feedback value of the minimum load voltage and the first voltage divider feedback value of the maximum load voltage.

[0030] On the other hand, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the voltage regulation method described in the above aspect is implemented.

[0031] On the other hand, a controller is provided, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the voltage regulation method described in the above aspects is implemented.

[0032] In another aspect, a voltage regulating device is provided, the device comprising:

[0033] A first acquisition module is used to acquire a first maximum current that can be provided by the adjustment tube in the first LDO circuit and a second maximum current that can be provided by the adjustment tube in the second LDO circuit, wherein the first maximum current is greater than the second maximum current;

[0034] A second acquisition module is used to acquire the load current required for the chip to operate in a target period after the current moment;

[0035] The adjustment module is used to adjust the magnitude relationship between a first reference voltage at a first reference voltage terminal in the first LDO circuit and a second reference voltage at a second reference voltage terminal in the second LDO circuit based on the first maximum current, the second maximum current and the load current.

[0036] In another aspect, a voltage regulation circuit is provided, the voltage regulation circuit comprising: a controller, a first LDO circuit and a second LDO circuit;

[0037] Wherein, the controller is connected to the first reference voltage terminal of the first LDO circuit and the second reference voltage terminal of the second LDO circuit respectively, and the controller is used to implement the voltage regulation method described in the above aspect;

[0038] The output end of the first LDO circuit and the output end of the second LDO circuit are both connected to the chip.

[0039] Optionally, the voltage regulating circuit further includes: a first current limiting circuit; the voltage regulating circuit has a signal input terminal;

[0040] The first current limiting circuit is connected in series between the signal input terminal and the input terminal of the first adjustment tube in the first LDO circuit.

[0041] Optionally, the voltage regulating circuit further includes: a second current limiting circuit; the voltage regulating circuit has a signal input terminal;

[0042] The second current limiting circuit is connected in series between the signal input terminal and the input terminal of the second adjustment tube in the second LDO circuit.

[0043] In summary, the embodiment of the present invention provides a voltage regulation method and circuit, in which the controller can adjust the magnitude relationship between the first reference voltage at the first reference voltage end and the second reference voltage at the second reference voltage end based on the first maximum current, the second maximum current and the load current after obtaining the first maximum current that can be provided by the first adjustment tube, the second maximum current that can be provided by the second adjustment tube, and the load current required for the chip to operate in the target period after the current moment. Since the magnitude relationship between the first reference voltage and the second reference voltage can be adjusted based on the first maximum current, the second maximum current and the load current, the flexibility of controlling the first reference voltage and the second reference voltage is improved.

[0044] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 is a schematic structural diagram of a voltage regulation circuit provided by an embodiment of the present invention;

[0046] Figure 2 is a schematic structural diagram of another voltage regulation circuit provided by an embodiment of the present invention;

[0047] Figure 3 is a flow chart of a voltage regulation method provided by an embodiment of the present invention;

[0048] Figure 4 is a schematic diagram of a first reference voltage in different configuration modes provided by an embodiment of the present invention;

[0049] Figure 5 is a schematic diagram of a second reference voltage in different configuration modes provided by an embodiment of the present invention;

[0050] Figure 6 is a schematic diagram of a first reference voltage and a second reference voltage in different configuration modes provided by an embodiment of the present invention;

[0051] Figure 7 is a schematic diagram of different configuration modes that can be switched between each other provided by an embodiment of the present invention;

[0052] Figure 8 is a schematic diagram of the structure of a controller provided by an embodiment of the present invention;

[0053] Fig. 9 It is a block diagram of a voltage regulating device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0054] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present invention, and should not be construed as limiting the present invention.

[0055] Figure 1 is a schematic diagram of a voltage regulation circuit provided by an embodiment of the present invention. Figure 1 As shown, the voltage regulation circuit includes: a controller 10, a first LDO circuit and a second LDO circuit.

[0056] The controller 10 is connected to a first reference voltage terminal Vref1 of the first LDO circuit and a second reference voltage terminal Vref2 of the second LDO circuit respectively, and the output terminal of the first LDO circuit and the output terminal of the second LDO circuit are both used to connect to the chip.

[0057] The first LDO circuit and the second LDO circuit are both power supply chips widely used in electronic products. The advantages of the first LDO circuit and the second LDO circuit are: simplified external circuit (requiring only fewer input and output capacitors), low power supply noise, fast response speed, and low price.

[0058] The voltage regulation circuit may further include a signal input terminal Vin, the input terminal of the first LDO circuit, the input terminal of the second LDO circuit and the controller 10 are all connected to the signal input terminal Vin, and the first LDO circuit and the second LDO circuit are both used to adjust the power signal received by the signal input terminal Vin, thereby providing a stable power supply voltage for the chip. The controller 10 is also connected to the ground terminal GND.

[0059] refer to Figure 1 The first LDO circuit may include a first adjustment tube 21 , and the second LDO circuit may include a second adjustment tube 22 .

[0060] The first adjustment transistor 21 may be a positive channel metal oxide semiconductor field effect transistor (PMOS) or a negative channel metal oxide semiconductor field effect transistor (NMOS). The second adjustment transistor 22 may be a PMOS or an NMOS.

[0061] The first maximum current that can be provided by the first adjustment tube 21 is greater than the second maximum current that can be provided by the second adjustment tube 22. For example, the first maximum current can be 100 milliamperes (mA) and the second maximum current can be 30 mA. Since the first maximum current is greater than the second maximum current, the driving capability of the first LDO circuit is higher than the driving capability of the second LDO circuit. The first LDO circuit can be called a high-drive LDO circuit, and the second LDO circuit can be called a low-drive LDO circuit.

[0062] refer to Figure 1 The controller 10 may include a control sub-device 11, a first digital-to-analog converter 12, and a second digital-to-analog converter 13. The first digital-to-analog converter 12 and the second digital-to-analog converter 13 may be digital-to-analog converters (DACs) or controlled and adjusted Bandgap circuits.

[0063] The first end of the control sub-device 11 is connected to the first digital-to-analog converter 12, and the second end of the control sub-device 11 is connected to the second digital-to-analog converter 13. The control sub-device 11 is used to send digital signals to the first digital-to-analog converter 12 and the second digital-to-analog converter 13 respectively.

[0064] The first digital-to-analog converter 12 is also connected to the first LDO circuit, the signal input terminal Vin and the ground terminal GND respectively. The first digital-to-analog converter 12 is used to convert the received digital signal into an analog reference voltage signal and provide it to the first LDO circuit.

[0065] The second digital-to-analog converter 13 is also connected to the second LDO circuit, the signal input terminal Vin and the ground terminal GND respectively. The second digital-to-analog converter 13 is used to convert the received digital signal into an analog reference voltage signal and provide it to the second LDO circuit.

[0066] The first LDO circuit may further include a first operational amplifier A1, a first voltage-dividing resistor R1 and a second voltage-dividing resistor R2. The voltage regulating circuit may further include a signal output terminal Vout, which is the output terminal of the first LDO circuit and the output terminal of the second LDO circuit.

[0067] The input end of the first adjustment tube 21 is connected to the signal input end Vin as the input end of the first LDO circuit, the output end of the first adjustment tube 21 is used to connect the chip as the output end of the first LDO circuit, and the control end of the first adjustment tube 21 is connected to the output end of the first operational amplifier A1.

[0068] Taking the first adjustment tube 21 as a PMOS as an example, the input end of the first adjustment tube 21 is the source of the first adjustment tube 21 , the output end of the first adjustment tube 21 is the drain of the first adjustment tube 21 , and the control end of the first adjustment tube 21 is the gate of the first adjustment tube 21 .

[0069] The inverting input terminal (-) of the first operational amplifier A1 is connected to the ground terminal GND and the first analog-to-digital converter 12 of the controller 10 as the first reference voltage terminal Vref1, and the non-inverting input terminal (+) of the first operational amplifier A1 is connected to the first node n1. The first node n1 is located between the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2. The positive power supply terminal of the first operational amplifier A1 is connected to the signal input terminal Vin, and the negative power supply terminal of the first operational amplifier A1 is connected to the ground terminal GND. The first operational amplifier A1 is used to compare the voltage fed back from the first node n1 with the first reference voltage of the first reference voltage terminal Vref1, thereby controlling the output voltage of the first adjustment tube 21.

[0070] One end of the first voltage-dividing resistor R1 is connected to the output end of the first adjustment tube 21, the other end of the first voltage-dividing resistor R1 is connected to one end of the second voltage-dividing resistor R2 through the first node n1, and the other end of the second voltage-dividing resistor R2 is connected to the ground terminal GND. The first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 are used to divide the voltage output by the signal output terminal Vout.

[0071] refer to Figure 1 The second LDO circuit may further include a second operational amplifier A2, a third voltage-dividing resistor R3 and a fourth voltage-dividing resistor R4.

[0072] The input end of the second adjustment tube 22 is connected to the signal input end Vin as the input end of the second LDO circuit, the output end of the second adjustment tube 22 is used to connect the chip as the output end of the second LDO circuit, and the control end of the second adjustment tube 22 is connected to the output end of the second operational amplifier A2.

[0073] Taking the second adjustment tube 22 as a PMOS as an example, the input end of the second adjustment tube 22 is the source of the second adjustment tube 22 , the output end of the second adjustment tube 22 is the drain of the second adjustment tube 22 , and the control end of the second adjustment tube 22 is the gate of the second adjustment tube 22 .

[0074] The inverting input terminal (-) of the second operational amplifier A2 is connected to the ground terminal GND and the second digital-to-analog converter 13 of the controller 10 as the second reference voltage terminal Vref2, and the non-inverting input terminal (+) of the second operational amplifier A2 is connected to the second node n2, and the second node n2 is located between the third voltage-dividing resistor R3 and the fourth voltage-dividing resistor R4. The positive power supply terminal of the second operational amplifier A2 is connected to the signal input terminal Vin, and the negative power supply terminal of the second operational amplifier A2 is connected to the ground terminal GND. The second operational amplifier A2 is used to compare the voltage fed back from the second node n2 with the second reference voltage of the second reference voltage terminal Vref2, thereby controlling the output voltage of the second adjustment tube 22.

[0075] One end of the third voltage-dividing resistor R3 is connected to the output end of the second adjustment tube 22, the other end of the third voltage-dividing resistor R3 is connected to the fourth voltage-dividing resistor R4 through the second node n2, and the other end of the fourth voltage-dividing resistor R4 is connected to the ground terminal GND. The third voltage-dividing resistor R3 and the fourth voltage-dividing resistor R4 are used to divide the voltage output by the signal output terminal Vout.

[0076] refer to Figure 2 The voltage regulating circuit may further include: a first current limiting circuit 31, which is connected in series between the signal input terminal Vin and the input terminal of the first LDO circuit.

[0077] Optionally, the first current limiting circuit 31 is connected in series between the signal input terminal Vin and the input terminal of the first adjustment tube 21 .

[0078] By providing the first current limiting circuit 31 between the signal input terminal Vin and the input terminal of the first LDO circuit, overcurrent caused by extreme conditions such as output short circuit can be prevented.

[0079] refer to Figure 2 The voltage regulating circuit may further include: a second current limiting circuit 32, which is connected in series between the signal input terminal Vin and the input terminal of the second LDO circuit.

[0080] Optionally, the second current limiting circuit 32 is connected in series between the signal input terminal Vin and the input terminal of the second adjustment tube 22 .

[0081] By providing the second current limiting circuit 32 between the signal input terminal Vin and the input terminal of the second LDO circuit, overcurrent can be prevented when the first LDO circuit and the second LDO circuit output at the same time.

[0082] In the embodiment of the present invention, the working principle of the first LDO circuit is the same as the working principle of the second LDO circuit. The embodiment of the present invention takes the first LDO circuit as an example to illustrate the working principle of the first LDO circuit. When the output voltage of the signal output terminal Vout decreases due to the change of the load current required by the chip, the voltage across the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 connected in series will also decrease, and then the voltage at the first node n1 will decrease, and accordingly, the voltage at the non-inverting input terminal (+) of the first operational amplifier A1 decreases. The first operational amplifier A1 reduces the voltage output by the first operational amplifier A1 by comparing the voltage of the non-inverting input terminal (+) with the first reference voltage of the inverting input terminal (-), thereby causing the voltage of the control terminal of the first adjustment tube 21 to decrease, thereby increasing the voltage difference between the control terminal and the input terminal of the first adjustment tube 21. The output current of the first adjustment tube 21 will increase, causing the output voltage of the signal output terminal Vout to increase. Thus, a feedback control is completed, so that the output voltage of the signal output terminal Vout returns to the normal potential.

[0083] When the output voltage of the signal output terminal Vout rises due to the change of the load current required by the chip, the voltage across the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 connected in series will also rise, and then the voltage at the first node n1 will rise, and accordingly, the voltage at the non-inverting input terminal (+) of the first operational amplifier A1 will rise. The first operational amplifier A1 will increase the voltage output by the first operational amplifier A1 by comparing the voltage at the non-inverting input terminal (+) with the first reference voltage at the inverting input terminal (-), thereby increasing the voltage at the control terminal of the first adjustment tube 21, thereby reducing the voltage difference between the control terminal and the input terminal of the first adjustment tube 21, and reducing the output current of the first adjustment tube 21, so that the output voltage of the signal output terminal Vout will decrease. Thus, a feedback control is completed, so that the output voltage of the signal output terminal Vout returns to the normal potential.

[0084] Figure 3 is a flow chart of a voltage regulation method provided by an embodiment of the present invention, the method is applied to Figure 1 or Figure 2 The controller 10 in the voltage regulation circuit shown. Figure 3 As shown, the method includes:

[0085] Step 301: Obtain a first maximum current that can be provided by a first adjustment tube and a second maximum current that can be provided by a second adjustment tube.

[0086] The controller can obtain a first maximum current that can be provided by the first adjustment tube and a second maximum current that can be provided by the second adjustment tube, wherein the first maximum current is greater than the second maximum current, and the first maximum current and the second maximum current can be pre-stored in the controller.

[0087] Step 302: Obtain the load current required for the chip to operate within a target period after the current moment.

[0088] After obtaining the first maximum current and the second maximum current, the controller can obtain the load current required for the chip to operate in a target period after the current moment. The target period can be pre-stored in the controller.

[0089] It is understandable that the size of the load that the chip needs to drive at different times in the target period may be different, so the load current required by the chip at different times in the target period may also be different. Therefore, it can be understood that there are load currents at multiple times in the target period.

[0090] Step 303: Based on the first maximum current, the second maximum current and the load current, adjust the magnitude relationship between the first reference voltage at the first reference voltage end and the second reference voltage at the second reference voltage end.

[0091] After obtaining the load current required by the load in the target period after the current moment, the controller can adjust the magnitude relationship between the first reference voltage at the first reference voltage terminal and the second reference voltage at the second reference voltage terminal based on the first maximum current, the second maximum current and the load current.

[0092] In summary, an embodiment of the present invention provides a voltage regulation method, in which a controller can adjust the magnitude relationship between the first reference voltage at the first reference voltage end and the second reference voltage at the second reference voltage end based on the first maximum current, the second maximum current and the load current after obtaining the first maximum current that can be provided by the first adjustment tube, the second maximum current that can be provided by the second adjustment tube, and the load current required by the chip in the target period after the current moment. Since the magnitude relationship between the first reference voltage and the second reference voltage can be adjusted based on the first maximum current, the second maximum current and the load current, the flexibility of controlling the first reference voltage and the second reference voltage is improved.

[0093] In an embodiment of the present invention, when the maximum value of the load current is greater than the second maximum current and less than the first maximum current, and the minimum value of the load current is less than the first maximum current; or, when the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is greater than the second maximum current and less than the first maximum current, the controller may adjust the first reference voltage or the second reference voltage so that the adjusted first reference voltage is greater than the adjusted second reference voltage.

[0094] The maximum value of the load current is the maximum value of the load current at multiple moments, and the minimum value of the load current is the minimum value of the load current at multiple moments.

[0095] When the maximum value of the load current is greater than the second maximum current and less than the first maximum current, and the minimum value of the load current is less than the first maximum current, that is, assuming that the second maximum current Imax2<the maximum value of the load current I<the first maximum current Imax1, 0mA<the minimum value of the load current I<the first maximum current Imax1, the adjusted first reference voltage is equal to the first voltage divider feedback value of the maximum load voltage, and the adjusted second reference voltage is less than or equal to the second voltage divider feedback value of the minimum load voltage.

[0096] Among them, reference Figure 1 , the first voltage-dividing feedback value of the maximum load voltage is the voltage at the non-inverting input terminal (+) of the first operational amplifier A1 after the maximum load voltage is divided by the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2. The second voltage-dividing feedback value of the minimum load voltage is the voltage at the non-inverting input terminal (+) of the second operational amplifier A2 after the minimum load voltage is divided by the third voltage-dividing resistor R3 and the fourth voltage-dividing resistor R4. And the minimum load voltage and the maximum load voltage are different for different loads driven by the chip. The minimum load voltage and the maximum load voltage can be determined according to the working voltage of the load driven by the chip.

[0097] In this case, the adjusted second reference voltage can be equal to the second voltage-divided feedback value of the minimum load voltage. In this way, when the load current exceeds expectations and the output voltage of the voltage regulation circuit is abnormally too low (e.g., the output voltage is lower than the minimum load voltage), the first adjustment tube and the second adjustment tube will be automatically turned on, thereby ensuring the driving capability of the chip.

[0098] Assuming that the second maximum current is 30mA and the first maximum current is 100mA, in this case, the chip is overloaded most of the time within the target period, for example, the load current is maintained at about 90mA (i.e., below 100mA) most of the time, and maintained below 30mA for a short period of time.

[0099] In the embodiment of the present invention, the second maximum current is 30mA and the first maximum current is 100mA as an example. In this implementation, 30mA<maximum value of load current I<100mA, and 0mA<minimum value of load current I<100mA.

[0100] refer to Figures 4 to 6 When the first reference voltage verf1 is equal to the first voltage division feedback value of the maximum load voltage Vmax, and the second reference voltage is less than or equal to the second voltage division feedback value of the minimum load voltage Vmin, the voltage regulation circuit can be said to be in the first configuration mode.

[0101] Among them, reference Figure 1 , Figure 4 and Figure 5 , when (the first voltage-dividing resistor R1 / the second voltage-dividing resistor R2) is not equal to (the third voltage-dividing resistor R3 / the fourth voltage-dividing resistor R4), the first voltage-dividing feedback value of the maximum load voltage Vmax is not equal to the second voltage-dividing feedback value of the maximum load voltage Vmax, and the first voltage-dividing feedback value of the minimum load voltage Vmin is not equal to the second voltage-dividing feedback value of the minimum load voltage Vmin.

[0102] refer to Figure 1 The first voltage-dividing feedback value of the minimum load voltage is the voltage at the non-inverting input terminal (+) of the first operational amplifier A1 after the minimum load voltage is divided by the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2. The second voltage-dividing feedback value of the maximum load voltage is the voltage at the non-inverting input terminal (+) of the second operational amplifier A2 after the maximum load voltage is divided by the third voltage-dividing resistor R3 and the fourth voltage-dividing resistor R4.

[0103] refer to Figure 1 and Figure 6 , when (the first voltage-dividing resistor R1 / the second voltage-dividing resistor R2) is equal to (the third voltage-dividing resistor R3 / the fourth voltage-dividing resistor R4), the first voltage-dividing feedback value of the maximum load voltage Vmax is equal to the second voltage-dividing feedback value of the maximum load voltage Vmax, and the first voltage-dividing feedback value of the minimum load voltage Vmin is equal to the second voltage-dividing feedback value of the minimum load voltage Vmin.

[0104] Furthermore, when the adjusted first reference voltage is equal to the first voltage-dividing feedback value of the maximum load voltage, and the adjusted second reference voltage is less than or equal to the second voltage-dividing feedback value of the minimum load voltage, the first adjustment tube is in the working state, and the second adjustment tube is in the off state (reference Figures 4 to 6 , the first adjustment tube 21 is ON, and the second adjustment tube 22 is OFF).

[0105] Since the maximum value of the load current is greater than the second maximum current and less than the first maximum current, and the minimum value of the load current is less than the first maximum current, the first voltage-dividing feedback value of the output voltage of the voltage regulating circuit is less than the first reference voltage in the target period, and the second voltage-dividing feedback value of the output voltage is greater than the second reference voltage, so the first adjustment tube is automatically turned on and the second adjustment tube is automatically turned off in the target period. In the target period, only the first adjustment tube is in the working state to meet the driving capability of the chip, and the power consumption of the voltage regulating circuit can be reduced.

[0106] Among them, reference Figure 1The first voltage-dividing feedback value of the output voltage is the voltage at the non-inverting input terminal (+) of the first operational amplifier A1 after the output voltage is divided by the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2. The second voltage-dividing feedback value of the output voltage is the voltage at the non-inverting input terminal (+) of the second operational amplifier A2 after the output voltage is divided by the third voltage-dividing resistor R3 and the fourth voltage-dividing resistor R4.

[0107] When the first voltage-divided feedback value of the output voltage of the voltage regulating circuit is greater than the first reference voltage within the target period, the first adjustment tube and the second adjustment tube are automatically turned off (reference voltage Figures 4 to 6 , the first adjustment tube 21 is OFF, and the second adjustment tube 22 is OFF).

[0108] It should be noted that this situation rarely occurs unless there is an external overvoltage or the voltage controlled by the LDO circuit overshoots. In this case, the LDO is turned off for a very short time. Due to the presence of capacitance, the output voltage will also drop below the maximum load voltage and above the minimum load voltage. At this time, one of the LDO circuits will be turned on to continue to supply power.

[0109] When the second voltage-divided feedback value of the output voltage of the voltage regulating circuit is less than the second reference voltage within the target period, the first adjustment tube and the second adjustment tube are automatically turned on (reference voltage Figures 4 to 6 , the first adjustment tube 21 is ON, and the second adjustment tube 22 is ON). It should be noted that this situation is an abnormal situation and rarely occurs in actual applications, unless the load current is obtained incorrectly. If this situation occurs, the working state of the chip is difficult to guarantee and an abnormality may occur.

[0110] When the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is greater than the second maximum current and less than the first maximum current, the adjusted first reference voltage is equal to the first voltage-dividing feedback value of the maximum load voltage, and the adjusted second reference voltage is between the second voltage-dividing feedback value of the minimum load voltage and the second voltage-dividing feedback value of the maximum load voltage. That is, the first maximum current Imax1<the maximum value of the load current I<the first maximum current Imax1+the second maximum current Imax2, and the second maximum current Imax2<the minimum value of the load current I<the first maximum current Imax1. For example, 100mA<the maximum value of the load current I<130mA, and 30mA<the minimum value of the load current I<100mA.

[0111] In this case, the chip is overloaded most of the time within the target period and very overloaded for a small part of the time within the target period. For example, the load current is maintained at around 90mA most of the time and at around 120mA (i.e., below 130mA) for a small part of the time. The chip is under very heavy load, which is heavier than the chip under heavy load.

[0112] refer to Figures 4 to 6 When the first reference voltage verf1 is equal to the first voltage division feedback value of the maximum load voltage Vmax, and the second reference voltage verf2 is between the second voltage division feedback value of the minimum load voltage Vmin and the second voltage division feedback value of the maximum load voltage Vmax, the voltage regulation circuit can be said to be in the second configuration mode.

[0113] In the embodiment of the present invention, when the adjusted first reference voltage is equal to the first voltage-dividing feedback value of the maximum load voltage, and the adjusted second reference voltage is between the second voltage-dividing feedback value of the minimum load voltage and the second voltage-dividing feedback value of the maximum load voltage, since the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, the minimum value of the load current is greater than the second maximum current and less than the first maximum current. Therefore, when the first voltage-dividing feedback value of the output voltage of the voltage regulating circuit is lower than the first reference voltage within the target period, and the second voltage-dividing feedback value of the output voltage is higher than the second reference voltage, the first adjustment tube will automatically turn on, and the second adjustment tube will automatically turn off (reference Figures 4 to 6 , the first adjustment tube 21 is turned on, and the second adjustment tube 22 is turned off). This reduces the power consumption of the voltage regulation circuit.

[0114] When the second divided voltage feedback value of the output voltage of the voltage regulating circuit is lower than the second reference voltage during the target period, the first adjustment tube and the second adjustment tube are automatically turned on (reference voltage). Figures 4 to 6 , the first adjustment tube 21 is turned on, and the second adjustment tube 22 is turned on), thereby ensuring the driving capability of the chip. This situation is rarely seen in actual applications unless the estimated load current is wrong.

[0115] When the first voltage-divided feedback value of the output voltage of the voltage regulating circuit is greater than the first reference voltage within the target period, the first adjustment tube and the second adjustment tube are automatically turned off (reference voltage Figures 4 to 6 , the first adjustment tube 21 is OFF, and the second adjustment tube 22 is OFF). This situation is rarely seen in practical applications unless the estimated load current is wrong.

[0116] If the maximum and minimum values ​​of the load current are both greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, that is, the first maximum current Imax1 < the maximum value of the load current I (or the minimum value of the load current I) < (the first maximum current Imax1 + the second maximum current Imax2), then the first adjustment tube and the second adjustment tube are both in working state (refer to Figures 4 to 6 , the first adjustment tube 21 is ON, the second adjustment tube 22 is ON).

[0117] For example, 100mA < the maximum value of the load current I (or the minimum value of the load current I) < 130mA. In this case, the chip is always very heavily loaded during the target period, for example, the load current is maintained at about 120mA (ie, below 130mA).

[0118] In an embodiment of the present invention, if the first reference voltage before adjustment is equal to the first voltage divider feedback value of the maximum load voltage, and the second reference voltage before adjustment is equal to the second voltage divider feedback value of the maximum load voltage, the controller can lower the second reference voltage, thereby making the adjusted first reference voltage greater than the adjusted second reference voltage.

[0119] refer to Figures 4 to 6 When the first reference voltage verf1 is equal to the first voltage division feedback value of the maximum load voltage Vmax, and the second reference voltage verf2 is equal to the second voltage division feedback value of the maximum load voltage Vmax, the voltage regulation circuit can be said to be in the third configuration mode 3.

[0120] refer to Figures 4 to 6 , when the first reference voltage verf1 is less than the second reference voltage verf2, the second reference voltage verf2 is equal to the second voltage-dividing feedback value of the maximum load voltage Vmax, and the first reference voltage verf1 is between the first voltage-dividing feedback value of the minimum load voltage Vmin and the first voltage-dividing feedback value of the maximum load voltage Vmax, the voltage regulation circuit can be said to be in the fourth configuration mode 4. When the first reference voltage verf1 is less than the second reference voltage verf2, the second reference voltage verf2 is equal to the second voltage-dividing feedback value of the maximum load voltage Vmax, and the first reference voltage verf1 is less than or equal to the first voltage-dividing feedback value of the minimum load voltage Vmin, the voltage regulation circuit can be said to be in the fifth configuration mode 5.

[0121] refer to Figure 7, in the process of switching the voltage regulation circuit from the third configuration mode 3 to the first configuration mode 1 (or the second configuration mode 2), the voltage regulation circuit can be directly switched from the third configuration mode 3 to the first configuration mode 1 (or the second configuration mode 2), thereby improving the switching efficiency while ensuring safe switching. Alternatively, the voltage regulation circuit can be first switched from the third configuration mode 3 to the first reference configuration mode, and then switched from the first reference configuration mode to the first configuration mode 1 (or the second configuration mode 2). Alternatively, the voltage regulation circuit can be first switched from the third configuration mode 3 to the first sub-reference configuration mode, and then switched from the first sub-reference configuration mode to the third configuration mode 3, and then switched from the third configuration mode 3 to the first configuration mode 1 (or the second configuration mode 2). For example, the first sub-reference configuration mode may include the fourth configuration mode 4 or the fifth configuration mode 5.

[0122] Among them, reference Figure 7 , if the voltage regulation circuit is switched from the third configuration mode 3 to the first configuration mode 1, the first reference configuration mode may include the second configuration mode 2. Figure 7 , the voltage regulation circuit may switch from the third configuration mode 3 to the second configuration mode 2 first, and then switch from the second configuration mode 2 to the first configuration mode 1. If the voltage regulation circuit is switched from the third configuration mode 3 to the second configuration mode 2, the first reference configuration mode may include the first configuration mode 1.

[0123] refer to Figure 7 , the voltage regulation circuit can first switch from the third configuration mode 3 to the first configuration mode 1, and then switch from the first configuration mode 1 to the second configuration mode 2.

[0124] If the first reference voltage before adjustment is less than the second reference voltage before adjustment, and the second reference voltage before adjustment is equal to the second voltage divider feedback value of the maximum load voltage, the controller can increase the first reference voltage so that the increased first reference voltage is equal to the first voltage divider feedback value of the maximum load voltage, and reduce the second reference voltage.

[0125] refer to Figure 7 The controller may first increase the first reference voltage to switch the voltage regulation circuit from the first target configuration mode (i.e., the fourth configuration mode 4 or the fifth configuration mode 5) to the third configuration mode 3, and then switch the voltage regulation circuit from the third configuration mode 3 to the first configuration mode 1 (or the second configuration mode 2) by reducing the second reference voltage.

[0126] refer to Figure 7In the process of switching the voltage regulation circuit from the fifth configuration mode 5 to the third configuration mode 3, the controller may directly switch the voltage regulation circuit from the fifth configuration mode 5 to the third configuration mode 3. Alternatively, the voltage regulation circuit may be first switched from the fifth configuration mode 5 to the fourth configuration mode 4, and then switched from the fourth configuration mode 4 to the third configuration mode 3.

[0127] Alternatively, refer to Figure 7 , the controller can first switch the voltage regulation circuit from the first target configuration mode (i.e., the fourth configuration mode 4 or the fifth configuration mode 5) to the second reference configuration mode, then switch the voltage regulation circuit from the second reference configuration mode to the third configuration mode 3, and then switch the voltage regulation circuit from the third configuration mode 3 to the first configuration mode 1 (or the second configuration mode 2).

[0128] Example, reference Figure 7 If the first target configuration mode includes the fourth configuration mode 4 , the second reference configuration mode may include: the fifth configuration mode 5 . If the first target configuration mode includes the fifth configuration mode 5 , the second reference configuration mode may include the fourth configuration mode 4 .

[0129] refer to Figure 7 If the voltage regulation circuit is directly switched from the first target configuration mode (i.e., the fourth configuration mode 4 or the fifth configuration mode 5) to the first configuration mode 1 (or the second configuration mode 2), the first adjustment tube may be turned on slower than the second adjustment tube, resulting in an instantaneous situation in which the first adjustment tube and the second adjustment tube are turned off at the same time, thereby causing undervoltage or overcurrent in the voltage regulation circuit during the mode switching process.

[0130] refer to Figure 7 In the process of switching the voltage regulation circuit from the first target configuration mode to the first configuration mode 1 (or the second configuration mode 2), the embodiment of the present invention switches the voltage regulation circuit from the first target configuration mode to the third configuration mode 3 first, and then switches the voltage regulation circuit from the third configuration mode 3 to the first configuration mode 1 (or the second configuration mode 2). This can effectively avoid the instantaneous situation where the first adjustment tube and the second adjustment tube are turned off at the same time, thereby avoiding the situation such as undervoltage or overcurrent in the voltage regulation circuit during the mode switching process.

[0131] In addition, reference Figure 7If the first reference voltage before adjustment is equal to the first voltage-dividing feedback value of the maximum load voltage, and the second reference voltage before adjustment is between the second voltage-dividing feedback value of the minimum load voltage and the second voltage-dividing feedback value of the maximum load voltage, that is, the voltage regulation circuit is in the second configuration mode 2, then when the maximum value of the load current is greater than the second maximum current and less than the first maximum current, and the minimum value of the load current is less than the first maximum current, the controller can reduce the second reference voltage so that the reduced second reference voltage is less than or equal to the second voltage-dividing feedback value of the minimum load voltage, thereby switching the voltage regulation circuit from the second configuration mode 2 to the first configuration mode 1.

[0132] refer to Figure 7 If the first reference voltage before adjustment is equal to the first voltage-dividing feedback value of the maximum load voltage, and the second reference voltage before adjustment is less than or equal to the second voltage-dividing feedback value of the minimum load voltage, that is, the voltage regulation circuit is in the first configuration mode 1, then when the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is greater than the second maximum current and less than the first maximum current, the controller can increase the second reference voltage so that the increased second reference voltage is between the second voltage-dividing feedback value of the minimum load voltage and the second voltage-dividing feedback value of the maximum load voltage, thereby switching the voltage regulation circuit from the first configuration mode 1 to the second configuration mode 2.

[0133] In an embodiment of the present invention, if the maximum value and the minimum value of the load current are both greater than the first maximum current, and both are less than the sum of the first maximum current and the second maximum current, indicating that the chip is very overloaded during the target time period, the controller can adjust the first reference voltage or the second reference voltage so that the adjusted first reference voltage is equal to the first voltage divider feedback value of the maximum load voltage, and the adjusted second reference voltage is equal to the second voltage divider feedback value of the maximum load voltage, thereby placing the voltage regulation circuit in the third configuration mode 3.

[0134] If the adjusted first reference voltage is equal to the first voltage-dividing feedback value of the maximum load voltage, and the adjusted second reference voltage is equal to the second voltage-dividing feedback value of the maximum load voltage, then when the first voltage-dividing feedback value of the output voltage of the voltage regulating circuit is less than the first reference voltage (or the second voltage-dividing feedback value of the output voltage is less than the second reference voltage), the first adjustment tube and the second adjustment tube are both in the working state (reference Figures 4 to 6 , the first adjustment tube 21 is ON, the second adjustment tube 22 is ON).

[0135] When the first voltage-divided feedback value of the output voltage of the voltage regulating circuit is greater than the first reference voltage (or the second voltage-divided feedback value of the output voltage is greater than the second reference voltage), the second adjustment tube and the first adjustment tube are automatically turned off, that is, the second adjustment tube and the first adjustment tube are both in the off state (reference voltage). Figures 4 to 6 , the first adjustment tube 21 is OFF, and the second adjustment tube 22 is OFF). This situation is rarely seen in practical applications.

[0136] refer to Figure 7 If the first reference voltage before adjustment is equal to the first voltage-dividing feedback value of the maximum load voltage, and the second reference voltage before adjustment is greater than the second voltage-dividing feedback value of the minimum load voltage and less than the second voltage-dividing feedback value of the maximum load voltage, that is, the voltage regulation circuit is in the second configuration mode 2, then when the maximum value and the minimum value of the load current are both greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, the controller can increase the second reference voltage so that the adjusted second reference voltage is equal to the second voltage-dividing feedback value of the maximum load voltage, and the adjusted first reference voltage is equal to the first voltage-dividing feedback value of the maximum load voltage, thereby switching the voltage regulation circuit from the second configuration mode 2 to the third configuration mode 3.

[0137] refer to Figure 7 If the first reference voltage before adjustment is equal to the first voltage-dividing feedback value of the maximum load voltage, and the second reference voltage before adjustment is less than or equal to the second voltage-dividing feedback value of the minimum load voltage, that is, the voltage regulation circuit is in the first configuration mode 1, then when the maximum value and the minimum value of the load current are both greater than the first maximum current, and both are less than the sum of the first maximum current and the second maximum current, the controller can increase the second reference voltage so that the adjusted second reference voltage is equal to the second voltage-dividing feedback value of the maximum load voltage, and the adjusted first reference voltage is equal to the first voltage-dividing feedback value of the maximum load voltage, thereby switching the voltage regulation circuit from the first configuration mode 1 to the third configuration mode 3.

[0138] refer to Figure 7 If the second reference voltage before adjustment is equal to the second voltage-dividing feedback value of the maximum load voltage Vmax, and the first reference voltage before adjustment is between the first voltage-dividing feedback value of the minimum load voltage Vmin and the first voltage-dividing feedback value of the maximum load voltage Vmax, that is, the voltage regulation circuit is in the fourth configuration mode 4, then when the maximum value and the minimum value of the load current are both greater than the first maximum current, and both are less than the sum of the first maximum current and the second maximum current, the controller can increase the first reference voltage so that the increased first reference voltage is equal to the first voltage-dividing feedback value of the maximum load voltage, thereby switching the voltage regulation circuit from the fourth configuration mode 4 to the third configuration mode 3.

[0139] refer to Figure 7If the second reference voltage before adjustment is equal to the second voltage-dividing feedback value of the maximum load voltage Vmax, and the first reference voltage before adjustment is less than or equal to the first voltage-dividing feedback value of the minimum load voltage Vmin, that is, the voltage regulation circuit is in the fifth configuration mode 5, then when the maximum value and the minimum value of the load current are both greater than the first maximum current, and both are less than the sum of the first maximum current and the second maximum current, the controller can increase the first reference voltage so that the increased first reference voltage is equal to the first voltage-dividing feedback value of the maximum load voltage Vmax, thereby switching the voltage regulation circuit from the fifth configuration mode 5 to the third configuration mode 3.

[0140] The voltage regulation circuit is in the fifth configuration mode 5. The first reference voltage before adjustment can be equal to the first voltage-divided feedback value of the minimum load voltage Vmin, so that in the abnormal situation where the load current exceeds expectations and the output voltage is less than the minimum load voltage, the first adjustment tube and the second adjustment tube are turned on together to ensure the driving capability of the chip.

[0141] In the embodiment of the present invention, reference Figure 7 In the process of switching the voltage regulation circuit from the second target configuration mode (i.e., the first configuration mode 1, the second configuration mode 2, the fourth configuration mode 4, or the fifth configuration mode 5) to the third configuration mode 3, the controller can directly switch the voltage regulation circuit from the second target configuration mode to the third configuration mode 3, thereby improving the switching efficiency. Alternatively, the voltage regulation circuit can be first switched from the second target configuration mode to the third reference configuration mode, and then the voltage regulation circuit can be switched from the third reference configuration mode to the third configuration mode 3.

[0142] Among them, reference Figure 7 If the voltage regulating circuit is switched from the first configuration mode 1 to the third configuration mode 3, the third reference configuration mode may include the second configuration mode 2. If the voltage regulating circuit is switched from the second configuration mode 2 to the third configuration mode 3, the third reference configuration mode may include the first configuration mode 1.

[0143] refer to Figure 7 If the voltage regulation circuit is switched from the fourth configuration mode 4 to the third configuration mode 3, the third reference configuration mode may include the fifth configuration mode 5. If the voltage regulation circuit is switched from the fifth configuration mode 5 to the third configuration mode 3, the third reference configuration mode may include the fourth configuration mode 4.

[0144] In the embodiment of the present invention, when the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is less than the second maximum current; or when both the maximum value and the minimum value of the load current are less than the second maximum current, the controller may adjust the first reference voltage or the second reference voltage so that the adjusted first reference voltage is less than the adjusted second reference voltage. The controller may store a second digital threshold.

[0145] As an optional implementation, when the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is less than the second maximum current, for example, the first maximum current Imax1<maximum value of load current I<(first maximum current Imax1+second maximum current Imax2), 0mA<minimum value of load current I<second maximum current Imax2. In this case, the chip is lightly loaded during most of the target period and is very heavily loaded during part of the target period (for example, the load current is maintained at about 20mA during most of the target period and at about 120mA during a few times). Therefore, the adjusted second reference voltage is equal to the second voltage divider feedback value of the maximum load voltage, and the adjusted first reference voltage is between the first voltage divider feedback value of the minimum load voltage and the first voltage divider feedback value of the maximum load voltage, thereby placing the voltage regulation circuit in the fourth configuration mode 4.

[0146] In the case where the adjusted second reference voltage is equal to the second voltage-divided feedback value of the maximum load voltage, and the adjusted first reference voltage is between the first voltage-divided feedback value of the minimum load voltage and the first voltage-divided feedback value of the maximum load voltage, if the second voltage-divided feedback value of the output voltage of the voltage regulation circuit is less than the second reference voltage within the target period, and the first voltage-divided feedback value of the output voltage is greater than the first reference voltage, then the second adjustment tube is in the working state, and the first adjustment tube is in the off state (i.e., the reference voltage is Figures 4 to 6 , the first adjustment tube 21 is OFF, and the second adjustment tube 22 is ON). If the first voltage-divided feedback value of the output voltage of the voltage regulation circuit is less than the first reference voltage within the target period, the second adjustment tube and the first adjustment tube are in the working state (i.e., the reference voltage Figures 4 to 6 , the first adjustment tube 21 is ON, the second adjustment tube 22 is ON), thereby ensuring the driving capability of the chip.

[0147] When the second divided voltage feedback value of the output voltage of the voltage regulating circuit is greater than the second reference voltage, the second adjustment tube and the first adjustment tube are automatically turned off, that is, the second adjustment tube and the first adjustment tube are both in the off state (reference voltage). Figures 4 to 6 , the first adjustment tube 21 is OFF, and the second adjustment tube 22 is OFF). This situation is rarely seen in practical applications.

[0148] As another optional implementation, when both the maximum and minimum values ​​of the load current are less than the second maximum current, for example, 0mA<maximum value of load current I (or minimum value of load current I)<second maximum current Imax2, in this case, the chip is lightly loaded during the target time period (for example, the load current is maintained at around 20mA during the target time period), and therefore the adjusted second reference voltage is equal to the second voltage divider feedback value of the maximum load voltage, and the adjusted first reference voltage is less than or equal to the first voltage divider feedback value of the minimum load voltage, thereby placing the voltage regulation circuit in the fifth configuration mode 5.

[0149] In the case where the adjusted second reference voltage is equal to the second voltage-dividing feedback value of the maximum load voltage, and the adjusted first reference voltage is less than or equal to the first voltage-dividing feedback value of the minimum load voltage, since the second voltage-dividing feedback value of the output voltage of the voltage regulating circuit is less than the second reference voltage, and the first voltage-dividing feedback value of the output voltage is greater than the first reference voltage, the second adjustment tube is automatically turned on and the first adjustment tube is automatically turned off, that is, the second adjustment tube is in the working state, and the first adjustment tube is in the off state (reference Figures 4 to 6 , the first adjustment tube 21 is OFF, and the second adjustment tube 22 is ON).

[0150] When the second divided voltage feedback value of the output voltage of the voltage regulating circuit is greater than the second reference voltage, the second adjustment tube and the first adjustment tube are automatically turned off, that is, the second adjustment tube and the first adjustment tube are both in the off state (reference voltage). Figures 4 to 6 , the first adjustment tube 21 is OFF, and the second adjustment tube 22 is OFF). This situation is rarely seen in practical applications.

[0151] When the first voltage-dividing feedback value of the output voltage of the voltage regulating circuit is less than the first reference voltage, the second adjustment tube and the first adjustment tube are automatically turned on, that is, the second adjustment tube and the first adjustment tube are in working state (reference voltage Figures 4 to 6 , the first adjustment tube 21 is ON, and the second adjustment tube 22 is ON). This situation is an abnormal situation and rarely occurs in actual applications unless the load current is obtained incorrectly. If this happens, the working state of the chip is difficult to guarantee and abnormalities may occur.

[0152] In an embodiment of the present invention, if the first reference voltage before adjustment is equal to the first voltage divider feedback value of the maximum load voltage, and the second reference voltage before adjustment is equal to the second voltage divider feedback value of the maximum load voltage, that is, the voltage regulation circuit is in the third configuration mode 3, then the controller can reduce the first reference voltage.

[0153] In the embodiment of the present invention, reference Figure 7, in the process of switching the voltage regulation circuit from the third configuration mode 3 to the fourth configuration mode 4 (or the fifth configuration mode 5), the controller can directly switch the voltage regulation circuit from the third configuration mode 3 to the fourth configuration mode 4 (or the fifth configuration mode 5), thereby improving the switching efficiency. The voltage regulation circuit can also be switched from the third configuration mode 3 to the fourth reference configuration mode first, and then the voltage regulation circuit can be switched from the fourth reference configuration mode to the fourth configuration mode 4 (or the fifth configuration mode 5). Alternatively, the voltage regulation circuit can also be switched from the third configuration mode 3 to the second sub-reference configuration mode first, and then switched from the second sub-reference configuration mode to the third configuration mode 3, and then switched from the third configuration mode 3 to the fourth configuration mode 4 (or the fifth configuration mode 5). For example, the first sub-reference configuration mode can include the first configuration mode 1 or the second configuration mode 2.

[0154] Example, reference Figure 7 If the voltage regulation circuit is switched from the third configuration mode 3 to the fourth configuration mode 4, the fourth reference configuration mode may include the fifth configuration mode 5. If the voltage regulation circuit is switched from the third configuration mode to the fifth configuration mode, the fourth reference configuration mode may include the fourth configuration mode 4.

[0155] If the first reference voltage before adjustment is greater than the second reference voltage before adjustment, and the first reference voltage before adjustment is equal to the first voltage divider feedback value of the maximum load voltage, the controller can increase the second reference voltage so that the increased second reference voltage is equal to the second voltage divider feedback value of the maximum load voltage, and reduce the first reference voltage.

[0156] Optional, reference Figure 7 The controller can first increase the second reference voltage to switch the voltage regulation circuit from the third target configuration mode (i.e., the first configuration mode 1 or the second configuration mode 2) to the third configuration mode 3, and then switch the voltage regulation circuit from the third configuration mode 3 to the fourth configuration mode 4 (or the fifth configuration mode 5) by reducing the first reference voltage.

[0157] refer to Figure 7 If the voltage regulation circuit is directly switched from the third target configuration mode (i.e., the first configuration mode 1 or the second configuration mode 2) to the fourth configuration mode 4 (or the fifth configuration mode 5), there may be an instantaneous situation in which the first adjustment tube and the second adjustment tube are turned off at the same time, resulting in undervoltage or overcurrent in the voltage regulation circuit during the mode switching process.

[0158] refer to Figure 7In the process of switching the voltage regulation circuit from the third target configuration mode to the fourth configuration mode 4 (or the fifth configuration mode 5), the voltage regulation circuit is first switched from the first target configuration mode to the third configuration mode, and then the voltage regulation circuit is switched from the third configuration mode to the fourth configuration mode 4 (or the fifth configuration mode 5). This can effectively avoid the instantaneous situation where the first adjustment tube and the second adjustment tube are turned off at the same time, thereby avoiding the situation where the voltage regulation circuit is undervoltage or overcurrent during the mode switching process.

[0159] In addition, reference Figure 7 If the second reference voltage before adjustment is equal to the second voltage-divider feedback value of the maximum load voltage, and the first reference voltage before adjustment is greater than the first voltage-divider feedback value of the minimum load voltage and less than the first voltage-divider feedback value of the maximum load voltage, that is, the voltage regulation circuit is in the fourth configuration mode 4, then when the maximum value and the minimum value of the load current are both less than the second maximum current, the controller can reduce the first reference voltage so that the reduced first reference voltage is less than or equal to the first voltage-divider feedback value of the minimum load voltage, thereby switching the voltage regulation circuit from the fourth configuration mode 4 to the fifth configuration mode 5.

[0160] refer to Figure 7 If the second reference voltage before adjustment is equal to the second voltage-divider feedback value of the maximum load voltage, and the first reference voltage before adjustment is less than or equal to the first voltage-divider feedback value of the minimum load voltage, that is, the voltage regulation circuit is in the fifth configuration mode 5, then when the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is less than the second maximum current, the controller can increase the first reference voltage so that the adjusted first reference voltage is between the first voltage-divider feedback value of the minimum load voltage and the first voltage-divider feedback value of the maximum load voltage, thereby switching the voltage regulation circuit from the fifth configuration mode 5 to the fourth configuration mode 4.

[0161] refer to Figure 7 , the first configuration mode 1 and the second configuration mode 2 of the voltage regulation circuit can be switched between each other, the first configuration mode 1 and the third configuration mode 3 can be switched between each other, the second configuration mode 2 and the third configuration mode 3 can be switched between each other, the third configuration mode 3 and the fourth configuration mode 4 can be switched between each other, the third configuration mode 3 and the fifth configuration mode 5 can be switched between each other, and the fourth configuration mode 4 and the fifth configuration mode 5 can be switched between each other.

[0162] In the embodiment of the present invention, the controller flexibly adjusts the configuration mode of the voltage regulation circuit by adjusting the first reference voltage and the second reference voltage, and flexibly adjusts the adjustment tube that needs to be in a working state based on the load current, so that the voltage regulation circuit automatically adjusts the load capacity. For example, when the maximum value and the minimum value of the load current are both less than the second maximum current, the controller only needs to control the second adjustment tube to be in a working state, thereby reducing the power consumption of the LDO itself, so as to achieve lower LDO power consumption and heat generation.

[0163] In summary, an embodiment of the present invention provides a voltage regulation method, in which a controller can adjust the magnitude relationship between the first reference voltage at the first reference voltage end and the second reference voltage at the second reference voltage end based on the first maximum current, the second maximum current and the load current after obtaining the first maximum current that can be provided by the first adjustment tube, the second maximum current that can be provided by the second adjustment tube, and the load current required by the chip in the target period after the current moment. Since the magnitude relationship between the first reference voltage and the second reference voltage can be adjusted based on the first maximum current, the second maximum current and the load current, the flexibility of controlling the first reference voltage and the second reference voltage is improved.

[0164] An embodiment of the present invention provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the voltage regulation method described in the above embodiment is implemented. For example, Figure 3 The voltage regulation method shown.

[0165] Figure 8 is a schematic diagram of the structure of a controller provided by an embodiment of the present invention, such as Figure 8 As shown, the controller 10 may include a memory 101, a processor 102, and a computer program stored in the memory 101 and executable on the processor. When the processor 102 executes the computer program, the voltage regulation method described in the above embodiment is implemented. For example, Figure 8 The voltage regulation method shown.

[0166] Fig. 9 is a block diagram of a voltage regulating device provided by an embodiment of the present invention, such as Fig. 9 As shown, the device comprises:

[0167] The first acquisition module 501 is used to acquire a first maximum current that can be provided by the adjustment tube in the first LDO circuit and a second maximum current that can be provided by the adjustment tube in the second LDO circuit, wherein the first maximum current is greater than the second maximum current.

[0168] The second acquisition module 502 is used to acquire the load current required for the chip to operate in a target period after the current moment.

[0169] The adjustment module 503 is used to adjust the magnitude relationship between the first reference voltage at the first reference voltage terminal and the second reference voltage at the second reference voltage terminal based on the first maximum current, the second maximum current and the load current.

[0170] Optionally, the adjustment module 503 is used to:

[0171] In the case where the maximum value of the load current is greater than the second maximum current and less than the first maximum current, and the minimum value of the load current is less than the first maximum current; or,

[0172] When the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is greater than the second maximum current and less than the first maximum current, adjust the first reference voltage or the second reference voltage so that the adjusted first reference voltage is greater than the adjusted second reference voltage.

[0173] Optionally, when the maximum value of the load current is greater than the second maximum current and less than the first maximum current, and the minimum value of the load current is less than the first maximum current, the adjusted first reference voltage is equal to the first voltage divider feedback value of the maximum load voltage, and the adjusted second reference voltage is less than or equal to the second voltage divider feedback value of the minimum load voltage.

[0174] Optionally, when the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is greater than the second maximum current and less than the first maximum current, the adjusted first reference voltage is equal to the first voltage divider feedback value of the maximum load voltage, and the adjusted second reference voltage is between the second voltage divider feedback value of the minimum load voltage and the second voltage divider feedback value of the maximum load voltage.

[0175] Optionally, the adjustment module 503 is used to:

[0176] If the first reference voltage before adjustment is equal to the first voltage-divided feedback value of the maximum load voltage, and the second reference voltage before adjustment is equal to the second voltage-divided feedback value of the maximum load voltage, then lowering the second reference voltage;

[0177] If the first reference voltage before adjustment is less than the second reference voltage before adjustment, and the second reference voltage before adjustment is equal to the second voltage-dividing feedback value of the maximum load voltage, then the first reference voltage is increased so that the increased first reference voltage is equal to the first voltage-dividing feedback value of the maximum load voltage, and the second reference voltage is decreased;

[0178] If the first reference voltage before adjustment is equal to the first voltage-dividing feedback value of the maximum load voltage, and the second reference voltage before adjustment is less than or equal to the second voltage-dividing feedback value of the minimum load voltage, then the second reference voltage is increased so that the increased second reference voltage is between the second voltage-dividing feedback value of the minimum load voltage and the second voltage-dividing feedback value of the maximum load voltage;

[0179] If the first reference voltage before adjustment is equal to the first voltage divider feedback value of the maximum load voltage, and the second reference voltage before adjustment is between the second voltage divider feedback value of the minimum load voltage and the second voltage divider feedback value of the maximum load voltage, the second reference voltage is reduced so that the reduced second reference voltage is less than or equal to the second voltage divider feedback value of the minimum load voltage.

[0180] Optionally, the adjustment module 503 is used to:

[0181] If the maximum value and the minimum value of the load current are both greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, the first reference voltage or the second reference voltage is adjusted so that the adjusted first reference voltage is equal to the first voltage divider feedback value of the maximum load voltage, and the adjusted second reference voltage is equal to the second voltage divider feedback value of the maximum load voltage.

[0182] Optionally, the adjustment module 503 is used to:

[0183] When the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is less than the second maximum current; or when both the maximum value and the minimum value of the load current are less than the second maximum current, adjust the first reference voltage or the second reference voltage so that the adjusted first reference voltage is less than the adjusted second reference voltage.

[0184] Optionally, when the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is less than the second maximum current, the adjusted second reference voltage is equal to the second voltage divider feedback value of the maximum load voltage, and the adjusted first reference voltage is between the first voltage divider feedback value of the minimum load voltage and the first voltage divider feedback value of the maximum load voltage.

[0185] Optionally, when the maximum and minimum values ​​of the load current are both less than the second maximum current, the adjusted second reference voltage is equal to the second voltage divider feedback value of the maximum load voltage, and the adjusted first reference voltage is less than or equal to the first voltage divider feedback value of the minimum load voltage.

[0186] Optionally, the adjustment module 503 is used to:

[0187] If the first reference voltage before adjustment is equal to the first voltage-divided feedback value of the maximum load voltage, and the second reference voltage before adjustment is equal to the second voltage-divided feedback value of the maximum load voltage, then lowering the first reference voltage;

[0188] If the first reference voltage before adjustment is greater than the second reference voltage before adjustment, and the first reference voltage before adjustment is equal to the first voltage-dividing feedback value of the maximum load voltage, then the second reference voltage is increased so that the increased second reference voltage is equal to the second voltage-dividing feedback value of the maximum load voltage, and the first reference voltage is decreased;

[0189] If the second reference voltage before adjustment is equal to the second voltage-dividing feedback value of the maximum load voltage, and the first reference voltage before adjustment is between the first voltage-dividing feedback value of the minimum load voltage and the first voltage-dividing feedback value of the maximum load voltage, then the first reference voltage is reduced so that the reduced first reference voltage is less than or equal to the first voltage-dividing feedback value of the minimum load voltage;

[0190] If the second reference voltage before adjustment is equal to the second voltage divider feedback value of the maximum load voltage, and the first reference voltage before adjustment is less than or equal to the first voltage divider feedback value of the minimum load voltage, the first reference voltage is increased so that the increased first reference voltage is between the first voltage divider feedback value of the minimum load voltage and the first voltage divider feedback value of the maximum load voltage.

[0191] In summary, an embodiment of the present invention provides a voltage regulating device, in which after obtaining the first maximum current that can be provided by the first adjustment tube, the second maximum current that can be provided by the second adjustment tube, and the load current required for the chip to operate in the target period after the current moment, the magnitude relationship between the first reference voltage at the first reference voltage end and the second reference voltage at the second reference voltage end can be adjusted based on the first maximum current, the second maximum current, and the load current. Since the magnitude relationship between the first reference voltage and the second reference voltage can be adjusted based on the first maximum current, the second maximum current, and the load current, the flexibility of controlling the first reference voltage and the second reference voltage is improved.

[0192] It should be noted that the logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be specifically implemented in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute instructions), or in combination with these instruction execution systems, devices or apparatuses. For the purposes of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or apparatus, or in combination with these instruction execution systems, devices or apparatuses. More specific examples (non-exhaustive list) of computer-readable media include the following: an electrical connection portion with one or more wirings (electronic device), a portable computer disk box (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium and then editing, interpreting or processing in other suitable ways if necessary, and then stored in a computer memory.

[0193] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0194] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0195] In the description of the present invention, it is to be understood that the terms “center”, “longitudinal”, “lateral”, “length”, “width”, “thickness”, “up”, “down”, “front”, “back”, “left”, “right”, “vertical”, “horizontal”, “top”, “bottom”, “inside”, “outside”, “clockwise”, “counterclockwise”, “axial”, “radial”, “circumferential”, etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0196] In addition, the terms "first", "second", etc. used in the embodiments of the present invention are only used for descriptive purposes and should not be understood as indicating or implying relative importance, or implicitly indicating the number of technical features indicated in the present embodiment. Therefore, the features defined by the terms "first", "second", etc. in the embodiments of the present invention can explicitly or implicitly indicate that the embodiment includes at least one of the features. In the description of the present invention, the word "multiple" means at least two or two or more, such as two, three, four, etc., unless otherwise clearly and specifically defined in the embodiments.

[0197] In the present invention, unless otherwise clearly specified or limited in the embodiments, the terms "installed", "connected", "connected" and "fixed" etc. in the embodiments should be understood in a broad sense. For example, the connection can be a fixed connection, a detachable connection, or an integrated connection. It can be understood that it can also be a mechanical connection, an electrical connection, etc.; of course, it can also be a direct connection, or an indirect connection through an intermediate medium, or it can be the internal connection of two elements, or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to the specific implementation situation.

[0198] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0199] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.

Claims

1. A voltage regulation method, characterized in that: A controller applied to a voltage regulation circuit, wherein the voltage regulation circuit further comprises a first low dropout linear regulator LDO circuit and a second LDO circuit, wherein the controller is respectively connected to a first reference voltage terminal of the first LDO circuit and a second reference voltage terminal of the second LDO circuit, and an output terminal of the first LDO circuit and an output terminal of the second LDO circuit are both used to connect a chip; and the method comprises: Obtaining a first maximum current that can be provided by the adjustment tube in the first LDO circuit and a second maximum current that can be provided by the adjustment tube in the second LDO circuit, wherein the first maximum current is greater than the second maximum current; Obtaining a load current required for the chip to operate within a target period after a current moment; Based on the first maximum current, the second maximum current, and the load current, adjusting a magnitude relationship between a first reference voltage at the first reference voltage end and a second reference voltage at the second reference voltage end; Wherein, adjusting the magnitude relationship between the first reference voltage of the first reference voltage terminal and the second reference voltage of the second reference voltage terminal includes: In the case where the maximum value of the load current is greater than the second maximum current and less than the first maximum current, and the minimum value of the load current is less than the first maximum current; or, in the case where the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is greater than the second maximum current and less than the first maximum current; adjust the first reference voltage or the second reference voltage so that the adjusted first reference voltage is greater than the adjusted second reference voltage; Wherein, when the maximum value of the load current is greater than the second maximum current and less than the first maximum current, and the minimum value of the load current is less than the first maximum current; or, when the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is greater than the second maximum current and less than the first maximum current; adjusting the first reference voltage or the second reference voltage includes: If the first reference voltage before adjustment is less than the second reference voltage before adjustment, and the second reference voltage before adjustment is equal to the second voltage divider feedback value of the maximum load voltage, then after increasing the first reference voltage so that the increased first reference voltage is equal to the first voltage divider feedback value of the maximum load voltage, the second reference voltage is reduced.

2. The method according to claim 1, characterized in that When the maximum value of the load current is greater than the second maximum current and less than the first maximum current, and the minimum value of the load current is less than the first maximum current, the adjusted first reference voltage is equal to the first voltage divider feedback value of the maximum load voltage, and the adjusted second reference voltage is less than or equal to the second voltage divider feedback value of the minimum load voltage.

3. The method according to claim 1, characterized in that When the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is greater than the second maximum current and less than the first maximum current, the adjusted first reference voltage is equal to the first voltage divider feedback value of the maximum load voltage, and the adjusted second reference voltage is between the second voltage divider feedback value of the minimum load voltage and the second voltage divider feedback value of the maximum load voltage.

4. The method according to claim 1, characterized in that In the case where the maximum value of the load current is greater than the second maximum current and less than the first maximum current, and the minimum value of the load current is less than the first maximum current; or, in the case where the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is greater than the second maximum current and less than the first maximum current; Adjusting the first reference voltage or the second reference voltage also includes: If the first reference voltage before adjustment is equal to the first voltage-divided feedback value of the maximum load voltage, and the second reference voltage before adjustment is equal to the second voltage-divided feedback value of the maximum load voltage, then reducing the second reference voltage; If the first reference voltage before adjustment is equal to the first voltage-divided feedback value of the maximum load voltage, and the second reference voltage before adjustment is less than or equal to the second voltage-divided feedback value of the minimum load voltage, then increasing the second reference voltage so that the increased second reference voltage is between the second voltage-divided feedback value of the minimum load voltage and the second voltage-divided feedback value of the maximum load voltage; If the first reference voltage before adjustment is equal to the first voltage divider feedback value of the maximum load voltage, and the second reference voltage before adjustment is between the second voltage divider feedback value of the minimum load voltage and the second voltage divider feedback value of the maximum load voltage, then the second reference voltage is reduced so that the reduced second reference voltage is less than or equal to the second voltage divider feedback value of the minimum load voltage.

5. The method according to claim 1, characterized in that Adjusting the magnitude relationship between the first reference voltage of the first reference voltage terminal and the second reference voltage of the second reference voltage terminal further includes: If the maximum value and the minimum value of the load current are both greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, the first reference voltage or the second reference voltage is adjusted so that the adjusted first reference voltage is equal to the first voltage divider feedback value of the maximum load voltage, and the adjusted second reference voltage is equal to the second voltage divider feedback value of the maximum load voltage.

6. The method according to claim 1, characterized in that Adjusting the magnitude relationship between a first reference voltage at the first reference voltage terminal and a second reference voltage at the second reference voltage terminal includes: In the case where the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is less than the second maximum current; or, When both the maximum value and the minimum value of the load current are smaller than the second maximum current, the first reference voltage or the second reference voltage is adjusted so that the adjusted first reference voltage is smaller than the adjusted second reference voltage.

7. The method according to claim 6, characterized in that When the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is less than the second maximum current, the adjusted second reference voltage is equal to the second voltage divider feedback value of the maximum load voltage, and the adjusted first reference voltage is between the first voltage divider feedback value of the minimum load voltage and the first voltage divider feedback value of the maximum load voltage.

8. The method according to claim 6, characterized in that When the maximum value and the minimum value of the load current are both smaller than the second maximum current, the adjusted second reference voltage is equal to the second voltage divider feedback value of the maximum load voltage, and the adjusted first reference voltage is less than or equal to the first voltage divider feedback value of the minimum load voltage.

9. The method according to any one of claims 6 to 8, characterized in that: Adjusting the first reference voltage or the second reference voltage includes: If the first reference voltage before adjustment is equal to the first voltage-divided feedback value of the maximum load voltage, and the second reference voltage before adjustment is equal to the second voltage-divided feedback value of the maximum load voltage, then reducing the first reference voltage; If the first reference voltage before adjustment is greater than the second reference voltage before adjustment, and the first reference voltage before adjustment is equal to the first voltage-dividing feedback value of the maximum load voltage, then increasing the second reference voltage so that the increased second reference voltage is equal to the second voltage-dividing feedback value of the maximum load voltage, and decreasing the first reference voltage; If the second reference voltage before adjustment is equal to the second voltage-divided feedback value of the maximum load voltage, and the first reference voltage before adjustment is between the first voltage-divided feedback value of the minimum load voltage and the first voltage-divided feedback value of the maximum load voltage, then the first reference voltage is reduced so that the reduced first reference voltage is less than or equal to the first voltage-divided feedback value of the minimum load voltage; If the second reference voltage before adjustment is equal to the second voltage divider feedback value of the maximum load voltage, and the first reference voltage before adjustment is less than or equal to the first voltage divider feedback value of the minimum load voltage, then the first reference voltage is increased so that the increased first reference voltage is between the first voltage divider feedback value of the minimum load voltage and the first voltage divider feedback value of the maximum load voltage.

10. A computer-readable storage medium, characterized in that: A computer program is stored thereon, and when the computer program is executed by a processor, the voltage regulation method according to any one of claims 1 to 9 is implemented.

11. A controller, characterized in that: The method comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the voltage regulation method according to any one of claims 1 to 9 is implemented.

12. A voltage regulating device, characterized in that: The device comprises: A first acquisition module is used to acquire a first maximum current that can be provided by the adjustment tube in the first LDO circuit and a second maximum current that can be provided by the adjustment tube in the second LDO circuit, wherein the first maximum current is greater than the second maximum current; A second acquisition module is used to acquire the load current required for the chip to operate in a target period after the current moment; an adjustment module, configured to adjust a magnitude relationship between a first reference voltage at a first reference voltage terminal in the first LDO circuit and a second reference voltage at a second reference voltage terminal in the second LDO circuit based on the first maximum current, the second maximum current and each of the load currents; Wherein, the adjustment module is used to: In the case where the maximum value of the load current is greater than the second maximum current and less than the first maximum current, and the minimum value of the load current is less than the first maximum current; or, in the case where the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is greater than the second maximum current and less than the first maximum current; adjust the first reference voltage or the second reference voltage so that the adjusted first reference voltage is greater than the adjusted second reference voltage; Wherein, when the maximum value of the load current is greater than the second maximum current and less than the first maximum current, and the minimum value of the load current is less than the first maximum current; or, when the maximum value of the load current is greater than the first maximum current and less than the sum of the first maximum current and the second maximum current, and the minimum value of the load current is greater than the second maximum current and less than the first maximum current; the adjustment module is used to: If the first reference voltage before adjustment is less than the second reference voltage before adjustment, and the second reference voltage before adjustment is equal to the second voltage divider feedback value of the maximum load voltage, then after increasing the first reference voltage so that the increased first reference voltage is equal to the first voltage divider feedback value of the maximum load voltage, the second reference voltage is reduced.

13. A voltage regulating circuit, characterized in that: The voltage regulation circuit includes: a controller, a first LDO circuit and a second LDO circuit; Wherein, the controller is connected to the first reference voltage terminal of the first LDO circuit and the second reference voltage terminal of the second LDO circuit respectively, and the controller is used to implement the voltage regulation method according to any one of claims 1 to 9; The output end of the first LDO circuit and the output end of the second LDO circuit are both used to connect to a chip.

14. The voltage regulating circuit according to claim 13, characterized in that: The voltage regulating circuit further includes: a first current limiting circuit; the voltage regulating circuit has a signal input terminal; Wherein, the first current limiting circuit is connected in series between the signal input end and the input end of the first adjustment tube in the first LDO circuit.

15. The voltage regulating circuit according to claim 13, characterized in that: The voltage regulating circuit further includes: a second current limiting circuit; the voltage regulating circuit has a signal input terminal; Wherein, the second current limiting circuit is connected in series between the signal input terminal and the input terminal of the second adjustment tube in the second LDO circuit.

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