Data processing method, electronic equipment and computer readable storage medium

By using the multi-queue sequential read mode in flash memory, the problem of difficult to accurately obtain the read times is solved, and the read and write performance of the memory is improved.

CN119512436APending Publication Date: 2025-02-25ZHONGSHAN JIANGBOLONG ELECTRONICS CO LTD
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Patent Information

Application Number
CN202311061653.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-08-22
Publication Date
2025-02-25

AI Technical Summary

Technical Problem

Existing flash memory is susceptible to read interference when the number of reads increases, resulting in data failure and it is difficult to accurately obtain the number of reads, affecting the read and write performance of the memory.

Method used

By obtaining the number of data reads in the storage unit and checking the number of reads based on the multi-queue sequential reading mode, ensuring accurate judgment of the number of reads and avoiding misjudgment of sequential reading plus random reading.

Benefits of technology

Accurate judgment of the number of times the memory unit is read, avoiding the degradation of read and write performance due to inaccurate counting, and ensuring the read and write performance of the memory device to the greatest extent.

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Abstract

The invention discloses a data processing method. The method comprises the following steps: acquiring data reading times of a storage unit; performing data verification on the storage unit based on the data reading times of the storage unit; wherein the number of data reading times of the storage unit is determined based on a data reading mode of the storage unit, the data reading mode comprises a multi-queue sequential reading mode, in the multi-queue sequential reading mode, a reading command sequence is divided into target queues, and the reading command sequence comprises reading commands with the same data address; the data address corresponding to the current reading command of any target queue is continuous with the data address of the previous reading command, when the addresses are discontinuous, whether the address length of continuous addresses before the data address corresponding to the current reading command in the target queue is larger than a first threshold value or not is judged, and if yes, the number of sequential reading times of the storage unit is increased by one. In this way, the number of reading times of the storage unit can be accurately obtained, and the read-write performance of the storage unit is guaranteed.
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Description

Technical Field

[0001] The present application relates to the field of storage, and in particular to a data processing method, an electronic device, and a computer-readable storage medium. Background Art

[0002] Flash memory is a non-volatile memory with large capacity, fast read and write speed and low cost. The use of flash memory is affected by read interference and the number of times the data block is erased and written. Read interference is when a page of data in the flash memory is read, a voltage is applied to other word lines in the block, causing the pages on the word lines to be slightly programmed, thereby interfering with the data of these pages. As the number of reads increases, the interference effect accumulates, eventually causing the data in the block to fail. Therefore, how to accurately obtain the number of reads, so as to perform corresponding processing to maximize the read and write performance of the memory has become a technical problem that technicians in this field need to solve urgently. Summary of the invention

[0003] The main purpose of this application is to provide a data processing method, an electronic device and a computer-readable storage medium, which can accurately obtain the number of storage unit reads and ensure the read and write performance of the storage unit.

[0004] In order to solve the above technical problems, the first technical solution adopted by the present application is: to provide a data processing method. The method includes obtaining the number of data reads of a storage unit; performing data verification on the storage unit based on the number of data reads of the storage unit; wherein the number of data reads of the storage unit is determined based on the data read mode of the storage unit, and the data read mode includes a multi-queue sequential read mode. In the multi-queue sequential read mode, the read command sequence is divided into each target queue, and the read command sequence includes read commands with the same data address. The data address corresponding to the current read command of any target queue is continuous with the data address of the previous read command. When the address is not continuous, it is determined whether the address length of the continuous address before the data address corresponding to the current read command in the target queue is greater than the second threshold value. If so, the number of sequential reads of the storage unit is increased by one.

[0005] To solve the above technical problem, the second technical solution adopted by the present application is to provide an electronic device, which includes a memory and a processor, wherein the memory is used to store program data, and the program data can be executed by the processor to implement the method described in the first technical solution.

[0006] To solve the above technical problems, the third technical solution adopted by the present application is to provide a computer-readable storage medium. The computer-readable storage medium stores program data and can be executed by a processor to implement the method described in the first technical solution.

[0007] The beneficial effects of the present application are: obtaining the number of reads of a storage unit, and then performing data verification or data movement on the storage unit based on the number of reads of the storage unit, wherein the number of reads of the storage unit is determined based on a data read mode, and the data read mode includes a multi-queue sequential read mode. In the multi-queue sequential read mode, a read command sequence is divided into each target queue, and the read command sequence includes read commands with the same data address. The data address corresponding to the current read command of any target queue is continuous with the data address of the previous read command. When it is not continuous, it is determined whether the length of the continuous address before the data address corresponding to the current read command in the target queue is greater than a first threshold. If so, the number of sequential reads is increased by one. By setting a multi-queue sequential read mode for multi-queue sequential reads, the storage device can accurately judge the multi-queue sequential read, and will not judge it as a sequential read plus a random read, so that the storage device can make a more accurate judgment on the number of data reads, avoiding the problem of test speed drop caused by prematurely reaching the read number threshold due to inaccurate counting, or data loss caused by reaching the read number threshold too late, and maximizing the read and write performance of the storage device. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0009] Figure 1 It is a flowchart of the first embodiment of the data processing method of the present application;

[0010] Figure 2 This is a queue diagram for sequential reading of multiple queues;

[0011] Figure 3 It is a flowchart of the second embodiment of the data processing method of the present application;

[0012] Figure 4 It is a flowchart of the third embodiment of the data processing method of the present application;

[0013] Figure 5 is a hash indicating intent;

[0014] Figure 6 It is another hash indicating intention;

[0015] Figure 7 is a flowchart of the fourth embodiment of the data processing method of the present application;

[0016] Figure 8is a flowchart of the fifth embodiment of the data processing method of the present application;

[0017] Fig. 9 It is a flowchart of the sixth embodiment of the data processing method of the present application;

[0018] Fig.10 It is a structural schematic diagram of the first embodiment of the electronic device of the present application;

[0019] Fig.11 It is a schematic structural diagram of a first embodiment of a computer-readable storage medium. DETAILED DESCRIPTION

[0020] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0021] The terms "first", "second", etc. in this application are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes steps or units that are not listed, or optionally includes other steps or units inherent to these processes, methods, products or devices.

[0022] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0023] Before introducing the technical solution of the present application, a brief introduction to the related technologies is first given.

[0024] In the process of reading data from a storage unit, there are sequential reading, random reading and repeated reading. Sequential reading means that the data address of the current read command is continuous with the data address of the previous read command of the current read command, random reading means that the data address of the current read command is not continuous with the data address of the previous read command of the current read command, and repeated reading means that the data address of the current read command is the same as the data address of the previous read command of the current read command.

[0025] After the data reading methods of the storage unit are classified into the above three types, the data reading times are obtained according to the three reading methods, and the data verification or data migration of the storage unit can be triggered after the accumulated reading times reach a certain threshold.

[0026] However, there is a situation in the data reading process, that is, multi-queue sequential reading. Multi-queue sequential reading means that the host sends at least one read command sequence, and the same read command sequence has read commands with the same data address, and the data address of the current read command sequence is continuous with the data address of the previous read command sequence of the current read command sequence. For example, read command sequence 1 includes k read commands, namely read cmd1, read cmd2, ..., readcmdk, and their data addresses are all a~b. The storage unit reads data in the order from read cmd1 to read cmdk. Read command sequence 2 also includes k read commands, namely read cmdk+1, read cmd k+2, ..., read cmdk*2, and their data addresses are all b+1~c. The storage unit reads data in the order from read cmd k+1 to read cmdk*2. Then read command sequences 1 and 2 form k sequential read queues, and the address of each sequential read queue is a~c. If the multi-queue sequential reading is judged according to the conventional calculation mode of sequential reading and random reading, it will be judged as a combination of sequential reading and random reading, which affects the accumulation of the number of storage units. Therefore, this application proposes the following method to deal with the above situation.

[0027] Reference Figure 1 , Figure 1 This is a flow chart of the first embodiment of the data processing method of this application. It includes the following steps:

[0028] S11: Obtain the number of data reads of the storage unit.

[0029] S12: Perform data verification or data movement on the storage unit based on the number of data reads of the storage unit. The number of data reads of the storage unit is determined based on the data read mode of the storage unit, and the data read mode includes a multi-queue sequential read mode. In the multi-queue sequential read mode, the read command sequence is divided into each target queue, and the read command sequence includes read commands with the same data address. The data address corresponding to the current read command of any target queue is continuous with the data address of the previous read command. When the address is not continuous, determine whether the address length of the continuous address before the data address corresponding to the current read command in the target queue is greater than the first threshold. If so, the number of sequential reads of the storage unit is increased by one.

[0030] After obtaining the number of data reads of the storage unit, it is determined whether the storage unit has reached a certain threshold according to the number of reads, so as to perform data verification or data migration. Data verification can be performed first, and then after verification, it is determined whether the number of ECC error bits of the storage unit exceeds the threshold or the ECC is wrong, and data migration is performed after the number of ECC error bits exceeds the threshold or the ECC is wrong.

[0031] In the multi-queue sequential read mode, the read commands sent by the host are regarded as read command sequences, and the same read command sequence includes at least one read command with the same data address. After acquisition, the storage unit divides the read command sequence and divides the read commands in the same read command sequence into different target queues, such as Figure 2 As shown, Figure 2 This is a queue diagram for sequential reading of multiple queues. Figure 2 In the example, command sequence 1 is divided into corresponding sequential queues, and the next command sequence 2 is also divided into corresponding sequential queues, and the data address of command sequence 2 is a continuous address with the data address of command sequence 1, and so on. Finally, after all command sequences are divided, N sequential queues are obtained, and each sequential queue corresponds to a sequential read number, and the number of reads corresponding to all command sequences is recorded as the sequential read number N.

[0032] The above is the case where the number of read commands in the read command sequence is equal. When the number of read commands in the read command sequence is unequal, it will cause the address of some target queues to be interrupted. It is necessary to determine whether it belongs to sequential reading according to the length of the continuous address before the interruption of the target queue. When the address is not continuous, it is determined whether the address length of the continuous address before the data address corresponding to the current read command in the target queue is greater than the first threshold. If so, the number of sequential reads of the storage unit is increased by one, that is, the previous continuous address is also determined to be a sequential read. Further, if it is less than the first threshold, the number of reads of the continuous address before the data address corresponding to the current read command is determined based on the random read mode. If the address length of the previous continuous address is less than the first threshold, the continuous address is recorded as multiple random reads and counted as random reads.

[0033] In this embodiment, the storage unit may be a storage block, and the number of read times of the storage block is obtained based on a read command having a data address of the storage block.

[0034] In this embodiment, the number of reads of the storage unit is obtained, and then data verification or data movement is performed on the storage unit based on the number of reads of the storage unit, wherein the number of reads of the storage unit is determined based on the data read mode, and the data read mode includes a multi-queue sequential read mode. In the multi-queue sequential read mode, the read command sequence is divided into each target queue, and the read command sequence includes read commands with the same data address. The data address corresponding to the current read command of any target queue is continuous with the data address of the previous read command. When it is not continuous, it is determined whether the length of the continuous address before the data address corresponding to the current read command in the target queue is greater than the first threshold. If so, the number of sequential reads is increased by one. By setting the multi-queue sequential read mode for the multi-queue sequential read situation, the storage device can accurately judge the multi-queue sequential read, and will not judge it as a sequential read plus a random read, so that the storage device can make a more accurate judgment on the number of data reads, avoiding the problem of prematurely reaching the read number threshold due to inaccurate counting, causing test speed drop, or reaching the read number threshold too late, causing data loss, and maximizing the read and write performance of the storage device.

[0035] Reference Figure 3 , Figure 3 This is a flow chart of the second embodiment of the data processing method of this application. It includes the following steps:

[0036] S21: Determine whether the number of consecutive read data addresses is greater than a second threshold.

[0037] When determining whether the storage unit counts the data address corresponding to the read command in a multi-queue sequential read mode or in a random read mode, the determination is made based on a preset second threshold. It is determined whether the address consecutive number of the read command is greater than the second threshold, where the address consecutive number refers to the consecutive number of bits. If so, step S22 is executed. If not, step S23 is executed.

[0038] S22: Determine the number of times data in the storage unit is read based on the multi-queue sequential reading mode.

[0039] S23: Determine the number of data reads of the storage unit based on the random read mode.

[0040] When it is greater than the second threshold, the number of reads of the data address is counted in a multi-queue sequential read mode, and when it is less than the second threshold, the number of reads of the data address is counted in a random read mode.

[0041] Reference Figure 4 , Figure 4 The flowchart of the third embodiment of the data processing method of the present application is shown in FIG. In response to the random read mode, the number of data reads of the storage unit is determined based on the data read mode in the storage unit, including:

[0042] S31: Perform hash processing on each data address corresponding to the random read mode to obtain at least one hash value.

[0043] A hash value calculation is performed on the data address corresponding to each random read command to obtain at least one hash value.

[0044] S32: Determine a corresponding data storage column in the hash table based on the hash value, the hash table has at least two data storage columns, and there is a data storage column corresponding to each data address.

[0045] A hash table is a data table in random read mode. Each hash value, as an index, corresponds to a data storage column in the hash table. The integer obtained by dividing the hash value by the number of storage columns corresponds to the location of the storage column where the address should be stored. The hash table has at least two data storage columns, and each data address has a corresponding data storage column. For example, the storage column can be determined in a one-to-many manner. There are N storage columns in the hash table, and the number obtained by dividing the hash value of the data address of the random read command by N represents the storage column corresponding to the data address. Figure 5 , Figure 5 is a hash representation. Taking the 4K command as an example, the address hash value of read 4k cmd1 is a, a divided by N is 3, so the storage column corresponding to the cmd1 address is 3, the address hash value of read 4k cmd2 is b, b divided by N is 1, so the storage column corresponding to the cmd2 address is 1, the address hash value of read 4k cmd3 is c, c divided by N is N-1, so the storage column corresponding to the cmd3 address is N-1.

[0046] S33: Compare the data address corresponding to the hash value with the target data address in the corresponding data storage column.

[0047] The hash value is compared with the data address stored in the corresponding data storage column to determine whether the address is repeated.

[0048] S34: In response to the existence of a target data address that is identical to the data address corresponding to the hash value in the data storage column, changing the read mode of the data corresponding to the data address to a repeated read mode, and increasing the number of repeated reads of the storage unit by one; in response to the existence of a target data address that is identical to the data address corresponding to the hash value in the data storage column corresponding to the data address of the hash value, filling the data address corresponding to the hash value into the corresponding data storage column, and increasing the number of random reads of the storage unit by one.

[0049] After obtaining the hash value and the corresponding data storage column, compare the data address corresponding to the hash value with the target data address in the corresponding storage column. Figure 5 , since Table-0~Table-X are all empty, there is no target data address in the hash table. Fill the cmd1 address corresponding to hash value a into data storage column 3, fill the cmd2 address corresponding to hash value b into data storage column 1, and fill the cmd3 address corresponding to hash value c into data storage column N-1. Data addresses cmd1, cmd2, and cmd3 all correspond to a random read of their respective storage units. When there are other data addresses in the hash table, refer to Figure 6 , Figure 6 Another hash representation. Taking the 4K command as an example, Figure 5 Based on the random read command that has been calculated, the address of read 4k cmd4 is hash value d, d divided by N is 3, so the storage column corresponding to the cmd4 address is 3, the address hash value of read4k cmd5 is e, e divided by N is 2, so the storage column corresponding to the cmd5 address is 2, and the address hash value of read 4k cmd6 is f, f divided by N is N-1, so the storage column corresponding to the cmd6 address is N-1. At this time, the cmd4 address corresponding to the hash value e is filled in the data storage column 2, and there is no target data address identical to it in the hash table. The cmd5 address corresponding to the hash value d needs to be compared with the target data address already stored in the data storage column 3 to determine whether there is an identical data address. Similarly, the cmd6 address corresponding to the hash value f needs to be compared with the target data address already stored in the data storage column N-1 to determine whether there is an identical data address. If the data address corresponding to the hash value d is the same as the data address corresponding to the hash value a, a repeated read is recorded. If the data address corresponding to hash value d is different from the data address corresponding to hash value a, and the data storage column does not store other target data addresses, then record a random read and fill the cmd5 address corresponding to hash value d into data storage column 3. Similarly, if the data address corresponding to hash value f is the same as the data address corresponding to hash value c, then record a repeated read. If the data address corresponding to hash value f is different from the data address corresponding to hash value c, and the data storage column does not store other target data addresses, then record a random read and fill the cmd6 address corresponding to hash value f into data storage column N-1.

[0050] The letters used as examples in the above embodiments may be any values ​​and are not limited thereto.

[0051] Reference Figure 7 , Figure 7 This is a flow chart of the fourth embodiment of the data processing method of this application. This method is a further extension of step S34, and includes the following steps:

[0052] S41: Determine whether the data storage column is full.

[0053] If the data address needs to be filled into the corresponding data storage column, the data storage status of the data storage column is first determined.

[0054] S42: In response to the data storage column not being full, fill the data address corresponding to the hash value into the free position of the data storage column; in response to the data storage column being full, replace the data address with the earliest writing time in the data storage column with the data address corresponding to the hash value.

[0055] If the data storage column corresponding to the hash value is not full, fill the data address corresponding to the hash value into the free position where the data address has not been written. If it is full, obtain the write time of each data address in the data storage column, delete the data address with the earliest write time, and provide a free position for the data address to be written, so as to realize the replacement of the data address with the earliest write time by the written data address.

[0056] In one embodiment, each row in the data storage column stores a data address, and the write time of the data address stored in each row is decreasing in the order of increasing row numbers. That is, in the order of increasing row numbers, the write time of the data address stored in each row is getting earlier and earlier. For example, the write time of the data address in the first row is later than the write time of the data address in the second row. The data storage column in the hash table starts writing data addresses from the first row.

[0057] In response to the data storage column being not full, when there is a data address in the data storage column, all the data addresses stored in the data storage column are moved down one row while maintaining the current order, and then the data address corresponding to the hash value is filled into the first row of the data storage column, or when there is no data address in the data storage column, the data address corresponding to the hash value is filled into the first row of the data storage column.

[0058] In response to the data storage column being full, the data address of the last row in the data storage column is deleted, all remaining data addresses in the data storage column are shifted down one row while maintaining the current order, and then the data address corresponding to the hash value is filled into the first row of the data storage column.

[0059] In a specific embodiment, the data addresses in the data storage column in the hash table can be filled in according to the write time starting from the first row, and the write time of the data addresses in the data storage column is decreasing according to the order of increasing row numbers. For example, the data address written first is filled in the first row. When the second data address needs to be written, the data address of the first row is moved down and moved to the second row, and the second data address is filled in the first row, and so on. When the data storage column is full, if a new data address needs to be written, the data address of the last row is deleted, and the data addresses of the remaining rows are moved down by one row while maintaining the current order, that is, the data address of the second-to-last row is moved to the first-to-last row, and the data address of the third-to-last row is moved to the second-to-last row, and so on to complete the migration of the data addresses of all remaining rows, and then the new data address is filled in the first row of the data storage column.

[0060] like Figure 6 As shown, when it is determined that the data address corresponding to the hash value d is different from the data address corresponding to the hash value a, the cmd1 address corresponding to the hash value a is moved down to the second row Table-1 of the data storage column 3, and the cmd5 address corresponding to the hash value d is filled into the first row Table-0 of the data storage column 3 to complete the writing of the cmd5 address.

[0061] When the writing and storage of the data address is completed in the above queue mode, the logic is simple and the execution is fast, which is convenient for improving the writing efficiency of the data address.

[0062] In an embodiment of the present application, the capacity of the hash table is determined based on the cache capacity of the storage device corresponding to the storage unit. When judging the storage unit, the cache capacity of the corresponding storage device is obtained, and the occupied size of the hash table is set according to the cache capacity, and the data occupied capacity of the hash table is less than or equal to the cache capacity of the storage device. Since the more data addresses the hash table can store, the more accurate its judgment of the number of data reads is, and the lower the possibility of count loss is, therefore, when the capacity of the hash table is equal to the cache capacity of the storage device, the accuracy of the storage device in judging the number of storage unit reads based on the technical solution of the present application can be maximized.

[0063] Reference Figure 8 , Figure 8 This is a flowchart of the fifth embodiment of the data processing method of the present application. The method is a further extension of step S12, and includes the following steps:

[0064] S51: Obtain the number of sequential reads, the number of repeated reads, and the number of random reads of the storage unit, and add them up to obtain a cumulative number.

[0065] After obtaining the number of reads of each storage unit, the sum is obtained.

[0066] S52: In response to the accumulated number of times being greater than a third threshold, performing data verification or data migration on the storage unit.

[0067] It is determined whether the accumulated number of times is greater than a preset third threshold value. If so, data verification or data migration of the storage unit is performed.

[0068] Reference Fig. 9 , Fig. 9 This is a flow chart of the sixth embodiment of the data processing method of the present application. The method is a further extension of step S12, and includes the following steps:

[0069] S61: Obtaining the number of sequential reads, repeated reads and random reads of a storage unit, as well as a first interference value corresponding to the sequential read, a second interference value corresponding to the repeated read, and a third interference value corresponding to the random read.

[0070] It can be understood that when the reading mode is different, the interference degree to the storage unit is also different, so different interference degree values, namely the first interference value, the second interference value and the third interference value, can be set for sequential reading, repeated reading and random reading.

[0071] S62: Add the product of the number of sequential reads and the first interference value, the product of the number of repeated reads and the second interference value, and the product of the number of random reads and the third interference value to obtain a final interference value for the storage unit.

[0072] S63: In response to the final interference value being greater than the fourth threshold, performing data verification or data migration on the storage unit.

[0073] The final interference value is obtained by weighted summing of the number of reads and the corresponding interference value, and the final interference value is compared with the fourth threshold value to determine whether to perform data verification or data migration of the storage unit.

[0074] like Fig.10 As shown, Fig.10 This is a schematic structural diagram of the first embodiment of the electronic device of the present application.

[0075] The electronic device includes a processor 110 and a memory 120 .

[0076] The processor 110 controls the operation of the electronic device, and the processor 110 may also be referred to as a CPU (Central Processing Unit). The processor 110 may be an integrated circuit chip having the ability to process a signal sequence. The processor 110 may also be a general-purpose processor, a digital signal sequence processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

[0077] The memory 120 stores instructions and program data required for the processor 110 to operate.

[0078] The processor 110 is used to execute instructions to implement the method provided by any one of the first to sixth embodiments of the data processing method of the present application and any possible combination thereof.

[0079] like Fig.11 As shown, Fig.11 This is a schematic diagram of the structure of the first embodiment of the computer-readable storage medium of the present application.

[0080] An embodiment of a readable storage medium of the present application includes a memory 210, and the memory 210 stores program data. When the program data is executed, the method provided by any one of the first to sixth embodiments and possible combinations of the data processing method of the present application is implemented.

[0081] The memory 210 may include a medium that can store program instructions, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, or it may be a server that stores the program instructions. The server may send the stored program instructions to other devices for execution, or it may execute the stored program instructions itself.

[0082] In summary, the number of reads of a storage unit is obtained, and then data verification or data movement is performed on the storage unit based on the number of reads of the storage unit, wherein the number of reads of the storage unit is determined based on a data read mode, and the data read mode includes a multi-queue sequential read mode. In the multi-queue sequential read mode, a read command sequence is divided into each target queue, and the read command sequence includes read commands with the same data address. The data address corresponding to the current read command of any target queue is continuous with the data address of the previous read command. When it is not continuous, it is determined whether the length of the continuous address before the data address corresponding to the current read command in the target queue is greater than the first threshold. If so, the number of sequential reads is increased by one. By setting a multi-queue sequential read mode for multi-queue sequential reads, the storage device can accurately judge the multi-queue sequential reads, and will not judge it as a sequential read plus a random read, so that the storage device can make a more accurate judgment on the number of data reads, avoiding the problem of test speed drop caused by prematurely reaching the read count threshold due to inaccurate counting, or data loss caused by reaching the read count threshold too late, and maximizing the read and write performance of the storage device.

[0083] In the several embodiments provided in this application, it should be understood that the disclosed methods and devices can be implemented in other ways. For example, the device implementation described above is only illustrative, for example, the division of the modules or units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed.

[0084] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0085] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0086] If the integrated units in the above other embodiments are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, server, or network device, etc.) or a processor (processor) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, RandomAccess Memory), disk or optical disk and other media that can store program codes.

[0087] The above descriptions are merely embodiments of the present application and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A data processing method, characterized in that: The method comprises: Get the number of data reads of the storage unit; Performing data verification or data migration on the storage unit based on the number of data reads of the storage unit; Among them, the number of data reads of the storage unit is determined based on the data read mode of the storage unit, and the data read mode includes a multi-queue sequential read mode. In the multi-queue sequential read mode, the read command sequence is divided into each target queue, and the read command sequence includes read commands with the same data address. The data address corresponding to the current read command of any target queue is continuous with the data address of the previous read command. When the address is not continuous, it is determined whether the address length of the continuous address before the data address corresponding to the current read command in the target queue is greater than the first threshold. If so, the number of sequential reads of the storage unit is increased by one.

2. The method according to claim 1, characterized in that The method further comprises: If it is less than the first threshold, the number of reads of the continuous addresses before the data address corresponding to the current read command is determined based on the random read mode.

3. The method according to claim 1, characterized in that The determination of the data reading mode includes: Determine whether the consecutive number of read data addresses is greater than a second threshold; If so, determining the number of times data in the storage unit is read based on a multi-queue sequential read mode; If not, the number of data reads of the storage unit is determined based on a random read mode.

4. The method according to claim 2 or 3, characterized in that: In response to the random read mode, the number of data reads of the storage unit is determined based on the data read pattern in the storage unit, including: Performing hash processing on each data address corresponding to the random read mode to obtain at least one hash value; Determine a corresponding data storage column in a hash table based on the hash value, the hash value table having at least two data storage columns, and there is a data storage column corresponding to each bit of the data address; Compare the data address corresponding to the hash value with the target data address in the corresponding data storage column; In response to the existence in the data storage column that the target data address is the same as the data address corresponding to the hash value, changing the read mode of the data corresponding to the data address to a repeated read mode, and increasing the number of repeated reads of the storage unit by one; In response to the target data address not being the same as the data address corresponding to the hash value in the data storage column, the data address corresponding to the hash value is filled into the corresponding data storage column, and the number of random reads of the storage unit is increased by one.

5. The method according to claim 4, characterized in that Filling the data address corresponding to the hash value into the corresponding data storage column includes: Determine whether the data storage column is full; In response to the data storage column being not full, filling the data address corresponding to the hash value into an idle position of the data storage column; In response to the data storage column being full, the data address corresponding to the hash value replaces the data address with the earliest writing time in the data storage column.

6. The method according to claim 5, characterized in that In the data storage column, each row stores one data address, and the write time of the data address stored in each row decreases in the order of increasing row number; In response to the data storage column being not full, filling the data address corresponding to the hash value into an idle position of the data storage column; In response to the data storage column being full, replacing the data address with the earliest writing time in the data storage column with the data address corresponding to the hash value comprises: In response to the data storage column being not full, when the data address exists in the data storage column, all the data addresses stored in the data storage column are shifted down by one row while maintaining the current order, and then the data address corresponding to the hash value is filled into the first row of the data storage column, or when the data address does not exist in the data storage column, the data address corresponding to the hash value is filled into the first row of the data storage column; In response to the data storage column being full, the data addresses in the last row of the data storage column are deleted, all the remaining data addresses in the data storage column are shifted down one row while maintaining the current order, and then the data addresses corresponding to the hash values ​​are filled into the first row of the data storage column.

7. The method according to claim 1, characterized in that The performing data verification or data migration on the storage unit based on the number of data reads of the storage unit comprises: Obtaining the number of sequential reads, the number of repeated reads, and the number of random reads of the storage unit, and adding them up to obtain a cumulative number; In response to the accumulated number of times being greater than a third threshold, data verification or data migration is performed on the storage unit.

8. The method according to claim 1, characterized in that The performing data verification or data migration on the storage unit based on the number of data reads of the storage unit comprises: Obtaining a number of sequential reads, a number of repeated reads, and a number of random reads of the storage unit, as well as a first interference value corresponding to the sequential reads, a second interference value corresponding to the repeated reads, and a third interference value corresponding to the random reads; Adding the product of the number of sequential reads and the first interference value, the product of the number of repeated reads and the second interference value, and the product of the number of random reads and the third interference value to obtain a final interference value for the storage unit; In response to the final interference value being greater than a fourth threshold, data verification or data migration is performed on the storage unit.

9. An electronic device, characterized in that: The invention comprises a memory and a processor, wherein the memory is used to store program data, and the program data can be executed by the processor to implement the method according to any one of claims 1 to 8.

10. A computer-readable storage medium, characterized in that: Program data is stored and can be executed by a processor to implement the method according to any one of claims 1 to 8.