Memory resource access method and device, address translation method and device, equipment and medium

Abstract

The invention provides a memory resource access method and device, an address translation method and device, electronic equipment and a storage medium. According to the embodiment of the invention, a virtual machine management component can be used for firstly obtaining a direct memory access request of external equipment to a memory resource mounted under a virtual machine; and searching a target physical address corresponding to the target virtual address of the target memory resource from the data processing unit, so that the external equipment accesses the target memory resource by accessing the target physical address. Wherein a physical address translated by the virtual machine management component for the virtual address of the memory resource in advance is stored in the data processing unit, and the data processing unit performs data communication with the virtual machine management component through a communication drive simulated in the virtual machine management component. By adopting the scheme, the congestion of the shared memory resource (IOTLB) of the memory management unit possibly caused by excessive address query can be avoided, the consumption of the shared memory resource is reduced, and the utilization rate of the shared memory resource is improved.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a method for accessing memory resources, an address translation method, a device, an electronic device, and a storage medium. Background Art

[0002] In computer virtualization technology, the virtual address accessed by the device can be converted into an actual physical address through the IOMMU (Input / Output Memory Management Unit), and the mapping relationship between the virtual address and the physical address can be saved in the IOMMU page table. The mapping relationship between the virtual address and the physical address can be obtained by querying the IOMMU page table.

[0003] In order to improve the efficiency of querying the IOMMU page table, an IOTLB (Input / Output translation lookaside buffer, a shared memory resource) can be introduced to store the IOMMU page table to reduce the number of table lookups. However, since the IOTLB is a shared memory resource and can be shared by all PCI devices on the PCI bus, when multiple I / O devices access the IOTLB at the same time, the address range for direct memory access will increase linearly, causing the consumption of the IOTLB to also increase linearly. The required IOTLB capacity exceeds its capacity limit, resulting in IOTLB congestion. This may also cause address translation to slow down or even freeze, affecting the system's I / O performance.

[0004] Therefore, it is necessary to propose a new memory resource access method or address translation method to reduce the consumption of IOTLB. Summary of the invention

[0005] Embodiments of the present application provide a method for accessing memory resources, an address translation method, an apparatus, an electronic device, and a storage medium to solve one or more of the above-mentioned technical problems.

[0006] In a first aspect, an embodiment of the present application provides a method for accessing memory resources, which is applied to a virtual machine management component, and the method includes:

[0007] Obtaining a direct memory access request from an external device to a memory resource mounted under a virtual machine, wherein the direct memory access request carries a target virtual address in the virtual machine corresponding to a target memory resource to be accessed;

[0008] The target physical address corresponding to the target virtual address of the target memory resource is searched from the data processing unit, so that the external device accesses the target memory resource by accessing the target physical address; wherein the data processing unit stores the physical address translated in advance by the virtual machine management component for the virtual address of the memory resource, and the data processing unit communicates data with the virtual machine management component through the communication driver simulated in the virtual machine management component.

[0009] In a second aspect, an embodiment of the present application provides an address translation method, which is applied to a computing device, and the method includes:

[0010] Calling a virtual machine management component to translate a virtual address of a memory resource mounted under a virtual machine deployed on the computing device into a corresponding physical address;

[0011] Communicate with the data processing unit through the simulated communication driver in the virtual machine management component, and send the address translation cache of the virtual address and the physical address to the data processing unit;

[0012] The address translation cache is stored by the data processing unit so as to search for a physical address corresponding to a virtual address of the memory resource according to the address translation cache when accessing the memory resource.

[0013] In a third aspect, an embodiment of the present application provides a memory resource access device, which is applied to a virtual machine management component, and the device includes:

[0014] An access request acquisition module, used to acquire a direct memory access request from an external device to a memory resource mounted under a virtual machine, wherein the direct memory access request carries a target virtual address in the virtual machine corresponding to a target memory resource to be accessed;

[0015] A physical address search module is used to search for a target physical address corresponding to a target virtual address of the target memory resource from a data processing unit, so that the external device can access the target memory resource by accessing the target physical address; wherein the data processing unit stores a physical address translated in advance by a virtual machine management component for the virtual address of the memory resource, and the data processing unit communicates data with the virtual machine management component through a communication driver simulated in the virtual machine management component.

[0016] In a fourth aspect, an embodiment of the present application provides an address translation device, which is applied to a computing device, and the device includes:

[0017] An address translation module, used for calling a virtual machine management component to translate a virtual address of a memory resource mounted under a virtual machine deployed on the computing device into a corresponding physical address;

[0018] An address translation cache sending module, used to communicate with a data processing unit through a communication driver simulated in the virtual machine management component, and send the address translation cache of the virtual address and the physical address to the data processing unit;

[0019] The address translation cache storage module is used to store the address translation cache through the data processing unit so as to search for the physical address corresponding to the virtual address of the memory resource according to the address translation cache when accessing the memory resource.

[0020] In a fifth aspect, an embodiment of the present application provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory, wherein the processor implements any of the methods described above when executing the computer program.

[0021] In a sixth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, any of the methods described above is implemented.

[0022] Compared with the related art, this application has the following advantages:

[0023] According to the embodiment of the present application, a virtual machine management component can be used to first obtain a direct memory access request from an external device to a memory resource mounted under a virtual machine, wherein the direct memory access request carries a target virtual address in the virtual machine corresponding to the target memory resource to be accessed, and then a target physical address corresponding to the target virtual address of the target memory resource is searched from a data processing unit, so that the external device can access the target memory resource by accessing the target physical address. The data processing unit stores a physical address that the virtual machine management component pre-translates into a virtual address of a memory resource, and the data processing unit communicates data with the virtual machine management component through a communication driver simulated in the virtual machine management component. By adopting the above scheme, a virtual machine management component is used to replace the address translation function of the memory management unit, and a data processing unit is used to replace the function of performing (IOTLB) page table query and storage in the shared memory resources of the memory management unit, so that a part of the physical address can be obtained by querying the cache of the address translation mapping relationship stored in the data processing unit, without using the memory management unit (IOMMU) for translation and page table query, which can avoid the congestion of shared memory resources that may be caused by excessive address query access to the shared memory resources of the memory management unit, reduce the consumption of shared memory resources, and improve the utilization rate of shared memory resources.

[0024] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In the accompanying drawings, unless otherwise specified, the same reference numerals throughout the multiple drawings represent the same or similar parts or elements. These drawings are not necessarily drawn to scale. It should be understood that these drawings only depict some embodiments according to the present application and should not be regarded as limiting the scope of the present application.

[0026] Figure 1 A schematic diagram of an address translation solution provided in an embodiment of the present application is shown;

[0027] Figure 2 A flowchart of a method for accessing memory resources provided in an embodiment of the present application is shown;

[0028] Figure 3 A flowchart of an address translation method provided in an embodiment of the present application is shown;

[0029] Figure 4 A structural block diagram of a memory resource access device provided in an embodiment of the present application is shown;

[0030] Figure 5 A structural block diagram of an address translation device provided in an embodiment of the present application is shown; and

[0031] Figure 6 A block diagram of an electronic device used to implement an embodiment of the present application is shown. DETAILED DESCRIPTION

[0032] In the following, only some exemplary embodiments are briefly described. As those skilled in the art will appreciate, the described embodiments may be modified in various ways without departing from the concept or scope of the present application. Therefore, the drawings and descriptions are considered to be exemplary in nature and not restrictive.

[0033] To facilitate understanding of the technical solutions of the embodiments of the present application, the following describes the related technologies of the embodiments of the present application. The following related technologies can be combined with the technical solutions of the embodiments of the present application as optional solutions, and they all belong to the protection scope of the embodiments of the present application.

[0034] The traditional way of processing direct memory access requests (DMA) of IO devices is to convert the virtual address (IOVA) accessed by the device into the actual physical address (PA) through the IOMMU (Input / Output Memory Management Unit), and save the mapping relationship from IOVA to PA in the IOMMU page table. The IOMMU page table consists of multiple levels of page tables. The mapping relationship from IOVA to PA can be obtained by querying the IOMMU page table. Using IOTLB (Input / Output translation lookaside buffer, a shared memory resource) to store the IOMMU page table can reduce the number of queries to the IOMMU page table and improve the efficiency of the table lookup. However, since the IOTLB is a shared memory resource, it can be shared by all PCI devices on the PCI (Peripheral Component Interconnect) bus and is a scarce / performance-critical resource. Since the cache space of IOTLB is limited, IOTLB only caches some page table entries in the page table. If the address to be queried is not in the page table entry of the IOTLB cache, it will cause IOTLB miss (IOTLB query failure). In the case of IOTLB miss, it is usually necessary to traverse the page table (IOPT) of IOMMU, which will increase the burden of IO access. When multiple I / O (Input / Output) devices access the IOTLB at the same time, the DMA (direct memory access) address range accessed by the I / O device will increase linearly, causing the consumption of IOTLB to increase linearly. However, since the capacity of the IOMMU's IOTLB cache space is fixed and not scalable, when the device density increases, excessive DMA (direct memory access) address queries will cause the number of required IOTLBs to exceed its capacity limit, resulting in IOTLB congestion, which may also cause address translation to slow down or even freeze, affecting the system's I / O performance. Therefore, it is necessary to reduce the consumption of IOTLB.

[0035] In a related technology prior to the present application, the ATS (Address Translation Service) in the PCIe4.0 standard can be implemented in the I / O (Input / Output) device, that is, the I / O (Input / Output) device interacts with the IOMMU through the ATS hardware protocol to achieve address conversion, and utilizes the MMU (Memory Management Unit) in the I / O (Input / Output) device to distribute the addresses that should have been translated using the IOMMU method to the MMU of each device for address translation. Similar to IOMMU, IOMMU corresponds to a shared memory resource IOTLB, and the MMU inside the device also corresponds to its own memory resource TLB (Translation Lookaside Buffer, page table cache, a CPU cache used to improve the speed of translating virtual addresses to physical addresses). If the addresses that should have been translated by IOMMU are distributed to each device's own MMU for address translation, then the original method of obtaining physical addresses by querying the page table in the IOTLB can be transformed into a method of obtaining physical addresses by querying the page table in the device TLB (Device TLB). This Device TLB method is equivalent to distributing the device's address translation work to each device, so it can reduce the consumption of IOTLB. However, this solution is not only expensive but also requires a complex environment. If an IO device wants to support ATS, it not only requires the deployment of a complete TLB module in the IO device, but also requires the device to be able to implement the ATS protocol standard on the PCIe link, and needs to be applied to the data center through hardware iteration. In addition, using the TLB in the device will increase the overall translation time overhead and slow down the system's processing speed for IO requests. In actual applications, a considerable number of devices do not support ATS.

[0036] Therefore, it is necessary to propose a new method for accessing memory resources or a method for address translation to reduce the consumption of IOTLB. The present application can provide an address translation method assisted by a hypervisor (virtual machine management component), which can translate part of the virtual addresses in advance in a software-assisted manner and cache them in a data processing unit to alleviate the IOTLB consumption and congestion that may be caused when an external device directly accesses the memory resources mounted under the virtual machine. The solution of the present application can realize address translation without using IOMMU when the device does not support ATS.

[0037] Figure 1It is an exemplary schematic diagram for implementing an address translation scheme provided in an embodiment of the present application. In an embodiment of the present application, a virtual machine (VM), a virtual machine management component (Hypervisor) and a data processing unit (DPU) may be deployed on a computing device, wherein the data processing unit may include but is not limited to a graphics processor GPU (Graphics Processing Unit), an artificial intelligence processor NPU (Neural network Processing Unit), a deep learning processor DPU (Deep learning Processing Unit), a general-purpose graphics processor GPGPU (General-purpose computing on graphics processing units), an AI accelerator, a field programmable logic gate array FPGA (Field Programmable Gate Array), etc., and the present application does not impose any restrictions on this. The data processing unit in the embodiment of the present application can communicate data with the virtual machine management component through a simulated communication driver deployed in the virtual machine management component. This simulated communication driver can be a communication driver simulated using PV AT (Para-Virtualization Address Translation, semi-virtualization) technology. In terms of architecture, the working principle of this semi-virtualization is to open an additional communication channel between the virtual machine management component and the computing device operating system through the PV front-end and back-end drivers, so that the back-end data processing unit and the front-end virtual machine management component can communicate through this simulated driver.

[0038] In addition, the data processing unit may also be configured with a driver for direct communication with the virtual machine, such as a VF driver (virtual function, a virtual PCI device). After the VF is deployed in the data processing unit, the VF can be passed through to a virtual machine for use, that is, a VF can be directly used by the virtual machine in the form of a disk or a network card. Therefore, the data processing unit can perceive the underlying virtual address (IO ring) created by the virtual machine during the initialization process through the VF, and then notify the virtual machine management component to translate the underlying virtual address.

[0039] In an embodiment of the present application, the process of translating the virtual address can be performed by first calling the virtual machine management component to translate the virtual address of the memory resource mounted under the virtual machine deployed on the computing device into the corresponding physical address, and then communicating with the data processing unit through the communication driver simulated in the virtual machine management component, sending the address translation cache of the virtual address and the physical address to the data processing unit, and finally storing the address translation cache through the data processing unit, so that external devices such as IO peripherals can search for the physical address corresponding to the virtual address of the memory resource according to the address translation cache when accessing the memory resource.

[0040] like Figure 1 As shown, after the data processing unit senses the underlying virtual address (IO ring) (①), the data processing unit can notify the virtual machine management component through the simulated communication driver (PV AT) to translate the underlying virtual address (②). The virtual machine management component can obtain the underlying virtual address (③) from the virtual machine, and after translating it, send the underlying virtual address and the address translation cache (VA->PA) of the corresponding physical address to the data processing unit through the simulated communication driver (④). The data processing unit allocates corresponding storage space for the address translation cache and stores it, so that when the external device accesses the memory resource, it can search for the physical address corresponding to the virtual address of the memory resource according to the address translation cache. Of course, in addition to the method in which the data processing unit senses the underlying virtual address (IO ring) and notifies the virtual machine management component to translate the underlying virtual address, the virtual machine management component can also be called to actively monitor the underlying virtual address of the memory resource and translate the underlying virtual address.

[0041] Furthermore, the virtual machine management component can be called to monitor the underlying virtual addresses of memory resources and the associated virtual addresses (IO buffers) directly or indirectly referenced by the underlying virtual addresses, and the virtual machine management component can be called to determine the hot virtual addresses from these associated virtual addresses. In other words, each IO ring and its associated virtual addresses can be scanned by the virtual machine management component (hypervisor), and the hot pages (pages with high call frequency) can be identified. The hot pages can be determined as hot virtual addresses (⑤), and their addresses can be translated.

[0042] The address translation cache of the physical address and the virtual address translated by the above process can be pre-stored in the data processing unit. When the virtual machine management component obtains the direct memory access request of the external device to the memory resource mounted under the virtual machine, the target physical address corresponding to the target virtual address of the target memory resource can be found from the data processing unit, so that the external device can access the target memory resource by accessing the target physical address. Among them, the direct memory access request can carry the target virtual address of the target memory resource corresponding to the virtual machine in the virtual machine, and the data processing unit stores the physical address of the virtual address of the memory resource translated by the virtual machine management component in advance by the above address translation method. The data processing unit communicates data with the virtual machine management component through the communication driver simulated in the virtual machine management component. This access method of memory resources can make the external device access to a part of the underlying virtual address and the hot spot virtual address without finding the target physical address corresponding to the target virtual address of the target memory resource through the page table in the shared memory space (IOTLB) corresponding to the memory management unit (IOMMU), thereby reducing the consumption of the shared memory space (IOTLB) in the process of address translation and improving the utilization rate of the shared memory space.

[0043] The execution subject of the embodiment of the present application may be an application, service, instance, software-based functional module, virtual machine (VM), container or cloud server, etc., or a hardware device (such as a server or terminal device) or hardware chip (such as CPU, GPU, FPGA, NPU, AI acceleration card or DPU) with data processing function. The device for implementing memory resource access or address translation can be deployed on the computing device of the application party providing the corresponding service or on the cloud computing platform providing computing power, storage and network resources. The mode of providing services to the outside world by the cloud computing platform may be IaaS (Infrastructure as a Service), PaaS (Platform as a Service), SaaS (Software as a Service) or DaaS (Data as a Service). Taking the platform providing SaaS software as a service (Software as a Service) as an example, the cloud computing platform can use its own computing resources to provide memory resource access or address translation model training or memory resource access or address translation module function execution, and the specific application architecture can be built according to service requirements. For example, the platform can provide construction services based on the above model to applications or individuals using platform resources, and further call the above model and implement online or offline memory resource access or address translation functions based on memory resource access or address translation requests submitted by related clients or servers and other devices.

[0044] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0045] The technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems are described in detail below with specific embodiments. The several specific embodiments listed can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0046] The present application embodiment provides a method for accessing memory resources applied to a virtual machine management component, such as Figure 2 FIG. 2 is a flow chart of a method 200 for accessing a memory resource according to an embodiment of the present application. The method 200 may include:

[0047] In step S201, a direct memory access request of an external device to a memory resource mounted under a virtual machine is obtained, wherein the direct memory access request carries a target virtual address in the virtual machine corresponding to a target memory resource to be accessed.

[0048] The external devices involved in the embodiments of this application are referred to as "peripherals", which can be a general term for input, output devices, and external storage devices in a computer system. They play the role of transmitting, transferring, and storing data and information. They are an important part of the computer system and can be any device other than the host in the computer system, such as a keyboard, mouse, network card, memory, etc. This application does not impose any restrictions on this. The external device communicates with the host in the computer system through IO (Input / Output).

[0049] A direct memory access request can be a DMA (Direct Memory Access) access request, which can copy data from one address space to another address space, providing high-speed data transmission between peripherals and memory (storage) or between memory and memory. When the CPU initializes this transfer action, the transfer action itself is implemented and completed by the DMA controller. The DMA transfer method does not require the CPU to directly control the transfer, nor does it have the scene retention and scene recovery process like the interrupt processing method. It opens a channel for direct data transmission for RAM (random access memory) and IO devices through hardware. That is, when performing data transmission between I / O devices and memory, the data transfer work is all handed over to the DMA controller, and the CPU no longer participates in anything related to data transfer. It only needs to notify the DMA what data to transfer and where to transfer it, which can greatly improve the efficiency of the CPU.

[0050] In computer virtualization technology, DMA carries the target virtual address of the target memory resource to be accessed in the virtual machine, rather than the actual physical address of the target memory resource. Therefore, the target virtual address needs to be translated to obtain the actual physical address corresponding to the virtual address of the target memory resource accessed by the device.

[0051] In step S202, the target physical address corresponding to the target virtual address of the target memory resource is searched from the data processing unit, so that the external device can access the target memory resource by accessing the target physical address. The data processing unit stores the physical address translated in advance by the virtual machine management component for the virtual address of the memory resource, and the data processing unit communicates data with the virtual machine management component through the communication driver simulated in the virtual machine management component.

[0052] The data processing unit involved in the embodiments of the present application may include but is not limited to a graphics processing unit GPU (Graphics Processing Unit), an artificial intelligence processor NPU (Neural network Processing Unit), a deep learning processor DPU (Deep learning Processing Unit), a general-purpose graphics processor GPGPU (General-purpose computing on graphics processing units), an AI accelerator, a field programmable gate array FPGA (Field Programmable Gate Array), etc., and the present application does not impose any restrictions on this.

[0053] The communication driver simulated in the virtual machine management component involved can be a communication driver simulated using PV AT (Para-Virtualization Address Translation, paravirtualization) technology. In terms of architecture, the working principle of this paravirtualization is to open an additional communication channel between the virtual machine management component and the computing device operating system through the PV front-end and back-end drivers, so that the data processing unit and the virtual machine management component can communicate through this simulated driver.

[0054] Specifically, a virtual PCI device (bus device) can be simulated by PV AT (Para-Virtualization Address Translation) technology. The PCI device (bus device) can be connected to the host through a bus. The bus can be a PCIe (Peripheral Component Interconnect Express) bus. The bus device can be a PCIe device connected to the host through the PCIe bus. There can be several PCIe devices on the PCIe bus. The PCIe device can be implemented by hardware or simulated hardware such as Field-Programmable Gate Array (FPGA), System on Chip (SoC, multi-core or single-core SoC), and Application-Specific Integrated Circuit (ASIC).

[0055] For example, the simulated virtual PCI device can be virtio (a general virtual IO device driver model), which can be driven by the device driver installed inside the virtual machine management component and the data processing unit. Generally speaking, virtio can be regarded as an abstract layer above the device in the semi-virtualized hypervisor. It can be divided into four layers, including various driver modules (Virtio Device, such as virtio-net, virtio-blk, responsible for sending I / O requests) in the front-end physical machine (host, client, guest), the handler module (Virtio Driver) on the back-end virtual machine management component (hypervisor), the virtio layer (Virtqueue) and virtio-ring layer (vring) used for front-end and back-end communication in the middle. The front-end and back-end devices are implemented through Virtqueue. Virtqueue is the interface for data operations, that is, the virtual queue interface, which is the bridge for front-end and back-end communication, and the virtio-ring layer is the specific implementation of the bridge. It implements two ring buffers, which are used to store the information executed by the front-end driver and the back-end handler respectively. Strictly speaking, Virtqueue and vring can be regarded as one layer. Vring implements the specific communication mechanism and data flow of Virtqueue. The Virtqueue layer belongs to the control layer and is responsible for the notification mechanism and control flow between the front-end and back-end, while vring is responsible for the specific data flow forwarding. As an example, the virtual device driver can be a virtual block device driver, which can be a virtio-blk driver (a driver used to simulate virtio block devices). The core function of virtio-blk is to realize event notification and data transmission inside and outside the virtual machine: the front-end driver inside the virtual machine prepares the IO requests and data storage space to be processed and notifies the back-end; the back-end program outside the virtual machine obtains the requests to be processed and hands them over to the real IO subsystem for processing, and notifies the front-end of the processing results after completion. Another example is that the virtual device driver can be a virtual network device driver, which can be a virtio-net driver (a virtio device driver used to simulate a network card). Communication is also completed through the front-end and back-end drivers.

[0056] Similarly, applying the virtio simulated driver to the data communication between the virtual machine management component and the data processing unit can establish an additional communication channel for the virtual machine management component and the data processing unit, so that the communication between the two does not need to be processed by the operating system of the computing device. This not only saves communication time, but also allows external devices to access the target memory resources by accessing the target physical address stored in the data processing unit, avoiding the operating system calling the memory management unit IOMMU to translate the address during address translation and occupying the memory resources of the shared memory space IOTLB.

[0057] In a possible implementation, the above-mentioned memory resource access method may further include: when the target physical address corresponding to the target virtual address of the target memory resource is not found in the data processing unit, searching the target physical address corresponding to the target virtual address of the target memory resource from the page table in the corresponding shared memory space through the memory management unit.

[0058] Since the virtual address is translated in advance by the virtual machine management component and the address translation cache of the pre-translated physical address and virtual address is pre-stored in the data processing unit, the virtual address is translated in advance. However, since the target virtual address of the target memory resource accessed by the external device may change dynamically and has real-time characteristics, address access errors may occur when such addresses are translated in advance and accessed according to the pre-translated physical address.

[0059] Therefore, it is impossible to pre-store all target physical addresses in the data processing unit. In the case that the target physical address corresponding to the target virtual address of the target memory resource is not found in the data processing unit, the target physical address corresponding to the target virtual address of the target memory resource can be found from the page table in the corresponding shared memory space through the memory management unit, that is, the target physical address corresponding to the target virtual address of the target memory resource can be found from the corresponding IOTLB through the IOMMU.

[0060] In a possible implementation, the above-mentioned method for accessing memory resources may further include: when a target physical address corresponding to a target virtual address of a target memory resource is not found in a data processing unit, translating the target virtual address into a corresponding target physical address through a memory management unit.

[0061] Since the cache space of the shared memory space IOTLB is limited, the IOTLB caches only some page table entries in the IOMMU virtual address and physical address mapping page table. If the address to be queried is not in the page table entry cached by the IOTLB, it will cause an IOTLB miss (IOTLB query failure).

[0062] Therefore, when the target physical address corresponding to the target virtual address of the target memory resource is not found in the data processing unit, the memory management unit IOMMU can also translate the target virtual address in real time and translate the target virtual address into the corresponding target physical address for access by external devices.

[0063] Among them, the process of the memory management unit translating the target virtual address in real time can be: when the device initiates a DMA request, it will carry a device source identifier (Source Identifier) ​​containing bus (Bus), device (Device), and function (Func) identifiers in the request, and the memory management unit can complete the address translation according to the above identifier. Specifically, first, the device ID (Device ID) can be used to query the table entry indexed as the device ID from the device table (DTE), and the table root pointer (Table Root Pointer) of the device-specific address space (domain) corresponding to a single virtual machine in the table entry can be used to find the base address of the storage space storing the translation relationship between the target virtual address and the physical address; then the page table in the base address is queried through the specific address space to find the address mapping relationship table entry corresponding to the target virtual address stored in the page table, and then the memory management unit can use the address mapping relationship to convert the target virtual address to obtain the translated physical address.

[0064] This method of using the memory management unit IOMMU to translate the target virtual address in real time can be used when the target physical address corresponding to the target virtual address of the target memory resource is not found in the data processing unit, and the target physical address corresponding to the target virtual address of the target memory resource is not found in the corresponding shared memory space IOTLB; it can also be directly used when the target physical address corresponding to the target virtual address of the target memory resource is not found in the data processing unit, and the present application does not impose any restrictions on this.

[0065] The present application also provides an address translation method applied to a computing device, such as Figure 3 The flowchart of the address translation method 300 according to an embodiment of the present application is shown. The method 300 may include:

[0066] In step S301, a virtual machine management component is called to translate the virtual address of the memory resource mounted under the virtual machine deployed on the computing device into a corresponding physical address.

[0067] In step S302, the virtual address and the address translation cache of the physical address are sent to the data processing unit through the communication driver simulated in the virtual machine management component and the data processing unit.

[0068] In step S303, the address translation cache is stored in the data processing unit so as to search for the physical address corresponding to the virtual address of the memory resource according to the address translation cache when accessing the memory resource.

[0069] In an embodiment of the present application, a management channel (e.g., a simulated device driver virtio) can be established between a data processing unit (e.g., DPU) and a virtual machine management component (hypervisor), so that the hypervisor can interact with the DPU for management messages. When the virtual machine management component hypervisor detects the address of a critical DMA buffer (direct memory access cache) inside a virtual machine (VM), such as an underlying virtual address (IO ring) and a hotspot virtual address, such addresses can be pre-translated, and the address translation relationship of the DMA buffer (i.e., the address translation cache IOVA->PA of the virtual address and the physical address) can be sent to the data processing unit (DPU) by static push. The DPU can allocate corresponding storage space for the address translation cache sent by the virtual machine management component and store the address translation cache. Therefore, before the virtual machine uses the memory management unit (IOMMU) to perform address translation for direct memory access, the external device can access the target memory resource by accessing the target physical address corresponding to the target virtual address in the address translation cache IOVA->PA stored in the data processing unit (i.e., directly perform DMA using the translated DMA method), thereby avoiding the consumption of the shared memory space IOTLB when using the IOMMU for address translation.

[0070] In one possible implementation, the virtual address includes an underlying virtual address. Before calling the virtual machine management component to translate the virtual address of the memory resource mounted under the virtual machine deployed on the computing device into the corresponding physical address, the data processing unit can also be called to obtain the underlying virtual address of the memory resource, and the virtual machine management component is notified to translate the underlying virtual address.

[0071] In the traditional way of using the memory management unit (IOMMU) to handle IO device direct memory access requests (DMA), the consumption of IOTLB is proportional to the size of the memory used and the amount of memory accessed (footprint, access memory range). When processing direct memory access requests (DMA) of IO peripherals, the IO device driver usually provides an IO buffer (IO cache) at the driver layer for DMA interaction between the peripheral and the computing device. When a user space submits an IO request to a device, it usually copies data with the device driver. For example, when the network card sends a data packet, the user's data is first copied to the buffer (cache) of the network card driver, and then the network card driver notifies the device to perform DMA read (direct memory access request read) from this buffer. Similarly, during the process of receiving packets from the network card, since the number of received packets is generally multiple (more than 1), the network card driver will pre-allocate a fixed-size buffer list (cache list). When the network card receives a packet, it directly writes it to this buffer through DMA write (direct memory access request write), and then notifies the upper-layer application to read the received content into the buffer of the upper-layer application. In short, the DMA buffer range of the IO device driver is small and fixed. Even if the upper-level application consumes a lot of memory, the DMA buffer allocated at the driver level is still maintained in a small range.

[0072] A direct memory access request of an IO device may need to translate multiple associated virtual addresses to finally get the real physical address because it involves multiple different driver layers. Among these virtual addresses, some belong to the underlying virtual address (IO ring). This type of underlying virtual address contains pointers to other virtual addresses. Only by accessing this type of underlying virtual address first can other virtual addresses be obtained, and then the real physical address can be accessed. Therefore, this type of virtual address can be translated in advance, and the physical address translation cache corresponding to this type of underlying virtual address can be stored in the data processing unit for use by external devices.

[0073] Since the underlying virtual address (IO ring) is mostly generated during the initialization of the virtual machine and can be perceived by the data processing unit (such as DPU), when the data processing unit perceives the creation of the IO ring, it can notify the virtual machine management component to translate the underlying virtual address (IO ring).

[0074] For example, the vring in virtio, these underlying virtual addresses (IO ring) are fixed during the normal operation of the virtual machine. According to the analysis of the IO access data address, it can be obtained that the IO ring of the general network card device accounts for about 3% of the addresses accessed by all network card devices, and the IO ring of the disk device accounts for about 5% of the addresses accessed by all disk devices. Therefore, translating the IO ring address in advance can reduce the overhead of the shared memory resource IOTLB by about 3%-5%. The IO ring address acquisition method is simple. When the internal driver of the virtual machine (VM) initializes the device, the data processing unit DPU can sense the creation of the underlying virtual address, and directly notify the virtual machine management component (hypervisor) through the management channel (virtual device driver) to translate the virtual address (IOVA) of the IO ring in advance, and allocate corresponding storage space (establish static translation) for the address translation cache of the address translation inside the DPU to store the address translation cache. In addition, when the driver destroys the device inside the virtual machine, the data processing unit DPU can also sense that such underlying virtual address (IOring) has been destroyed, so the data processing unit can directly destroy the physical address corresponding to the destroyed underlying virtual address in its internally stored address translation cache (that is, destroy the corresponding static translation stored in the DPU).

[0075] In some embodiments, the virtual address includes an underlying virtual address. Before calling the virtual machine management component to translate the virtual address of the memory resource mounted under the virtual machine deployed on the computing device into the corresponding physical address, the virtual machine management component can also be called to monitor the underlying virtual address of the memory resource and translate the underlying virtual address.

[0076] The method of obtaining the underlying virtual address (IO ring) can be obtained by sensing it through the data processing unit, or by scanning and monitoring it through the virtual machine management component, that is, the virtual machine management component can scan the virtual address generated in the virtual machine at regular intervals to obtain the newly created underlying virtual address (IO ring). In other words, the virtual machine management component can be called to monitor the underlying virtual address of the memory resource and translate the underlying virtual address. This application does not impose any restrictions on the method of obtaining the underlying virtual address.

[0077] In one possible implementation, the virtual address includes a hotspot virtual address. Before calling the virtual machine management component to translate the virtual address of the memory resource mounted under the virtual machine deployed on the computing device into the corresponding physical address, the virtual machine management component can also be called to monitor the underlying virtual address of the memory resource and the associated virtual address directly or indirectly referenced by the underlying virtual address, and then the virtual machine management component is called to determine the hotspot virtual address from the associated virtual addresses.

[0078] Among the virtual addresses accessed by peripherals, in addition to the underlying virtual addresses, there are some virtual addresses that may be frequently accessed within a certain period of time. These virtual addresses are generally associated virtual addresses (IO buffers) directly or indirectly referenced by the underlying virtual addresses (IO rings), and are allocated by the device driver inside the virtual machine. Therefore, the data processing unit (DPU) may not be able to perceive these virtual addresses, but they can be obtained by monitoring the virtual machine management component. Pre-translating the addresses with a higher call frequency (hotspot virtual addresses) in the associated virtual addresses can further save the time of address translation and save the resource consumption of the shared memory space (IOTLB).

[0079] Specifically, the virtual machine management component can be called to monitor the underlying virtual addresses of memory resources and the associated virtual addresses directly or indirectly referenced by the underlying virtual addresses, and then the virtual machine management component can be called to determine the hot virtual addresses from the associated virtual addresses. That is, the hypervisor is used to scan each IO ring, identify the hotter pages, and perform address translation on them. After the translation, the virtual machine management component can push the corresponding address translation cache to the data processing unit DPU through the simulated device driver for storage for use by external devices.

[0080] In some embodiments, a virtual machine management component may also be used to monitor the calling frequency of the hotspot virtual address, and when the calling frequency of the hotspot virtual address decreases, the data processing unit is notified to delete the hotspot virtual address with reduced calling frequency from the corresponding address translation cache.

[0081] Similar to the aforementioned method of using the virtual machine management component to identify the hotspot virtual address, when the virtual machine management component monitors the calling frequency of the hotspot virtual address, and when the calling frequency of the hotspot virtual address decreases, that is, when the calling frequency of the hotspot virtual address that has been translated in the past is lower than a certain threshold (hot page becomes cold page), the virtual machine management component can notify the data processing unit to delete the hotspot virtual address with reduced calling frequency from the corresponding address translation cache (unstatically translate the memory page) to save storage space of the data processing unit.

[0082] Optionally, before storing the address translation cache through the data processing unit, the data processing unit may be called to allocate corresponding storage space for the address translation cache.

[0083] The embodiment of the present application provides a simulated device driver so that the interface defined by the DPU (simulated device driver) can interact with the hypervisor, and uses a software address translation method (a method for the hypervisor to perform address translation) to accurately identify and translate important virtual addresses (bottom-level virtual address IO ring) and high-utilization virtual addresses (hot virtual addresses in the IO buffer), and avoids using the traditional address translation method (i.e., using IOMMU) to consume the resources of the shared memory space IOTLB during the DMA process through translated DMA (i.e., reading the translated physical address from the DPU for direct memory access). This can avoid the congestion of the shared memory resources (IOTLB) of the memory management unit that may be caused by excessive address queries, reduce the consumption of shared memory resources, and improve the utilization of shared memory resources.

[0084] Corresponding to the application scenario and method of the method provided in the embodiment of the present application, the embodiment of the present application also provides an access device for memory resources applied to a virtual machine management component. Figure 4 FIG. 4 is a structural block diagram of a memory resource access device 400 according to an embodiment of the present application. The device 400 may include:

[0085] The access request acquisition module 401 is used to acquire a direct memory access request of an external device to a memory resource mounted under a virtual machine, wherein the direct memory access request carries a target virtual address in the virtual machine corresponding to the target memory resource to be accessed;

[0086] The physical address search module 402 is used to search the target physical address corresponding to the target virtual address of the target memory resource from the data processing unit, so that the external device can access the target memory resource by accessing the target physical address; wherein the data processing unit stores the physical address translated in advance by the virtual machine management component for the virtual address of the memory resource, and the data processing unit communicates data with the virtual machine management component through the communication driver simulated in the virtual machine management component.

[0087] In a possible implementation, the above device may further include:

[0088] The target physical address search module is used to search the target physical address corresponding to the target virtual address of the target memory resource from the page table in the corresponding shared memory space through the memory management unit when the target physical address corresponding to the target virtual address of the target memory resource is not found in the data processing unit.

[0089] In a possible implementation, the above device may further include:

[0090] The target physical address translation module translates the target virtual address into a corresponding target physical address through a memory management unit when a target physical address corresponding to the target virtual address of the target memory resource is not found in the data processing unit.

[0091] Corresponding to the application scenario and method of the method provided in the embodiment of the present application, the embodiment of the present application also provides an address translation device applied to a computing device. Figure 5 FIG. 5 is a structural block diagram of an address translation device 500 according to an embodiment of the present application. The device 500 may include:

[0092] The address translation module 501 is used to call the virtual machine management component to translate the virtual address of the memory resource mounted under the virtual machine deployed on the computing device into the corresponding physical address;

[0093] An address translation cache sending module 502 is used to communicate with the data processing unit through the communication driver simulated in the virtual machine management component, and send the address translation cache of the virtual address and the physical address to the data processing unit;

[0094] The address translation cache storage module 503 is used to store the address translation cache through the data processing unit so as to search for the physical address corresponding to the virtual address of the memory resource according to the address translation cache when accessing the memory resource.

[0095] In a possible implementation, the virtual address includes an underlying virtual address, and before the calling virtual machine management component translates the virtual address of the memory resource mounted under the virtual machine deployed on the computing device into a corresponding physical address, the apparatus may further include:

[0096] The bottom layer virtual address acquisition module is used to call the data processing unit to acquire the bottom layer virtual address of the memory resource, and notify the virtual machine management component to translate the bottom layer virtual address.

[0097] In a possible implementation, the virtual address includes an underlying virtual address, and before the calling virtual machine management component translates the virtual address of the memory resource mounted under the virtual machine deployed on the computing device into a corresponding physical address, the apparatus may further include:

[0098] The bottom layer virtual address translation module is used to call the virtual machine management component to monitor the bottom layer virtual address of the memory resource and translate the bottom layer virtual address.

[0099] In a possible implementation, the virtual address includes a hotspot virtual address, and before the calling virtual machine management component translates the virtual address of the memory resource mounted under the virtual machine deployed on the computing device into a corresponding physical address, the apparatus may further include:

[0100] An associated virtual address monitoring module, used for calling the virtual machine management component to monitor the underlying virtual address of the memory resource and the associated virtual address directly or indirectly referenced by the underlying virtual address;

[0101] The hotspot virtual address determination module is used to call the virtual machine management component to determine the hotspot virtual address from the associated virtual addresses.

[0102] In some embodiments, the above apparatus may further include:

[0103] The hotspot virtual address monitoring module is used to use the virtual machine management component to monitor the calling frequency of the hotspot virtual address, and when the calling frequency of the hotspot virtual address decreases, notify the data processing unit to delete the hotspot virtual address with reduced calling frequency from the corresponding address translation cache.

[0104] In a possible implementation manner, before storing the address translation cache by the data processing unit, the apparatus may further include:

[0105] The storage space allocation module is used to call the data processing unit to allocate corresponding storage space for the address translation cache.

[0106] The functions of each module in each device in the embodiments of the present application can be found in the corresponding description in the above method, and have corresponding beneficial effects, which will not be repeated here.

[0107] Figure 6 FIG. 1 is a block diagram of an electronic device used to implement an embodiment of the present application. Figure 6 As shown, the electronic device includes: a memory 601 and a processor 602. The memory 601 stores a computer program that can be run on the processor 602. When the processor 602 executes the computer program, the method in the above embodiment is implemented. The number of the memory 601 and the processor 602 can be one or more.

[0108] The electronic device also includes:

[0109] The communication interface 603 is used to communicate with external devices and perform data exchange transmission.

[0110] If the memory 601, the processor 602 and the communication interface 603 are implemented independently, the memory 601, the processor 602 and the communication interface 603 can be connected to each other through a bus and communicate with each other. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 6 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0111] Optionally, in a specific implementation, if the memory 601, the processor 602 and the communication interface 603 are integrated on a chip, the memory 601, the processor 602 and the communication interface 603 can communicate with each other through an internal interface.

[0112] An embodiment of the present application provides a computer-readable storage medium storing a computer program, which implements the method provided in the embodiment of the present application when the program is executed by a processor.

[0113] An embodiment of the present application also provides a computer program product, which includes a computer program, and when the computer program is executed by a processor, the method provided in any embodiment of the present application is implemented.

[0114] An embodiment of the present application also provides a chip, which includes a processor for calling and executing instructions stored in the memory from the memory, so that a communication device equipped with the chip executes the method provided by the embodiment of the present application.

[0115] An embodiment of the present application also provides a chip, including: an input interface, an output interface, a processor and a memory, wherein the input interface, the output interface, the processor and the memory are connected via an internal connection path, and the processor is used to execute the code in the memory. When the code is executed, the processor is used to execute the method provided in the embodiment of the present application.

[0116] It should be understood that the processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor, etc. It is worth noting that the processor may be a processor supporting the Advanced RISC Machines (ARM) architecture.

[0117] Further, optionally, the above-mentioned memory may include a read-only memory and a random access memory. The memory may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memory. Among them, the non-volatile memory may include a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may include a random access memory (RAM), which is used as an external cache. By way of exemplary but not limiting description, many forms of RAM are available. For example, static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM) and direct memory bus random access memory (DR RAM).

[0118] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function according to the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium.

[0119] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification and the features of different embodiments or examples, unless they are contradictory.

[0120] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0121] Any process or method described in the flow chart or otherwise described herein can be understood as a module, fragment or portion of a code representing one or more executable instructions for implementing the steps of a specific logical function or process. And the scope of the preferred embodiment of the present application includes other implementations, in which the functions may not be performed in the order shown or discussed, including in a substantially simultaneous manner or in a reverse order according to the functions involved.

[0122] The logic and / or steps described in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, which can be specifically implemented in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute instructions), or used in combination with these instruction execution systems, devices or apparatuses.

[0123] It should be understood that the various parts of the present application can be implemented with hardware, software, firmware or a combination thereof. In the above embodiments, multiple steps or methods can be implemented with software or firmware stored in a memory and executed by a suitable instruction execution system. All or part of the steps of the above embodiment method can be completed by instructing the relevant hardware through a program, which can be stored in a computer-readable storage medium, and when the program is executed, it includes one of the steps of the method embodiment or a combination thereof.

[0124] In addition, each functional unit in each embodiment of the present application can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into one module. The above-mentioned integrated module can be implemented in the form of hardware or in the form of a software functional module. If the above-mentioned integrated module is implemented in the form of a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. The storage medium can be a read-only memory, a disk or an optical disk, etc.

[0125] The above is only an exemplary embodiment of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of various changes or substitutions within the technical scope recorded in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A method for accessing memory resources, applied to a virtual machine management component, the method comprising: Obtaining a direct memory access request from an external device to a memory resource mounted under a virtual machine, wherein the direct memory access request carries a target virtual address in the virtual machine corresponding to a target memory resource to be accessed; The target physical address corresponding to the target virtual address of the target memory resource is searched from the data processing unit, so that the external device accesses the target memory resource by accessing the target physical address; wherein the data processing unit stores the physical address translated in advance by the virtual machine management component for the virtual address of the memory resource, and the data processing unit communicates data with the virtual machine management component through the communication driver simulated in the virtual machine management component.

2. The method according to claim 1, wherein: The method further comprises: When the target physical address corresponding to the target virtual address of the target memory resource is not found in the data processing unit, the target physical address corresponding to the target virtual address of the target memory resource is found from the page table in the corresponding shared memory space through the memory management unit.

3. The method according to claim 1, wherein: The method further comprises: In the case that the target physical address corresponding to the target virtual address of the target memory resource is not found in the data processing unit, the target virtual address is translated into the corresponding target physical address through the memory management unit.

4. An address translation method, applied to a computing device, the method comprising: Calling a virtual machine management component to translate a virtual address of a memory resource mounted under a virtual machine deployed on the computing device into a corresponding physical address; Communicate with the data processing unit through the simulated communication driver in the virtual machine management component, and send the address translation cache of the virtual address and the physical address to the data processing unit; The address translation cache is stored by the data processing unit so as to search for a physical address corresponding to a virtual address of the memory resource according to the address translation cache when accessing the memory resource.

5. The method according to claim 4, wherein: The virtual address includes an underlying virtual address. Before the calling virtual machine management component translates the virtual address of the memory resource mounted under the virtual machine deployed on the computing device into a corresponding physical address, the method further includes: The data processing unit is called to obtain the underlying virtual address of the memory resource, and the virtual machine management component is notified to translate the underlying virtual address.

6. The method according to claim 4, wherein: The virtual address includes an underlying virtual address. Before the calling virtual machine management component translates the virtual address of the memory resource mounted under the virtual machine deployed on the computing device into a corresponding physical address, the method further includes: The virtual machine management component is called to monitor the underlying virtual address of the memory resource and translate the underlying virtual address.

7. The method according to claim 4, wherein: The virtual address includes a hotspot virtual address. Before the calling virtual machine management component to translate the virtual address of the memory resource mounted under the virtual machine deployed on the computing device into a corresponding physical address, the method further includes: Calling the virtual machine management component to monitor the underlying virtual address of the memory resource and the associated virtual address directly referenced or indirectly referenced by the underlying virtual address; The virtual machine management component is called to determine a hotspot virtual address from the associated virtual addresses.

8. The method according to claim 7, wherein: The method further comprises: The virtual machine management component is used to monitor the calling frequency of the hotspot virtual address, and when the calling frequency of the hotspot virtual address decreases, the data processing unit is notified to delete the hotspot virtual address with reduced calling frequency from the corresponding address translation cache.

9. The method according to claim 4, wherein: Before storing the address translation cache by the data processing unit, the method further includes: The data processing unit is called to allocate corresponding storage space for the address translation cache.

10. A memory resource access device, applied to a virtual machine management component, the device comprising: An access request acquisition module, used to acquire a direct memory access request from an external device to a memory resource mounted under a virtual machine, wherein the direct memory access request carries a target virtual address in the virtual machine corresponding to a target memory resource to be accessed; A physical address search module is used to search for a target physical address corresponding to a target virtual address of the target memory resource from a data processing unit, so that the external device can access the target memory resource by accessing the target physical address; wherein the data processing unit stores a physical address translated in advance by a virtual machine management component for the virtual address of the memory resource, and the data processing unit communicates data with the virtual machine management component through a communication driver simulated in the virtual machine management component.

11. An address translation device, applied to a computing device, the device comprising: An address translation module, used for calling a virtual machine management component to translate a virtual address of a memory resource mounted under a virtual machine deployed on the computing device into a corresponding physical address; An address translation cache sending module, used to communicate with a data processing unit through a communication driver simulated in the virtual machine management component, and send the address translation cache of the virtual address and the physical address to the data processing unit; The address translation cache storage module is used to store the address translation cache through the data processing unit so as to search for the physical address corresponding to the virtual address of the memory resource according to the address translation cache when accessing the memory resource.

12. An electronic device comprising a memory, a processor and a computer program stored in the memory, wherein the processor implements the method according to any one of claims 1 to 9 when executing the computer program.

13. A computer-readable storage medium, wherein a computer program is stored in the computer-readable storage medium, and when the computer program is executed by a processor, the method according to any one of claims 1 to 9 is implemented.

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