Method and device for automatically testing SPI (Serial Peripheral Interface)

Abstract

The invention relates to a method and a device for automatically testing SPI peripherals, which are based on a designed upper computer and lower computer test architecture and test mode, the test flexibility is high, parameters can be customized according to requirements, and various SPI signals can be flexibly generated; the test is more comprehensive, random data is supported to better verify the pressure resistance and robustness of the SPI peripherals, potential boundary conditions and abnormal conditions can be found, and the stability and reliability of a vehicle-mounted system are ensured; the application range is wide, the reusability is high, and the MCU with SPI (Serial Peripheral Interface) equipment can be tested; the test operation is simple, the test efficiency is high, the cost is low, and a single chip can be self-tested to reduce interference.

Description

Technical Field

[0001] The invention belongs to the technical field of peripheral testing, and relates to a method and a device for automatically testing SPI peripherals. Background Art

[0002] The current status of SPI (Serial Peripheral Interface) technology development in the automotive field is characterized by high reliability, high-speed transmission, support for multiple channels, low power consumption, security, encryption, standardization and compatibility. In modern vehicle systems, SPI is not only used for high-speed data transmission of sensor networks and camera systems, but also supports real-time monitoring and control of power systems and in-vehicle entertainment systems. In practical applications, SPI is widely used in vehicle sensor networks, such as temperature sensors, pressure sensors, and accelerometers, to achieve high-speed and reliable transmission of sensor data; in multi-camera systems, SPI communication is used to transmit image data to support real-time transmission of high-definition video streams; in in-vehicle entertainment systems, SPI communication is used to transmit audio and video data to support high-quality multimedia experience; in power systems, SPI communication is used to transmit data of key components such as engines and gearboxes to support real-time monitoring and control.

[0003] In order to test and verify the functions of SPI, the traditional test methods are: 1. Use the actual vehicle body SPI sensor as the test input, but one SPI sensor can only cover one scenario, and as a peripheral test, it needs to cover various SPI functions and modes. The test types are complex and diverse, so it cannot meet the test requirements and can only be used as a sampling test. 2. Purchase analog devices for simulation testing. The analog devices can simulate communications in various modes and cover various functions of SPI peripherals; however, the analog devices can only repeatedly send one type of data at a time, and cannot simulate the actual configuration changes. If the test mode needs to be changed, it needs to be reset and sent again. Therefore, although this test method can cover various mode protocols, it cannot verify the actual data changes and requires a lot of repeated confirmation work by manpower, which is time-consuming and labor-intensive. Summary of the invention

[0004] In view of the problems existing in the above-mentioned conventional technology, the present invention proposes a method for automatically testing SPI peripherals and a device for automatically testing SPI peripherals, which can efficiently and automatically implement the testing of SPI peripherals.

[0005] In order to achieve the above objectives, the embodiments of the present invention adopt the following technical solutions: On the one hand, a method for automatically testing an SPI peripheral is provided, comprising the steps of: Send configuration parameters to the MCU where the SPI peripheral to be tested is located through the host computer; the configuration parameters include SPI transmission rate, data length and test mode; Connect the interface between the SPI peripheral to be tested and the simulated SPI device on the MCU, initialize the SPI peripheral to be tested and the simulated SPI device according to the configuration parameters on the MCU, and configure the clock frequency of the high-precision timer in the MCU; when the test mode is the host mode, the SPI peripheral to be tested is set as the SPI host, and the simulated SPI device is the SPI slave; The MCU pulls down the chip select line through the GPIO operation register to make the SPI peripheral to be tested and the simulated SPI device start working; the high-precision timer is configured in PWM mode; The SPI peripheral under test transmits the transmission data of this test to the simulated SPI device through the data line MOSI; the simulated SPI device reads each bit in the data line MOSI at the rising edge of the PWM interrupt, and starts receiving the next frame of transmission data after satisfying one frame of data; The simulated SPI device writes the MSB of the data to be sent to the SPI peripheral under test to the data line MISO at the falling edge of the PWM interrupt; When the SPI peripheral under test determines that the remaining bytes of the sent data are 0, the transmission ends and the data is verified; If the data verification result is correct, a test pass log for this test is generated, otherwise a test error log for this test is generated.

[0006] On the other hand, a device for automatically testing SPI peripherals is also provided, comprising a host computer and an MCU as a slave computer, wherein the MCU comprises a SPI peripheral to be tested and an SPI simulation device; The host computer is used to send configuration parameters to the MCU; the configuration parameters include SPI transmission rate, data length and test mode; After the interface between the SPI peripheral to be tested and the simulated SPI device on the MCU is connected, the MCU initializes the SPI peripheral to be tested and the simulated SPI device according to the configuration parameters, and configures the clock frequency of the high-precision timer in the MCU; when the test mode is the host mode, the SPI peripheral to be tested is set as the SPI master, and the simulated SPI device is the SPI slave; The MCU pulls down the chip select line through the GPIO operation register to make the SPI peripheral to be tested and the simulated SPI device start working; the high-precision timer is configured in PWM mode; The SPI peripheral under test transmits the data to be sent in this test to the simulated SPI device through the data line MOSI. The simulated SPI device reads each bit in the data line MOSI at the rising edge of the PWM interrupt, and starts receiving the next frame of sent data after satisfying one frame of data. The simulated SPI device writes the MSB of the data to be sent to the SPI peripheral under test to the data line MISO at the falling edge of the PWM interrupt. When the SPI peripheral to be tested determines that the remaining bytes of the sent data are 0, the transmission is completed and the data is verified. If the data verification result is correct, a test pass log for this test is generated, otherwise a test error log for this test is generated.

[0007] One of the above technical solutions has the following advantages and beneficial effects: The above-mentioned method and device for automatically testing SPI peripherals are based on the designed upper and lower computer test architectures and test methods, and have high test flexibility. Parameters can be customized according to needs, and various SPI signals can be flexibly generated. The test is more comprehensive and supports random data to better verify the stress resistance and robustness of SPI peripherals. It can also discover potential boundary conditions and abnormal situations to ensure the stability and reliability of the vehicle system. It has a wide range of uses and strong reusability, and MCUs with SPI (host / slave) devices can be tested. The test operation is simple, the test efficiency is high and the cost is low, and the single chip can also self-test to reduce interference. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0009] Figure 1 A schematic flow chart of a method for automatically testing an SPI peripheral device in one embodiment; Figure 2 A schematic diagram of a test flow of the SPI master mode in one embodiment; Figure 3 A schematic diagram of a test flow of the SPI slave mode in one embodiment; Figure 4 A schematic diagram of an overall test flow of a method for automatically testing an SPI peripheral in one embodiment; Figure 5 A schematic diagram of the module structure of a device for automatically testing SPI peripherals in one embodiment; Figure 6 It is a schematic diagram of the module structure of the device for automatically testing SPI peripherals in another embodiment. DETAILED DESCRIPTION

[0010] In order to make the purpose, technical scheme and advantages of the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and Examples. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art of the present invention. The terms used in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0011] It should be noted that the reference to "embodiment" in this article means that the specific features, structures or characteristics described in conjunction with the embodiment may be included in at least one embodiment of the present invention. The presentation of this phrase at various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It will be appreciated by those skilled in the art that the embodiments described herein may be combined with other embodiments. The term "and / or" used in the specification of the present invention and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes these combinations.

[0012] The following will describe the implementation of the present invention in detail with reference to the accompanying drawings in the embodiment diagram of the present invention.

[0013] High reliability is the key feature of SPI in vehicle systems. There is a lot of electromagnetic interference in the vehicle environment, so modern SPI design uses differential signal transmission, shielded cables and signal integrity design to ensure the reliability of data transmission. At the same time, some vehicle systems also use redundant SPI communication paths. Even if one SPI communication path fails, the other SPI communication path can continue to work, thereby further improving the reliability of the vehicle system.

[0014] High-speed transmission is another important feature of SPI in vehicle systems. As the requirements for data transmission rates in vehicle systems continue to increase, the rate of modern SPI communication can reach tens of Mbps or even higher. This feature is particularly important in intelligent driving and other real-time control systems. The low latency feature makes SPI perform well in the application of these systems, capable of transmitting large amounts of data in real time and supporting complex algorithms and decisions. In terms of multi-channel support, a SPI master device (SPI host) in a modern vehicle system can be connected to multiple slave devices (SPI slaves), and efficient data transmission can be achieved through multiplexing technology, which is very practical in multi-device communication scenarios such as sensor networks and multi-camera systems. The SPI interface supports multiple configuration modes, such as single-wire mode, two-wire mode, and four-wire mode, which can be flexibly selected according to actual needs, improving the flexibility and scalability of the system.

[0015] In addition, low power consumption is also an important advantage of SPI in vehicle systems. Vehicle systems have strict requirements on power consumption. Modern SPI designs use a variety of energy-saving technologies, such as low-power mode, automatic sleep and wake-up mechanisms, to reduce power consumption. The SPI communication module can enter a low-power state when inactive to reduce energy consumption, which is especially important for battery-powered devices. In terms of security and encryption, modern SPI communication supports data encryption technology, such as AES (Advanced Encryption Standard) encryption, to ensure the security of data during transmission. At the same time, SPI communication supports a security authentication mechanism to ensure that only authenticated devices can communicate, prevent unauthorized access, and protect the data security of the vehicle system.

[0016] Standardization and compatibility are also important features of SPI in vehicle systems. SPI communication follows standard protocol specifications to ensure that equipment from different manufacturers can interoperate. Vehicle systems undergo strict compatibility testing during the design and production process to ensure the stability and reliability of SPI communication. This is very important in vehicle systems because vehicle systems are usually composed of accessories from multiple different suppliers. Standardization and compatibility ensure seamless communication between the various accessories.

[0017] With the continuous development of practical needs and technology, the application of SPI communication technology in vehicle systems will continue to evolve, and higher integration will be the future development trend. SPI communication will be combined with other communication technologies (such as CAN bus, LIN communication and Ethernet) to form a more complex communication network. In addition, with the development of artificial intelligence and machine learning, SPI communication will play a greater role in the intelligence of vehicle systems, supporting more complex algorithms and decisions, and wireless SPI communication technology is also likely to be introduced to achieve more flexible communication methods, thereby further improving the performance and reliability of vehicle systems.

[0018] In one embodiment, Figure 1 As shown, a method for automatically testing an SPI peripheral is provided, which may include the following processing steps S10 to S22: S10, sending configuration parameters to the MCU where the SPI peripheral to be tested is located through the host computer; the configuration parameters include SPI transmission rate, data length and test mode; S12, connecting the interface between the SPI peripheral to be tested and the simulated SPI device on the MCU, initializing the SPI peripheral to be tested and the simulated SPI device on the MCU according to the configuration parameters, and configuring the clock frequency of the high-precision timer in the MCU; when the test mode is the host mode, the SPI peripheral to be tested is set as the SPI host, and the simulated SPI device is the SPI slave; S14, MCU pulls down the chip select line through the GPIO operation register to make the SPI peripheral to be tested and the simulated SPI device start working; the high-precision timer is configured as PWM mode; S16, the SPI peripheral to be tested transmits the transmission data of this test to the simulated SPI device through the data line MOSI; the simulated SPI device reads each bit in the data line MOSI at the rising edge of the PWM interrupt, and starts receiving the next frame of transmission data after satisfying one frame of data; S18, simulating the SPI device to write the MSB of the data to be sent to the SPI peripheral under test into the data line MISO at the falling edge of the PWM interrupt; S20, when the SPI peripheral to be tested determines that the remaining bytes of the sent data are 0, the transmission is completed and the data is verified; S22, if the data verification result is correct, a test pass log for this test is generated, otherwise a test error log for this test is generated.

[0019] It can be understood that the host computer refers to the host computer APP application, which is used to set configuration parameters according to the test mode such as whether the SPI peripheral to be tested is currently in the test slave mode or the test host mode. The configuration parameters may include the SPI transmission rate, data length, master / slave mode, clock polarity and clock phase. After these configuration parameters are sent to the lower computer (i.e., MCU), the lower computer will initialize the SPI peripheral to be tested and the simulated SPI device according to the configuration parameters to prepare for communication in the subsequent test process. As the lower computer, the MCU is provided with a simulated SPI device and a SPI peripheral to be tested. Both the simulated SPI device and the SPI peripheral to be tested have two modes: master and slave. When the SPI peripheral to be tested as the device to be tested is tested as a slave, the simulated SPI device acts as the SPI master. When the SPI peripheral to be tested is tested as a SPI master, the simulated SPI device acts as a SPI slave.

[0020] Among them, in the test host mode when the SPI peripheral to be tested serves as the SPI host, the PWM (Pulse Width Modulation) mode of the high-precision timer inside the lower computer (used to determine the clock of the simulated SPI device) is used as the clock line, and the GPIO peripheral of the lower computer is used to flip the level to simulate the data line shared by the SPI peripheral to be tested and the simulated SPI device (such as MISO (Master In Slave OUT, master device input slave device output) and MOSI (Master Out Slave In, master device output slave device input)) and the chip select line (CS) to connect to the SPI peripheral to be tested. The clock frequency of the high-precision timer inside the lower computer is the transmission rate of the SPI, which avoids the problem of uncontrollable rate of GPIO flip level during test code execution.

[0021] In addition, the length of the data frame for sending data can be selected by detecting the overflow times of the high-precision timer, and the data check method used in the test process, such as parity check or CRC check, can also be selected.

[0022] The above-mentioned method for automated testing of SPI peripherals is based on the designed host and slave test architecture and test methods. The test is highly flexible, parameters can be customized according to needs, and various SPI signals can be flexibly generated. The test is more comprehensive and supports random data to better verify the stress resistance and robustness of SPI peripherals. It can also discover potential boundary conditions and abnormal situations to ensure the stability and reliability of the vehicle system. It has a wide range of uses and strong reusability, and any MCU with SPI (host / slave) devices can be tested. The test operation is simple, the test efficiency is high and the cost is low, and the single chip can also self-test to reduce interference.

[0023] Specifically, the host computer configures the parameters: the host computer selects the SPI transmission rate, data length, master / slave mode, clock polarity and clock phase and other configuration parameters for this test, and then sends the configuration parameters to the slave computer through the communication interface. During the test, the host computer can also customize the data to be sent, or the slave computer can randomly generate the data to be sent.

[0024] When the SPI peripheral to be tested performs the host mode test as the SPI host: first connect the SPI interface corresponding to the SPI peripheral to be tested on the MCU of the vehicle system with the analog SPI interface corresponding to the analog SPI device (which acts as the SPI slave at this time) and ensure that the interface line communication is normal. Then, the lower computer configures the clock frequency of the high-precision timer (i.e., the transmission rate of the SPI host) and other parameters according to the configuration parameters sent by the upper computer.

[0025] Furthermore, the sending data may be sending data provided after being customized by the host computer.

[0026] Furthermore, the transmission data may also be transmission data generated by the MCU using a random number generation algorithm.

[0027] It can be understood that if the upper computer provides the sending data, the lower computer uses the sending data specified by the upper computer customization; if the upper computer does not provide the sending data, the lower computer uses the existing random number generation algorithm (random number algorithm code) to generate random data as the sending data, and calculates the check code according to the selected check algorithm (such as CRC-16 / IBM) and then packages it into the data frame of the sending data.

[0028] After the simulation SPI device initialization and transmission data verification are completed, the MCU starts working by pulling down the chip select line (chip select level) through the GPIO operation register, and configures the high-precision timer to PWM mode to determine the length of each transmission cycle and the high and low level ratio. The cumulative number of interrupt triggers is counted in the PWM interrupt. Each time the PWM interrupt is triggered, the corresponding data lines MISO and MOSI are flipped and read in the interrupt function. Each time a bit is sent, the parameter set in the PWM interrupt is increased by 1 until the data frame of the sent data is sent.

[0029] After receiving the data, the SPI peripheral to be tested determines whether the current reception is normal through the data register and status register responsible for receiving. If the current reception is normal, then the data verification is performed. The received data should be consistent with the transmitted data, with no error status bit set and the same check code. If it is an SPI waveform in the error mode of transmission, then the received data should be wrong and the corresponding error status bit should be set.

[0030] The transmission process of the host mode of the SPI peripheral to be tested is as follows Figure 2 As shown in the figure, after pulling down the chip select line to start working, the SPI host writes the transmission data into its own SPI serial register and transmits it to the SPI slave through the data line MOSI. The SPI slave reads each bit of the data line MOSI at the rising edge of the PWM interrupt, and starts receiving the next frame of transmission data after satisfying one frame of data; and the SPI slave writes the MSB (Most Significant Byte) of the data to be sent to the SPI host into the data line MISO at the falling edge of the PWM interrupt. The SPI host determines whether the remaining bytes of the transmission data are 0. If so, the transmission ends, otherwise it continues to transmit.

[0031] In one embodiment, when the test mode is the slave mode, the SPI peripheral to be tested is the SPI slave, and the simulated SPI device is the SPI master. After initializing the SPI peripheral to be tested and the simulated SPI device, the above-mentioned method for automatically testing the SPI peripheral may further include the following steps: The simulated SPI device determines that the interrupt signal state of the chip select line CS is valid edge and enables the clock signal interrupt. The SPI peripheral to be tested fills the MSB of the transmit data of this test to the data line MISO. At the falling edge of the clock signal interrupt, the SPI peripheral to be tested reads each bit in the data line MOSI and shifts and saves it until a data frame transmission is completed; At the rising edge of the clock signal interrupt, the SPI peripheral under test writes the MSB of the data to be sent to the simulated SPI device into the data line MISO until a data frame transmission is completed; Simulate the SPI device to perform data verification. If the data verification result is correct, a test pass log for this test is generated; otherwise, a test error log for this test is generated.

[0032] It can be understood that in the test slave mode when the SPI peripheral to be tested is used as an SPI slave, the reception and start can be judged by the GPIO interrupt of the chip select line (CS) pin (where the chip select line CS and the high-precision timer CLK both use GPIO interrupts); correspondingly, the I2S mode test of the SPI peripheral to be tested is similar, only the format of the data frame is different, and no detailed introduction will be given here. When used with the host computer, all test implementation details are handled by the lower computer, and the host computer is used to open the test option interface.

[0033] Specifically, when the SPI peripheral to be tested performs the slave mode test as an SPI slave: in the SPI slave mode, first wait for the signal state change of the chip select level on the chip select line, and open the clock IO interrupt only after confirming that the SPI slave is selected. Then, in the clock IO interrupt, send and receive data according to the configuration parameters sent by the host computer until the data transmission process is completed, and check the data received by the SPI slave (such as CRC check) to verify whether the transmitted data is correct and whether the check result is correct.

[0034] like Figure 3 The figure shows the transmission process in SPI slave mode: MCU is configured according to the configuration parameters sent by the host computer (such as initialization parameters and test mode), and the SPI device is simulated to clear the relevant flags and turn off the CLK (clock) signal interrupt when judging the state of the chip select line CS interrupt signal as an invalid edge, and enable the CLK signal interrupt when judging the state of the chip select line CS interrupt signal as a valid edge and fill the MSB of the data to be sent to the data line MISO, and then judge the edge of the CLK signal interrupt. If it is the falling edge of the CLK signal interrupt, read each bit of the data line MOSI, shift and save until a data frame ends; if it is the rising edge of the CLK signal interrupt, write the MSB of the data to be sent to the SPI host to the data line MISO until a data frame ends. Finally, perform data verification (such as CRC verification) and the transmission ends.

[0035] like Figure 4 The figure shows a specific application flow chart of the method for automatically testing SPI peripherals.

[0036] In one embodiment, the above method for automatically testing SPI peripherals may further include the following steps: Use an oscilloscope to check whether the SPI protocol waveform transmitted between the SPI peripheral to be tested and the simulated SPI device has waveform errors; waveform errors include waveform distortion and frequency errors; If there is a waveform error, the waveform error will be reported to the upper computer.

[0037] It can be understood that in the test host mode when the SPI peripheral to be tested is used as the SPI host, the existing random number generation algorithm in the art can also be used to generate the transmission data, simulate the SPI protocol waveform, connect the SPI peripheral to be tested, and judge whether the current test is passed by judging whether the transmission data matches the data received by the SPI peripheral to be tested and whether the data verification is passed. In addition, in order to ensure that the SPI protocol waveform is normal, an oscilloscope can also be used to detect whether the simulated SPI protocol waveform is seriously deformed.

[0038] In addition, when an error occurs during verification, the oscilloscope can be used to check whether the SPI protocol waveform is distorted, whether the output frequency (that is, the frequency of the SPI protocol waveform) is correct, and whether the timing of the SPI protocol waveform is normal. At the same time, the waveform error that occurs during verification can also be fed back to the host computer.

[0039] Compared with traditional technologies, the above-mentioned method of automated testing of SPI peripherals has high testing flexibility, can customize parameters according to needs, and flexibly generate various SPI signals; the test is more comprehensive, supports random data to better verify the stress resistance and robustness of SPI peripherals, and can also discover potential boundary conditions and abnormal situations to ensure the stability and reliability of the vehicle system; it has a wide range of uses and strong reusability, and can test MCUs with SPI (host / slave) devices; the test operation is simple, the test efficiency is high and the cost is low, and a single chip can also self-test to reduce interference; an oscilloscope can also be used externally for error monitoring, which makes it easy to locate the problem when an error occurs.

[0040] It should be understood that although Figure 1 The steps in the method are shown in sequence as indicated by the arrows, but the steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of the steps, and the steps can be executed in other orders. Figure 1 At least part of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequentially, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.

[0041] In one embodiment, Figure 5As shown, a device 100 for automatically testing SPI peripherals is provided, which may include a host computer and an MCU as a slave computer, wherein the MCU includes a SPI peripheral to be tested and an SPI analog device. The host computer is used to send configuration parameters to the MCU; the configuration parameters include the transmission rate, data length and test mode of the SPI. After the interface between the SPI peripheral to be tested and the SPI analog device on the MCU is connected, the MCU initializes the SPI peripheral to be tested and the SPI analog device according to the configuration parameters, and configures the clock frequency of the high-precision timer in the MCU; when the test mode is the host mode, the SPI peripheral to be tested is set as the SPI host, and the SPI analog device is set as the SPI slave. The MCU pulls down the chip select line through the GPIO operation register to start working the SPI peripheral to be tested and the SPI analog device; the high-precision timer is configured as the PWM mode.

[0042] The SPI peripheral under test transmits the data to be sent in this test to the simulated SPI device through the data line MOSI. The simulated SPI device reads each bit in the data line MOSI at the rising edge of the PWM interrupt, and starts receiving the next frame of data after satisfying one frame of data. The simulated SPI device writes the MSB of the data to be sent to the SPI peripheral under test to the data line MISO at the falling edge of the PWM interrupt. When the SPI peripheral under test determines that the remaining bytes of the sent data are 0, the transmission is completed and the data is checked. If the data check result is correct, a test pass log for this test is generated, otherwise a test error log for this test is generated.

[0043] The above-mentioned device 100 for automatically testing SPI peripherals is based on the designed upper computer and lower computer test architecture and test method, and has high test flexibility. Parameters can be customized according to needs, and various SPI signals can be flexibly generated; the test is more comprehensive, supporting random data to better verify the pressure resistance and robustness of SPI peripherals, and can also discover potential boundary conditions and abnormal situations to ensure the stability and reliability of the vehicle system; it has a wide range of uses and strong reusability, and MCUs with SPI (host / slave) devices can be tested; the test operation is simple, the test efficiency is high and the cost is low, and the single chip can also self-test to reduce interference.

[0044] In one embodiment, when the test mode is the slave mode, the SPI peripheral to be tested is the SPI slave, and the simulated SPI device is the SPI master. After initializing the SPI peripheral to be tested and the simulated SPI device, the simulated SPI device enables the clock signal interrupt when judging that the interrupt signal state of the chip select line CS is the valid edge, and the SPI peripheral to be tested fills the MSB of the transmission data of this test to the data line MISO.

[0045] At the falling edge of the clock signal interrupt, the SPI peripheral to be tested reads each bit in the data line MOSI and shifts and saves it until a data frame transmission is completed. At the rising edge of the clock signal interrupt, the SPI peripheral to be tested writes the MSB of the transmission data to be sent to the simulated SPI device to the data line MISO until a data frame transmission is completed. The simulated SPI device performs data verification. If the data verification result is correct, a test pass log for this test is generated, otherwise a test error log for this test is generated.

[0046] In one embodiment, the sending data is sending data provided after being customized by the host computer.

[0047] In one embodiment, the transmission data is transmission data generated by the MCU using a random number generation algorithm.

[0048] In one embodiment, the above-mentioned device 100 for automatically testing SPI peripherals may also include an oscilloscope, which is used to check whether there is a waveform error in the SPI protocol waveform transmitted between the SPI peripheral to be tested and the simulated SPI device. If there is a waveform error, the waveform error is reported to the upper computer; the waveform error includes waveform distortion and frequency error. At this time, the system connection method for the error checking test can be as follows: Figure 6 shown.

[0049] It can be understood that, for specific definitions of the apparatus 100 for automatically testing SPI peripherals, reference can be made to the corresponding definitions of the method for automatically testing SPI peripherals described above, which will not be described in detail herein.

[0050] Each module in the above-mentioned device 100 for automatically testing SPI peripherals can be implemented in whole or in part by software, hardware, or a combination thereof. Each of the above-mentioned modules can be embedded in or independent of a device having a data processing function in the form of hardware, or can be stored in the memory of the aforementioned device in the form of software, so that the processor can call and execute the operations corresponding to each of the above modules. The aforementioned device can be, but is not limited to, various types of test terminals available in the art.

[0051] A person of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided by the present invention can include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus dynamic random access memory (RambusDRAM, referred to as RDRAM) and interface dynamic random access memory (DRDRAM).

[0052] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0053] The above embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of protection of the invention. It should be pointed out that, for those of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present invention, which all belong to the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be subject to the attached claims.

Claims

1. A method for automatically testing SPI peripherals, characterized in that: Includes steps: Sending configuration parameters to the MCU where the SPI peripheral to be tested is located through the host computer; the configuration parameters include the SPI transmission rate, data length and test mode; Connecting the interface between the SPI peripheral to be tested and the simulated SPI device on the MCU, initializing the SPI peripheral to be tested and the simulated SPI device on the MCU according to the configuration parameters, and configuring the clock frequency of the high-precision timer in the MCU; when the test mode is the host mode, the SPI peripheral to be tested is set as the SPI host, and the simulated SPI device is the SPI slave; The MCU pulls down the chip select line through the GPIO operation register to make the SPI peripheral to be tested and the simulated SPI device start working; the high-precision timer is configured as a PWM mode; The SPI peripheral to be tested transmits the transmission data of this test to the analog SPI device through the data line MOSI; the analog SPI device reads each bit in the data line MOSI at the rising edge of the PWM interrupt, and starts receiving the next frame of transmission data after satisfying one frame of data; The simulated SPI device writes the MSB of the data to be sent to the SPI peripheral device under test into the data line MISO at the falling edge of the PWM interrupt; When the SPI peripheral to be tested determines that the remaining bytes of the sent data are 0, the transmission ends and a data check is performed; If the data verification result is correct, a test pass log for this test is generated, otherwise a test error log for this test is generated.

2. The method for automated testing of SPI peripherals according to claim 1, wherein: When the test mode is the slave mode, the SPI peripheral to be tested is an SPI slave, and the simulated SPI device is an SPI master. After initializing the SPI peripheral to be tested and the simulated SPI device, the method for automatically testing the SPI peripheral further comprises the steps of: The analog SPI device enables clock signal interruption when judging that the interrupt signal state of the chip select line CS is a valid edge, and the SPI peripheral to be tested fills the MSB of the transmission data of this test to the data line MISO; At the falling edge of the clock signal interruption, the SPI peripheral device to be tested reads each bit in the data line MOSI and shifts and saves it until a data frame transmission is completed; At the rising edge of the clock signal interruption, the SPI peripheral to be tested writes the MSB of the transmission data to be sent to the simulated SPI device into the data line MISO until a data frame transmission is completed; The simulated SPI device performs data verification. If the data verification result is correct, a test pass log for this test is generated; otherwise, a test error log for this test is generated.

3. The method for automated testing of SPI peripherals according to claim 1 or 2, characterized in that: The sending data is the sending data provided by the host computer after being customized.

4. The method for automated testing of SPI peripherals according to claim 1 or 2, characterized in that: The sending data is the sending data generated by the MCU using a random number generation algorithm.

5. The method for automated testing of SPI peripherals according to claim 1, wherein: Also includes the steps: Checking whether there is a waveform error in the SPI protocol waveform transmitted between the SPI peripheral to be tested and the simulated SPI device through an oscilloscope; the waveform error includes waveform distortion and frequency error; If there is a waveform error, the waveform error is reported to the host computer.

6. A device for automatically testing SPI peripherals, characterized in that: It includes a host computer and an MCU as a slave computer, wherein the MCU includes an SPI peripheral to be tested and an SPI simulation device; The host computer is used to send configuration parameters to the MCU; the configuration parameters include SPI transmission rate, data length and test mode; After the interface between the SPI peripheral to be tested and the simulated SPI device on the MCU is connected, the MCU initializes the SPI peripheral to be tested and the simulated SPI device according to the configuration parameters, and configures the clock frequency of the high-precision timer in the MCU; when the test mode is the host mode, the SPI peripheral to be tested is set as the SPI host, and the simulated SPI device is the SPI slave; The MCU pulls down the chip select line through the GPIO operation register to make the SPI peripheral to be tested and the simulated SPI device start working; the high-precision timer is configured as a PWM mode; The SPI peripheral device to be tested transmits the transmission data of this test to the simulated SPI device through the data line MOSI. The simulated SPI device reads each bit in the data line MOSI at the rising edge of the PWM interrupt, and starts receiving the next frame of transmission data after satisfying one frame of data. The simulated SPI device writes the MSB of the data to be sent to the SPI peripheral device to be tested into the data line MISO at the falling edge of the PWM interrupt. When the SPI peripheral to be tested determines that the remaining bytes of the sent data are 0, the transmission is completed and data verification is performed. If the data verification result is correct, a test pass log for this test is generated, otherwise a test error log for this test is generated.

7. The device for automated testing of SPI peripherals according to claim 6, characterized in that: When the test mode is the slave mode, the SPI peripheral to be tested is an SPI slave, and the simulated SPI device is an SPI master; After initializing the SPI peripheral to be tested and the simulated SPI device, the simulated SPI device enables clock signal interruption when judging that the interrupt signal state of the chip select line CS is a valid edge, and the SPI peripheral to be tested fills the MSB of the transmission data of this test to the data line MISO; At the falling edge of the clock signal interruption, the SPI peripheral device under test reads each bit in the data line MOSI and shifts and saves it until a data frame transmission is completed, and at the rising edge of the clock signal interruption, the SPI peripheral device under test writes the MSB of the transmission data to be sent to the simulated SPI device into the data line MISO until a data frame transmission is completed; The simulated SPI device performs data verification. If the data verification result is correct, a test pass log for this test is generated; otherwise, a test error log for this test is generated.

8. The device for automatically testing SPI peripherals according to claim 6 or 7, characterized in that: The sending data is the sending data provided by the host computer after being customized.

9. The device for automatically testing SPI peripherals according to claim 6 or 7, characterized in that: The sending data is the sending data generated by the MCU using a random number generation algorithm.

10. The device for automated testing of SPI peripherals according to claim 6, characterized in that: Also included is an oscilloscope, the oscilloscope is used to check whether there is a waveform error in the SPI protocol waveform transmitted between the SPI peripheral to be tested and the simulated SPI device, and if there is a waveform error, report the waveform error to the host computer; The waveform error includes waveform distortion and frequency error.

Images