Method for establishing degradation accumulation model of electrolytic capacitor considering interaction of thermal stress levels, degradation prediction method and equipment

Abstract

The present invention relates to a method for establishing a degradation accumulation model for electrolytic capacitors that considers the interaction of thermal stress levels, a degradation prediction method, and an apparatus, and belongs to the field of electronic component reliability technology. In order to address the problem of large deviations in prediction results when predicting electrolytic capacitor degradation using existing electrolytic capacitor degradation models, the present invention first conducts a constant thermal stress degradation test to establish a degradation model for capacitor parameters under constant thermal stress, then conducts a two-stage constant thermal stress degradation test, and estimates a path adjustment factor based on the test data. A mathematical model for the path adjustment factor is established based on the path adjustment factor, and the form of the degradation accumulation model is determined. Furthermore, a mathematical model for the path adjustment factor is established, and the form of the degradation accumulation model is determined, and prediction is performed based on the form of the degradation accumulation model. The present invention is used for predicting electrolytic capacitor degradation.

Description

Technical Field

[0001] The present invention belongs to the technical field of electronic component reliability, and in particular relates to a method for establishing a degradation accumulation model of an electrolytic capacitor, a degradation prediction method, and a degradation prediction device. Background Art

[0002] Electrolytic capacitors are crucial to the functionality of electronic devices, such as power electronic converters, and their degradation severely impacts the safety and reliability of these devices. In industrial applications, capacitors often operate under dynamic rather than constant stress levels. Quantifying degradation under dynamic stress is challenging because it requires considering potential stress interactions. Although these interactions profoundly influence degradation pathways, they are often overlooked, leading to significant discrepancies between reliability predictions and engineering practices. Summary of the Invention

[0003] The present invention aims to solve the problem that the existing electrolytic capacitor degradation model has a large deviation in the prediction results when predicting the degradation of the electrolytic capacitor.

[0004] A method for establishing a degradation accumulation model of an electrolytic capacitor considering the interaction of thermal stress levels includes the following steps:

[0005] Step S1: Conduct a constant thermal stress degradation test and establish a degradation model of capacitor parameters under constant thermal stress:

[0006] Carry out n groups of constant thermal stress degradation tests; in each group of stress settings, the voltage value is the same and the capacitor core temperature value is different, which are recorded as T1, T2, ..., T n Design the test duration and test frequency, take the core temperature T and time t as input, and the capacitor parameters as output, and establish the capacitor parameter degradation model under voltage V:

[0007] X(t)=A(V,T)·t B +X0(1)

[0008] Where X(t) is the capacitance of the electrolytic capacitor or the equivalent series resistance at time t; A(V,T) is a function with the electrolytic capacitor voltage V and the core temperature T as inputs; B is the model coefficient; X0 is the initial value of the electrolytic capacitor capacitance or equivalent series resistance before degradation;

[0009] Step S2: Conduct a two-stage constant thermal stress degradation test:

[0010] Set the voltage value to V and select the two-stage thermal stress level T S1 and T S2 ; Set m1 group to apply T first S1 Then apply T S2 The experimental group, set the m2 group to first apply T S2Then apply T S1 of the experimental group;

[0011] Set the application time of the two-stage thermal stress; in the test group with the same thermal stress application sequence, the application time of the two-stage thermal stress should be different; carry out the two-stage constant thermal stress degradation test based on the application time of the two-stage thermal stress;

[0012] Step S3: Estimate the path adjustment factor based on the test data obtained in step S2:

[0013] Step S31: Calculate the average degradation amount X of the test samples in each group at the end of the first stage in the two-stage constant thermal stress degradation test. i , i represents the i-th group of two-stage constant thermal stress degradation tests;

[0014] Step S32, setting the initial value of α;

[0015] Step S33, setting the maximum number of iterative calculations and the value of the root mean square error RMSE;

[0016] Step S34: Based on the thermal stress level of the second stage of the i-th group, according to X i Calculate the corresponding X with the following formula i Degradation time t i ;

[0017] X(t)=α·A(V,T)·t B +X0(3)

[0018] Step S35, with t i As the starting point, adjust the time coordinate of the second stage data of group i according to the test interval of group i;

[0019] Step S36: using a curve fitting or optimization algorithm to obtain the α value that minimizes the RMSE between formula (3) and the average degradation data of the second stage samples of the i-th group;

[0020] S37, repeating steps S34 to S36 until the maximum number of iterations set in step S33 is reached or the RMSE standard is met, and finally obtaining the path adjustment factor α of all m1+m2 groups of two-stage constant thermal stress degradation tests;

[0021] Step S4: establishing a mathematical model of the path adjustment factor based on the path adjustment factor obtained in step S3, and determining the form of the degradation accumulation model;

[0022] The degradation accumulation model is of the following form:

[0023]

[0024] Among them, j represents the jth stage.

[0025] Furthermore, the test duration designed in step S1 is as follows:

[0026] The test duration of each group should be greater than the core temperature max (T1, T2, ..., T n ) is the time for the capacitance to degrade to 90% of the initial value or the equivalent series resistance to degrade to 200% of the initial value.

[0027] Furthermore, the test frequency designed in step S1 is as follows:

[0028] The test frequency should ensure that the number of tests per group during the test period is greater than 10 times.

[0029] Furthermore, in step S2, the two-stage thermal stress level T S1 and T S2 The value of is between the maximum temperature and the minimum temperature of the core temperature value in step S11.

[0030] Furthermore, the number of test groups in step S2 should satisfy m1≥3 and m2≥1, or m1≥1 and m2≥3.

[0031] Furthermore, the application time of the two-stage thermal stress in step S2 should meet the following conditions:

[0032] The application time of the second stage thermal stress should ensure that at least 5 test points can be obtained in each group.

[0033] Furthermore, the mathematical model of the path adjustment factor established in step S4 is as follows:

[0034]

[0035] Where a, b, c are fitting coefficients; T 前一阶段 is the capacitor core temperature in the first stage of the two-stage constant thermal stress degradation test; T 当前阶段 is the capacitor core temperature in the second stage of the two-stage constant thermal stress degradation test; t 前一阶段 The application time of the first stage of the two-stage constant thermal stress degradation test.

[0036] The electrolytic capacitor degradation prediction method considering the interaction of thermal stress levels uses the degradation accumulation model established by the electrolytic capacitor degradation accumulation model establishment method considering the interaction of thermal stress levels to predict the degradation of the electrolytic capacitor.

[0037] Furthermore, in the process of predicting the degradation of electrolytic capacitors using the degradation accumulation model established by the method for establishing the degradation accumulation model of electrolytic capacitors considering the interaction of thermal stress levels, the stage j corresponding to the core temperature of the capacitor working environment is first determined. When j = 1, the degradation path is calculated according to X(t) = A(V, Tc1 )·t B +X0 is predicted; when j>1, the degradation path of this stage is calculated according to X(t)=α(T cj-1 ,T cj ,t j-1 )·A(V,T cj )·t B +X0 for prediction.

[0038] A device for predicting degradation of an electrolytic capacitor considering the interaction of thermal stress levels is disclosed. The device includes a processor and a memory. The memory stores at least one instruction. The at least one instruction is loaded and executed by the processor to implement the method for predicting degradation of an electrolytic capacitor considering the interaction of thermal stress levels.

[0039] Beneficial effects:

[0040] The proposed method for modeling the cumulative degradation of electrolytic capacitors, which considers the interaction of thermal stress levels, improves the accuracy of degradation predictions under dynamic stress. In actual experiments, the average degradation of the equivalent resistance of 32 capacitors in series after 3000 hours was 0.988Ω. Conventional methods predicted 0.9316Ω, while the proposed model predicted 0.9989Ω. This significantly improves degradation prediction accuracy, reducing the relative error from 6% to 2%. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 Schematic diagram of the process for developing a degradation accumulation model for electrolytic capacitors considering the interaction of thermal stress levels. DETAILED DESCRIPTION Specific implementation method one:

[0043] This embodiment provides a method for establishing a degradation accumulation model of an electrolytic capacitor taking into account the interaction of thermal stress levels and a prediction method using the established model for prediction.

[0044] Combine Figure 1 The method for establishing a degradation accumulation model of an electrolytic capacitor considering the interaction of thermal stress levels described in this embodiment includes the following steps:

[0045] Step S1: Conduct a constant thermal stress degradation test and establish a degradation model of capacitor parameters under constant thermal stress:

[0046] Step S11: Conduct n groups (n≥2) of constant thermal stress degradation tests. In each group of stress settings, the voltage value is the same, but the capacitor core temperature value is different, as shown in Table 1.

[0047] Table 1 Constant thermal stress degradation test settings

[0048] experimental group Stress Settings Group 1 <![CDATA[Voltage V, core temperature T1]]> Group 2 <![CDATA[Voltage V, core temperature T2]]> …… …… Group n <![CDATA[Voltage V, core temperature T n >

[0049] Step S12: Design the test duration and test frequency.

[0050] The test duration of each group should be greater than the core temperature max (T1, T2, ..., T n ) is the time for the capacitance to degrade to 90% of the initial value or the equivalent series resistance to degrade to 200% of the initial value.

[0051] The test frequency should ensure that the number of tests per group during the test period is greater than 10 times.

[0052] Step S13: Using the core temperature T and time t as inputs and the capacitor parameters (capacitance or equivalent series resistance) as outputs, a capacitor parameter degradation model of the following form is established under voltage V:

[0053] X(t)=A(V,T)·t B +X0(1)

[0054] Where X(t) is the capacitance of the electrolytic capacitor or the equivalent series resistance at time t; A(V,T) is a function with the electrolytic capacitor voltage V and the core temperature T as inputs; B is the model coefficient; and X0 is the initial value of the electrolytic capacitor capacitance or equivalent series resistance before degradation.

[0055] This model is a degradation model under constant stress. A(V,T) and B in the model can be determined using methods such as nonlinear regression or mixed effect estimation.

[0056] Step S2: Conduct a two-stage constant thermal stress degradation test:

[0057] Step S21: Set the voltage value to V and select the two-stage thermal stress level T S1 and T S2 . T S1 and T S2 The value of should be between the maximum and minimum temperatures in step S11:

[0058] min(T1,T2,…,T n )≤T S1 ,T S2 ≤max(T1,T2,…,T n )(2)

[0059] At the same time, T S1 and T S2 The capacitor parameter degradation paths calculated by equation (1) below should be significantly different.

[0060] Step S22: Set group m1 to apply T first S1 Then apply T S2 The experimental group, set the m2 group to first apply TS2 Then apply T S1 of the experimental group.

[0061] The number of experimental groups should satisfy m1≥3 and m2≥1, or m1≥1 and m2≥3.

[0062] Step S23: setting the application time of the two-stage thermal stress.

[0063] In the test groups with the same thermal stress application sequence, the application time of the two stages of thermal stress should be different. The application time of the second stage of thermal stress should ensure that at least 5 test points can be obtained in each group.

[0064] Step S24: performing a two-stage constant thermal stress degradation test based on the application time of the two-stage thermal stress.

[0065] Step S3: Estimate the path adjustment factor based on the test data obtained in step S2:

[0066] Step S31: Calculate the average degradation amount X of the test samples in each group at the end of the first stage in the two-stage constant thermal stress degradation test. i , i represents the i-th group of two-stage constant thermal stress degradation tests;

[0067] For example, in the two-stage constant thermal stress degradation test of group i, the first step is to apply T S1 , then apply T for 1000 hours S2 , there are 10 capacitor samples in the group. Calculate the average degradation of the 10 capacitor samples at 1000 hours and record it as X i .

[0068] Step S32: setting the initial value of α, α∈(0,+∞);

[0069] Step S33: setting the maximum number of iterative calculations and the value of the root mean square error RMSE;

[0070] Step S34: Based on the second stage thermal stress level of the i-th group, according to X i Calculate the corresponding X with the following formula i The time t of degradation i ;

[0071] X(t)=α·A(V,T)·t B +X0(3)

[0072] This formula is used to calculate the parameter degradation of electrolytic capacitors under dynamic stress considering the interaction of thermal stress levels. In the formula, α is the path adjustment factor. A(V,T) is used to describe the impact of capacitor parameter degradation, and the path adjustment factor acts on this term in a multiplicative form to introduce the impact of thermal stress level interaction on the degradation rate. By adjusting the shadow α by the path, the formula can describe the acceleration of degradation (1<α), the deceleration of degradation (0<α<1), and the unchanged degradation rate (α=1) after the thermal stress level changes, with rich flexibility. In this way, the formula can cover a wide range of stress level interaction influence forms and accurately describe the degradation path affected by thermal stress level interaction.

[0073] Step S35: t i As the starting point, adjust the time coordinate of the second stage data of group i according to the test interval of group i;

[0074] Step S36: using a curve fitting or optimization algorithm to obtain the α value that minimizes the RMSE of formula (3) compared with the average degradation data of the second stage samples of the i-th group;

[0075] S37: Repeat steps S34 to S36 until the maximum number of iterations set in step S33 is reached or the RMSE standard is met, and finally the path adjustment factor α of all m1+m2 groups of two-stage constant thermal stress degradation tests is obtained;

[0076] Step S4: Based on the path adjustment factor obtained in step S3, a path adjustment factor mathematical model is established to determine the degradation accumulation model form:

[0077] Step S41: The specific form of the path adjustment factor is obtained by fitting the test data:

[0078]

[0079] In the formula, a, b, c are fitting coefficients, and the specific values ​​are obtained through fitting. When fitting, T 前一阶段 is the capacitor core temperature in the first stage of the two-stage constant thermal stress degradation test; T 当前阶段 is the capacitor core temperature in the second stage of the two-stage constant thermal stress degradation test; t 前一阶段 The application time of the first stage of the two-stage constant thermal stress degradation test.

[0080] Step S42: Determine the degradation accumulation model as follows:

[0081]

[0082] According to the different levels of thermal stress, the core temperature of the capacitor working environment can be divided into h stages, and the core temperature in each stage is T c1 , Tc2 ,……,T ch The duration of each stage is t1, t2, ..., t h The degradation accumulation model in the above form is used to calculate the degradation of the jth stage to realize the calculation of capacitor parameter degradation under dynamic thermal stress. When j = 1, the degradation path is calculated according to X(t) = A(V, T c1 )·t B +X0 calculation. When j>1, the degradation path of this stage is calculated according to X(t)=α(T cj-1 ,T cj ,t j-1 )·A(V,T cj )·t B +X0 is used for calculation. Starting from the second stage, each stage takes into account the degradation acceleration or deceleration caused by the interaction between the thermal stress level of the previous stage and the current stage, thereby achieving more accurate degradation calculation.

[0083] This embodiment also describes a prediction method using the established model, namely, a method for predicting electrolytic capacitor degradation considering the interaction of thermal stress levels, which predicts electrolytic capacitor degradation using a degradation accumulation model established by the method for establishing an electrolytic capacitor degradation accumulation model considering the interaction of thermal stress levels.

[0084] In the process of predicting the degradation of electrolytic capacitors, the stage j corresponding to the core temperature of the capacitor working environment is first determined. When j = 1, the degradation path is calculated according to X(t) = A(V, T c1 )·t B +X0 is predicted; when j>1, the degradation path of this stage is calculated according to X(t)=α(T cj-1 ,T cj ,t j-1 )·A(V,T cj )·t B +X0 for prediction.

[0085] Example:

[0086] This embodiment uses a certain type of aluminum electrolytic capacitor as an object to establish an electrolytic capacitor degradation accumulation model that considers the interaction of thermal stress levels.

[0087] Step S1: Conduct a constant thermal stress degradation test and establish a degradation model of capacitor parameters under constant thermal stress.

[0088] Step S11: Set up three groups of constant thermal stress degradation tests. Each group of stress settings has the same voltage value and different capacitor core temperature values, as shown in the following table. Each group has 32 capacitor values.

[0089] Table 2 Constant thermal stress degradation test setup example

[0090] experimental group Stress Settings Group 1 Voltage 50V, core temperature 105℃ Group 2 Voltage 50V, core temperature 95℃ Group 3 Voltage 50V, core temperature 85℃

[0091] Step S12: The test duration is designed to be 2000 hours, which is greater than the time (1900 hours) required for the capacitor to degrade to 90% of its initial value at a core temperature of 105° C. The test frequency is 20 hours, with 100 test points per group.

[0092] Step S13: Using nonlinear regression to determine the electrolytic capacitor equivalent series resistance degradation model is as follows:

[0093] X(t)=(6.1×10 -8 ·T 2.77 +0.0021)·t 0.68 +0.505(6)

[0094] Step S2: conducting a two-stage constant thermal stress degradation test;

[0095] Step S21: Set the voltage to 50V, T S1 =85℃ and T S2 =105℃. The degradation paths of the capacitor's equivalent series resistance are significantly different at the two temperatures.

[0096] Step S22: setting up three test groups in which the temperature is first applied at 85°C and then at 105°C, and one test group in which the temperature is first applied at 105°C and then at 85°C.

[0097] Step S23: The application time of the two-stage thermal stress is set as shown in the following table, with 32 capacitors in each group.

[0098] Table 3 Example of two-stage thermal stress application time setting

[0099]

[0100] Step S3: estimating the path adjustment factor based on the test data obtained in step S2;

[0101] Step S31: Calculate the average degradation amount of each group of stress level switching moments in the two-stage constant thermal stress degradation test as shown in the following table:

[0102] Table 4 Average degradation of each group at stress switching time

[0103] Group number Average degradation of equivalent series resistance 1 0.6334Ω 2 0.6703Ω 3 0.6966Ω 4 0.6349Ω

[0104] Step S32: Set the initial α value of groups 1, 2, and 3 to 1.5, and set the initial α value of group 4 to 0.5.

[0105] Step S33: Set the maximum number of iterative calculations to 1000 and the root mean square error RMSE to 0.001;

[0106] Step S34: Since the α value has been set in step S32, equation (3) is uniquely determined. According to the average degradation amount of each group in Table 4, the corresponding time can be obtained.

[0107] Table 5 Average degradation time of each group at stress switching moment

[0108] Group number Average degradation time at stress switching moment 1 82 hours 2 164 hours 3 246 hours 4 360 hours

[0109] Step S35: The test intervals for Groups 1, 2, 3, and 4 are all 20 hours, so the times corresponding to the test data for the second phase of Group 1 are adjusted to 82+20, 82+40, 82+60, ..., respectively. The same applies to Groups 2, 3, and 4.

[0110] Step S36: Using the least squares method, taking the α value as the undetermined coefficient, and fitting the data after adjusting the time coordinate in S35 using formula (3), obtain the α value and RMSE value with the minimum RMSE for each group.

[0111] S37: Iterate the calculation for groups 1, 2, 3, and 4 until the RMSE setting value is reached. The final path adjustment factor α is as follows:

[0112] Table 1 Final results of path adjustment factor α

[0113] Group number α 1 1.053 2 1.137 3 1.1708 4 0.7821

[0114] Step S4: Based on the path adjustment factor obtained in step S3, a path adjustment factor mathematical model is established to determine the degradation accumulation model form.

[0115] Step S41: The data used to determine the coefficients a, b, and c are shown in the following table:

[0116] Table 2 Data used to determine coefficients a, b, c

[0117]

[0118]

[0119] The least squares method can be used to fit:

[0120]

[0121] Step S42: Determine the degradation accumulation model as follows:

[0122]

[0123] Where h is the number of different core temperature level stages divided according to the core temperature profile under the actual working conditions of the electrolytic capacitor, and j is the jth stage.

[0124] The model is applied to capacitor reliability prediction. Assume that the capacitor works under the working conditions of 85℃ for 1000 hours and 105℃ for 2000 hours. Then the degradation path from 0 to 1000 hours is X(t) = (6.1×10 -8 85 2.77 +0.0021)·1000 0.68 +0.505. After 1000 hours, when the temperature is switched to 105℃, the equivalent series resistance degradation value is 0.693Ω. At this time, the path adjustment factor is 1.1736. The second stage is the core temperature of 105℃, the voltage is 50V, and the duration is 2000 hours. The degradation path from 1000 hours to 3000 hours starts at 0.693Ω and is calculated according to X(t) = 1.1736×(6.1×10 -8 105 2.77 +0.0021)·1000 0.68 +0.505. The second stage of the traditional degradation accumulation calculation method without considering the interaction of thermal stress levels is always based on X(t) = (6.1×10 -8 105 2.77 +0.0021)·1000 0.68 In actual testing, the average degradation of the equivalent resistance of 32 capacitors in series after 3000 hours was 0.988Ω. The traditional method predicted a value of 0.9316Ω, while the proposed model predicted a value of 0.9989Ω. The relative error was reduced from 6% to 2%, significantly improving degradation prediction accuracy. Specific implementation method two:

[0126] This embodiment is a device for predicting electrolytic capacitor degradation that considers the interaction of thermal stress levels. The device includes a processor and a memory. It should be understood that the device includes any device including a processor and a memory described in the present invention. The device may also include other units or modules that perform display, interaction, processing, control, and other functions through signals or instructions.

[0127] At least one instruction is stored in the memory, and the at least one instruction is loaded and executed by the processor to implement the electrolytic capacitor degradation prediction method considering the interaction of thermal stress levels.

[0128] Those skilled in the art will appreciate that at least one instruction stored is a computer program product corresponding to the method or system. Therefore, the present application may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present application may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The solutions in the embodiments of the present application can be implemented in various computer languages, for example, object-oriented programming language Java and interpreted scripting language JavaScript, etc.

[0129] The present application is described with reference to the flowcharts and / or block diagrams of the methods, systems, and computer program products according to the embodiments of the present application, and can also be used for corresponding devices. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0130] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0131] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0132] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present application.

[0133] Obviously, those skilled in the art may make various changes and modifications to this application without departing from the spirit and scope of this application. Thus, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalents, this application is intended to include these modifications and variations.

[0134] The above examples are merely illustrative of the calculation model and process of the present invention and are not intended to limit the embodiments of the present invention. Persons skilled in the art will readily appreciate that other variations or modifications based on the above description are possible. This list of embodiments is not exhaustive; however, any obvious variations or modifications derived from the technical solution of the present invention remain within the scope of protection of the present invention.

Claims

1. A method for establishing a degradation accumulation model of electrolytic capacitors considering the interaction of thermal stress levels, characterized in that: The following steps are involved: Step S1: Conduct a constant thermal stress degradation test and establish a degradation model of capacitor parameters under constant thermal stress: Conduct n groups of constant thermal stress degradation tests; In each stress setting, the voltage value is the same, but the capacitor core temperature value is different, which are denoted as T1, T2, ..., T n Design the test duration and test frequency, take the core temperature T and time t as input, and the capacitor parameters as output, and establish the capacitor parameter degradation model under voltage V: X(t)=A(V,T)·t B +X0 (1) Where X(t) is the capacitance or equivalent series resistance of the electrolytic capacitor at time t; A(V,T) is a function that uses the electrolytic capacitor voltage V and the core temperature T as input to describe the effect of capacitor parameter degradation; B is the model coefficient; X0 is the initial value of the electrolytic capacitor capacitance or equivalent series resistance before degradation; Step S2: Conduct a two-stage constant thermal stress degradation test: Set the voltage value to V and select the two-stage thermal stress level T S1 and T S2 ; Set m1 group to apply T first S1 Then apply T S2 The experimental group, set the m2 group to first apply T S2 Then apply T S1 of the experimental group; Set the application time of the two-stage thermal stress; in the test group with the same thermal stress application sequence, the application time of the two-stage thermal stress should be different; carry out the two-stage constant thermal stress degradation test based on the application time of the two-stage thermal stress; Step S3: Estimate the path adjustment factor based on the test data obtained in step S2: Step S31: Calculate the average degradation amount X of the test samples in each group at the end of the first stage in the two-stage constant thermal stress degradation test. i , i represents the i-th group of two-stage constant thermal stress degradation tests; Step S32, setting the initial value of α; Step S33, setting the maximum number of iterative calculations and the value of the root mean square error RMSE; Step S34: Based on the thermal stress level of the second stage of the i-th group, according to X i Calculate the corresponding X with the following formula i Degradation time t i ; X(t)=α·A(V,T)·t B +X0 (3) Step S35, with t i As the starting point, adjust the time coordinate of the second stage data of group i according to the test interval of group i; Step S36: using a curve fitting or optimization algorithm to obtain the α value that minimizes the RMSE between formula (3) and the average degradation data of the second stage samples of the i-th group; S37, repeating steps S34 to S36 until the maximum number of iterations set in step S33 is reached or the RMSE standard is met, and finally obtaining the path adjustment factor α of all m1+m2 groups of two-stage constant thermal stress degradation tests; Step S4: establishing a mathematical model of the path adjustment factor based on the path adjustment factor obtained in step S3, and determining the form of the degradation accumulation model; The degradation accumulation model is of the following form: Among them, j represents the jth stage; The path adjustment shadow α is used to describe the acceleration, deceleration, and unchanged degradation rate after the thermal stress level changes. The path adjustment factor α acts on A(V, T) in a multiplicative form to introduce the influence of the interaction of thermal stress levels on the degradation rate. The established mathematical model of the path adjustment factor is as follows: Where a, b, c are fitting coefficients; T 前一阶段 is the capacitor core temperature in the first stage of the two-stage constant thermal stress degradation test; T 当前阶段 is the capacitor core temperature in the second stage of the two-stage constant thermal stress degradation test; t 前一阶段 The application time of the first stage of the two-stage constant thermal stress degradation test.

2. The method for establishing an electrolytic capacitor degradation accumulation model considering the interaction of thermal stress levels according to claim 1, characterized in that: The test duration designed in step S1 is as follows: The test duration of each group should be greater than the core temperature max (T1, T2, ..., T n ) is the time for the capacitance to degrade to 90% of the initial value or the equivalent series resistance to degrade to 200% of the initial value.

3. The method for establishing an electrolytic capacitor degradation accumulation model considering the interaction of thermal stress levels according to claim 1, characterized in that: The test frequencies designed in step S1 are as follows: The test frequency should ensure that the number of tests per group during the test period is greater than 10 times.

4. The method for establishing an electrolytic capacitor degradation accumulation model considering the interaction of thermal stress levels according to claim 1, characterized in that: The two-stage thermal stress level T in step S2 S1 and T S2 The value of is between the maximum temperature and the minimum temperature of the core temperature value in step S11.

5. The method for establishing an electrolytic capacitor degradation accumulation model considering the interaction of thermal stress levels according to claim 1, characterized in that: The number of test groups in step S2 should satisfy m1≥3 and m2≥1, or m1≥1 and m2≥3.

6. The method for establishing an electrolytic capacitor degradation accumulation model considering the interaction of thermal stress levels according to claim 1, characterized in that: The application time of the two-stage thermal stress in step S2 should meet the following conditions: The application time of the second stage thermal stress should ensure that at least 5 test points can be obtained in each group.

7. A method for predicting electrolytic capacitor degradation considering the interaction of thermal stress levels, characterized in that: The degradation accumulation model established by the method for establishing an electrolytic capacitor degradation accumulation model considering the interaction of thermal stress levels according to any one of claims 1 to 6 is used to predict the degradation of the electrolytic capacitor.

8. The electrolytic capacitor degradation prediction method considering the interaction of thermal stress levels according to claim 7, characterized in that: In the process of predicting the degradation of electrolytic capacitors using the degradation accumulation model established by the method for establishing the degradation accumulation model of electrolytic capacitors considering the interaction of thermal stress levels according to any one of claims 1 to 6, the stage j corresponding to the core temperature of the capacitor working environment is first determined. When j = 1, the degradation path is calculated according to X(t) = A(V, T c1 )·t B +X0 is predicted; when j>1, the degradation path of this stage is calculated according to X(t)=α(T cj-1 ,T cj ,t j-1 )·A(V,T cj )·t B +X0 for prediction.

9. An electrolytic capacitor degradation prediction device considering the interaction of thermal stress levels, characterized in that The device includes a processor and a memory, wherein the memory stores at least one instruction, and the at least one instruction is loaded and executed by the processor to implement the electrolytic capacitor degradation prediction method considering the interaction of thermal stress levels as described in any one of claims 7 to 8.

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