A lower electrode assembly, plasma processing equipment and voltage control method thereof

Abstract

The present invention provides a lower electrode assembly, a plasma processing device and a voltage control method thereof. A first DC pulse voltage is coupled to a first circuit of a focusing ring through a first bias power supply, a first capacitor is connected in series, and a first slope corresponding to a change in the focusing ring voltage is adjusted by the capacitance of the first capacitor, thereby reducing the voltage difference between a substrate and the focusing ring, and effectively reducing the risk of arc discharge between the substrate and the focusing ring.

Description

Technical Field

[0001] The invention relates to semiconductor manufacturing technology, and in particular to a lower electrode assembly, plasma processing equipment and a voltage control method thereof. Background Art

[0002] Conventional plasma processing equipment usually configures two RF sources for the lower electrode assembly, in which a high-frequency first RF source is used to generate plasma, and the substrate surface is etched and processed by the plasma; the other low-frequency second RF source is used to generate a bias voltage on the substrate, thereby accelerating the ions in the plasma that bombard the substrate. However, the signal provided by the second RF source is a sine wave, which will cause the ions entering the plasma sheath at different times to feel different accelerating electric fields, thereby producing a wider ion energy distribution; among them, etching by ions with lower energy has stronger isotropy, and etching by ions with higher energy has stronger anisotropy. Therefore, it is difficult for conventional equipment to obtain the desired shape when etching the substrate, and it cannot meet the requirements for precise control of the etching profile in processes such as high aspect ratio etching.

[0003] In order to solve the above problems, some existing technologies use a pulsed DC power supply instead of the second RF source to bias the substrate, so that the ion energy is more concentratedly distributed in the high-energy area. At the same time, a pulsed DC power supply is also fed to the focusing ring outside the substrate to make the plasma characteristics and ion directionality from the center to the edge of the substrate more uniform, thereby improving the etching effect on the edge of the substrate. However, as the process continues, ions continue to bombard the substrate and the focusing ring surface, which will gradually reduce the plasma sheath voltage (referring to the absolute value of the voltage). Moreover, the sheath voltage on the substrate and the focusing ring surface decreases at different speeds, which leads to a gradually larger voltage difference between the substrate and the focusing ring, thereby causing arc discharge between the substrate and the focusing ring, which may damage the substrate or even the lower electrode assembly in severe cases. Summary of the invention

[0004] The object of the present invention is to provide a lower electrode assembly, plasma processing equipment and a voltage control method thereof, in which a capacitor is connected in series to a circuit that supplies a DC pulse signal to a focusing ring to adjust the slope of the focusing ring voltage change, thereby reducing the voltage difference between the substrate and the focusing ring and reducing the risk of arc discharge between the two.

[0005] To achieve this object, a technical solution of the present invention is to provide a lower electrode assembly, which comprises:

[0006] A base, used for carrying a substrate and a focusing ring surrounding the substrate;

[0007] A first bias power supply, used for providing a first DC pulse voltage;

[0008] coupling a first DC pulse voltage of the first bias power supply to a first circuit of a focus ring;

[0009] A first capacitor, connected in series in the first circuit;

[0010] A second bias power supply, configured to provide a second DC pulse voltage; and

[0011] coupling a second DC pulse voltage of the second bias power supply to a second circuit of the substrate;

[0012] The first capacitor makes the change slope of the focus ring voltage and the change slope of the substrate voltage converge.

[0013] Optionally, a dielectric layer is provided on the top of the base to support the substrate and the focus ring; the dielectric layer includes a middle area located below the substrate and an edge area located below the focus ring;

[0014] The first circuit includes a first bias electrode; the first bias electrode is arranged in an edge region of the dielectric layer; a first end of the first capacitor is electrically connected to an output end of the first bias power supply, and a second end of the first capacitor is electrically connected to the first bias electrode;

[0015] The second circuit comprises a second bias electrode, which is disposed in a middle region of the dielectric layer and electrically connected to an output terminal of the second bias power supply; or

[0016] The second bias electrode is formed equivalent to the base.

[0017] Optionally, the first circuit includes an inherent capacitor, which is the capacitance of the dielectric layer portion between the first bias electrode and the focusing ring; the first capacitor is connected in series with the inherent capacitor.

[0018] Optionally, a dielectric layer is provided on the top of the base to support the substrate and the focus ring; the dielectric layer includes a middle area located below the substrate and an edge area located below the focus ring;

[0019] In the first circuit, the first end of the first capacitor is electrically connected to the output end of the first bias power supply, and the second end of the first capacitor is electrically connected to the focusing ring;

[0020] The second circuit includes a second bias electrode; the second bias electrode is arranged in the middle area of ​​the dielectric layer and is electrically connected to the output end of the second bias power supply.

[0021] Optionally, the first capacitor is a first capacitor with a constant capacitance, or a first variable capacitor with an adjustable capacitance.

[0022] Optionally, the capacitance of the first capacitor is any value between 100pF and 10nF.

[0023] Optionally, a second capacitor is connected in series in the second circuit; the second capacitor is a second capacitor with a constant capacitance, or a second variable capacitor with an adjustable capacitance;

[0024] A first end of the second capacitor is electrically connected to an output end of the second bias power supply, and a second end of the second capacitor is electrically connected to the second bias electrode.

[0025] Optionally, the lower electrode assembly is provided with a synchronization control unit for controlling the action of the switching devices of the first bias power supply and the second bias power supply, so that the frequency, duty cycle and phase of the pulse waveform of the first DC pulse voltage are the same as the frequency, duty cycle and phase of the pulse waveform of the second DC pulse voltage.

[0026] Another technical solution of the present invention is to provide a plasma processing device, which includes a reaction chamber; a source RF power provided by at least one RF power supply is coupled into the reaction chamber to excite the process gas injected into the reaction chamber to form plasma; any one of the above-mentioned lower electrode assemblies is arranged at the bottom of the reaction chamber.

[0027] The present invention also has a technical solution to provide a voltage control method for the plasma processing equipment; the first stage of the focusing ring voltage waveform includes a first slope corresponding to the change of the focusing ring voltage; the first stage of the substrate voltage waveform includes a second slope corresponding to the change of the substrate voltage; the first circuit that couples the first DC pulse voltage of the first bias power supply to the focusing ring is connected in series with a first capacitor, and the first slope is controlled by the capacitance of the first capacitor to reduce the slope difference between the first slope and the second slope, thereby reducing the voltage difference between the focusing ring voltage and the substrate voltage.

[0028] Optionally, the first slope is provided with a first starting point voltage and a first end point voltage, which correspond to the focus ring voltages at the beginning and the end of the first stage of the focus ring voltage waveform, respectively;

[0029] The second slope is provided with a second starting point voltage and a second end point voltage, which correspond to the substrate voltages at the beginning and the end of the first stage of the substrate voltage waveform, respectively;

[0030] Wherein, the first slope is inversely proportional to the total capacitance between the first bias power supply and the focusing ring;

[0031] A first capacitor is connected in series in the first circuit, so that the first slope increases and the difference between the first starting point voltage and the first end point voltage increases.

[0032] Optionally, a second circuit for coupling a second DC pulse voltage of a second bias power supply to the substrate is connected in series with a second capacitor, and the second slope is controlled by the capacitance of the second capacitor.

[0033] Optionally, the second slope is inversely proportional to the total capacitance from the second bias power supply to the substrate.

[0034] Optionally, the second capacitor is connected in series in the second circuit to increase the second slope; when the second slope increases, the difference between the second starting point voltage and the second end point voltage increases.

[0035] Optionally, when the first circuit is connected in series with the first capacitor to increase the first slope, the first starting point voltage is kept unchanged, the first end point voltage is increased, and the difference between the first starting point voltage and the first end point voltage is increased.

[0036] Optionally, when the second circuit is connected in series with the second capacitor to increase the second slope, the second starting point voltage is kept unchanged, the second end point voltage is increased, and the difference between the second starting point voltage and the second end point voltage is increased.

[0037] Optionally, connecting a first capacitor in series with the first circuit to increase the first slope comprises:

[0038] The increased first slope is made equal to the unchanged second slope, thereby minimizing the voltage difference between the focus ring voltage and the substrate voltage;

[0039] Alternatively, the increased first slope and the unchanged second slope have a slope difference, and the slope difference is within a set first threshold range, thereby making the voltage difference between the focus ring voltage and the substrate voltage within a set first voltage difference range.

[0040] Optionally, connecting a first capacitor in series in the first circuit to increase the first slope, and connecting a second capacitor in series in the second circuit to increase the second slope, comprises:

[0041] The increased first slope is made equal to the increased second slope, thereby minimizing the voltage difference between the focus ring voltage and the substrate voltage;

[0042] Alternatively, the increased first slope and the increased second slope have a slope difference, and the slope difference is within a set second threshold range, thereby making the voltage difference between the focus ring voltage and the substrate voltage within a set second voltage difference range.

[0043] Optionally, reducing a voltage difference between a focus ring voltage and a substrate voltage comprises:

[0044] In the first phase of the focus ring voltage waveform, reducing the voltage difference between the focus ring voltage and the substrate voltage;

[0045] A first phase of the focus ring voltage waveform is time-synchronized with a first phase of the substrate voltage waveform, and a second phase of the focus ring voltage waveform is time-synchronized with a second phase of the substrate voltage waveform.

[0046] Optionally, the first stage of the focus ring voltage waveform is a low level stage, and the focus ring voltage and substrate voltage are negative voltages;

[0047] The second stage of the focus ring voltage waveform is a high level stage, and the focus ring voltage and substrate voltage are positive voltages.

[0048] Compared with the prior art, the lower electrode assembly, plasma processing equipment and voltage control method provided by the present invention have at least the following beneficial effects:

[0049] In an embodiment of the present invention, a first capacitor is connected in series with a first circuit that supplies a DC pulse signal to a focusing ring to adjust the speed at which the focusing ring voltage changes, thereby achieving precise control over the speed at which the focusing ring sheath voltage is reduced, thereby reducing edge effects, optimizing the uniformity of substrate surface treatment, and improving product quality.

[0050] The embodiments of the present invention maintain the voltage difference between the focusing ring and the substrate at a smaller value by making the first slope of the focusing ring voltage change equal to the second slope of the substrate voltage change, thereby reducing the risk of arc discharge between the focusing ring and the substrate, effectively improving the safety of substrate processing, reducing the difficulty of equipment maintenance, and extending the service life of the lower electrode assembly.

[0051] In an embodiment of the present invention, based on adjusting the first slope, a second capacitor is connected in series with the second circuit that supplies a DC pulse signal to the substrate to adjust the second slope, so that the adjusted first slope is equivalent to the adjusted second slope, thereby reducing the voltage difference between the focusing ring and the substrate and lowering the risk of arc discharge between the two.

[0052] The embodiment of the present invention does not set additional resistors or inductors in the first circuit and the second circuit, which can better maintain the shape and characteristics of the pulse waveform, avoid LC (inductor-capacitor) oscillation at the edge of the waveform, and will not cause the slope to slow down, so that the expected adjustment target can be achieved more accurately and quickly. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] Figure 1 The present invention is a schematic diagram of the structure of a plasma processing device for biasing a substrate with a pulsed DC power supply.

[0054] Figure 2 yes Figure 1 Schematic diagram of substrate voltage and focus ring voltage of the plasma processing equipment shown.

[0055] Figure 3 yes Figure 2 Schematic diagram of the voltage difference between the substrate voltage and the focus ring voltage.

[0056] Figure 4 The present invention is a schematic diagram of the structure of an existing plasma processing device, in which a DC pulse voltage is supplied to a focusing ring through a damping circuit.

[0057] Figure 5 yes Figure 4 Schematic diagram of the damping circuit in the device shown.

[0058] Figure 6 Schematic diagram of a plasma processing device and a lower electrode assembly according to a first embodiment of the present invention.

[0059] Figure 7 Schematic diagram of a plasma processing device and a lower electrode assembly according to a second embodiment of the present invention.

[0060] Figure 8 Schematic diagram of a plasma processing device and a lower electrode assembly according to a third embodiment of the present invention.

[0061] Fig. 9 Schematic diagram of a plasma processing device and a lower electrode assembly according to a fourth embodiment of the present invention.

[0062] Fig.10 Schematic diagram of substrate voltage and focus ring voltage according to the first embodiment of the present invention.

[0063] Fig.11 yes Fig.10 Schematic diagram of the voltage difference between the substrate voltage and the focus ring voltage.

[0064] Fig.12 Schematic diagram of the substrate voltage and focus ring voltage variation process of the third embodiment of the present invention. DETAILED DESCRIPTION

[0065] like Figure 1The device shown is a plasma processing device for biasing a substrate w using a pulsed DC power supply, the device comprises a vacuumable reaction chamber 10, having a grounded and roughly cylindrical metal chamber; a lower electrode assembly is provided at the bottom of the reaction chamber 10, the lower electrode assembly is provided with a base 20, a dielectric layer 21 made of ceramic material is provided on the top of the metal base 20, which can support the substrate w and the focusing ring 30 surrounding the substrate w; the dielectric layer 21 can be used to form an electrostatic chuck for adsorbing and fixing the substrate w by electrostatic suction. The gas supply device 41 is used to provide various gases such as process gas and auxiliary gas, which is connected to the gas shower head 42 arranged at the top of the reaction chamber 10 through a number of gas channels, and the relevant gas is introduced into the reaction chamber 10 through the gas shower head 42; the source radio frequency power (for example, the frequency range is 100kHz-200MHz) is coupled into the reaction chamber 10, and the injected process gas is excited in the space 50 between the gas shower head 41 and the substrate w to form the plasma required for processing the substrate w. The plasma contains a large number of active particles such as electrons, ions, excited atoms, molecules and free radicals, which can undergo various physical and chemical reactions with the surface of the substrate w, so that the morphology of the surface of the substrate w changes, and the etching of the substrate w is completed. The vacuum pump 60 connected to the reaction chamber 10 can discharge the residual gas, reaction by-products, etc. after treatment from the reaction chamber 10 to maintain the vacuum environment in the chamber. A confinement ring 70 is arranged around the base 20. When the residual gas, etc. flows to the downstream vacuum pump 60 through the exhaust channel at the confinement ring 70, the plasma can be prevented from leaking to the non-reaction area.

[0066] For example, the plasma processing device may be a capacitively coupled plasma reaction device, an inductively coupled plasma reaction device, an electron cyclotron resonance plasma reaction device, a remote plasma reaction device, or a plasma edge etching device, but is not limited thereto. Figure 1 Taking the capacitively coupled plasma reaction device shown as an example, the RF energy enters the reaction chamber 10 in a capacitive coupling manner; the gas shower head 42 serves as the upper electrode and is arranged opposite to the base 20 serving as the lower electrode. The RF source RF is connected to the upper electrode and / or the lower electrode via a corresponding impedance matcher (not shown) to apply source RF power, thereby generating a RF electric field between the upper electrode and the lower electrode, and dissociating the process gas in the reaction chamber 10 into plasma. Taking the inductively coupled plasma reaction device (not shown) as an example, the RF energy enters the reaction chamber in the form of magnetic field coupling via the inductive coil, and an insulating window is provided above the side wall of the chamber. The source RF power provided by the RF source is applied to the inductive coil located above the insulating window, thereby generating a high-frequency alternating magnetic field in the reaction chamber, and dissociating the process gas into plasma.

[0067] like Figure 1In the plasma processing equipment shown, the lower electrode assembly also includes a first bias electrode 22 and a second bias electrode 23 respectively arranged in the dielectric layer 21, the first bias electrode 22 is located below the focusing ring 30 and in the edge region of the dielectric layer 21, and the second bias electrode 23 is located below the substrate w and in the central region of the dielectric layer 21. In the process, the first DC pulse voltage provided by the first bias power supply PDC1 and the second DC pulse voltage provided by the second bias power supply PDC2 are respectively coupled to the first bias electrode 22 and the second bias electrode 23 to bias the substrate w and adjust the thickness of the plasma sheath at the edge of the substrate w. Among them, the focusing ring 30 surrounds the outer periphery of the substrate w, which can control the RF electric field distribution at the edge of the substrate w, promote the plasma distribution edge above the substrate w to extend to the edge of the focusing ring 30, make the density distribution of the plasma on the surface of the substrate w tend to be gentle, and improve the etching uniformity from the center to the edge of the substrate w.

[0068] In order to ensure that the electric field around the focusing ring 30 and the substrate w can change synchronously, and thus maintain the stability of the plasma characteristics, the lower electrode assembly is also provided with a synchronous control unit 24 to control the working state of the first bias power supply PDC1 and the second bias power supply PDC2, so that the first DC pulse voltage and the second DC pulse voltage can change synchronously; for example, the synchronous control unit 24 synchronously controls the switching action of the switch device for modulating the DC pulse voltage in the first bias power supply PDC1 and the second bias power supply PDC2, so that the frequency, duty cycle, and phase of the first DC pulse voltage are the same as the frequency, duty cycle, and phase of the second DC pulse voltage. The amplitudes of the first DC pulse voltage and the second DC pulse voltage can be controlled independently, for example, according to the requirements of the current plasma treatment process, the requirements for the plasma distribution or sheath thickness control on the focusing ring 30 and the substrate w surface, etc., the amplitudes of the first DC pulse voltage and the second DC pulse voltage are set to be the same or different; and the voltage change trends of the first DC pulse voltage and the second DC pulse voltage are similar, that is, when the voltage value of the second DC pulse voltage increases or decreases, the voltage value of the first DC pulse voltage will also increase or decrease.

[0069] The focus ring voltage is generally generated by the voltage coupled to the focus ring 30 by the first DC pulse voltage and the DC self-bias voltage on the focus ring 30. The plasma sheath voltage on the surface of the focus ring 30 (hereinafter referred to as the focus ring sheath voltage) corresponds to the potential difference between the surface of the focus ring 30 and the plasma. Therefore, if the circuit impedance, transmission loss, etc. between the first bias power supply PDC1 and the focus ring 30 are not considered, the waveform of the focus ring voltage is roughly the same as that of the first DC pulse voltage, and the waveform of the focus ring sheath voltage has roughly the same periodic changes as that of the focus ring voltage (such as the rising edge moment, the falling edge moment, the high / low level stage and the change trend of the voltage value of the pulse waveform have roughly the same rules, but the waveforms of the two may have a phase difference, or there may be deformations such as voltage spikes or burrs, etc.). Similarly, the waveform of the substrate voltage is roughly the same as that of the second DC pulse voltage, and the plasma sheath voltage on the surface of the substrate w (hereinafter referred to as the substrate sheath voltage) also has roughly the same periodic changes as the waveform of the substrate voltage. Therefore, the waveform changes of the focus ring sheath voltage and the substrate sheath voltage can be used to reflect the waveform changes of the focus ring sheath voltage and the substrate sheath voltage.

[0070] In the example, the first DC pulse voltage and the second DC pulse voltage used for biasing are synchronous negative pulse voltages; Figure 2 , Figure 3 As shown, the focus ring voltage and the substrate voltage are both negative pulse waveforms (high level is 0V, low level is negative voltage) and the time characteristics of the two are the same (frequency, duty cycle, rising edge, falling edge and phase, etc.). As the process continues, the ions in the plasma continuously bombard the focus ring 30 and the surface of the substrate w, resulting in surface charge accumulation and other reasons, causing the focus ring voltage and the substrate voltage to gradually increase. This is reflected in their respective pulse waveforms as the voltage in the high level stage is a positive voltage, while the absolute value of the voltage in the low level stage gradually decreases (equivalent to taking the voltage at the end of the falling edge as the starting point and the voltage before the next adjacent rising edge as the end point in the low level stage, and obtaining the slope of the voltage change, and the voltage value at the starting point is lower than the voltage value at the end point).

[0071] Since the focus ring 30 is not frequently replaced, it is repeatedly used in the continuous plasma treatment process, causing the surface of the focus ring 30 to be eroded by the plasma and move downward, making its overall thickness thinner. The thickness of the focus ring 30 deviates from the initial parameter setting, and the plasma sheath at the edge of the substrate w is distorted, and the ion incident direction is tilted. In addition, the area of ​​the focus ring 30 is smaller than that of the substrate w, and the current of the ions bombarding the focus ring 30 is smaller than the current bombarding the substrate w. These factors cause the speed at which the focus ring voltage rises to be slower than the speed at which the substrate voltage rises. For example, Figure 2In the example, the substrate voltage first reaches about -10kV instantaneously, and then gradually increases to -7kV as ions bombard the surface of substrate w; the focusing ring voltage also first reaches -10kV instantaneously, and then gradually increases as ions bombard the surface of focusing ring 30, but the increase rate is slow. At the end of the low-level stage, the focusing ring voltage only increases to -9kV; it can be seen that, compared with the two, the first slope a0 corresponding to the voltage change of the focusing ring voltage in the low-level stage is relatively gentle, while the second slope b0 corresponding to the voltage change of the substrate voltage in the low-level stage is steeper. Figure 2 The focusing ring voltage and the substrate voltage increase at different speeds and slopes. Figure 3 It can be seen that the voltage difference between the focus ring voltage and the substrate voltage is small at the beginning of the pulse, and as the ions continue to bombard, the voltage difference between the two gradually increases in the low level stage, and the final voltage difference reaches about 2000 V. This will affect the uniformity of etching on the surface of the substrate w, increase the risk of arc discharge between the focus ring 30 and the substrate w, and the arc discharge will cause the substrate w to be scrapped, and even damage the related equipment of the lower electrode assembly.

[0072] like Figure 4 , Figure 5 As shown, in a plasma processing device provided by the prior art, the negative voltage pulses generated by the first bias power supply PDC1 and the second bias power supply PDC2 are required to have the same bias frequency, and the impedance of the first circuit between the first bias power supply PDC1 and the first bias electrode 22 under the focusing ring 30 is higher than the impedance of the second circuit between the second bias power supply PDC2 and the second bias electrode 23 under the substrate w.

[0073] To this end, the device of the prior art will set an impedance control circuit 83 in the first circuit. The impedance control circuit 83 has a variable impedance through one or more variable circuit elements, such as a variable resistor 83r with a variable resistance value and a variable capacitor 83c with a variable electrostatic capacitance. Among them, one end of the variable capacitor 83c is connected to a node 83n, which is located on the circuit path between the output node 81o of the bias power supply 81 and the first bias electrode 22, and the other end of the variable capacitor 83c is grounded. The first end of the variable resistor 83r is connected to the node 83n, and the second end of the variable resistor 83r is directly connected to the output node 81o of the bias power supply 81, or is connected to the output node 81o of the bias power supply 81 via an optional damping circuit 82. Alternatively, the variable resistor 83r can be replaced by a fixed resistor, and the variable capacitor 83c can be replaced by a fixed capacitor to make the impedance of the impedance control circuit 83 constant.

[0074] The variable DC power supply 81p is a DC power supply that generates a negative DC voltage, and the level of the generated DC voltage is variable. The variable DC power supply 81p is connected to the output node 81o via the switch 81a; the output node 81o is grounded via the switch 81b. By controlling the conduction states of the switches 81a and 81b, a negative voltage pulse for biasing is obtained. When the switch 81a is on and the switch 81b is not on, a negative DC voltage can be output from the output node 81o; when the switch 81a is not on and the switch 81b is on, the level of the output node 81o is 0V.

[0075] The damping circuit 82 may be connected between the bias power supply 81 and the impedance control circuit 83, or the damping circuit 82 may not be provided. The damping circuit 82 includes a capacitor 82c and a resistor 82r, one end of the capacitor 82c is connected to a node 82n, and the node 82n is located on the circuit path between the bias power supply 81 and the impedance control circuit 83 (the second end of the variable resistor 83r is also connected to the node 82n); the other end of the capacitor 82c is grounded. One end of the resistor 82r is connected to the output node 81o of the bias power supply 81, and the other end is connected to the node 82n. A filter 84 may also be provided between the impedance control circuit 83 and the first bias electrode 22 to block or attenuate high-frequency power from the radio frequency source RF. The filter 84 is connected between the node 83n and the first bias electrode 22, and is, for example, an inductor.

[0076] Figure 4 In the prior art device shown in FIG. 1 , in addition to the configuration of the first bias power supply PDC1 as described above, Figure 5 In addition to the bias power supply 81 shown in the figure, another bias power supply 81 can be used as the second bias power supply PDC2, and the conduction state of the switches of the two bias power supplies 81 is controlled so that the first bias power supply PDC1 and the second bias power supply PDC2 have the same bias frequency; and in addition to the first circuit configuration between the bias power supply 81 and the first bias electrode 22 described above, Figure 5 In addition to the impedance control circuit 83, the optional damping circuit 82 and the filter 84 shown, another impedance control circuit 83 (in Figure 4 ), another optional damping circuit 82 and filter 84, both according to Figure 5 After being connected in the same manner as in the above, it is arranged in the second circuit between the second bias power supply PDC2 and the second bias electrode 23 under the substrate w to control the impedance of the second circuit.

[0077] therefore, Figure 4 In the prior art plasma processing device, by configuring the first circuit (or the first circuit and the second circuit at the same time) Figure 5The impedance control circuit 83 and other components shown in the figure are intended to reduce the voltage difference between the focus ring 30 and the substrate w by adjusting the impedance ratio of the first circuit to the second circuit. However, it is found through simulation that Figure 4 , Figure 5 In the device shown in the figure, if only the variable capacitor 83c or the corresponding fixed capacitor is provided in the first circuit, and the damping circuit 82, the filter 84, and the variable resistor 83r or the corresponding fixed resistor in the impedance control circuit 83 are not provided, then according to the connection mode of the variable capacitor 83c or the fixed capacitor (one end is connected to the first circuit and the other end is grounded), it is impossible to Figure 2 The speed of change or voltage slope of the focus ring voltage shown is difficult to change. Figure 2 , Figure 3 The voltage difference between the focusing ring 30 and the substrate w is large as shown. If a resistor (such as the variable resistor 83r or the fixed resistor in the impedance control circuit 83, the resistor 82r in the damping circuit 82) or an inductor (such as the inductor in the filter 84) is connected in series in the first circuit, these series resistors or inductors will seriously change the output waveform of the pulse DC power supply (such as the resistor will make the rising and falling edges of the pulse waveform less steep, and the inductor will deform the pulse waveform into a radio frequency waveform), causing a large energy broadening of the ion energy, and failing to take advantage of the use of a pulse DC power supply to bias the substrate w, and it is difficult to obtain the expected etching effect in processes such as high aspect ratio etching. In addition, the resistor connected in series in the first circuit will also cause a large amount of power loss in the resistor, reducing energy utilization efficiency. Therefore, Figure 4 , Figure 5 The prior art devices shown have many drawbacks and do not solve Figure 1 The problem of a large voltage difference between the focus ring 30 and the substrate w in the plasma processing equipment in which the substrate w is biased by a pulsed DC power supply is solved.

[0078] The following describes specific implementations of the lower electrode assembly, plasma processing equipment provided with the lower electrode assembly, and voltage control method thereof provided in embodiments of the present invention.

[0079] and Figure 1 Compared with the plasma processing apparatus shown in FIG. Figure 6As shown, in the first circuit between the first bias power supply PDC1 and the focusing ring 30, a first capacitor C1 is connected in series. That is, the lower electrode assembly of the first embodiment is located at the bottom of the reaction chamber 10, and the substrate w and the focus ring 30 surrounding the substrate w are supported by the base 20 with a dielectric layer 21 on the top; a first bias electrode 22 is provided in the dielectric layer 21 corresponding to the edge area below the focus ring 30, in the first circuit, the first end of the first capacitor C1 is electrically connected to the output end of the first bias power supply PDC1, the second end of the first capacitor C1 is electrically connected to the first bias electrode 22, the first DC pulse voltage provided by the first bias power supply PDC1 is applied to the first bias electrode 22 after passing through the first capacitor C1 in series, and then coupled to the focus ring 30; a second bias electrode 23 is provided in the dielectric layer 21 corresponding to the middle area below the substrate w, in the second circuit between the second bias power supply PDC2 and the substrate w, the second bias power supply PDC2 is electrically connected to the second bias electrode 23, and the second DC pulse voltage is directly applied to the second bias electrode 23, and then coupled to the substrate w. Except for the first capacitor C1, the structure of the lower electrode assembly and the plasma processing equipment in which it is located in the first embodiment can be referred to the reference to Figure 1 The description of the examples is not repeated here one by one.

[0080] In one embodiment, the second bias electrode may also be equivalently formed by the base 20 .

[0081] In the first embodiment, the total capacitance C between the first bias power supply PDC1 and the focusing ring 30 can be adjusted by the capacitance of the first capacitor C1 connected in series with the first circuit; in the ion bombardment stage, the first slope a1 (see Fig.10 ) is inversely proportional to the total capacitance C mentioned above. Therefore, after the capacitance of the first capacitor C1 is connected in series, the capacitance of the total capacitance C changes, so that the first slope a1 when the focusing ring voltage changes can be changed, thereby reducing the voltage difference between the focusing ring 30 and the substrate w.

[0082] In the first embodiment, the total capacitance C between the first bias power supply PDC1 and the focusing ring 30 is equivalent to the result of the first capacitor C1 and the inherent capacitance being connected in series. The inherent capacitance is provided by the dielectric layer portion between the first bias electrode 22 and the focusing ring 30 above it. However, compared with the first capacitor C1, the capacitance of the inherent capacitance is larger (for example, a few nanofarads) and will not change during the process. Therefore, its influence can be ignored. The adjustment of the first slope a1 when the focusing ring voltage changes is mainly achieved through the capacitance of the first capacitor C1.

[0083] For example, the capacitance of the first capacitor C1 is 100pF-10nF. The first capacitor C1 can use a capacitor with a constant capacitance (capacitors with different capacitances can be connected in series in the first circuit as the first capacitor C1, forming different first slopes a1 when the focus ring voltage changes); or, the first capacitor C1 can use a variable capacitor and be set to different capacitance values ​​as needed, forming different first slopes a1 when the focus ring voltage changes.

[0084] Comparison Figure 2 and Fig.10 , Figure 3 and Fig.11 As shown, Fig.10 is a waveform diagram of the focus ring voltage and the substrate voltage after the first capacitor C1 is connected in series in the first embodiment, Fig.11 Further showing Fig.10 The voltage difference between the focusing ring voltage and the substrate voltage ( Figure 2 , Figure 3 , which are schematic diagrams of the voltage waveform and the voltage difference between the focusing ring 30 and the substrate w when the first capacitor C1 is not connected in series).

[0085] The first DC pulse voltage and the second DC pulse voltage used for bias are time-synchronized negative pulse voltages; it can be seen that the focusing ring voltage and the substrate voltage are both negative pulse waveforms (high level is 0V, low level is negative voltage) and the time characteristics of the two (frequency, duty cycle, rising edge, falling edge and phase, etc.) are the same. Fig.10 In the embodiment, the substrate voltage first reaches about -10 kV instantaneously, and then gradually increases to -7 kV at the end of the low level stage due to the ion bombardment of the substrate w surface; the focus ring voltage also first reaches -10 kV instantaneously, and then gradually increases in the low level stage as the ions bombard the focus ring 30 surface. Although the ion bombardment current of the focus ring 30 is small, the first embodiment of the present invention can make the focus ring voltage also increase to -7 kV (higher than when the first capacitor C1 is not connected in series) at the end of the low level stage by connecting the capacitance of the first capacitor C1 in series (or further adjusting the variable capacitance of the first capacitor C1). Figure 2 As shown in -9kV), the first slope of the focus ring voltage increase is from a0 ( Figure 2 ) increases to a1 ( Fig.10 ), and the adjusted first slope a1 is equivalent to the second slope b0 when the substrate voltage increases in the low level stage, such as Fig.11 As shown, in the whole process flow, the voltage difference between the focus ring 30 and the substrate w is significantly reduced (the voltage difference in the low-level stage is <50V, and the voltage difference in the high-level stage is 0V).

[0086] The difference from the first embodiment is that in the second embodiment of the present invention, the first bias electrode 22 ( Figure 6 ).like Figure 7 In the second embodiment shown, a first circuit between the first bias power source PDC1 and the focus ring 30 is connected in series with a first capacitor C1, a first end of the first capacitor C1 is electrically connected to the output end of the first bias power source PDC1, a second end of the first capacitor C1 is directly electrically connected to the focus ring 30, and a first DC pulse voltage provided by the first bias power source PDC1 is directly coupled to the focus ring 30 after passing through the series-connected first capacitor C1. The connection relationship of other components is the same as that in the first embodiment.

[0087] In the second embodiment, the capacitance of the first capacitor C1 connected in series with the first circuit is used to adjust the total capacitance C' between the first bias power supply PDC1 and the focus ring 30, thereby changing the first slope a1 when the focus ring voltage changes, so as to reduce the voltage difference between the focus ring 30 and the substrate w. The second embodiment no longer involves the inherent capacitance corresponding to the dielectric layer portion below the focus ring 30, so the capacitance of the total capacitance C' is mainly determined by the capacitance of the first capacitor C1. In the ion bombardment stage, the first slope a1 when the focus ring voltage changes in the second embodiment is inversely proportional to the capacitance of the first capacitor C1.

[0088] For example, the capacitance of the first capacitor C1 of the second embodiment may be 100pF-10nF; the first capacitor C1 may be a capacitor with a constant capacitance within the above range, or a variable capacitor with an adjustable capacitance within the above range.

[0089] In the second embodiment, under the effect of the capacitance of the first capacitor C1 connected in series with the first circuit (or further adjusting the variable capacitance of the first capacitor C1), the effect of adjusting the focus ring voltage change speed and the first slope a1 is substantially the same as that in the first embodiment. Fig.10 , Fig.11 The examples of the voltage waveform and voltage difference between the focusing ring 30 and the substrate w are not repeated here (because although the first embodiment has more inherent capacitors connected in series, the capacitance of the inherent capacitors is relatively large, and the specific regulation function is mainly achieved through the capacitance of the first capacitor C1, so the two embodiments have equivalent effects on the focusing ring voltage change speed and the first slope a1 adjustment).

[0090] See also Fig.10 , Fig.11As shown in the figure, under ion bombardment, the focus ring voltage and substrate voltage both gradually increase, which is reflected in their respective pulse waveforms as a positive voltage in the high-level stage, while the absolute value of the voltage in the low-level stage gradually decreases. This is equivalent to taking the voltage at the end of the falling edge as the starting point and the voltage before the next adjacent rising edge as the end point in the low-level stage to obtain the slope of the voltage change, and the voltage value at the starting point is lower than the voltage value at the end point; for the convenience of distinction, the first slope of the focus ring voltage change is called the first starting point voltage and the first end point voltage, and the second slope of the substrate voltage change is called the second starting point voltage and the second end point voltage.

[0091] By connecting the capacitance of the first capacitor C1, the first slope a1 of the focus ring voltage when the voltage increases in the low-level stage can be increased, so that the adjusted first slope a1 is equivalent to the second slope b0 of the substrate voltage when the voltage increases in the same low-level stage, and the voltage difference between the focus ring 30 and the substrate w is effectively reduced. That is, the first embodiment and the second embodiment are improved on the first circuit to adjust the first slope a1 of the focus ring voltage change, so that the first slope a1 ( Fig.10 ) is smaller than the first slope a0 before adjustment ( Figure 2 ) is steeper.

[0092] Moreover, the adjustment of the first slope from a0 to a1 is to make the first starting point voltage of the first slope a1 remain unchanged (-10kV), while the first end point voltage rises higher (for example, Figure 2 , Fig.10 The dotted part of Figure 2 When the voltage at the first endpoint is not adjusted, it rises to -9kV. Fig.10 The adjusted first endpoint voltage is increased to -7 kV), and finally the adjusted first slope a1 is made equal to the unchanged second slope b0.

[0093] It can be understood that in some examples, the adjusted first slope a1 is the same as the second slope b0, and the voltage difference between the focus ring voltage and the substrate voltage is the smallest. In other examples, the adjusted first slope a1 is different from the second slope b0, but the slope difference between the two meets the set threshold requirement; for example, after adjustment, the first end point voltage of the first slope a1 is increased to near the second end point voltage of the second slope b0, and the values ​​of the two end point voltages are not exactly the same but are within the acceptable voltage difference range. In this case, the voltage difference between the focus ring voltage and the substrate voltage is still reduced.

[0094] In the preferred examples of the first and second embodiments, only the first capacitor C1 is connected in series in the first circuit for coupling the first DC pulse voltage from the first bias power supply PDC1 to the focusing ring 30, without any resistance or inductance. Therefore, it will not cause LC oscillations at the rising and falling edges of the pulse waveform, nor will it cause the first slope a1 of the focus ring voltage change to slow down. The expected goals of adjusting the focus ring voltage change speed and the first slope a1 can be achieved accurately and quickly.

[0095] like Figure 8 , Fig. 9 As shown, the third embodiment and the fourth embodiment of the present invention are respectively Figure 6 The first embodiment shown, Figure 7 On the basis of the second embodiment shown, the second circuit between the second bias power supply PDC2 and the substrate w is improved. In both the third embodiment and the fourth embodiment, a second capacitor C2 is further connected in series in the second circuit; the difference between the two is that in the first circuit of the third embodiment, a first bias electrode 22 is provided in the dielectric layer 21 below the focus ring 30, and the second end of the first capacitor C1 is electrically connected to the first bias electrode 22; while in the first circuit of the fourth embodiment, there is no first bias electrode 22, and the second end of the first capacitor C1 is directly electrically connected to the focus ring 30. The rule of adjusting the focus ring voltage change speed and the first slope a2 by the capacitance of the first capacitor C1 connected in series with the first circuit (or further adjusting the variable capacitance of the first capacitor C1) is similar to the rule of adjusting the first slope a1 in the first and second embodiments, and will not be repeated.

[0096] In the third and fourth embodiments, during the ion bombardment stage, the second slope b2 when the substrate voltage changes is inversely proportional to the total capacitance C" between the second bias power supply PDC2 and the substrate w. Therefore, by the capacitance of the second capacitor C2 connected in series in the second circuit, the capacitance of the above-mentioned total capacitance C" can be adjusted, thereby changing the second slope b2 corresponding to the change in the substrate voltage, so that the adjusted second slope b2 is equivalent to the adjusted first slope a2, thereby reducing the voltage difference between the focusing ring 30 and the substrate w. Optionally, the second capacitor C2 can be a capacitor with a constant capacitance or a variable capacitor with an adjustable capacitance; the capacitance range of the second capacitor C2 is set according to actual application needs.

[0097] like Fig.12 As shown, when the first capacitor C1 or the second capacitor C2 is not connected in series, the first slope a0 when the focus ring voltage changes and the second slope b0 when the substrate voltage changes are Figure 2The same is shown in the figure, which also shows that according to the third embodiment, after the first capacitor C1 is connected in series with the first circuit and the second capacitor C2 is connected in series with the second circuit, the first slope a2 adjusted when the focus ring voltage changes and the second slope b2 adjusted when the substrate voltage changes. The fourth embodiment and the third embodiment have substantially the same effect on the adjustment of the first slope a2 and the second slope b0, which will not be described in detail.

[0098] Fig.12 In the embodiment, under the effect of the capacitance of the second capacitor C2 connected in series in the second circuit, the second slope b2 corresponding to the change of the substrate voltage is steeper than the second slope b0 when the second capacitor C2 is not connected in series for adjustment. That is, the focusing ring voltage and the substrate voltage are both negative pulse waveforms (high level is 0V, low level is negative voltage) and the time characteristics of the two (frequency, duty cycle, rising edge, falling edge and phase, etc.) are the same; under ion bombardment, the focusing ring voltage and the substrate voltage both gradually increase, which is reflected in their respective pulse waveforms as the voltage in the high level stage is a positive voltage, while the absolute value of the voltage in the low level stage gradually decreases (that is, the first starting point voltage of each of the first slopes a0 and a2 before and after adjustment is lower than the corresponding first end point voltage, and the first end point voltage after adjustment is higher; the second starting point voltage of the second slopes b0 and b2 before and after adjustment is lower than the corresponding second end point voltage, and the second end point voltage after adjustment is higher).

[0099] Under the effect of the capacitance of the first capacitor C1 connected in series with the first circuit, the first slope a2 of the focus ring voltage when the voltage is increased has been increased in the low level stage, and the adjustment of the first slope a0 to a2 is to keep the first starting point voltage (-10kV) unchanged, while increasing the first end point voltage; and, due to the relationship of specific process requirements, the first end point voltage (-5kV) in the third embodiment is increased more than the first end point voltage or the second end point voltage ( Fig.10 The voltage of the voltage is higher than -7kV.

[0100] To this end, the third embodiment further increases the second slope b2 of the substrate voltage when the voltage is increased in the low level stage under the effect of the capacitance of the second capacitor C2 connected in series with the second circuit, and when the second slope is adjusted from b0 to b2, the second starting point voltage (-10 kV) is kept unchanged, and the second end point voltage is increased to the voltage value after the adjustment of the first end point voltage ( Fig.12 The adjusted second slope b2 is equal to or close to the adjusted first slope a2. It can be understood that the adjusted second slope b2 can be the same as the adjusted first slope a2, or the difference between the slopes of the two can meet the set threshold requirement, and both can reduce the voltage difference between the adjusted focus ring voltage and the adjusted substrate voltage (the voltage difference is the smallest when the first slope a2 is the same as the second slope b2).

[0101] In the preferred examples of the third embodiment and the fourth embodiment, only the first capacitor C1 is connected in series in the first circuit for coupling the first DC pulse voltage from the first bias power supply PDC1 to the focusing ring 30, and no resistance or inductance exists. Meanwhile, only the second capacitor C2 is connected in series in the second circuit for coupling the second DC pulse voltage from the second bias power supply PDC2 to the substrate w, and no resistance or inductance exists. Therefore, it will not cause LC oscillation at the rising and falling edges of the pulse waveform, nor will it cause the first slope or the second slope to slow down, and the expected goals of adjusting the focusing ring voltage, substrate voltage, first slope, second slope, etc. can be achieved accurately and quickly.

[0102] In summary, the lower electrode assembly, plasma processing equipment and voltage control method provided by the present invention adjust the slope of the voltage change by connecting a capacitor in series, and make the first slope and the second slope equivalent after adjustment, so as to reduce the voltage difference between the focusing ring and the substrate, reduce the probability of arc discharge between the focusing ring and the substrate, improve the safety of substrate processing, and extend the service life of the lower electrode assembly.

[0103] Although the content of the present invention has been described in detail through the above preferred embodiments, it should be appreciated that the above description should not be considered as a limitation of the present invention. After reading the above content, it will be apparent to those skilled in the art that various modifications and substitutions of the present invention will occur. Therefore, the protection scope of the present invention should be limited by the appended claims.

Claims

1. A lower electrode assembly, characterized in that: Include: A base, used for carrying a substrate and a focusing ring surrounding the substrate; A first bias power supply, used for providing a first DC pulse voltage; coupling a first DC pulse voltage of the first bias power supply to a first circuit of the focus ring; A first capacitor, connected in series in the first circuit; A second bias power supply, used for providing a second DC pulse voltage; as well as, coupling a second DC pulse voltage of the second bias power supply to a second circuit of the substrate; The first capacitor is used to increase the change slope of the focus ring voltage, make the change slope of the focus ring voltage converge with the change slope of the substrate voltage, and reduce the voltage difference between the focus ring voltage and the substrate voltage.

2. The lower electrode assembly according to claim 1, characterized in that A dielectric layer is provided on the top of the base to support the substrate and the focus ring; the dielectric layer includes a middle area located below the substrate and an edge area located below the focus ring; The first circuit includes a first bias electrode; the first bias electrode is arranged in an edge region of the dielectric layer; a first end of the first capacitor is electrically connected to an output end of the first bias power supply, and a second end of the first capacitor is electrically connected to the first bias electrode; The second circuit comprises a second bias electrode, which is disposed in a middle region of the dielectric layer and electrically connected to an output terminal of the second bias power supply; or The second bias electrode is formed equivalent to the base.

3. The lower electrode assembly according to claim 2, characterized in that: The first circuit includes an inherent capacitance, which is the capacitance of the dielectric layer portion between the first bias electrode and the focusing ring; the first capacitance is connected in series with the inherent capacitance.

4. The lower electrode assembly according to claim 1, characterized in that A dielectric layer is provided on the top of the base to support the substrate and the focus ring; the dielectric layer includes a middle area located below the substrate and an edge area located below the focus ring; In the first circuit, the first end of the first capacitor is electrically connected to the output end of the first bias power supply, and the second end of the first capacitor is electrically connected to the focusing ring; The second circuit includes a second bias electrode; the second bias electrode is disposed in a middle region of the dielectric layer and is electrically connected to an output end of the second bias power supply.

5. The lower electrode assembly according to claim 1, characterized in that: The first capacitor is a first capacitor with a constant capacitance, or a first variable capacitor with an adjustable capacitance.

6. The lower electrode assembly according to claim 5, characterized in that The capacitance of the first capacitor is any value between 100pF and 10nF.

7. The lower electrode assembly according to claim 2 or 4, characterized in that: A second capacitor is connected in series in the second circuit; the second capacitor is a second capacitor with a constant capacitance, or a second variable capacitor with an adjustable capacitance; A first end of the second capacitor is electrically connected to an output end of the second bias power supply, and a second end of the second capacitor is electrically connected to the second bias electrode.

8. The lower electrode assembly according to claim 1, characterized in that: The lower electrode assembly is provided with a synchronous control unit for controlling the action of the respective switching devices of the first bias power supply and the second bias power supply, so that the frequency, duty cycle and phase of the pulse waveform of the first DC pulse voltage are the same as the frequency, duty cycle and phase of the pulse waveform of the second DC pulse voltage.

9. A plasma processing device, comprising a reaction chamber; at least one RF power source provides a source RF power coupled into the reaction chamber to excite a process gas injected into the reaction chamber to form a plasma; characterized in that: The lower electrode assembly described in any one of claims 1 to 8 is arranged at the bottom of the reaction chamber.

10. A voltage control method, used in the plasma processing equipment according to claim 9, characterized in that: The first stage of the focusing ring voltage waveform includes a first slope corresponding to the change of the focusing ring voltage; the first stage of the substrate voltage waveform includes a second slope corresponding to the change of the substrate voltage; the first circuit that couples the first DC pulse voltage of the first bias power supply to the focusing ring is connected in series with a first capacitor, and the first slope is controlled by the capacitance of the first capacitor to increase the first slope, reduce the slope difference between the first slope and the second slope, and thus reduce the voltage difference between the focusing ring voltage and the substrate voltage.

11. The voltage control method according to claim 10, characterized in that: The first slope is provided with a first starting point voltage and a first end point voltage, which correspond to the focus ring voltages at the beginning and the end of the first stage of the focus ring voltage waveform respectively; The second slope is provided with a second starting point voltage and a second end point voltage, which correspond to the substrate voltages at the beginning and the end of the first stage of the substrate voltage waveform, respectively; Wherein, the first slope is inversely proportional to the total capacitance between the first bias power supply and the focusing ring; A first capacitor is connected in series in the first circuit, so that the first slope increases and the difference between the first starting point voltage and the first end point voltage increases.

12. The voltage control method according to claim 11, characterized in that: A second circuit for coupling a second DC pulse voltage of a second bias power supply to the substrate is connected in series with a second capacitor, and a second slope is controlled by the capacitance of the second capacitor; The second slope is inversely proportional to the total capacitance between the second bias power supply and the substrate; The second capacitor is connected in series in the second circuit to increase the second slope; when the second slope increases, the difference between the second starting point voltage and the second end point voltage increases.

13. The voltage control method according to claim 12, characterized in that: When the first circuit is connected in series with the first capacitor to increase the first slope, the first starting point voltage is kept approximately unchanged, the first end point voltage is increased, and the difference between the first starting point voltage and the first end point voltage is increased; When the second circuit is connected in series with the second capacitor to increase the second slope, the second starting point voltage is kept approximately unchanged, the second end point voltage is increased, and the difference between the second starting point voltage and the second end point voltage is increased.

14. The voltage control method according to claim 10, characterized in that: The method includes connecting a first capacitor in series with the first circuit to increase the first slope, comprising: The increased first slope is made equal to the unchanged second slope, thereby minimizing the voltage difference between the focus ring voltage and the substrate voltage; Alternatively, the increased first slope and the unchanged second slope have a slope difference, and the slope difference is within a set first threshold range, thereby making the voltage difference between the focus ring voltage and the substrate voltage within a set first voltage difference range.

15. The voltage control method according to claim 12, characterized in that: Connecting a first capacitor in series with the first circuit to increase the first slope, and connecting a second capacitor in series with the second circuit to increase the second slope, comprising: The increased first slope is made equal to the increased second slope, thereby minimizing the voltage difference between the focus ring voltage and the substrate voltage; Alternatively, the increased first slope and the increased second slope have a slope difference, and the slope difference is within a set second threshold range, thereby making the voltage difference between the focus ring voltage and the substrate voltage within a set second voltage difference range.

16. The voltage control method according to claim 10 or 12, characterized in that: Reducing the voltage difference between the focus ring voltage and the substrate voltage includes: In the first phase of the focus ring voltage waveform, reducing the voltage difference between the focus ring voltage and the substrate voltage; A first phase of the focus ring voltage waveform is time-synchronized with a first phase of the substrate voltage waveform, and a second phase of the focus ring voltage waveform is time-synchronized with a second phase of the substrate voltage waveform.

17. The voltage control method according to claim 16, characterized in that: The first stage of the focus ring voltage waveform is a low level stage, and the focus ring voltage and substrate voltage are negative voltages; The second stage of the focus ring voltage waveform is a high level stage, and the focus ring voltage and substrate voltage are positive voltages.

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