Thermoelectric separation power module with bidirectional heat dissipation ceramic substrate and manufacturing method thereof

Abstract

The invention relates to a thermoelectric separation power module with a bidirectional heat dissipation ceramic substrate and a manufacturing method, and the thermoelectric separation power module comprises two double-sided metal-coated ceramic substrates, a power transistor crystal grain, and an insulating sealant. Each double-sided metal-coated ceramic substrate comprises a ceramic insulating layer, a three-dimensional conductive connecting layer and a metal heat-conducting layer, the three-dimensional conductive connecting layer and the metal heat-conducting layer are opposite to each other to form a circuit on the ceramic insulating layer, and the metal heat-conducting layer is opposite to the three-dimensional conductive connecting layer and is insulated from the three-dimensional conductive connecting layer. The upper surface and the lower surface of the ceramic substrate are respectively connected with the three-dimensional guide connection layers in a heat conduction mode, the three-dimensional guide connection layers are additionally provided with circuit elements, at least one guide connection column is formed between circuits of the three-dimensional guide connection layers, and finally the power transistor crystal grains and the guide connection columns are completely wrapped by insulation sealing glue. The manufacturing process is simple and low in cost.

Description

Technical Field

[0001] The present invention relates to a thermoelectric separation power module and a manufacturing method thereof, in particular to a thermoelectric separation power module with a bidirectional heat dissipation ceramic substrate and a manufacturing method thereof. Background Art

[0002] Over the past few decades, power semiconductors such as MOSFET and IGBT have been continuously innovating in materials, structures, and circuit designs, making the performance of electronic products grow steadily in line with Moore's Law. However, although the raw materials of traditional transistors made of silicon (Si) are easy to obtain and the process technology is mature, due to the physical limitations of silicon materials themselves, they are gradually unable to meet the needs of today's electric vehicles and 5G communication technology. Taking electric vehicles as an example, the inverter inside the car drives the three-phase motor by outputting control signals, and the inverter itself can be regarded as a power component module. It needs to use a microcontroller unit (MCU) to transmit control signals to the gate of the power transistor, and further perform pulse width modulation (PWM) on the DC output from the battery, so as to conduct high-frequency, high-current AC signals between the source and drain of the power transistor in the inverter, and finally provide high power output for the three-phase motor.

[0003] The input signal of the above three-phase motor is three AC signals with a phase difference of 120 degrees. The frequency of this AC signal determines the speed of the motor, and the current of the AC signal directly affects the magnetic force of the drive motor. Therefore, it is understandable that high-power electric vehicle motors require high-frequency and high-current AC input signals. For traditional first- and second-generation semiconductors, taking silicon as an example, its energy band width is 1.12eV and its breakdown electric field is 0.3MV / cm, which is easy to break down in high-voltage and high-current environments. Third-generation semiconductors such as GaN not only have better energy band width (3.4eV) and breakdown electric field (3.3MV / cm) to meet high-power requirements, but also can use the two-dimensional electron gas (2DEG) generated at the interface of the heterostructure (AlGaN / GaNHeterostructure) due to polarization differences to form a high electron mobility transistor (HEMT), which is very suitable for high-frequency signals. It can be seen that components based on gallium nitride materials can be used in high-frequency, high-power, radiation-resistant and high-temperature environments, including high-power output amplifiers for 5G communication base stations, military radars, rechargeable batteries, and automotive energy management systems.

[0004] On the other hand, although the microcontroller (MCU) can transmit the logic signal to the gate of the power transistor for switching control, when the signal tends to be high frequency, the power transistor will gradually begin to be unable to keep up with the switching speed of the signal; the reason is that the gate of the power transistor can be regarded as a capacitor. For a normally off power transistor, if the gate is not given enough charge to accumulate, the source and drain cannot be turned on; therefore, for high-frequency signals, the gate needs a larger signal input to meet real-time changes. In practice, this problem can be solved by amplifying the control signal in advance through a gate driver chip.

[0005] General gate driver chips can be divided into on-chip or discrete modules: the former can save a lot of space by directly integrating the gate driver chip and the power semiconductor into a single chip, but it has to face the fact that the high temperature generated by the power transistor may have an adverse effect on the gate driver chip and the microcontroller; although the latter can properly perform thermal separation, the transmission of high-frequency signals is easily distorted due to parasitic inductance effects due to overly long lines. The impact of the above two problems on power semiconductors cannot be ignored. Once the gate signal has phase delay, distortion and other problems, it will directly affect the modulation accuracy of the power semiconductor. Taking the three-phase motor used in electric vehicles as an example, if the three input AC signals cannot maintain a phase difference of 120 degrees, it will significantly affect the operating efficiency of the motor.

[0006] At present, some people have proposed Figure 1The power transistor module shown in the figure has to encapsulate the gate driver, shunt detector and other circuit elements together, and multiple power transistor elements have the circuit requirements of series and parallel connection, so the connection path is quite complicated. It is necessary to use multiple partially overlapping three-dimensional lead frames 8 to smoothly provide multiple power transistor grains 7 for connection. Sometimes it is even necessary to punch holes on the upper and lower ceramic substrates and make circuits on the outside for connection. On the one hand, during the manufacturing process, the overall structure is complicated and there are overlapping designs between the lead frames. The multiple three-dimensional lead frames 8 must be processed multiple times in a bottom-up order. When the circuit elements and the lower three-dimensional lead frame are already welded at the bottom, the upper three-dimensional lead frame and the welding elements are installed at the top. It is necessary to use low-temperature processing materials whose operating temperature is lower than the temperature that the existing elements and the already welded solder can withstand, which causes considerable inconvenience in arranging the order of manufacturing processes. In particular, this process is not a semiconductor process. Considering that the total height of the overall package is often only 2mm, it is extremely difficult to ensure that the upper three-dimensional lead frame and circuit components can be accurately aligned after the lower three-dimensional lead frame and circuit components are properly installed. The installation process is not only slow, but also the difficulty of operation is unnecessarily increased, and the output efficiency and product yield of the product are limited. In addition, the heat conduction area and cross-sectional area of ​​the lead frame are extremely limited, and large-area high-efficiency heat dissipation cannot be carried out. Especially when heat energy continues to accumulate, the performance and life of each circuit component packaged in the same module will be affected. Summary of the invention

[0007] In view of the above-mentioned deficiencies of the prior art, according to an embodiment of the present invention, it is hoped to provide a thermoelectric separation power module with a bidirectional heat dissipation ceramic substrate, aiming to achieve the following invention purposes: (1) ensuring that the upper and lower ceramic insulation layers do not need to be perforated at all, and the metal layer coated on the outer side of the ceramic insulation layer is fully heat-conducting, providing complete and good heat dissipation efficiency; (2) by means of a multi-layer three-dimensional conductive layer, the thermal expansion difference between the ceramic insulation layer and the metal above is effectively restrained, reducing the risk of structural degradation due to interlayer peeling, and ensuring the service life of the module; (3) the metal layer coated on the inner side of the upper and lower ceramic insulation layers simultaneously assumes the functions of electrical conduction and thermal conduction. By means of the precisely three-dimensionally formed metal conductive layer, the power transistor crystal grains and circuit elements sandwiched between the ceramic substrates can be installed at a time, the process is simple and easy to align, and the output efficiency and product yield are improved; (4) the power transistor crystal grains and conductive posts between the metal-coated ceramic plates are completely covered by an insulating sealant, so that the high heat generated by the power transistor crystal grains is mainly conducted out from the upper and lower ceramic insulation layers and the metal thermal conductive layer, and it is difficult to interfere with other circuit elements, thereby achieving a thermoelectric separation effect. In addition, the present invention also hopes to provide a method for manufacturing a thermoelectric separation power module with a bidirectional heat dissipation ceramic substrate, which utilizes a three-dimensional conductive layer with precise manufacturing positioning to accurately connect the circuits of the three-dimensional conductive layers on the upper and lower sides, thereby making the manufacturing process simple and precise, and improving the manufacturing yield and output efficiency.

[0008] According to an embodiment, the present invention provides a thermoelectric separation power module with a bidirectional heat dissipation ceramic substrate, comprising:

[0009] A first double-sided metal-clad ceramic substrate, comprising a first ceramic insulating layer, a first three-dimensional conductive layer formed on the ceramic insulating layer, and a first metal heat-conducting layer formed on the first ceramic insulating layer opposite to the first three-dimensional conductive layer and insulated from the first three-dimensional conductive layer, wherein the first three-dimensional conductive layer is formed with a plurality of layers with different heights;

[0010] a second double-sided metal-clad ceramic substrate parallel to the first double-sided metal-clad ceramic substrate, comprising a second ceramic insulating layer, a second three-dimensional conductive layer formed on the ceramic insulating layer, and a second metal heat conductive layer formed on the second ceramic insulating layer opposite to the second three-dimensional conductive layer and insulated from the second three-dimensional conductive layer, wherein the second three-dimensional conductive layer is formed with a plurality of layers with different heights; and

[0011] At least one power transistor die, each of which is formed with a plurality of electrodes, each of which is respectively conductively connected to the first three-dimensional conductive layer or the second three-dimensional conductive layer, and the upper and lower surfaces of each of which are respectively thermally conductively connected to the first three-dimensional conductive layer and the second three-dimensional conductive layer.

[0012] According to an embodiment, the present invention provides a method for manufacturing a thermoelectric separation power module with a bidirectional heat dissipation ceramic substrate. The thermoelectric separation power module with a bidirectional heat dissipation ceramic substrate includes a first double-sided metal-clad ceramic substrate and a second double-sided metal-clad ceramic substrate parallel to the first double-sided metal-clad ceramic substrate; wherein the first double-sided metal-clad ceramic substrate includes a first ceramic insulating layer, a first three-dimensional conductive layer formed on the ceramic insulating layer, and a first metal heat-conducting layer formed on the first ceramic insulating layer opposite to the first three-dimensional conductive layer and insulated from the first three-dimensional conductive layer; the second double-sided metal-clad ceramic substrate includes a second ceramic insulating layer, a second three-dimensional conductive layer formed on the ceramic insulating layer, and a second metal heat-conducting layer formed on the second ceramic insulating layer opposite to the second three-dimensional conductive layer and insulated from the second three-dimensional conductive layer; the manufacturing method includes the following steps:

[0013] a) forming a circuit on the first three-dimensional conductive layer, wherein the first three-dimensional conductive layer has a plurality of layers with different heights;

[0014] b) mounting at least one power transistor die on the circuit of the first double-sided metal-ceramic substrate so that the power transistor die is thermally connected to the first three-dimensional conductive layer;

[0015] c) thermally bonding the second double-sided metal-ceramic substrate to the power transistor die through the second three-dimensional conductive layer toward the power transistor die; and

[0016] d) Pour insulating glue to completely encapsulate the power transistor die.

[0017] The step a) may further include the following sub-steps: a1) forming a seed layer on the aforementioned ceramic insulating layer; and a2) sequentially forming a plurality of thickening layers on the aforementioned seed layer.

[0018] Compared with the prior art, since the upper and lower first and second heat dissipation ceramic substrates are both centered on the first and second ceramic insulation layers and are coated with metal on both sides, but the ceramic insulation layer does not need to be perforated, only the inner sides facing each other are used as the conductive circuit and bear the responsibility of heat conduction, while the metal coated on the outer side of the ceramic insulation layer is completely insulated from the inner circuit, no circuit exists, and only bears the role of heat conduction or further connects to structures such as heat dissipation fins; thereby, the structure of the ceramic substrate is simple and easy to manufacture, and once devices such as heat dissipation fins or heat pipes are to be installed, it can also be easier to install and more closely combined with each other to achieve a good thermal conductivity effect; in particular, the inner three-dimensional conductive layer can be manufactured by gradually thickening, which not only has a mature manufacturing process and excellent precision, Moreover, the combination of two heat dissipation ceramic substrates becomes simple, accurate and reliable; in particular, because of the multiple layers of different heights, on the one hand, the problem of thermal stress can be effectively solved, so that the metal circuit through which the large current passes has a thinner seed layer, so that the part connected to the ceramic insulating layer can exert ductility, and the thickening layer above the seed layer can have a thicker height than the seed layer, so that the material of the metal conductive layer is simplified, and high-priced metals such as molybdenum can be avoided, thereby reducing manufacturing costs; the power transistor grains and the surrounding circuit elements are completely encapsulated by insulating sealing glue between the two heat dissipation ceramic substrates, so that the power module disclosed by the present invention can achieve thermal and electrical separation at the same time, and also effectively improve the product yield and output efficiency, thereby achieving the above-mentioned effects of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A schematic side view of the heat dissipation structure of a common power transistor module.

[0020] Figure 2 It is a three-dimensional perspective view of the main structure of the first preferred embodiment of the power transistor module of the present invention (illustrating how to use a large area of ​​thermal conductive contact to achieve good heat dissipation and module flattening effect).

[0021] Figure 3 and Figure 4 yes Figure 2 A partial side view of an embodiment (illustrating the bonding relationship between the first and second double-sided metal-ceramic substrates and the power transistor die).

[0022] Figure 5 It is a perspective view of the main structure of the second preferred embodiment of the power transistor module of the present invention (illustrating how to use a large area of ​​thermal conductive contact to achieve good heat dissipation and module flattening effect).

[0023] Figure 6 and Figure 7 yes Figure 5 A partial side view of an embodiment (illustrating the bonding relationship between the first and second double-sided metal-ceramic substrates and the power transistor die).

[0024] Figure 8 It is a schematic side view of the main structural parts of the third preferred embodiment of the power transistor module of the present invention (illustrating the structures of each double-sided metal-ceramic substrate and power transistor grains).

[0025] Fig. 9 for Figure 8 Schematic diagram of the bottom view of the double-sided metal-ceramic substrate on the top side of the embodiment (illustrating the three-dimensional conductive layer circuit pattern corresponding to the positions of the various poles of the power transistor die and the thermal conductive block on the top of the power transistor die).

[0026] Fig.10 for Figure 8 Schematic diagram of a circuit of multiple power transistor dies connected in series or in parallel in an embodiment.

[0027] Fig.11 It is a flow chart of a preferred embodiment of the preparation method of the present invention.

[0028] Among them: 1, 1' is a first double-sided metal-ceramic substrate; 10, 10' is a first ceramic insulating layer; 12, 12', 12" is a first three-dimensional conductive layer; 12D, 12D' is a drain lead-out portion; 12G, 12G' is a gate lead-out portion; 12S, 12S' is a source lead-out portion; 14, 34' is a first metal heat-conducting layer; 120 is a first circuit; 120" is a conductive circuit; 122", 322 are conductive posts; 124' is a corresponding block; 2, 2', 2" is a power transistor crystal particles; 20D, 20D', 20D" are drains; 20G, 20G', 20" are gates; 20S, 20S', 20S" are sources; 3, 3' are second double-sided metal-ceramic substrates; 30, 30' are second ceramic insulating layers; 32, 32" are second three-dimensional conductive layers; 320 is a second circuit; 321 is a gate pin; 321' is a first layer; 322' is a second layer; 34, 34' are second metal thermal conductive layers; 5, 5" are insulating sealants; 60-63 are steps. DETAILED DESCRIPTION

[0029] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments. These embodiments should be understood to be only used to illustrate the present invention and not to limit the scope of protection of the present invention. After reading the contents of the present invention, those skilled in the art may make various changes or modifications to the present invention, and these equivalent changes and modifications also fall within the scope defined by the claims of the present invention.

[0030] In the following embodiments of the present invention, the same elements will be marked with similar reference numerals.

[0031] First preferred embodiment

[0032] like Figures 2 to 4 As shown, a thermoelectric separation power module of a power transistor module provided by the first preferred embodiment of the present invention mainly includes a first double-sided metal-clad ceramic substrate 1, a power transistor crystal 2 and a second double-sided metal-clad ceramic substrate 3, wherein the first and second double-sided metal-clad ceramic substrates 1 and 3 are respectively based on a ceramic insulating layer 10 and 30 with a thickness of 0.1 to 1 mm, and metal is respectively clad on both sides of the first and second ceramic insulating layers 10 and 30. In this embodiment, copper is used as an example. Since the first and second ceramic insulating layers 10 and 30 are both complete and non-perforated structures during future assembly, the circuit part is limited to the inner side surfaces facing each other, and the copper cladding on the outer side surfaces of the first and second ceramic insulating layers 10 and 30 is only used for heat dissipation, and even further installation of heat dissipation fins (not shown in the figure) is provided to provide large-area heat conduction. Even if devices such as heat sink fins are to be installed, there is no need to specially design the shape and structure of the outer copper cladding layer and the heat sink fins, so that the heat dissipation contact not only has a large area, a simple structure and is easy to manufacture, but also the combination is stable and reliable. Therefore, the copper cladding layers on the outside of the first and second ceramic insulating layers 10 and 30 are respectively defined as the first metal thermal conductive layer 14 and the second metal thermal conductive layer 34.

[0033] As for the copper-clad layers facing each other inside the first and second ceramic insulating layers 10 and 30, they need to bear the conductive circuit structure, and part of the area thereof helps to conduct the heat generated by the power transistor die 2 to the corresponding ceramic insulating layer and the metal heat conductive layer. Therefore, the metal-clad layers facing each other inside the first and second ceramic insulating layers 10 and 30 are defined as the first three-dimensional conductive layer 12 and the second three-dimensional conductive layer 32 respectively. Fig.11 In step 60, the first three-dimensional conductive layer 12 and the second three-dimensional conductive layer 32 are formed according to the pre-planned method by, for example, sputtering on the inner sides of the first and second ceramic insulating layers 10 and 30 to form a seed layer, and then the circuit pattern is laid out, and then the first circuit 120 and the second circuit 320 are formed by forming a plurality of thickening layers of different heights on the seed layer through layer-by-layer thickening. Figure 3As shown, the first three-dimensional conductive layer 12 in this embodiment also includes a source pad and a drain pad formed simultaneously in the circuit 120 for conductive connection with the power transistor die 2 .

[0034] Then, in step 61, the power transistor chip 2, the gate driver (not shown) and other circuit elements will be installed on the circuits on the bottom and top sides of this embodiment respectively, and the source, drain and gate of the power transistor chip 2 will be connected to the source pad, drain pad and gate pad of the first circuit 120 on the bottom side or the second circuit 320 on the top side respectively. The power transistor die 2 of the present embodiment is a GaN transistor. Since the present invention directly uses unpackaged bare die, the drain 20D of the power transistor die 2 of the present embodiment is located at the lower side of the figure, and the source 20S and the gate 20G are located at the upper side. Since the source and gate of the power transistor die 2 are located at the upper side, the source 20S and the gate 20G are guided through the second three-dimensional conductive layer 32 of the second double-sided metal-ceramic substrate 3 above, and are respectively connected to the source lead-out portion 12S and the gate lead-out portion 12G; the three-dimensional conductive layer 12 below is formed with a pad for the drain 20D to be welded and installed, and is conductively connected to the drain lead-out portion 12D.

[0035] Since the thickness of the bare die is only 50 to 100 μm, in the present embodiment, the source 20S and the gate 20G respectively use the source pin (not numbered) and the gate pin 321 of the second three-dimensional conductive layer 32 above, and through the conductive pillars 322 with different heights, the current input and output and the gate signal are smoothly guided to different blocks of the first three-dimensional conductive layer 12, and then transmitted to the source lead-out portion 12S and the gate lead-out portion 12G welded on the first three-dimensional conductive layer 12. Not only is the cross-sectional area of ​​the guiding path large, which is conducive to controlling the current density during the transmission process, but the overall height of the module is also quite thin. In particular, the power transistor die is sandwiched between the double-sided metal-ceramic substrates. As long as the second double-sided metal-ceramic substrate has a sufficient top area for the surface mounting machine to absorb, it can be easily absorbed and moved. In particular, the circuit layer area of ​​the first and second three-dimensional conductive layers 12 and 32 is large, and other circuit elements such as gate drivers and shunt detectors can also be arranged in the module and surface mounted together. Since the three-dimensional conductive layer can be thickened to make the current cross-sectional area much larger than that of a general lead frame, even if the source and drain need to provide a large current of tens of amperes, the current density in the three-dimensional conductive layer can still be greatly reduced, while further reducing heat generation.

[0036] Of course, the circuit elements mentioned here are not limited to the gate driver for driving the power transistor die 2 to conduct or disconnect, and may also include other elements such as thermistors or other matching elements in this embodiment. Then, in step 62, the second double-sided metal-ceramic substrate 3 is placed on the first double-sided metal-ceramic substrate 1 below, the power transistor die 2 and other circuit elements, so that the first and second double-sided metal-ceramic substrates 1 and 3 are combined in a manner that the first and second three-dimensional conductive layers 12 and 32 face each other, and the first metal heat conductive layer 14 and the second metal heat conductive layer 34 are respectively disposed on the outside of the first and second ceramic insulating layers 10 and 30 and are insulated from the first and second three-dimensional conductive layers 12 and 32.

[0037] After the first and second double-sided metal-clad ceramic substrates on the upper and lower sides are butt-jointed, step 63 injects insulating sealant 5 to completely cover and encapsulate the power transistor crystal grain 2 between the first and second metal-clad ceramic substrates. Since the thermal conductivity of the insulating sealant here is much lower than that of the ceramic insulating layer and the metal thermal conductive layer, the heat generated by the power transistor crystal grain will be limited to be conducted toward the upper and lower sides with the smallest thermal resistance. In particular, only a single layer of power transistor crystal grains is provided, and the thickness of the entire module is only about 2 to 4 mm. In the upper and lower directions, not only are the thermal conductivity of all structures very high, but the thermal resistance is very low, so that the heat flow is smoothly transferred and further conducted away by structures such as heat sink fins, but the heat energy transferred laterally will also be limited by the thermal resistance of the insulating sealant, rarely affecting other circuit elements in the package, and is not easy to accumulate and cause internal temperature rise, thereby achieving the thermoelectric separation emphasized by the present invention.

[0038] Second preferred embodiment

[0039] Of course, as those skilled in the art can readily appreciate, power transistors have many different forms, such as Figures 5 to 7As shown in the second preferred embodiment of the present invention, the source 20S', the drain 20D' and the gate 20G' of the power transistor die 2' are all formed on the same side of the top surface of the die. Therefore, in this embodiment, the first three-dimensional conductive layer 12' on the bottom side of the die will have a corresponding block 124' that is simply used for heat conduction to help transfer the heat energy generated by the die upward to the ceramic insulating layer and the metal thermal conductive layer above. As for the circuit on the top side, it includes a first layer 321' for conducting the source pad, drain pad and gate pad from the above-mentioned source 20S', drain 20D' and gate 20G', and a second layer 322' as a conducting column, thereby forming a transmission path with a large transmission cross-section, and connecting the source 20S', drain 20D' with the current input and output of the gate 20G' and the gate signal to different blocks on the first three-dimensional conducting layer 12', and the source lead-out part 12S', drain lead-out part 12D' and gate lead-out part 12G' are respectively welded to the above-mentioned different blocks to achieve transmission, while the block 124' in the first three-dimensional conducting layer 12' is not responsible for conducting electricity but is dedicated to the bottom and top welding of the power transistor grain and heat conduction. Also, since there are no through holes inside and outside the first and second ceramic insulating layers 10 ′, 30 ′, the first and second metal heat-conducting layers on the outside have simple and flat structures, and if other heat-conducting structures are to be further provided, good heat-conducting bonding is convenient.

[0040] Since the power transistor crystal grain 2' itself will generate high heat during operation, the first and second three-dimensional conductive layers 12', 32' of the first and second double-sided metal ceramic substrates 1', 3' on the upper and lower sides are in large-area contact with the power transistor crystal grain 2', and the heat energy is also conducted out through the first and second ceramic insulating layers 10', 30' and the first and second metal heat-conducting layers 14', 34'. It is ensured that the heat energy inside the module is efficiently conducted out without rapid accumulation inside to cause temperature rise, which not only makes the overall module operating environment good, but also effectively prolongs the service life of the power transistor crystal grain and other circuit components inside. In particular, in the case of a structure where the three-dimensional conductive layer is thickened by lamination, the copper layer thickness of the pad position where the large current passes can be accurately increased, which can reduce the current density compared to the previous lead frame. In addition, in terms of material, part of the thickened layer can also be replaced with molybdenum-copper alloy, tungsten-copper alloy or molybdenum-copper-molybdenum metal lamination, thereby limiting the thermal expansion of the single copper and solving the thermal stress problem.

[0041] Third preferred embodiment

[0042] Further Figure 8 and Fig. 9As shown in the third preferred embodiment of the present invention, multiple power transistor chips 2" can also be installed in the same module. The source 20S" and the drain 20D" of each power transistor chip 2" are respectively led out from the source pad and the drain pad of the bottom circuit 120". Similarly, the gate pad in this embodiment is also connected to the first three-dimensional conductive layer 12" on the upper side in parallel and driven by the gate driver together. Obviously, since this embodiment is based on Fig. 9 and Fig.10 For example, four power transistor dies are shown as a group. The four dies are connected in parallel with each other and in series with another group of four power transistor dies (not shown in the figure). Therefore, the source, drain and gate of each dies must form a cross-connected structure, which cannot be formed on a single plane and must be cross-connected by a three-dimensional circuit. The shunt detector is a chip resistor, which detects the output current of each power transistor dies 2" by means of a conductive circuit 120" and a conductive column 122". The filling method of the insulating sealant 5" is the same as above and will not be repeated. It is worth noting that at this time, not only the conductive pillars are conductively connected to the corresponding circuits on the upper and lower sides at the same time, but in this embodiment, a second three-dimensional conductive layer 32" is cleverly set in the top three-dimensional conductive layer to conduct heat energy above the power transistor die 2, wherein the top of the power transistor die without any current flowing through it will also abut against the corresponding heat conduction block of the upper circuit, abutting and pressing the power transistor die to conduct heat, so that the heat energy generated by the power transistor die can be effectively conducted from the top in addition to the first three-dimensional conductive layer below.

[0043] Of course, as those familiar with the technical field can easily understand, the above embodiments are only examples and are not limiting. For example, the electrode configuration of the power transistor grain can also be located on both sides of the top and bottom surfaces, rather than being limited to a single side. In addition, the conductive column is not necessarily formed at the same time as the above circuit, and the formation of the circuit is not limited to the use of sputtering seed layer and then thickening. As long as different hierarchical structures with different heights can be achieved, the installation and connection requirements of power transistors and other circuit components can be met. Since the overall height of the module is quite thin, especially when sandwiched between double-sided metal-clad ceramic substrates, as long as there is enough top area for surface mounting machines to absorb, it can be easily absorbed and moved, and surface mounted together with other circuit components.

[0044] As can be seen from the above, since the space between the two double-sided metal-ceramic substrates is very thin, and the three-dimensional conductive layers facing each other have large areas of conductive connection or contact above and below the power transistor crystal grains, the heat generated by the power transistor crystal grains can be smoothly discharged through the insulating ceramic layer with high thermal conductivity and the thermal conductive metal layer, so as to maintain the temperature of the working environment from being too high. In addition, in order to form layers of different heights on the three-dimensional conductive layer, the three-dimensional conductive layer responsible for the connection can be selected with an appropriate thickness, such as direct copper coating, or alloy and lamination, which not only effectively reduces the current density, but also reduces thermal stress damage. In addition to the good thermal conductive channels in the up and down directions, the side directions of the power transistor crystal grains are completely covered by the insulating sealant with poor thermal conductivity, so that the heat energy cannot easily affect other circuit components, which is significantly better than the previous lead frame design. Most importantly, due to the simple structure and precise structural assembly, the manufacturing cost, output efficiency and product yield can be significantly improved.

Claims

1. A thermoelectric separation power module with a bidirectional heat dissipation ceramic substrate, characterized in that: include: A first double-sided metal-clad ceramic substrate, comprising a first ceramic insulating layer, a first three-dimensional conductive layer formed on the ceramic insulating layer, and a first metal heat-conducting layer formed on the first ceramic insulating layer opposite to the first three-dimensional conductive layer and insulated from the first three-dimensional conductive layer, wherein the first three-dimensional conductive layer is formed with a plurality of layers with different heights; a second double-sided metal-clad ceramic substrate parallel to the first double-sided metal-clad ceramic substrate, comprising a second ceramic insulating layer, a second three-dimensional conductive layer formed on the ceramic insulating layer, and a second metal heat conductive layer formed on the second ceramic insulating layer opposite to the second three-dimensional conductive layer and insulated from the second three-dimensional conductive layer, wherein the second three-dimensional conductive layer is formed with a plurality of layers with different heights; and At least one power transistor die, each of which is formed with a plurality of electrodes, each of which is respectively conductively connected to the first three-dimensional conductive layer or the second three-dimensional conductive layer, and the upper and lower surfaces of each of which are respectively thermally conductively connected to the first three-dimensional conductive layer and the second three-dimensional conductive layer.

2. The thermoelectric separation power module with a bidirectional heat dissipation ceramic substrate according to claim 1, characterized in that: The invention further comprises an insulating sealant for completely covering the power transistor crystal grains between the double-sided metal-ceramic plates.

3. The thermoelectric separation power module with a bidirectional heat dissipation ceramic substrate according to claim 1, characterized in that: The thickness of the first ceramic insulating layer and the second ceramic insulating layer are 0.1 to 1 mm respectively.

4. The thermoelectric separation power module with a bidirectional heat dissipation ceramic substrate according to claim 1, characterized in that: The power transistor dies are an even number and are divided into at least two groups of dies connected in series, and the power transistor dies in each of the dies are connected in parallel.

5. The thermoelectric separation power module with a bidirectional heat dissipation ceramic substrate according to claim 1, characterized in that: The invention further comprises a gate driver which is installed on the first three-dimensional conductive layer or the second three-dimensional conductive layer and is used for driving the power transistor chip.

6. The thermoelectric separation power module with a bidirectional heat dissipation ceramic substrate as claimed in claim 1, characterized in that: At least one conductive post is formed between the first three-dimensional conductive layer and the second three-dimensional conductive layer.

7. A method for manufacturing a thermoelectric separation power module with a bidirectional heat dissipation ceramic substrate, the thermoelectric separation power module with a bidirectional heat dissipation ceramic substrate comprising a first double-sided metal-clad ceramic substrate and a second double-sided metal-clad ceramic substrate parallel to the first double-sided metal-clad ceramic substrate; wherein: The first double-sided metal-clad ceramic substrate comprises a first ceramic insulating layer, a first three-dimensional conductive layer formed on the ceramic insulating layer, and a first metal heat-conducting layer formed on the first ceramic insulating layer opposite to the first three-dimensional conductive layer and insulated from the first three-dimensional conductive layer; the second double-sided metal-clad ceramic substrate comprises a second ceramic insulating layer, a second three-dimensional conductive layer formed on the ceramic insulating layer, and a second metal heat-conducting layer formed on the second ceramic insulating layer opposite to the second three-dimensional conductive layer and insulated from the second three-dimensional conductive layer, and is characterized by comprising the following steps: a) forming a circuit on the first three-dimensional conductive layer, wherein the first three-dimensional conductive layer is formed with a plurality of layers with different heights; b) mounting at least one power transistor die on the circuit of the first double-sided metal-ceramic substrate so that the power transistor die is thermally connected to the first three-dimensional conductive layer; c) thermally bonding the second double-sided metal-ceramic substrate to the power transistor die through the second three-dimensional conductive layer toward the power transistor die; and d) Pour insulating glue to completely encapsulate the power transistor die.

8. The method for manufacturing a thermoelectric separation power module with a bidirectional heat dissipation ceramic substrate according to claim 7, wherein: The aforementioned step a) further comprises the following sub-steps: a1) forming a seed layer on the aforementioned ceramic insulating layer; and a2) sequentially forming a plurality of thickening layers on the aforementioned seed layer.

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