Power supply master-slave-free parallel dynamic current sharing circuit and parallel power supply

Abstract

The invention provides a power supply master-slave-free parallel connection dynamic current sharing circuit and a parallel connection power supply, and aims to solve the problems that in an existing power supply master-slave-free parallel connection current sharing method, due to the fact that parallel connection signal interaction and parallel connection logic processing are achieved through software, the dynamic performance of a master-slave parallel connection system is poor, a current sharing ring is added in the software, and the dynamic performance of the master-slave parallel connection system is poor. And the parallel debugging difficulty of the power supply is greatly increased. According to the power supply master-slave parallel connection-free dynamic current sharing circuit provided by the invention, through reasonable arrangement of the first operational amplifier follower circuit, the second operational amplifier follower circuit, the diode D1, the diode D2, the diode D3 and the diode D4, current sharing among power supply modules in a parallel system is automatically realized through hardware, and software current sharing control does not need to be added; the series connection level of the control system is not increased, the parallel operation debugging difficulty is greatly reduced, and meanwhile the dynamic performance of the master-slave-free parallel operation system is effectively guaranteed.

Description

Technical Field

[0001] The invention relates to a power supply without a master-slave parallel current-sharing circuit, and in particular to a power supply without a master-slave parallel dynamic current-sharing circuit and a parallel power supply. Background Art

[0002] At present, the power supply without master-slave parallel current sharing is realized in digital form, which uses CAN communication as the current sharing bus, and adds a current sharing loop in the software for parallel logic processing. Its implementation principle is as follows Figure 1 In the non-master-slave parallel system, each power supply uploads its own output current to the CAN bus, so that each power supply can obtain the output current of all the power supplies in the system, and then take the average value or maximum value as the current sharing loop, and finally realize dynamic current sharing among all the power supplies.

[0003] However, this power supply has the following two disadvantages:

[0004] 1. Since the parallel signal interaction and parallel logic processing are implemented through software, time delay will occur, resulting in poor dynamic performance of the master-slave parallel system, which is far worse than the dynamic performance of a single module.

[0005] Second, the addition of a current-sharing loop in the software will cause one more control loop to be connected in series in the power supply control, which will greatly increase the difficulty of parallel debugging of power supplies. Summary of the invention

[0006] The purpose of the present invention is to solve the technical problems that the existing power supply without master-slave parallel current equalization method has that the parallel signal interaction and parallel logic processing are realized by software, resulting in poor dynamic performance of the master-slave parallel system, and the addition of a current equalization loop in the software leads to a significant increase in the difficulty of power supply parallel debugging, and to provide a power supply without master-slave parallel dynamic current equalization circuit and a parallel power supply.

[0007] In order to achieve the above purpose, the technical solution provided by the present invention is as follows:

[0008] A power supply non-master-slave parallel dynamic current balancing circuit, which is special in that it includes a first current balancing unit and a second current balancing unit;

[0009] The first current balancing unit includes a first operational amplifier follower circuit, a diode D1, a resistor R3 and a first filter circuit;

[0010] The input end of the first operational amplifier follower circuit receives an input signal IN, wherein the input signal IN is a signal with a smaller absolute value between a voltage loop output signal and a current loop output signal of each power module in the parallel power supply;

[0011] The cathode of the diode D1 is connected to the output end of the first operational amplifier follower circuit, and the anode of the diode D1 is connected to one end of the resistor R3, and the other end of the resistor R3 is connected to the CSBUS port;

[0012] One end of the first filter circuit is connected between the diode D1 and the resistor R3, and the other end is grounded;

[0013] The second current balancing unit includes a second operational amplifier follower circuit, a diode D3, a diode D4, a diode D2 and a second filtering circuit;

[0014] The input terminal of the second operational amplifier follower circuit is connected between the diode D1 and the resistor R3;

[0015] The cathode of the diode D3 is connected to the input signal IN, and the anode is connected to the cathode of the diode D4;

[0016] The cathode of the diode D2 is connected to the output end of the second operational amplifier follower circuit, and the anode of the diode D2 is connected to the anode of the diode D4 to output as the output end of the dynamic current balancing circuit;

[0017] The second filter circuit is connected in parallel between the output end of the dynamic current balancing circuit and the ground.

[0018] Further, the first operational amplifier follower circuit includes a resistor R1 and an operational amplifier A1;

[0019] One end of the resistor R1 is connected to the input signal IN, and the other end thereof is connected to the non-inverting input end of the operational amplifier A1; the inverting input end of the operational amplifier A1 is connected to its output end;

[0020] The cathode of the diode D1 is connected to the output end of the operational amplifier A1.

[0021] Further, the second operational amplifier follower circuit includes a resistor R4, a resistor R5 and an operational amplifier A2;

[0022] One end of the resistor R4 is connected between the diode D1 and the resistor R3, and the other end thereof is connected to the non-inverting input end of the operational amplifier A2; one end of the resistor R5 is connected to the output end of the operational amplifier A2, and the other end thereof is connected to the inverting input end of the operational amplifier A2;

[0023] The cathode of the diode D2 is connected to the other end of the resistor R5.

[0024] Further, the first filtering circuit includes a resistor R2 and a capacitor C1;

[0025] One end of the resistor R2 is connected to the anode of the diode D1, and the other end is grounded;

[0026] The capacitor C1 is connected in parallel to both ends of the resistor R2.

[0027] Further, the second filtering circuit includes a resistor R6 and a capacitor C2;

[0028] One end of the resistor R6 is connected to the anode of the diode D2 , and the other end is grounded. The capacitor C2 is connected in parallel to both ends of the resistor R6 .

[0029] Furthermore, the diode D1 , the diode D2 , the diode D3 and the diode D4 are all fast recovery diodes.

[0030] Furthermore, the resistance value of the resistor R3 is 10Ω to 50Ω.

[0031] Furthermore, the resistance values ​​of the resistor R2 and the resistor R6 are 10 kΩ to 20 kΩ.

[0032] In addition, the present invention also provides a parallel power supply, comprising a plurality of power supply modules connected in parallel, wherein the plurality of power supply modules are respectively provided with a current loop, a voltage loop, an inner loop control, an output unit and a CSBUS port, and the particularity thereof is that the plurality of power supply modules are also respectively provided with an absolute value minimization module and the above-mentioned power supply non-master-slave parallel dynamic current balancing circuit;

[0033] The two input ends of the absolute value minimization module are respectively connected to the output ends of the voltage loop and the current loop in the corresponding power module, and are used to perform an absolute value minimization operation on the output signal of the voltage loop and the output signal of the current loop in the corresponding power module;

[0034] The input end of the first operational amplifier follower circuit in the power supply non-master-slave parallel dynamic current sharing circuit is connected to the output end of the absolute value small module in the corresponding power module, and is used to receive the signal with the smaller absolute value between the output signal of the voltage loop and the output signal of the current loop in the corresponding power module;

[0035] The CSBUS ports of the plurality of power modules are connected to each other;

[0036] The output end of the power supply non-master-slave parallel dynamic current sharing circuit is connected to an input end of the inner loop control of the corresponding power module; the input end of the output unit is connected to the output end of the inner loop control.

[0037] Furthermore, the CSBUS port consists of a CSBUS terminal and a reference GND.

[0038] Compared with the prior art, the present invention has the following beneficial effects:

[0039] 1. Compared with the existing power supply non-master-slave parallel current equalization method, the present invention provides a power supply non-master-slave parallel dynamic current equalization circuit. The current equalization between the power modules in the parallel system is automatically realized by hardware, without the need to add software current equalization control, and the series level of the control system is not increased, which greatly reduces the difficulty of parallel debugging. At the same time, it effectively guarantees the dynamic performance of the non-master-slave parallel system, making it basically consistent with the dynamic performance of a single power module.

[0040] 2. The circuit of the present invention is composed of common components such as diodes, resistors, capacitors, operational amplifiers, etc., with almost no cost increase. The connection between the power modules in the parallel system is simple and convenient, and has the advantages of simple debugging, low cost, and high reliability.

[0041] 3. A parallel power supply provided by the present invention, each power supply module adopts the above-mentioned power supply non-master-slave parallel dynamic current sharing circuit, and each power supply module is only connected to each other through the CSBUS port, so as to realize non-master-slave dynamic current sharing, without the need to use CAN communication, thereby reducing hardware cost and software complexity. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 It is a schematic diagram of the principle of the current-sharing method for power supply without master-slave parallel operation, which uses CAN communication as the current-sharing bus and adds a current-sharing loop in the software for parallel operation logic processing;

[0043] Figure 2 A circuit topology diagram of an embodiment of a power supply non-master-slave parallel dynamic current sharing circuit of the present invention;

[0044] Figure 3 A module control block diagram of a single power module in a parallel power supply embodiment of the present invention;

[0045] Figure 4 The figure is a schematic diagram of the connection of multiple power modules in a parallel power supply embodiment of the present invention. DETAILED DESCRIPTION

[0046] In order to make the advantages and features of the present invention more clear, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0047] like Figure 2 As shown, a power supply non-master-slave parallel dynamic current balancing circuit includes a first current balancing unit and a second current balancing unit. The first current balancing unit includes a first operational amplifier follower circuit, a diode D1, a resistor R3, and a first filter circuit; the second current balancing unit includes a second operational amplifier follower circuit, a diode D3, a diode D4, a diode D2, and a second filter circuit.

[0048] The first operational amplifier follower circuit and the second operational amplifier follower circuit are used to transmit the input signal IN to the output terminal OUT and isolate the signal. Since the output signal of the voltage loop of each power module and the output signal of the current loop are both negative signals, the input signal IN in the present invention is the signal with the smaller absolute value among the output signal of the voltage loop of each power module in the parallel power supply and the output signal of the current loop.

[0049] The first operational amplifier follower circuit includes a resistor R1 and an operational amplifier A1, one end of the resistor R1 is connected to the input signal IN, the other end thereof is connected to the non-inverting input end of the operational amplifier A1, and the inverting input end of the operational amplifier A1 is connected to its output end. The diode D1 is a fast recovery diode, the cathode of which is connected to the output end of the operational amplifier A1, the anode of which is connected to one end of the resistor R3, and the other end of the resistor R3 is connected to the CSBUS port. The CSBUS port is a port for bidirectional communication, which is used to input the current sharing signal of each power module in the parallel power supply to this power supply, or output the current sharing signal of this power module.

[0050] The second operational amplifier follower circuit includes a resistor R4, a resistor R5 and an operational amplifier A2, one end of the resistor R4 is connected between the diode D1 and the resistor R3, and the other end thereof is connected to the non-inverting input terminal of the operational amplifier A2; one end of the resistor R5 is connected to the output terminal of the operational amplifier A2, and the other end thereof is connected to the inverting input terminal of the operational amplifier A2; the cathode of the diode D3 is connected to the input signal IN, and the anode is connected to the cathode of the diode D4; the cathode of the diode D2 is connected to the other end of the resistor R5, and the anode thereof is connected to the anode of the diode D4, and the anode of the diode D4 is connected to the output terminal of the dynamic current balancing circuit, for providing a given signal to the inner loop control of the power module.

[0051] Since the input signal IN passes through the diode D1 and the diode D2 when being processed through the paths of the first op amp follower circuit and the second op amp follower circuit, and the signal will generate voltage drops when passing through the diodes, an equivalent diode D3 and a diode D4 are designed in the transmission path of another input signal IN, so that the diodes D1, D2, D3, and D4 can compensate each other. In this embodiment, the diodes D1, D2, D3, and D4 are all fast recovery diodes.

[0052] The first filter circuit is an RC filter circuit, one end of which is connected between the diode D1 and the resistor R3, and the other end is grounded, and is used to filter the input external current sharing signal. The first filter circuit includes a resistor R2 and a capacitor C1. Specifically, one end of the resistor R2 is connected to the positive electrode of the diode D1, and the other end is grounded, and the capacitor C1 is connected in parallel to both ends of the resistor R2.

[0053] The second filter circuit is an RC filter circuit, which is connected in parallel between the output end of the dynamic current balancing circuit and the ground, and is used to filter the output signal OUT. The second filter circuit includes a resistor R6 and a capacitor C2. Specifically, one end of the resistor R6 is connected to the positive electrode of the diode D2, and the other end is grounded. The capacitor C2 is connected in parallel to both ends of the resistor R6.

[0054] In the present invention, the resistor R3 is used to achieve buffering of the external current sharing signal, and its resistance value is 10Ω~50Ω. The resistance values ​​of the resistors R2 and R6 are 10kΩ~20kΩ. The resistor R5 is used for output impedance matching of the operational amplifier A2. Other components can be selected according to conventional calculations.

[0055] The working principle of the power supply non-master-slave parallel dynamic current sharing circuit of the present invention is:

[0056] The input signal IN is transmitted to point ① after passing through the first op amp follower circuit. The signal at point ① of this power module is compared with the signal at point ① of other power modules in the parallel power supply through the CSBUS port, so that the signal with the smallest median value is transmitted to the CSBUS port, and then reaches point ② (the signal at the CSBUS port is basically the same as the signal at point ②), and then the next transmission is carried out. Specifically, when the signal at point ① of other power modules in the parallel power supply is smaller than the signal at point ① of this power module, the diode D1 is cut off, and at this time, the signal at point ① of other power modules is transmitted to the CSBUS port and point ②; when the signal at point ① of other power modules in the parallel power supply is larger than the signal at point ① of this power module, the diode D1 is turned on, and at this time, the signal at point ① of this power module is transmitted to point ② and the CSBUS port after passing through the diode D1.

[0057] The signal output at point ② is transmitted to point ③ after passing through the second op amp follower circuit, and compared with the input signal IN, so that the signal with the smaller value of the two signals is output. Specifically, when the input signal IN is less than the signal at point ③, the diode D2 is turned off, and the diodes D3 and D4 are turned on. At this time, the input signal IN is transmitted to point ④ through diodes D3 and D4 as the output of the dynamic current sharing circuit; when the input signal IN is greater than the signal at point ③, the diode D2 is turned on, and the diodes D3 and D4 are turned off. At this time, the signal at point ③ is transmitted to point ④ through diode D2 as the output of the dynamic current sharing circuit.

[0058] Finally, the power supply of the present invention has no master-slave parallel dynamic current balancing circuit, takes the minimum value of the input signal IN of all power modules as the output signal OUT of the dynamic current balancing circuit, and provides a given signal to the inner loop control of the power module. Among them, if the input signal IN of the power module itself is the minimum value, it is output through the diode D3 and the diode D4, and if the input signal IN of other power modules is the minimum value, it is output after passing through the first op amp follower circuit and the second op amp follower circuit.

[0059] Based on the above-mentioned power supply non-master-slave parallel dynamic current sharing circuit, the present invention also provides a parallel power supply, which includes n parallel power supply modules. Figure 3As shown, it is a module control block diagram of a single power module, and each power module is respectively provided with a current loop, a voltage loop, an inner loop control, an output unit, a CSBUS port, an absolute value subtraction module and the above-mentioned power supply non-master-slave parallel dynamic current balancing circuit. The two input ends of the absolute value subtraction module are respectively connected to the output ends of the voltage loop and the current loop in the corresponding power module, and are used to perform an absolute value subtraction operation on the output signal of the voltage loop and the output signal of the current loop in the corresponding power module. One end of the resistor R1 in the power supply non-master-slave parallel dynamic current balancing circuit is connected to the output end of the absolute value subtraction module in the corresponding power module, and is used to receive the signal with a smaller absolute value in the output signal of the voltage loop and the output signal of the current loop in the corresponding power module, and use it as the input signal IN of the power supply non-master-slave parallel dynamic current balancing circuit. The output end of the power supply non-master-slave parallel dynamic current balancing circuit is connected to an input end of the inner loop control of the corresponding power module, so that the output signal OUT provides a given signal to the inner loop control of the power module, and is output after operation with the inner loop current feedback signal of the corresponding power module. The output unit includes a wave-generating circuit and a power circuit. The input end of the wave-generating circuit is connected to the output end of the inner loop control, the input end of the power circuit is connected to the output end of the wave-generating circuit, and the output end of the power circuit serves as the output of a single power supply module.

[0060] like Figure 4 The figure shows the connection diagram of n power modules in the parallel power supply. The CSBUS ports of the n power modules are connected together, and the outputs of the n power modules are connected in parallel as the output of the parallel power supply. The CSBUS port consists of a CSBUS terminal and a reference GND, which is recorded as a CSBUS / GND port.

[0061] The above description is only used to illustrate the technical solution of the present invention rather than to limit it. For ordinary professional and technical personnel in the field, the specific technical solution recorded in the above embodiment can be modified, or some of the technical features therein can be replaced by equivalents, and these modifications or replacements do not make the essence of the corresponding technical solution deviate from the scope of the technical solution protected by the present invention.

Claims

1. A power supply non-master-slave parallel dynamic current sharing circuit, characterized in that: It includes a first current balancing unit and a second current balancing unit; The first current balancing unit includes a first operational amplifier follower circuit, a diode D1, a resistor R3 and a first filter circuit; The input end of the first operational amplifier follower circuit receives an input signal IN, wherein the input signal IN is a signal with a smaller absolute value between a voltage loop output signal and a current loop output signal of each power module in the parallel power supply; The cathode of the diode D1 is connected to the output end of the first operational amplifier follower circuit, the anode of the diode D1 is connected to one end of the resistor R3, and the other end of the resistor R3 is connected to the CSBUS port; One end of the first filter circuit is connected between the diode D1 and the resistor R3, and the other end is grounded; The second current balancing unit includes a second operational amplifier follower circuit, a diode D3, a diode D4, a diode D2 and a second filtering circuit; The input terminal of the second operational amplifier follower circuit is connected between the diode D1 and the resistor R3; The cathode of the diode D3 is connected to the input signal IN, and the anode is connected to the cathode of the diode D4; The cathode of the diode D2 is connected to the output end of the second operational amplifier follower circuit, and the anode of the diode D2 is connected to the anode of the diode D4 to output as the output end of the dynamic current balancing circuit; The second filter circuit is connected in parallel between the output end of the dynamic current balancing circuit and the ground.

2. The power supply non-master-slave parallel dynamic current sharing circuit according to claim 1, characterized in that: The first operational amplifier follower circuit includes a resistor R1 and an operational amplifier A1; One end of the resistor R1 is connected to the input signal IN, and the other end thereof is connected to the non-inverting input end of the operational amplifier A1; the inverting input end of the operational amplifier A1 is connected to its output end; The cathode of the diode D1 is connected to the output end of the operational amplifier A1.

3. The power supply non-master-slave parallel dynamic current sharing circuit according to claim 2, characterized in that: The second operational amplifier follower circuit includes a resistor R4, a resistor R5 and an operational amplifier A2; One end of the resistor R4 is connected between the diode D1 and the resistor R3, and the other end thereof is connected to the non-inverting input end of the operational amplifier A2; one end of the resistor R5 is connected to the output end of the operational amplifier A2, and the other end thereof is connected to the inverting input end of the operational amplifier A2; The cathode of the diode D2 is connected to the other end of the resistor R5.

4. The power supply non-master-slave parallel dynamic current sharing circuit according to claim 3, characterized in that: The first filtering circuit includes a resistor R2 and a capacitor C1; One end of the resistor R2 is connected to the anode of the diode D1, and the other end is grounded; The capacitor C1 is connected in parallel to both ends of the resistor R2.

5. The power supply non-master-slave parallel dynamic current sharing circuit according to claim 4, characterized in that: The second filtering circuit includes a resistor R6 and a capacitor C2; One end of the resistor R6 is connected to the anode of the diode D2 , and the other end is grounded. The capacitor C2 is connected in parallel to both ends of the resistor R6 .

6. The power supply non-master-slave parallel dynamic current sharing circuit according to claim 5, characterized in that: The diode D1 , the diode D2 , the diode D3 and the diode D4 are all fast recovery diodes.

7. The power supply non-master-slave parallel dynamic current sharing circuit according to claim 6, characterized in that: The resistance value of the resistor R3 is 10Ω to 50Ω.

8. The power supply non-master-slave parallel dynamic current sharing circuit according to claim 7, characterized in that: The resistance values ​​of the resistor R2 and the resistor R6 are 10 kΩ to 20 kΩ.

9. A parallel power supply, comprising a plurality of power modules connected in parallel, wherein the plurality of power modules are respectively provided with a current loop, a voltage loop, an inner loop control, an output unit and a CSBUS port, characterized in that: The plurality of power modules are also respectively provided with an absolute value minimization module and a power supply non-master-slave parallel dynamic current sharing circuit as described in any one of claims 1-8; The two input ends of the absolute value minimization module are respectively connected to the output ends of the voltage loop and the current loop in the corresponding power module, and are used to perform an absolute value minimization operation on the output signal of the voltage loop and the output signal of the current loop in the corresponding power module; The input end of the first operational amplifier follower circuit in the power supply non-master-slave parallel dynamic current sharing circuit is connected to the output end of the absolute value small module in the corresponding power module, and is used to receive the signal with the smaller absolute value between the output signal of the voltage loop and the output signal of the current loop in the corresponding power module; The CSBUS ports of the plurality of power modules are connected to each other; The output end of the power supply non-master-slave parallel dynamic current sharing circuit is connected to an input end of the inner loop control of the corresponding power module; the input end of the output unit is connected to the output end of the inner loop control.

10. The parallel power supply according to claim 9, characterized in that: The CSBUS port consists of a CSBUS terminal and a reference GND.

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