Power management method, device and equipment and computer readable storage medium

Abstract

The invention discloses a power management method, device and equipment and a computer readable storage medium, and relates to the technical field of data center power supply, and the method comprises the steps: detecting the voltage of a first type address pin of a power module; the first type address pins of the power supply modules in the power supply frame are connected with the voltage nodes of the voltage division circuit, and the voltage nodes connected with the first type address pins of different power supply modules are different; detecting the level of a second type address pin of the power supply module; and determining the address of the power supply module according to the voltage of the first type of address pins and the level of the second type of address pins, so that a management unit manages the power supply module according to the address. According to the method, address extension can be realized under the conditions that I2C address extension equipment is not used and address pins of the power supply modules are not modified, addresses are allocated to the power supply modules in the power supply frame bodies, and unified management of the cascaded power supply frame bodies is facilitated.

Description

Technical Field

[0001] The present application relates to the field of data center power supply technology, and in particular to a power management method, device, equipment and computer-readable storage medium. Background Art

[0002] Data centers are the infrastructure that supports modern Internet information services and data computing. As demand continues to increase, the energy consumption of computing devices in data centers has increased rapidly, and computing devices need to be centrally powered. Currently, a single power shelf is used to power the cabinet, and the power frame supports multiple PSUs (Power Supply Units, power modules) running in parallel. Or two or more power frames are used to power the cabinet. At present, when two or more power frames are used for power supply, unified management of the power frames cannot be achieved. The important prerequisite for unified management of the power frames is to assign addresses of power modules. Therefore, how to assign addresses of power modules has become a technical problem that needs to be solved urgently by technicians in this field. Summary of the invention

[0003] The purpose of the present application is to provide a power management method, apparatus, device and computer-readable storage medium, which can realize address expansion without using an I2C address expansion device and without modifying the address pin of the power module, and assign addresses to each power module in a power frame, which is conducive to unified management of cascaded power frames.

[0004] To solve the above technical problems, the present application provides a power management method, including:

[0005] Detecting the voltage of the first type address pin of the power module; the first type address pin of the power module in the power frame is connected to the voltage node of the voltage divider circuit, and the first type address pins of different power modules are connected to different voltage nodes;

[0006] Detecting the level of the second type of address pin of the power module;

[0007] The address of the power module is determined according to the voltage of the first-type address pin and the level of the second-type address pin, so that the management unit manages the power module according to the address.

[0008] In some embodiments, determining the address of the power module according to the voltage of the first-type address pin and the level of the second-type address pin includes:

[0009] Determine a first address according to the voltage of the first type of address pin and the corresponding relationship between the voltage and the address; the first address is used to distinguish the power supply module;

[0010] Determine a second address according to the level of the second-category address pin; the second address is used to distinguish the power frame;

[0011] The first address and the second address are combined to determine the address of the power module.

[0012] In some embodiments, determining the second address according to the level of the second-type address pin includes:

[0013] Determine a corresponding logic representation value according to the level of the second type address pin of the power module;

[0014] The second address is obtained by combining the logic representation values ​​according to the order of the second type address pins of the power module.

[0015] In some embodiments, it also includes:

[0016] Detecting the level of the power-on bus; connecting the power-on pins of the power modules in the power frame to the power-on bus;

[0017] If the level of the power-on pin is high, the output is turned on after a preset delay.

[0018] In some embodiments, the number of voltage-dividing resistors in the voltage-dividing circuit is equal to the number of power slots in the power frame; both ends of any voltage-dividing resistor serve as the voltage nodes.

[0019] In some embodiments, the second type of address pin of the power module is connected in series with a pull-up resistor and then connected to a preset voltage, and the second type of address pin of the power module in the power frame is connected in series with a switching device and then grounded, so that when the switching device is turned on, the level of the second type of address pin is a low level, and when the switching device is turned off, the level of the second type of address pin is a high level.

[0020] In some embodiments, the second type address pin of the power module is connected to a preset voltage after being connected in series with a pull-up resistor; wherein, when the number of the second type address pin of the power module is one, the second type address pins of each of the power modules in the power frame are connected in series with one switch device and then grounded, so that when the switch device is turned on, the level of the second type address pin of each of the power modules is a low level, and when the switch device is turned off, the level of the second type address pin of each of the power modules is a high level;

[0021] Alternatively, when the number of the second-type address pins of the power module is one, the second-type address pins of each of the power modules in the power frame are respectively connected in series with a switch device and then grounded, so that when the switch device is turned on, the level of the second-type address pin connected in series with the switch device is a low level, and when the switch device is turned off, the level of the second-type address pin connected in series with the switch device is a high level;

[0022] When the number of the second-class address pins of the power module is two or more, the second-class address pins with the same number of the power modules in the power frame are connected in series with one switch device and then grounded, so that when the switch device is turned on, the levels of the second-class address pins with the same number of the power modules are all low, and when the switch device is turned off, the levels of the second-class address pins with the same number of the power modules are all high;

[0023] Alternatively, when the number of the second-class address pins of the power module is two or more, the second-class address pins of each power module in the power frame are respectively connected in series with a switching device and then grounded, so that when the switching device is turned on, the level of the second-class address pin connected in series with the switching device is a low level, and when the switching device is turned off, the level of the second-class address pin connected in series with the switching device is a high level.

[0024] In order to solve the above technical problems, the present application also provides a power management device, including:

[0025] A first detection unit is used to detect the voltage of the first type address pin of the power module; the first type address pin of the power module in the power frame is connected to the voltage node of the voltage divider circuit, and the first type address pins of different power modules are connected to different voltage nodes;

[0026] A second detection unit, used to detect the level of the second type of address pin of the power module;

[0027] A determination unit is used to determine the address of the power module according to the voltage of the first-category address pin and the level of the second-category address pin.

[0028] In order to solve the above technical problems, the present application also provides a power management device, including:

[0029] Memory for storing computer programs;

[0030] A processor is used to implement the steps of the power management method as described above when executing the computer program.

[0031] In order to solve the above technical problems, the present application also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the power management method described above are implemented.

[0032] The power management method provided in the present application includes: detecting the voltage of the first type of address pin of the power module; connecting the first type of address pin of the power module in the power frame to the voltage node of the voltage divider circuit, and the first type of address pins of different power modules are connected to different voltage nodes; detecting the level of the second type of address pin of the power module; determining the address of the power module according to the voltage of the first type of address pin and the level of the second type of address pin, so that the management unit manages the power module according to the address.

[0033] It can be seen that the power management method provided by the present application provides multiple voltages in a single power frame by means of voltage division, and the multiple voltages can correspond to multiple addresses, so that address expansion can be achieved without using an I2C address expansion device and without modifying the address pins of the power module. In addition, the present application attaches a level to the second-class address pin of the power module, combines the voltage of the first-class address pin with the level of the second-class address pin, and allocates an address to the power module, which is conducive to unified management of each cascaded power frame.

[0034] The power management device, equipment and computer-readable storage medium provided in this application all have the above-mentioned technical effects. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the prior art and the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0036] Figure 1 A schematic diagram of a power management method provided in an embodiment of the present application;

[0037] Figure 2 A schematic diagram of a single power frame power supply system with multiple power modules provided in an embodiment of the present application;

[0038] Figure 3 A schematic diagram of a voltage divider circuit provided in an embodiment of the present application;

[0039] Figure 4 A schematic diagram of a pin pull-up process provided in an embodiment of the present application;

[0040] Figure 5 A schematic diagram of the first type of second type pin connection method provided in an embodiment of the present application;

[0041] Figure 6 A schematic diagram of a second type of second pin connection method provided in an embodiment of the present application;

[0042] Figure 7 A schematic diagram of a third second-type pin connection method provided in an embodiment of the present application;

[0043] Figure 8 A schematic diagram of a fourth second-type pin connection method provided in an embodiment of the present application;

[0044] Fig. 9 A control schematic diagram of simultaneously turning on output of a power module provided in an embodiment of the present application;

[0045] Fig.10 A schematic diagram of a power management device provided in an embodiment of the present application;

[0046] Fig.11 A schematic diagram of a power management device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0047] The core of the present application is to provide a power management method, apparatus, device and computer-readable storage medium, which can realize address expansion without using an I2C address expansion device and without modifying the address pin of the power module, and assign addresses to each power module in the power frame, which is conducive to unified management of cascaded power frames.

[0048] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0049] Please refer to Figure 1 , Figure 1 A schematic diagram of a power management method provided in an embodiment of the present application, refer to Figure 1 As shown, the method includes:

[0050] S101: Detecting the voltage of the first type address pin of the power module; the first type address pin of the power module in the power frame is connected to the voltage node of the voltage divider circuit, and the first type address pins of different power modules are connected to different voltage nodes.

[0051] In this embodiment, a voltage divider circuit is arranged on the power backplane inside the power frame. The voltage divider circuit includes a plurality of voltage divider resistors connected in series, and both ends of any voltage divider resistor serve as voltage nodes. The power frame is provided with a plurality of power slots, and the power slots are used to insert a power module. Each power slot in the power frame corresponds to a voltage node, and different power slots correspond to different voltage nodes. The power module is inserted into the power slot, and the first type address pin of the power module is connected to the voltage node corresponding to the inserted power slot. Different power modules are inserted into different power slots, so that the first type address pins of different power modules in the power frame are connected to different voltage nodes. The voltages of different voltage nodes are different, thereby achieving different voltages of the first type address pins of different power modules. The executor of this embodiment is the power module. After the power module is powered on, the voltage of the first type address pin of the power module is detected.

[0052] Among them, the number of the first type of address pins in the power module can be 1.

[0053] In some embodiments, the number of voltage-dividing resistors in the voltage-dividing circuit is equal to the number of power slots in the power frame; both ends of any voltage-dividing resistor serve as the voltage nodes.

[0054] refer to Figure 2 The schematic diagram of a single power frame power supply system with multiple power modules is shown, and the single power frame power supply system with multiple power modules includes a power module, a management unit, an output return bus ( Figure 2 The management bus includes but is not limited to PMbus and CANbUS. Figure 2 As shown in FIG. 1 , a single power frame includes n power slots, and n power slots can be used to place n power modules from PSU1 to PSUn. Figure 3 As shown, the voltage divider circuit includes n voltage divider resistors from R1 to Rn, the end of R1 connected to a preset voltage (for example, 54V) is a voltage node, the end of R1 connected to R2 is a voltage node, the end of R2 connected to R3 is a voltage node, and so on, the end of Rn-1 connected to Rn is a voltage node, and the end of Rn connected to the ground is a voltage node. Figure 3In the figure, PSU0A0 indicates the first address pin of the power module PSU0, PSU1A0 indicates the first address pin of the power module PSU1, and so on. PSUnA0 indicates the first address pin of the power module PSUn. When the power module PSU0 is inserted into the power slot, the first address pin PSU0A0 of the power module PSU0 is connected between R1 and R2. At this time, the voltage of the first address pin of the power module PSU0 is the preset voltage * (n-1) / n. When the power module PSU1 is inserted into the power slot, the first address pin PSU1A0 of the power module PSU1 is connected between R2 and R3. At this time, the voltage of the first address pin PSU1A0 of the power module PSU1 is the preset voltage * (n-2) / n. By analogy, when the power module PSUn is inserted into the power slot, the first address pin PSUnA0 of the power module PSUn is connected to the grounded end of Rn. At this time, the voltage of the first address pin PSUnA0 of the power module PSUn is the preset voltage * (nn) / n.

[0055] S102: Detect the level of the second type address pin of the power module.

[0056] After the power module is powered on, the voltage of the second type address pin of the power module is detected. The number of the second type address pins of the power module is determined according to the number of cascaded power frames, so that the voltage levels of the second type address pins of each power module in the same power frame are the same, and the voltage levels of the second type address pins of the power modules in different power frames are not completely the same. When two power frames are cascaded, the number of the second type address pins of the power module is at least 1. When three or four power frames are cascaded, the number of the second type address pins of the power module is at least 2. When five to eight power frames are cascaded, the number of the second type address pins of the power module is at least 3. And so on.

[0057] For example, when two power frames are cascaded, the power module has one second-class address pin, recorded as PINA1. Among them, the level of the second-class address pin PINA1 of each power module in the first power frame is high, and the level of the second-class address pin PINA1 of each power module in the second power frame is low. When three power frames are cascaded, the power module has two second-class address pins, one second-class address pin recorded as PINA1, and one second-class address pin recorded as PINA2. The second-class address pins PINA1 and PINA2 of each power module in the first power frame are both high. The second-class address pins PINA1 and PINA2 of each power module in the second power frame are both low. The second-class address pin PINA1 of each power module in the third power frame is high, and the second-class address pin PINA2 is low.

[0058] It should be noted that the description of the first type of address pins and the second type of address pins is to distinguish different address pins, and the first type and the second type are not used as limitations on order, quantity, etc. Address pins are pins used to determine addresses.

[0059] In some embodiments, the second type of address pin of the power module is connected in series with a pull-up resistor and then connected to a preset voltage, and the second type of address pin of the power module in the power frame is connected in series with a switching device and then grounded, so that when the switching device is turned on, the level of the second type of address pin is a low level, and when the switching device is turned off, the level of the second type of address pin is a high level.

[0060] The second type of address pins of the power module can be pulled up to a preset voltage inside the power module, for example Figure 4 As shown, the second type address pin of the power module is pulled up to 3.3V inside the power module. In the power frame, the second type address pin of the power module is connected in series with a switch device and then grounded. When the switch device is turned on, the level of the second type address pin is low, and when the switch device is turned off, the level of the second type address pin is high. In this way, a fixed level can be attached to the second type address pin of the power module by controlling the switch device to turn on or off. The switch device can be a dip switch, etc.

[0061] In some embodiments, the second type address pin of the power module is connected in series with a pull-up resistor and then connected to a preset voltage; wherein, when the number of the second type address pin of the power module is one, the second type address pins of each of the power modules in the power frame are connected in series with a switch device and then grounded, so that when the switch device is turned on, the level of the second type address pin of each of the power modules is a low level, and when the switch device is turned off, the level of the second type address pin of each of the power modules is a high level.

[0062] For example, Figure 5 As shown, when the number of the second type address pins of the power module is one, the second type address pins (A1) of each power module in the power frame are connected and then connected in series with a dip switch and then grounded. When the dip switch is turned on, the level of the second type address pins of each power module is low level, and when the dip switch is turned off, the level of the second type address pins of each power module is high level.

[0063] Alternatively, when the number of the second-class address pins of the power module is one, the second-class address pins of each power module in the power frame are respectively connected in series with a switching device and then grounded, so that when the switching device is turned on, the level of the second-class address pin connected in series with the switching device is a low level, and when the switching device is turned off, the level of the second-class address pin connected in series with the switching device is a high level.

[0064] For example, Figure 6 As shown in the figure, when the number of the second type address pins of the power module is one, the second type address pins (A1) of each power module in the power frame are connected in series with a dip switch and then grounded. When a dip switch is turned on, the level of the second type address pin connected in series with the dip switch is a low level. When a dip switch is turned off, the level of the second type address pin connected in series with the dip switch is a high level.

[0065] contrast Figure 5 and Figure 6 It can be seen that Figure 5 The corresponding method can greatly simplify the circuit structure. Therefore, when the number of the second-class address pins of the power module is one, it is preferred to adopt a method in which the second-class address pins of each power module in the power frame are connected in series with a switching device and then grounded.

[0066] When the number of the second-class address pins of the power module is two or more, the second-class address pins with the same number of the power modules in the power frame are connected to each other and then connected in series with a switch device and then grounded, so that when the switch device is turned on, the levels of the second-class address pins with the same number of the power modules are all low, and when the switch device is turned off, the levels of the second-class address pins with the same number of the power modules are all high.

[0067] For example, Figure 7 As shown, the second-class address pins numbered A1 of each power module in the power frame are connected to each other and then connected in series with a dial switch and then grounded. When the dial switch is turned on, the level of the second-class address pins numbered A1 of each power module is a low level; when the dial switch is turned off, the level of the second-class address pins numbered A1 of each power module is a high level. The second-class address pins numbered A2 of each power module in the power frame are connected to each other and then connected in series with a dial switch and then grounded. When the dial switch is turned on, the level of the second-class address pins numbered A2 of each power module is a low level; when the dial switch is turned off, the level of the second-class address pins numbered A2 of each power module is a high level.

[0068] Alternatively, when the number of the second-class address pins of the power module is two or more, the second-class address pins of each power module in the power frame are respectively connected in series with a switching device and then grounded, so that when the switching device is turned on, the level of the second-class address pin connected in series with the switching device is a low level, and when the switching device is turned off, the level of the second-class address pin connected in series with the switching device is a high level.

[0069] For example, refer to Figure 8 As shown, the second type address pins numbered A1 of each power module in the power frame are connected in series with a dip switch and then grounded. The second type address pins numbered A2 of each power module in the power frame are connected in series with a dip switch and then grounded. When a dip switch is turned on, the level of the second type address pin connected in series with the dip switch is a low level; when a dip switch is turned off, the level of the second type address pin connected in series with the dip switch is a high level.

[0070] contrast Figure 7 and Figure 8 It can be seen that Figure 7 The corresponding method can greatly simplify the circuit structure. Therefore, when the number of the second-class address pins of the power module is two or more, it is preferred to adopt a method in which the second-class address pins with the same number of the power modules in the power frame are connected in series with a switching device and then grounded.

[0071] S103: Determine the address of the power module according to the voltage of the first-type address pin and the level of the second-type address pin, so that the management unit manages the power module according to the address.

[0072] Different power modules have different corresponding addresses. The power supply determines the address of the power module according to the voltage of the first address pin and the level of the second address pin, and further informs the management unit of the address through the management bus so that the management unit manages the power module according to the address.

[0073] In some embodiments, determining the address of the power module according to the voltage of the first-type address pin and the level of the second-type address pin includes:

[0074] Determine a first address according to the voltage of the first type of address pin and the corresponding relationship between the voltage and the address; the first address is used to distinguish the power supply module;

[0075] Determine a second address according to the level of the second-category address pin; the second address is used to distinguish the power frame;

[0076] The first address and the second address are combined to determine the address of the power module.

[0077] The first address is used to distinguish the power modules in the same power frame. The correspondence between voltage and address is established in advance. After the voltage of the first type address pin of the power module is detected, the first address of the power module is determined according to the voltage of the first type address pin and the correspondence between voltage and address. The number of digits of the first address is determined according to the number of power slots in the power frame, and the first addresses corresponding to different power modules in the power frame are different. For example, when the number of power slots in the power frame is 8, that is, 8 power modules can be placed in the power frame, the number of digits of the first address is 3, the first address corresponding to the preset voltage * (n-1) / n is 000, the first address corresponding to the preset voltage * (n-2) / n is 001, the first address corresponding to the preset voltage * (n-3) / n is 010, and so on, n takes the value of 8. That is, when the number of power slots in the power frame is 8, the range of the first address of the power module in the power frame is 000 to 111.

[0078] The second address is used to distinguish the power frame. After the level of the second type address pin of the power module is detected, the second address is determined according to the level of the second type address pin.

[0079] In some embodiments, determining the second address according to the level of the second-category address pin includes:

[0080] Determine a corresponding logic representation value according to the level of the second type address pin of the power module;

[0081] The second address is obtained by combining the logic representation values ​​according to the order of the second type address pins of the power module.

[0082] If the level of the second type address pin of the power module is high, the corresponding logic representation value is 1; if the level of the second type address pin of the power module is low, the corresponding logic representation value is 0.

[0083] For example, when the number of the second-class address pins is 1, if the level of the second-class address pin is high, the corresponding logic value is 1, and the second address is 1; if the level of the second-class address pin is low, the corresponding logic value is 0, and the second address is 0. When the number of the second-class address pins is 2, if the levels of the two second-class address pins are both high, the logic values ​​corresponding to the levels of the two second-class address pins are both 1, and the second address is 11; if the levels of the two second-class address pins are both low, the logic values ​​corresponding to the levels of the two second-class address pins are both 0, and the second address is 00. If the level of one of the second-class address pins (recorded as PINA1) is high, the corresponding logic value is 1, and the level of the other second-class address pin (recorded as PINA2) is low, the corresponding logic value is 0. If PINA1 is in the first order and PINA2 is in the last order, the second address is 10. And so on.

[0084] The first address and the second address are combined to determine the address corresponding to the power module. The second address can be placed before the first address to obtain the address of the power module. For example, if the first address is 000 and the second address is 1, the address of the power module is 1000.

[0085] When two power frames are cascaded, each power frame includes 8 power modules, and each power module includes a first-class address pin and a second-class address pin. The first address ranges from 000 to 111 determined by the voltage of the first-class address pin, and the second address determined by the second-class address pin includes 0 and 1. Therefore, when the power module has only two address pins, expansion of 16 addresses can be achieved.

[0086] In some embodiments, it also includes:

[0087] Detecting the level of the power-on bus; connecting the power-on pins of the power modules in the power frame to the power-on bus;

[0088] If the level of the power-on pin is high, the output is turned on after a preset delay.

[0089] The power supply of a single power frame is independent. When the cabinet is powered on, the power supply of the power frame cannot be guaranteed to be carried out at the same time. If the power module in the power frame that is powered on first directly turns on the output, it may not be able to meet the power supply of the entire cabinet. In view of this, the present embodiment sets a power pin for the power module, and the power pins of each power module in the power frame are connected, and each power module in each power frame is connected to the power bus. When there is no power module inserted into the power slot in the power frame, the power pin is left floating and is at a high level. When the power module is inserted into the power slot but not powered on, the power pin is at a low level. When the power module is inserted into the power slot and powered on, the power pin is set to a high level. If multiple power frames are connected in parallel and any power module is not powered on, the power bus is at a low level. When all power modules are powered on, the power bus is at a high level. Fig. 9 As shown, when the power module detects that the power bus is at a high level, it delays for a preset time, such as 10ms, and turns on the output, thereby ensuring that all power modules turn on the output at the same time, avoiding the risk that the power module turned on first cannot carry the load of the entire cabinet due to the power frame not being able to be powered on at the same time. Furthermore, to avoid affecting the running power module, after the power module turns on the output, the signal of the power pin is no longer used for control.

[0090] In addition, in some embodiments, it also includes:

[0091] If the duration of the low level of the power-on bus reaches a preset threshold, the power supply abnormality is reported to the management unit.

[0092] If the power-on bus level is continuously at a low level, the power module may report the power supply anomaly to the management unit so that the management unit can make a corresponding decision accordingly.

[0093] In some embodiments, it also includes:

[0094] Report the power-on status of the power module to the management unit.

[0095] After the power module is powered on, it can report its power-on status to the management unit. The management unit can learn the number of powered-on power modules. When the power-on bus level is continuously low, if the number of powered-on power modules reaches a preset value, the management unit can control each powered-on power module to start output so as to supply power to the cabinet in time.

[0096] In addition to address allocation, multiple power frames need to be cascaded and necessary connections need to be made, such as connecting the current sharing bus and I2C communication cables. RJ45 can be used for power frame cascading.

[0097] In summary, the power management method provided by the present application provides multiple voltages in a single power frame by means of voltage division, and the multiple voltages can correspond to multiple addresses, so that address expansion can be achieved without using an I2C address expansion device or modifying the address pins of the power module. In addition, the present application attaches a level to the second-class address pins of the power module, combines the voltage of the first-class address pins with the level of the second-class address pins, and allocates an address to the power module, which is conducive to unified management of the cascaded power frames.

[0098] The present application also provides a power management device, and the device described below can be referred to in correspondence with the method described above. Fig.10 , Fig.10 A schematic diagram of a power management device provided in an embodiment of the present application, combined with Fig.10 As shown, the device comprises:

[0099] The first detection unit 10 is used to detect the voltage of the first type address pin of the power module; the first type address pin of the power module in the power frame is connected to the voltage node of the voltage divider circuit, and the first type address pins of different power modules are connected to different voltage nodes;

[0100] A second detection unit 20, used to detect the level of the second type of address pin of the power module;

[0101] The determination unit 30 is used to determine the address of the power module according to the voltage of the first-type address pin and the level of the second-type address pin.

[0102] Based on the above embodiment, as a specific implementation, the determining unit 30 includes:

[0103] A first determination subunit, used to determine a first address according to the voltage of the first type of address pin and the corresponding relationship between the voltage and the address; the first address is used to distinguish the power supply module;

[0104] A second determining subunit, used to determine a second address according to the level of the second type address pin; the second address is used to distinguish the power frame;

[0105] A combining unit is used to combine the first address and the second address to determine the address of the power module.

[0106] Based on the above embodiment, as a specific implementation manner, the second determining subunit includes:

[0107] A logic representation value determination subunit, used to determine a corresponding logic representation value according to the level of the second type address pin of the power module;

[0108] The logic representation value combination subunit is used to combine the logic representation values ​​according to the order of the second type address pins of the power module to obtain the second address.

[0109] Based on the above embodiment, as a specific implementation method, it also includes:

[0110] A third detection unit is used to detect the level of the power-on bus; the power-on pins of the power modules in the power frame are connected to the power-on bus;

[0111] The delayed output unit is used to start the output after a preset delay if the level of the power-on pin is a high level.

[0112] Based on the above embodiment, as a specific implementation method, the number of voltage-dividing resistors in the voltage-dividing circuit is equal to the number of power slots in the power frame; and both ends of any voltage-dividing resistor serve as the voltage nodes.

[0113] On the basis of the above embodiments, as a specific implementation method, the second type of address pin of the power module is connected in series with a pull-up resistor and then connected to a preset voltage, and the second type of address pin of the power module in the power frame is connected in series with a switch device and then grounded, so that when the switch device is turned on, the level of the second type of address pin is a low level, and when the switch device is turned off, the level of the second type of address pin is a high level.

[0114] On the basis of the above embodiment, as a specific implementation method, the second type address pin of the power module is connected in series with a pull-up resistor and then connected to a preset voltage; wherein, when the number of the second type address pin of the power module is one, the second type address pins of each of the power modules in the power frame are connected in series with one switch device and then grounded, so that when the switch device is turned on, the level of the second type address pin of each of the power modules is a low level, and when the switch device is turned off, the level of the second type address pin of each of the power modules is a high level;

[0115] Alternatively, when the number of the second-type address pins of the power module is one, the second-type address pins of each of the power modules in the power frame are respectively connected in series with a switch device and then grounded, so that when the switch device is turned on, the level of the second-type address pin connected in series with the switch device is a low level, and when the switch device is turned off, the level of the second-type address pin connected in series with the switch device is a high level;

[0116] When the number of the second-class address pins of the power module is two or more, the second-class address pins with the same number of the power modules in the power frame are connected in series with one switch device and then grounded, so that when the switch device is turned on, the levels of the second-class address pins with the same number of the power modules are all low, and when the switch device is turned off, the levels of the second-class address pins with the same number of the power modules are all high;

[0117] Alternatively, when the number of the second-class address pins of the power module is two or more, the second-class address pins of each power module in the power frame are respectively connected in series with a switching device and then grounded, so that when the switching device is turned on, the level of the second-class address pin connected in series with the switching device is a low level, and when the switching device is turned off, the level of the second-class address pin connected in series with the switching device is a high level.

[0118] The present application also provides a power management device, referring to Fig.11 As shown, the device includes a memory 1 and a processor 2 .

[0119] Memory 1, used for storing computer programs;

[0120] Processor 2 is used to execute the computer program to implement the following steps:

[0121] Detecting the voltage of the first type address pin of the power module; the first type address pin of the power module in the power frame is connected to the voltage node of the voltage divider circuit, and the first type address pins of different power modules are connected to different voltage nodes;

[0122] Detecting the level of the second type of address pin of the power module;

[0123] The address of the power module is determined according to the voltage of the first-type address pin and the level of the second-type address pin, so that the management unit manages the power module according to the address.

[0124] For an introduction to the equipment provided in this application, please refer to the above method embodiments, and this application will not go into details here.

[0125] The present application also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the following steps can be implemented:

[0126] Detecting the voltage of the first type address pin of the power module; the first type address pin of the power module in the power frame is connected to the voltage node of the voltage divider circuit, and the first type address pins of different power modules are connected to different voltage nodes;

[0127] Detecting the level of the second type of address pin of the power module;

[0128] The address of the power module is determined according to the voltage of the first-type address pin and the level of the second-type address pin, so that the management unit manages the power module according to the address.

[0129] The computer-readable storage medium may include: a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and other media that can store program codes.

[0130] For an introduction to the computer-readable storage medium provided in this application, please refer to the above method embodiment, and this application will not go into details here.

[0131] The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other. For the devices, equipment, and computer-readable storage media disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple, and the relevant parts can be referred to the method part description.

[0132] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0133] The steps of the method or algorithm described in conjunction with the embodiments disclosed herein may be implemented directly using hardware, a software module executed by a processor, or a combination of the two. The software module may be placed in a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

[0134] The power management method, device, equipment and computer-readable storage medium provided by the present application are described in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core idea of ​​the present application. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the present application.

Claims

1. A power management method, characterized in that: include: Detecting the voltage of the first type address pin of the power module; the first type address pin of the power module in the power frame is connected to the voltage node of the voltage divider circuit, and the first type address pins of different power modules are connected to different voltage nodes; Detecting the level of the second type of address pin of the power module; The address of the power module is determined according to the voltage of the first-type address pin and the level of the second-type address pin, so that the management unit manages the power module according to the address.

2. The power management method according to claim 1, characterized in that: Determining the address of the power module according to the voltage of the first-type address pin and the level of the second-type address pin includes: Determine a first address according to the voltage of the first type of address pin and the corresponding relationship between the voltage and the address; the first address is used to distinguish the power supply module; Determine a second address according to the level of the second-category address pin; the second address is used to distinguish the power frame; The first address and the second address are combined to determine the address of the power module.

3. The power management method according to claim 2, characterized in that: Determining the second address according to the level of the second-category address pin includes: Determine a corresponding logic representation value according to the level of the second type address pin of the power module; The second address is obtained by combining the logic representation values ​​according to the order of the second type address pins of the power module.

4. The power management method according to any one of claims 1 to 3, characterized in that: Also includes: Detecting the level of the power-on bus; connecting the power-on pins of the power modules in the power frame to the power-on bus; If the level of the power-on pin is high, the output is turned on after a preset delay.

5. The power management method according to claim 1, characterized in that: The number of the voltage-dividing resistors in the voltage-dividing circuit is equal to the number of the power slots in the power frame; both ends of any voltage-dividing resistor serve as the voltage nodes.

6. The power management method according to claim 1, characterized in that: The second type of address pin of the power module is connected in series with a pull-up resistor and then connected to a preset voltage, and the second type of address pin of the power module in the power frame is connected in series with a switch device and then grounded, so that when the switch device is turned on, the level of the second type of address pin is a low level, and when the switch device is turned off, the level of the second type of address pin is a high level.

7. The power management method according to claim 6, characterized in that: The second type address pin of the power module is connected to a preset voltage after being connected in series with a pull-up resistor; wherein, when the number of the second type address pin of the power module is one, the second type address pins of each of the power modules in the power frame are connected in series with one switch device and then grounded, so that when the switch device is turned on, the level of the second type address pin of each of the power modules is a low level, and when the switch device is turned off, the level of the second type address pin of each of the power modules is a high level; Alternatively, when the number of the second-type address pins of the power module is one, the second-type address pins of each of the power modules in the power frame are respectively connected in series with a switch device and then grounded, so that when the switch device is turned on, the level of the second-type address pin connected in series with the switch device is a low level, and when the switch device is turned off, the level of the second-type address pin connected in series with the switch device is a high level; When the number of the second-class address pins of the power module is two or more, the second-class address pins with the same number of the power modules in the power frame are connected in series with one switch device and then grounded, so that when the switch device is turned on, the levels of the second-class address pins with the same number of the power modules are all low, and when the switch device is turned off, the levels of the second-class address pins with the same number of the power modules are all high; Alternatively, when the number of the second-class address pins of the power module is two or more, the second-class address pins of each power module in the power frame are respectively connected in series with a switching device and then grounded, so that when the switching device is turned on, the level of the second-class address pin connected in series with the switching device is a low level, and when the switching device is turned off, the level of the second-class address pin connected in series with the switching device is a high level.

8. A power management device, characterized in that: include: A first detection unit is used to detect the voltage of the first type address pin of the power module; the first type address pin of the power module in the power frame is connected to the voltage node of the voltage divider circuit, and the first type address pins of different power modules are connected to different voltage nodes; A second detection unit, used to detect the level of the second type of address pin of the power module; The determination unit is used to determine the address of the power module according to the voltage of the first-type address pin and the level of the second-type address pin, so that the management unit manages the power module according to the address.

9. A power management device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the power management method according to any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the power management method according to any one of claims 1 to 7 are implemented.

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