Deterministic control of sensor-based electric machine

Abstract

An electronic circuit may be configured to obtain an input including one or more Hall sensor readings, determine a current motor position based on the input and a first lookup table, determine a desired motor position based on the first lookup table with respect to the current motor position, and determine a desired motor position based on the desired motor position. A pulse width modulation (PWM) commutation pattern is determined based on the desired motor position and the second lookup table, and the PWM commutation pattern is output for a predetermined time from obtaining the input.

Description

Technical Field

[0001] Aspects of the present disclosure relate to motor control and, more particularly, to deterministic sensor-based motor controllers. Background Art

[0002] An electric motor is generally a machine that converts electrical energy into mechanical energy, usually in the form of rotational movement. An electric motor may include a rotor and a stator. The rotor is a rotating component that usually includes coils or permanent magnets, while the stator is a stationary component that usually contains coils that produce a magnetic field. There are a variety of different motor designs. Generally, when an electric current is passed through the coils in the stator, the current through the coils creates a magnetic field that interacts with the magnetic field of the rotor, causing the rotor to rotate.

[0003] Electric motors are used in a variety of applications, including transportation (e.g., turning wheels or turbines). The speed and torque of an electric motor can be controlled by controlling the pattern of current or voltage to the motor. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] The described embodiments and their advantages can be best understood by referring to the following description in conjunction with the accompanying drawings, which in no way limit any changes in form and detail that may be made to the described embodiments by those skilled in the art without departing from the spirit and scope of the described embodiments.

[0005] Figure 1 A hardware-based motor control system for pulse width modulation (PWM) control of a motor is shown in accordance with some embodiments.

[0006] Figure 2 An example of using a hardware-based solution to control a motor according to some embodiments is shown.

[0007] Figure 3 An example method of a hardware-based motor controller with Hall sensor input is shown in accordance with some embodiments.

[0008] Figure 4 A Hall sensor motor control system according to some embodiments is shown.

[0009] Figure 5 An example of a Hall comparison logic block is shown in accordance with some embodiments.

[0010] Figure 6 A flow chart is shown for performing hardware-based motor control using a lookup table according to some embodiments. DETAILED DESCRIPTION

[0011] Examples of various aspects and variations of the subject technology are described herein and are shown in the accompanying drawings. The following description is not intended to limit the invention to these embodiments, but rather to enable those skilled in the art to make and use the invention.

[0012] Controlling an electric motor involves managing the electrical energy supplied to the motor to achieve a desired motion (e.g., a desired speed, direction, torque, or position). Control of an electric motor may be achieved using electronic devices that regulate the amount of electrical energy supplied to the motor, such as a motor controller or driver.

[0013] Methods for controlling motors include variable frequency drives (VFDs), pulse width modulation (PWM), and direct current (DC) voltage control. Motor control using pulse width modulation (PWM) uses a PWM signal to adjust the speed or torque of the motor. PWM involves sending a series of high-frequency pulses (PWM signals) to the motor. Each PWM signal can be applied to a gate drive circuit that controls the current flowing through the power circuit (e.g., ON when the PWM signal is high and OFF when the PWM signal is low). The power circuit is ultimately connected to the electromagnetic circuit of the motor. The energized electromagnetic circuit of the motor can exert a force on the rotor of the motor to give the motor the desired force, thereby moving the motor in the desired direction. Different PWM control modes can be generated and changed over time according to the type of motor or the currently sensed motor position, so that the motor moves continuously to the desired position. Electrical and electronic circuits (e.g., power topology, gate drive circuit, etc.) may vary according to application requirements, the type of motor (e.g., brushless DC motor (BLDC), three-phase AC motor, etc.), etc.

[0014] By regulating the amount of power supplied to the motor, a PWM system can maintain a constant speed even with varying loads, thereby reducing the need for a mechanical speed regulator. PWM motor control provides a powerful and flexible method for regulating the speed and torque of an electric motor. However, PWM control relies on rapid calculation of the current motor position to repeatedly provide an updated PWM signal in order to provide a PWM modulation pattern to drive the motor to the next desired position.

[0015] Sensor-based motor control utilizes dedicated position sensors to infer the motor position. For example, Hall sensors strategically placed on the motor can be used to sense the motor position. The sensor output can be provided to the input of a microcontroller unit (MCU), and an interrupt can be generated to the central processing unit (CPU) of the MCU. Each input event may trigger an interrupt, causing the CPU to react to each interrupt, read the current position of the motor based on the Hall position input, and update the PWM characteristics based on the Hall input for the next PWM cycle. Such CPU interrupts may unnecessarily hinder the operation of the CPU, which may also be responsible for performing multiple other tasks. In addition, depending on the architecture of the CPU, the process may not be deterministic. That is, the CPU may not react within a predetermined time (e.g., within 'x' ms).

[0016] Aspects of the present disclosure include a hardware-based system configured to: obtain an input including one or more Hall sensor readings, determine a current motor position based on the input and a first lookup table, determine a desired motor position based on the first lookup table about the current motor position, determine a pulse width modulation (PWM) commutation pattern based on the desired motor position and a second lookup table; and output a PWM commutation pattern within a predetermined time from obtaining the input. The hardware-based system may include an electronic circuit (e.g., having active and passive electronic components) interconnected to perform the described operations. Such components may include transistors, comparators, memory devices (e.g., registers), power supplies, and other electronic components. The hardware-based system may be deterministic. The hardware-based system may operate separately from a CPU to determine a PWM commutation pattern for each PWM cycle without interrupting the CPU.

[0017] In one embodiment, the system can also detect that the current motor position is in a fault in response to the current motor position not matching one or more criteria. For example, in response to the current motor position not matching any of the previously sensed motor positions or motor positions adjacent to the previously sensed motor positions, the system can determine that a fault has occurred. In response, the system can output a fault signal (e.g., an interrupt) to a central processing unit (CPU) within a predetermined time, or output a safe PWM commutation pattern that is not included in the second lookup table within a predetermined time, or both.

[0018] The system may be configurable by software (e.g., by a CPU). The system may include a programmable memory (e.g., a register) that assigns values ​​to the safe PWM commutation mode so that the software can provide a safe state of the PWM commutation mode for a given application. Similarly, the system may include a programmable memory that assigns values ​​to the first lookup table and the second lookup table (such as a first register and a second register), respectively.

[0019] In some examples, the PWM commutation pattern includes six or more PWM outputs. In some examples, the PWM commutation pattern includes eight PWM outputs.

[0020] In some examples, the first lookup table and the second lookup table are circular lookup tables. In some examples, they are also bidirectional lookup tables. Determining the desired motor position may include incrementing an index of the first lookup table to obtain the desired motor position. In some examples, the index is represented by a pointer. The first lookup table and the second lookup table may share a common pointer and index. Like the rest of the system, the lookup table can be implemented as hardware (e.g., a programmable register).

[0021] In some examples, the system may include a PWM timer. For example, such a system may be integrated with a PWM timer on a system on chip (SOC) to provide an integrated motor control solution. In some examples, the system may be integrated with a microcontroller unit (MCU) including such a PWM timer. A PWM commutation pattern may be routed to a PWM timer, and the PWM timer outputs a plurality of PWM outputs according to the PWM commutation pattern. A PWM timer is a timer that generates a series of square waves (PWM signals) with a variable duty cycle.

[0022] The system may include processing logic to support the described functionality. The processing logic may include hardware, such as circuits, dedicated logic such as one or more logic gates, programmable logic, passive electronic components, active electronic components, registers, and other electronic hardware.

[0023] Figure 1 A hardware-based motor control system 100 for pulse width modulation (PWM) control of a motor according to some embodiments is shown. The system 100 may include one or more sensors 112. The one or more sensors 112 may include a plurality of Hall sensors (e.g., three Hall sensors) strategically arranged on the motor to capture the current position (e.g., rotor position) of the motor. Hall sensors (also known as Hall effect sensors) use the Hall effect to detect the presence and magnitude of a magnetic field. Based on the readings of each Hall sensor and the position of each Hall sensor relative to the rotor of the motor, the system 100 may determine the motor position.

[0024] The Hall input sampler 102 may sample the input of each Hall sensor 112 and obtain a single reading as a "sample" from each Hall input sensor 112. This sample input may be provided to the processing logic 114 as input 110. The sample may represent the reading of each Hall sensor at a common time. The processing logic 114 may obtain the input 110 including a sample of one or more Hall sensor readings.

[0025] At block 104, processing logic 114 may determine the current motor position based on the input and the first lookup table 116. For example, if the input reading 110 includes "X, Y, Z", this may correspond to "2" in the first lookup table 116. The first lookup table 116 may also be referred to as a motor position lookup table 116. The processing logic 114 may determine the desired motor position based on the first lookup table 116 regarding the current motor position. For example, the processing logic 114 may increment a pointer from the current motor position (e.g., "2") to the next motor position (e.g., position "3"), where the next motor position is the desired motor position. In some examples, the position of the motor may be represented by an index into each lookup table.

[0026] At block 106, processing logic 114 may determine a pulse width modulation (PWM) commutation pattern based on the desired motor position and a second lookup table 118. The second lookup table 118 may be referred to as a PWM lookup table 118. The PWM lookup table may include a unique PWM commutation pattern corresponding to each position specified in the lookup table 116. For example, the motor may be driven using a PWM commutation pattern at position "3" of the lookup table 118 (which may correspond to index 3). This position "3" may correspond to position "3" of the lookup table 116. The motor may be driven to the next position specified at index 3 of the lookup table 116 using a PWM commutation pattern at index 3 of the lookup table 118. Each index of the PWM lookup table 118 may include a unique set of outputs, for example, index 2 of 118 may include six PWM signals (1, 0, 1, 0, 1, 0), index 1 may include (1, 1, 1, 0, 0, 0), and so on. The pattern may vary depending on the topology of the motor, power stage, or other considerations.

[0027] The processing logic 114 can output a PWM commutation pattern 120. The operations described for a given input 110 can be performed within a predetermined time from the time the input is obtained. Therefore, the processing logic 114 can be referred to as deterministic, with a reliable hardware-based response time. In some examples, the PWM commutation pattern 120 includes at least six PWM output signals. In some examples, the PWM commutation pattern includes eight PWM output signals. In various other embodiments, the PWM commutation pattern can include more or less than six or eight PWM output signals.

[0028] At block 104, processing logic may detect that the current motor position is in a fault in response to the current motor position by comparing the current sensed motor position (provided by input 110) to a previously sensed motor position or a motor position adjacent to a previously sensed motor position. For example, if the previous and last sensed motor position is "5", the processing logic may check whether the current sensed motor position is the same as "5", or "4", or "0". If the current motor position has remained the same since the last position, this may indicate that the motor has not moved or has not moved enough from the last position. If the motor position has moved forward one position, this may indicate that the motor has moved to the expected motor position. If the motor position has moved backward one position, this may indicate that the motor position has switched directions. If the current motor position is not one of these positions (e.g., "5", "4", or "0"), the processing logic may treat this as an indication that a fault (e.g., a failure) has occurred. In response to detecting a fault, the processing logic may output a fault signal (e.g., an interrupt) to a central processing unit (CPU) within a predetermined time, or output a safe PWM commutation mode that is not included in the second lookup table, or both. The safe PWM commutation mode may be a programmable mode. For example, such a safe mode may be set by a register exposed to software (e.g., a CPU) to allow the software to set different “safe states” for different applications.

[0029] Similarly, the processing logic 114 may include a programmable memory that assigns values ​​to the first lookup table 116 and the second lookup table 118 (such as a first register and a second register). Software may program the corresponding lookup tables (LUTs) at initialization, or after a fault, or in response to a change of direction. By exposing the programmable memory of the lookup tables, the processing logic 114 provides a flexible solution that can be customized for different applications.

[0030] In some examples, the first lookup table 116 and the second lookup table 118 are circular lookup tables. These lookup tables can also be bidirectional lookup tables, and the processing logic 114 can determine what motor position corresponds to a given Hall input, or determine what Hall input corresponds to a given motor position. Determining the desired motor position can include incrementing the index of the first lookup table to obtain the desired motor position. In some examples, the index is represented by a pointer. The first lookup table and the second lookup table can share a common pointer and index. Assuming that the processing logic determines that the current motor position is consistent with expectations, the processing logic can increment the index (directly move the index to the next motor position in the lookup table 116) while incrementing the index at the PWM lookup table 118.

[0031] At block 106, processing logic 114 can obtain the PWM output modulation pattern pointed to by the incremented index and provide it as output 120. In some examples, output 120 includes a high / low indicator for each PWM signal for the upcoming PWM cycle. In other examples, output 120 can include a duty cycle for each PWM signal.

[0032] The PWM timer 108 can receive the output 120 and output a corresponding PWM signal, where the state of each signal (e.g., high or low) is defined by the output 120. The duty cycle can be understood as the ratio of the time that the waveform is high to the total time period of the waveform. The PWM timer 108 can include a counter that generates a series of pulses at a fixed frequency, which is usually higher than the frequency of the desired output waveform. The duration of each pulse (i.e., the "on" time) can be controlled by a circuit that compares the value of the counter with a preset value called the "duty cycle". When the counter value is less than the duty cycle, the output of the circuit of the PWM timer 108 goes high, and the output waveform is high. When the counter value is greater than the duty cycle, the output of the circuit of the PWM timer 108 goes low, and the output waveform is low.

[0033] In some examples, the processing logic 114 or the Hall input sampler 102 or both can be integrated with the PWM timer 108 in a common housing (e.g., on a system on a chip (SOC)) to provide an integrated motor control solution. In some examples, the system can be integrated with a microcontroller unit (MCU) in a common housing that includes such a PWM timer 108, processing logic 114, and Hall input sampler 102.

[0034] Figure 2 An example of controlling a motor using a hardware-based solution according to some embodiments is shown. The motor 212 may include various motor components such as a stator, a rotor, and an electromagnetic circuit to move the rotor using electromagnetic force. The motor 212 may include a Hall sensor 214 arranged at one or more fixed positions to encode the position of the motor 212 using the Hall effect.

[0035] The sensor signal may be provided to a microcontroller unit (MCU) 202. The microcontroller unit (MCU) 202 may include a Hall sensor sampler 210, a CPU 204, a motor control circuit 206, and a PWM timer 208. The sensor signal may be sampled at block 210 and provided to the motor control circuit 206 as an input.

[0036] The motor control circuit 206 may correspond to the processing logic 114. The motor control circuit may include electronic components (e.g., non-CPU components) configured to perform the operations described with respect to the processing logic 114. The motor control circuit 206 may receive a current sensed position of the motor 212 and determine an output modulation mode using a LUT, as described. For example, the motor control circuit 206 may determine the current sensed position using a first LUT. If the current sensed position is deemed consistent with expectations, the motor control circuit 206 may determine an output modulation mode including a state (or duty cycle) of each of the plurality of PWM signals using a second LUT.

[0037] The output modulation pattern from the motor control circuit 206 can be provided to the PWM timer 208, which generates a PWM signal 220 as defined by the output modulation pattern. Each of the PWM signals can drive a corresponding gate drive circuit 216. Each gate drive circuit may include one or more intermediate components (e.g., semiconductors, capacitors, resistors, etc.) that convert the PWM signal into a suitable drive signal. The drive signal can be coupled to the power semiconductor (e.g., MOSFET, IGBT, etc.) of the power stage 218, and the power stage 218 is "turned on" or "turned off" according to the state of the drive signal and the PWM signal. The topology of the power stage 218 can vary depending on the type of motor (e.g., BLDC motor, AC induction motor, etc.), efficiency, motor speed, or other considerations. Depending on the pattern of the PWM signal 220, the electromagnetic force generated from the power stage 218 to the motor 212 can pull or push the rotor of the motor 212 to the desired position.

[0038] With such an architecture, the CPU 204 can be exempted from the operation of determining the PWM signal 220 based on the input from the Hall sensor 214. The CPU 204 can perform other high-level operations. The CPU 204 can perform various operations referred to as "software" herein. One or more communication lines 222 can exist between the CPU 204 and the motor control circuit 206. The CPU 204 can use these communication lines 222 to program settings in the motor control circuit 206, including programming the first or second LUT of the motor control circuit 206, or programming a safe PWM mode in the event of a fault. The motor control circuit 206 can also send one or more signals (e.g., interrupts) to the CPU 204 via the communication lines 222. Such signals can indicate whether a fault exists, or whether the motor 212 changes direction, or other conditions to which the CPU 204 can be configured to respond.

[0039] As described, the motor control circuit 206 can rely on hardware rather than software to analyze the Hall inputs and respond accordingly by generating a modulation pattern for the next desired motor position or by generating a fault. In either case, the motor control circuit 206 can operate deterministically within a predefined time so that the timing of the response can be relied upon.

[0040] Figure 3 An example method 300 of a hardware-based motor controller with Hall sensor inputs according to one embodiment is shown. The method may be performed by processing logic, which may include hardware (e.g., circuits, dedicated logic, programmable logic, processors, processing devices, central processing units (CPUs), systems on a chip (SoCs), etc.), software (e.g., instructions running / executing on a processing device), firmware (e.g., microcode), or a combination thereof. In some examples, the processing logic may include a hardware-based solution rather than a software-based solution (e.g., a CPU).

[0041] Method 300 illustrates example functionality used by various embodiments. Although specific functional blocks ("blocks") are disclosed in method 300, these blocks are examples. That is, embodiments are well suited to executing various other blocks or variations of the blocks described in method 300. It should be understood that the blocks in method 300 may be executed in an order different from the order presented, and not all blocks in method 300 may be executed.

[0042] At block 302, processing logic obtains input including one or more Hall sensor readings. As discussed, the Hall sensor readings may be sampled from Hall sensors arranged to sense a magnetic field at a given location. Multiple readings captured simultaneously (at the same time) at different locations may be decoded to determine the position (e.g., rotation) of the motor.

[0043] At block 304, processing logic determines the current motor position based on the input and the first lookup table. The first lookup table can map or decode the Hall readings to a given motor position. For example, the first lookup table can include multiple indexes, each index having a combination of stored Hall sensing readings. The index can correspond to the position of the motor.

[0044] At block 306, processing logic determines the expected motor position based on the first lookup table for the current motor position. For example, if the current motor position matches the expected motor position, processing logic may increment a pointer of the first lookup table. The updated pointer may point to a new expected position of the motor, which may be the next motor position (relative to the pointer position before incrementing).

[0045] At block 308, processing logic determines a PWM commutation pattern based on the desired motor position and the second lookup table. For example, the same pointer incremented at block 306 may also point to a corresponding index at the second lookup table. Processing logic may retrieve the commutation pattern stored in the second lookup table at the updated index position and use the commutation pattern as the PWM commutation pattern to obtain the desired motor position.

[0046] At block 310, the processing logic outputs a PWM commutation pattern within a predetermined time from obtaining the input. This deterministic operation may result from a hardware-based solution for the processing logic. The described operations may be performed without a CPU, except during initialization of each lookup table.

[0047] Figure 4 A Hall sensor motor control system according to some embodiments is shown. The Hall sensor motor control system 400 may include three main loops: detection of updates in the Hall input, delay between detection and sampling of the Hall input for comparison with the expected Hall pattern, and update of the PWM modulation pattern. The Hall input 402 can be directly connected to the edge detection circuit via sampling logic 420. An event is generated at the transition detection circuit 404. The event can be connected to a timer / counter / PWM (TCPWM) counter via a trigger multiplexer, which controls the delay between the next step on the edge detection and the Hall sensor pattern, the sampling of the Hall input. The system 400 may correspond to a hardware-based motor control solution, such as, for example, the motor control circuit 206 or processing logic 114 as described in other sections.

[0048] The signal used to trigger the sampling of the Hall input can be active at the rising edge or the falling edge (PCONF.SPES). The application software (e.g., CPU) can also issue / request samples of the Hall input by writing 1B to the HIST.HIS field 406, which can be used generally for startup. When a sampling trigger is sensed, the Hall input is stored and compared to the current mode HALP.HCP 408, the expected Hall pattern HALP.HEP 410, and the previous mode HALP.HPP 412.

[0049] In some examples, the previous mode comparison can be disabled. The edge detection circuit 404 generates an enable signal for sampling the Hall input PIFHSP, and the sampling logic 420 generates a pulse PIFHRDY each time a new value is captured, which is used within the Hall mode comparison logic 414. The external sampling trigger can also be bypassed by setting the HMEC.HDBP bit field to 1B. If a Hall transition is detected, this will trigger an immediate sampling of the Hall input after the filtering stage. The Hall input 402 is also sampled once a rising edge occurs on the MOTIF start bit. After the LPF output is valid, the software can check to start the MOTIF.

[0050] When the sampled value matches the expected Hall pattern (e.g., stored as 410), an event / pulse is generated - a correct Hall event - to indicate that the sampled pattern matches the expected pattern. At the same time, the value programmed into the shadow register is loaded. HALP.HCP[LSB] is linked to Hall input 1, and HALP.HCP[MSB] is linked to Hall input 3 (the same applies to the HALP.HEP register). Updates to fields HALP.HCP, HALP.HEP, and HALP.HPP can come from software. Software can write 1B to MCMS.STHR. When the sampled value matches the current Hall pattern (e.g., stored in register 408), the Hall pattern comparison can determine that a line glitch has occurred and no action is taken. In addition to the comparison with the current Hall pattern, the Hall pattern comparison logic 414 can also use a third comparison rule - the previous Hall pattern (stored in register 412). This rule can be enabled by setting the HMEC.HPPE bit field to 1B. With this comparison, if the sampled pattern matches the value programmed in HALP.HPP, no false Hall events are generated. This is important when the motor is in a stationary position where insufficient torque may be applied to believe that a previous Hall pattern was detected at the MOTIF input.

[0051] When the sampled value does not match any value (current, expected, and previous pattern), the Hall pattern comparison logic 414 can determine that a significant error has occurred and can generate a "false Hall event" signal. Whenever the sampled pattern results in a false Hall event, or when the sampled pattern matches the current pattern or the previous pattern (this mode can be enabled or disabled), a "pattern mismatch" event 418 is generated and can be forwarded to one of the module output pins via the output selector 416.

[0052] Figure 5An example of a Hall comparison logic block according to some embodiments is shown. The Hall comparison logic 500 may include electronic circuitry configured as shown to receive various inputs (e.g., Hall previous pattern, Hall current pattern, sampled pattern, and Hall expected pattern) and then direct the signal to the output selection block 502.

[0053] In some examples, the Hall comparison logic 500 and the output selection block 502 can correspond to the Hall pattern comparison 414 and the output selector 416 .

[0054] The Hall comparison logic 500 can operate in a lookup table (LUT) mode based on the control of register 504. This mode is intended to reduce the CPU load for typical motor control phase commutation in a semi-autonomous manner. The lookup table (LUT) mode is a completely hardware-based feedback control loop that can be assisted by software (e.g., to provide values ​​to the LUT at initialization). When the motors are running in the same direction, the Hall comparison logic 500 and the output selection block 502 can fully control the multi-channel mode output (e.g., PWM commutation mode).

[0055] The output pattern can be obtained from a preloaded LUT (e.g., PWM lookup table 118), which can be initialized by software (e.g., CPU). When the motor changes direction, the system can be stopped and the LUT (e.g., motor position lookup table 116, PWM lookup table 118) can be reinitialized by software. The system can be resumed again. The LUT can be initialized by filling the LUT's memory (e.g., one or more registers) with values, where these values ​​can define the values ​​and sequence of the motor position (e.g., motor position lookup table 116) or the values ​​and sequence for the corresponding PWM commutation pattern (e.g., PWM lookup table 118).

[0056] The motor position lookup table 116 may also be referred to as a Hall LUT (HLUT) or an input LUT, and the PWM lookup table 118 may also be referred to as a modulation LUT (MLUT) or an output LUT. The HLUT may include a Hall input pattern loaded into the HALP register by software, and the MLUT may include an output PWM modulation pattern loaded into the MCM.MCMP register. In some examples, the HLUT includes 3x6 bits. In some examples, the MLUT includes 32x6 bits.

[0057] As shown, the sampled pattern 506 may be compared to the stored motor positions (previous pattern 510, expected pattern 512, and current pattern 508). Based on the comparison results, the output selection block 502 generates a PWM output or a fault response or both.

[0058] Figure 6A flow chart for performing hardware-based motor control using a lookup table according to some embodiments is shown. The flow chart may be executed by processing logic, such as processing logic 114. Although processing logic is a hardware-based solution (e.g., electronic circuit, non-CPU electronic circuit) that performs operation 600, software may play a role, such as for initialization or other control inputs.

[0059] At block 602, the processing logic stops - it is not actively sampling the Hall input and generating a PWM modulation pattern output. At block 604, the LUTs (e.g., the motor position lookup table 116 (HLUT) and the pwm lookup table 118 (MLUT)) are programmed with values. When the processing logic is in the stopped state, the HLUT and MLUT can be initialized. Writing to both LUTs when starting the processing logic may result in incorrect behavior. Depending on the desired motor direction, the LUT is loaded with a forward mode or a reverse mode. The mode is stored in the LUT independently of the motor position. The processing logic detects the current motor position and loads the appropriate Hall mode and modulation mode using the corresponding LUT. The Hall mode can also be referred to as the motor position corresponding to a given sample of the Hall input value. The HLUT and MLUT can share the same hardware pointer for data extraction. The software can initialize the HLUT and MLUT with aligned values ​​so that the shared pointer provides the correct relationship between the HLUT and the MLCT. Incorrect programming may result in incorrect behavior. For example, if the current motor position matches HLUT(x), the output modulation needs to be in MLUT(x) with the same index. Software can initialize the values ​​in the LUTs (each LUT can include a circular buffer) so that the indexes of the corresponding buffers are aligned. For example, each LUT circular buffer can be filled in a clockwise direction at 6 addresses (0 to 5). Fill the HLUTs so that the HLUTs do not have repeated values. All six values ​​are unique. If the current pattern is stored in HLUT(x), the expected pattern is in HLUT(x+1) and the previous pattern is in HLUT x-1. The same is true for the MLUTs.

[0060] At block 606, processing logic may start - it may begin reading the Hall inputs and generating corresponding PWM modulation pattern outputs.

[0061] At block 608, when the MOTIF is started and the Hall mode is enabled, the processing logic automatically samples the Hall inputs. The processing logic obtains the current motor position based on the sampled Hall inputs. The motor position samples may be available within two clock cycles after the MOTIF module is started and the LUT mode is enabled.

[0062] At block 610, the processing logic can find the LUT pointer. The LUT pointer can be a value (e.g., stored in a register) indicating a position in the HLUT, MLUT, or both. After the Hall sampling, the processing logic compares the current motor position (available from block 608) with all six HLUT values ​​(e.g., in parallel). The processing logic can set the LUT pointer to an address corresponding to an address whose contents match the current motor position. It is expected that only one of the six comparisons will be valid because all HLUT values ​​are initialized to unique values. If all six HLUT values ​​are different from the current position of the motor, the processing logic can generate a pattern mismatch event and stop. The pattern mismatch event can be used by software to load a modulation fail-safe mode. The processing logic can generate an interrupt.

[0063] The LUT address pointer "PTR" corresponding to the current mode is updated and can be accessed by software through a register. Valid values ​​are 0, 1, 2, 3, 4, and 5. Values ​​6 and 7 may be invalid. Block 610 may be executed during the startup phase after enabling the processing logic, but not at other times. At this stage, the pointer is not incremented.

[0064] At block 612, processing logic automatically performs a shadow transfer to load the HALP and MCM registers with the LUT pointer index (see, e.g., Figure 4 and Figure 5 ). The output modulation mode can include a 32-bit output. This can be used to modulate up to 8 different TCPWM channels simultaneously. After the correct Hall event is detected, a delay can be generated between that detection and updating the multi-channel mode. The delay for updating the multi-channel mode can be directly controlled by the TCPWM counter. The trigger indicating the completion of the delay can be mapped to the input. The software can also select the active edge for the trigger. The delay insertion can be bypassed by setting the field. Another field can select the source to enable updating the multi-channel mode. When set to 1B, the multi-channel mode can be updated after the software has written 1B to the field. After the update delay (if enabled), the multi-channel mode can be synchronized with the PWM signal. When a configured edge is detected in the signal, the new multi-mode is applied at the output from the MLUT.

[0065] At block 614, processing logic waits for the Hall sensor input. When a sampling trigger is sensed, the Hall input is stored and compared to the current mode (e.g., HALP.HCP), the expected mode (e.g., HALP.HEP), and the previous mode (e.g., HALP.HPR), as shown in FIG. Figure 5 as shown in .

[0066] At block 616 , processing logic performs a comparison of the Hall inputs to the current, expected, and previous patterns.

[0067] If the Hall input (motor control position) is equal to the expected pattern, the processing logic will run free and the subsequent value from the LUT is loaded into the HALP register. The output modulation may also be set and the processing logic may continue to block 618.

[0068] If the Hall input is equal to the current mode, the processing logic can run freely without changing the value of the LUT. No action is required; the output modulation can maintain its current value. The processing logic can continue to block 614 and wait for the next Hall event.

[0069] If the Hall inputs are equal to the previous pattern, processing logic may perform a hardware stop and may provide a signal to software (eg, CPU) to indicate a motor direction change. The output modulation register may be set to hold its current value and processing logic may continue to block 602.

[0070] If the Hall input is not the current, previous, or expected pattern, the processing logic may generate a fault (eg, an interrupt) to the software, set the output PWM modulation mode to a safe mode, or both, and then continue to block 602 .

[0071] At block 618, if the correct Hall event is decoded (e.g., the Hall input is as expected), the LUT pointer (PTR) or multiple pointers are incremented by 1. In some examples, the PTR is expected to point to the current Hall mode. In some examples, the PTR can be equal to the current mode, PTR+1 can be the expected mode, and PTR-1 can be the previous mode. Depending on the management of the pointers, other relationships between the PTR and the current mode, the expected mode, and the previous mode are possible. Software can access the current mode through the processing logic register. Valid values ​​for the current mode can include 0, 1, 2, 3, 4, and 5. Invalid values ​​can include 6, 7. This operation can be performed whenever a correct Hall event is detected.

[0072] These operations may be performed and / or controlled by hardware components, digital hardware and / or firmware / programmable registers (eg, as implemented in a computer-readable medium), and / or a combination thereof. The methods and illustrative examples described herein are not inherently related to any particular apparatus or other device.

[0073] Unless expressly stated otherwise, terms such as "send," "store," "obtain," "determine," "analyze," "receive," "route," "update," "provide," and the like refer to actions and processes performed or implemented by a computing device that manipulate data represented as physical (electronic) quantities within registers and memories of the computing device and transform the data into other data similarly represented as physical quantities within the computing device memory or registers or other such information storage, transmission, or display devices. In addition, the terms "first," "second," "third," "fourth," and the like as used herein are intended as labels to distinguish among different elements and may not necessarily have an ordinal meaning according to their numerical names.

[0074] The examples described herein also relate to apparatus for performing the operations described herein. The apparatus may be specially constructed for the required purposes, or it may include a general-purpose computing device (eg, programmable logic) that is selectively programmed.

[0075] The methods and illustrative examples described herein are not inherently related to any particular computer or other device. Various general purpose systems may be used in accordance with the teachings described herein, or it may prove convenient to construct more specialized devices to perform the required method steps. The required structures for various of these systems will be as stated in the above description.

[0076] The above description is intended to be illustrative rather than limiting. Although the present disclosure has been described with reference to specific illustrative examples, it will be appreciated that the present disclosure is not limited to the described examples. The scope of the present disclosure should be determined with reference to the appended claims and the full scope of equivalents to which the claims are entitled.

[0077] Unless the context clearly indicates otherwise, as used herein, the singular forms "a", "an", and "the" also include the plural forms. It will also be understood that the terms "comprises", "comprising", "includes", and / or "including", when used herein, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. Therefore, the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting.

[0078] It should also be noted that, in some alternative implementations, the functions / acts noted may not occur in the order shown in the figures. For example, two figures shown in succession may in fact be executed substantially concurrently, or may sometimes be executed in the reverse order, depending on the functions / acts involved.

[0079] Although method operations are described in a particular order, it should be understood that other operations may be performed between the described operations, that the described operations may be adjusted so that they occur at slightly different times, or that the described operations may be distributed in a system that allows processing operations to occur at various intervals associated with the processing.

[0080] Various units, circuits, or other components may be described or claimed as being "configured to" or "configurable to" perform one or more tasks. In such contexts, the phrases "configured to" or "configurable to" are used to represent a structure by indicating that the unit / circuit / component includes a structure (e.g., a circuit) that performs one or more tasks during operation. Thus, even when the specified unit / circuit / component is not currently operating (e.g., not turned on), it can be said that the unit / circuit or component is configured to perform a task, or is configurable to perform the task. Units / circuits / components used with the "configured to" or "configurable to" language include hardware, such as circuits, memory storing program instructions executable to implement operations, and the like. Reciting that a unit / circuit or component is "configured to" perform one or more tasks, or "configurable to" perform one or more tasks, expressly indicates that 35 U.S.C. 110, sixth paragraph, is not invoked with respect to the unit / circuit / component. Furthermore, "configured to" or "configurable to" may include general structures (e.g., general purpose circuits) manipulated by software and / or firmware (e.g., an FPGA or a general purpose processor executing software) to operate in a manner capable of performing the tasks in question. "Configured to" may also include adjusting a manufacturing process (e.g., a semiconductor manufacturing facility) to manufacture a device (e.g., an integrated circuit) suitable for implementing or performing one or more tasks. "Configurable to" is expressly not applicable to blank media, an unprogrammed processor or an unprogrammed general purpose computer, or an unprogrammed programmable logic device, programmable gate array, or other unprogrammed device, unless accompanied by a programmed medium that imparts to the unprogrammed device the ability to be configured to perform the disclosed functions.

[0081] For the purpose of explanation, the above description has been described with reference to specific embodiments. However, the above illustrative discussion is not intended to be exhaustive or to limit the invention to the precise form disclosed. In view of the above teachings, many modifications and variations are possible. The embodiments are selected and described in order to best explain the principles of the embodiments and their practical application, so that other technical personnel in the field can best utilize the embodiments and various modifications as may be suitable for the intended specific use. Therefore, the present embodiment is to be regarded as illustrative and not restrictive, and the invention is not limited to the details given herein, but may be modified within the scope and equivalents of the appended claims.

Claims

1. A system comprising an electronic circuit, the electronic circuit being configured to: obtaining input including one or more Hall sensor readings; determining a current motor position based on the input and a first lookup table; determining a desired motor position based on the first lookup table for the current motor position; determining a pulse width modulation (PWM) commutation pattern based on the desired motor position and a second lookup table; as well as The PWM commutation pattern is output within a predetermined time from when the input is obtained.

2. The system according to claim 1, wherein: The electronic circuit is further configured to detect that the current motor position is in a fault in response to the current motor position not matching a last sensed motor position or a motor position immediately adjacent to the last sensed motor position.

3. The system according to claim 2, wherein: The electronic circuit is further configured to output a fault signal to a central processing unit (CPU) within the predetermined time in response to detecting the fault.

4. The system according to claim 2, wherein: The electronic circuit is further configured to, in response to detecting the fault, output a safe PWM commutation pattern that is not included in the second lookup table within the predetermined time.

5. The system according to claim 4, wherein: The electronic circuit also includes a programmable memory that assigns a value to the safe PWM commutation pattern.

6. The system according to claim 1, wherein: The PWM commutation mode includes at least six PWM outputs.

7. The system according to claim 1, wherein: The electronic circuit also includes a programmable memory that assigns values ​​to the first lookup table and the second lookup table.

8. The system according to claim 1, wherein: The first lookup table and the second lookup table are circular lookup tables.

9. The system according to claim 1, wherein: Determining the desired motor position includes incrementing an index of the first lookup table to obtain the desired motor position.

10. The system according to claim 1, wherein: The system includes a PWM timer, the PWM commutation pattern is output to the PWM timer, and the PWM timer outputs a plurality of PWM outputs according to the PWM commutation pattern.

11. A method performed by an electronic circuit, comprising: obtaining an input including a plurality of Hall sensor readings; determining a current motor position based on the input and a first lookup table; determining a desired motor position based on the first lookup table for the current motor position; determining a pulse width modulation (PWM) commutation pattern based on the desired motor position and a second lookup table; as well as The PWM commutation pattern is output within a predetermined time from when the input is obtained.

12. The method according to claim 11, further comprising: In response to the current motor position not matching a last sensed motor position, or not matching a motor position immediately adjacent to the last sensed motor position, it is detected that the current motor position is in a fault.

13. The method according to claim 12, further comprising: In response to detecting the fault, a fault signal is output to a central processing unit (CPU) within the predetermined time.

14. The method according to claim 12, further comprising: In response to detecting the fault, a safe PWM commutation pattern that is not included in the second lookup table is output within the predetermined time.

15. The method of claim 14, comprising assigning a value to a programmable memory of the safe PWM commutation pattern.

16. A microcontroller unit (MCU) comprising a central processing unit (CPU) and separate electronic circuits, the electronic circuits being configured to: obtaining input including one or more Hall sensor readings; determining a current motor position based on the input and a first lookup table; determining a desired motor position based on the first lookup table for the current motor position; determining a pulse width modulation (PWM) commutation pattern based on the desired motor position and a second lookup table; as well as The PWM commutation pattern is output within a predetermined time from when the input is obtained.

17. The MCU according to claim 16, wherein: The electronic circuit is further configured to detect that the current motor position is in a fault in response to the current motor position not matching a last sensed motor position or a motor position immediately adjacent to the last sensed motor position.

18. The MCU according to claim 17, wherein: The electronic circuit is further configured to output a fault signal to a central processing unit (CPU) within the predetermined time in response to detecting the fault.

19. The MCU according to claim 17, wherein: The electronic circuit is further configured to, in response to detecting the fault, output a safe PWM commutation pattern that is not included in the second lookup table within the predetermined time.

20. The MCU according to claim 19, wherein: The electronic circuit also includes a programmable memory that assigns a value to the safe PWM commutation pattern.

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