PWM (Pulse Width Modulation) speed regulation circuit for direct current brushless motor driver

Abstract

The invention discloses a PWM (Pulse Width Modulation) speed regulation circuit for a direct current brushless motor driver, which belongs to the technical field of motor control and comprises a driving transformer, a signal input end and a signal output end, the signal input end is connected with a primary dotted terminal of the driving transformer through a third capacitor, and the signal output end is connected with a secondary dotted terminal of the driving transformer through a fourth capacitor. A first clamping diode is connected between the signal input end and the digital ground, two primary ends of the driving transformer are connected with primary load resistors, a first path of a secondary dotted terminal of the driving transformer is connected with an anode of a voltage stabilizing diode through a second current limiting resistor and a third current limiting resistor, and a cathode of the voltage stabilizing diode is connected with the reference ground. And the signal output end is connected with the anode of the voltage stabilizing diode. The circuit is suitable for a brushless direct current motor driver, when the PWM speed regulation duty ratio is 100% constant high level, the driver does not drive the motor to operate, and compared with the prior art, the circuit adopts a simple drive transformer to solve the technical problem of motor misoperation in the motor drive control initialization process.

Description

Technical Field

[0001] The invention belongs to the technical field of motor control, and in particular relates to a PWM speed regulation circuit for a brushless DC motor driver. Background Art

[0002] A brushless motor driver is a device used to control the operation of a brushless motor. In existing motor drive circuits, the PWM speed regulation duty cycle is usually 0-100%. During the initialization process of the front-end control circuit, the PWM speed regulation may be a constant high level with a 100% duty cycle. At this time, the motor may be triggered by mistake, affecting the operating status of the system.

[0003] How to design a PWM speed regulation circuit for a brushless DC motor driver and solve the above technical problems using a low-cost simple circuit has long troubled technicians in this field. Summary of the invention

[0004] In view of the above technical problems, the present invention provides a PWM speed regulation circuit for a brushless DC motor driver. The circuit is suitable for a brushless DC motor driver. When the PWM speed regulation duty cycle is a constant high level of 100%, the driver will not drive the motor to run.

[0005] The present invention solves the above problems by the following technical means: A PWM speed regulation circuit for a brushless DC motor driver, characterized in that it comprises a driving transformer, a signal input terminal, and a signal output terminal, wherein: the signal input terminal is connected to the primary same-name terminal of the driving transformer through a third capacitor, the primary opposite-name terminal of the driving transformer is connected to a digital ground through an eighth resistor, a first clamping diode is connected between the signal input terminal and the digital ground, and primary load resistors are connected to the primary ends of the driving transformer; the secondary same-name terminal of the driving transformer is divided into three paths, wherein: the first path of the secondary same-name terminal is connected to the anode of a voltage-stabilizing diode through a second current-limiting resistor and a third current-limiting resistor, the second path of the secondary same-name terminal is connected to the secondary opposite-name terminal through a secondary load, and the third path of the secondary same-name terminal is connected to the secondary opposite-name terminal through a parallel circuit composed of a second capacitor, a second clamping diode and a fourth capacitor in sequence; the cathode of the voltage-stabilizing diode is connected to a reference ground, and the signal output terminal is connected to the anode of the voltage-stabilizing diode.

[0006] Preferably, an anode of a second clamping diode is connected between the second current limiting resistor and the third current limiting resistor via a lead, and a cathode of the second clamping diode is connected to a reference ground.

[0007] Preferably, it further comprises a gate drive circuit, wherein the input end of the gate drive circuit is connected to the signal output end, and the output end of the gate drive circuit inverts the square wave signal of the signal output end and inputs it into the subsequent logic circuit.

[0008] Preferably, an inverter is further included, wherein the input end of the inverter is connected to the signal output end, and the output end of the inverter inverts the square wave signal of the signal output end and inputs the inverted signal into a subsequent logic circuit.

[0009] Preferably, a buffer is further included, and the buffer is connected between the signal output terminal and the subsequent logic circuit.

[0010] A PWM speed regulation circuit for a brushless DC motor driver of the present invention has the following beneficial effects: This circuit is suitable for brushless DC motor drivers. When the PWM speed regulation duty cycle is 100% constant high level, the driver will not drive the motor to run. Compared with the existing technology, this circuit uses a simple drive transformer to solve the technical problem of motor misoperation during the initialization process of motor drive control. Through the use of this circuit, the motor always remains in a stopped state during the initialization process of the control system, which can prevent the motor from running incorrectly. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In order to more clearly illustrate the technical solution of the present invention, the drawings required for use in the implementation mode will be briefly introduced below. Obviously, the drawings described below are only some implementation modes of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0012] Figure 1 It is the overall circuit diagram of the present invention. DETAILED DESCRIPTION

[0013] In the description of the present invention, it should be understood that the terms "center", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. The terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more.

[0014] The present invention will be described in detail below with reference to the accompanying drawings.

[0015] like Figure 1As shown, the PWM speed regulation circuit includes a driving transformer T1, a signal input terminal PWM, and a signal output terminal SR. In the figure: the signal input terminal PWM is connected to the primary same-name terminal of the driving transformer T1 through the third capacitor C3, the primary opposite-name terminal of the driving transformer T1 is connected to the digital ground DGND through the eighth resistor R8, a first clamping diode D1 is connected between the signal input terminal PWM and the digital ground DGND, and the primary ends of the driving transformer T1 are connected to the primary load resistor R6; the secondary same-name terminal of the driving transformer T1 is divided into three paths, wherein: the first path of the secondary same-name terminal is connected to the anode of the voltage-stabilizing diode VD1 through the second current-limiting resistor R2 and the third current-limiting resistor R3, the second path of the secondary same-name terminal is connected to the secondary opposite-name terminal through the secondary load R7, and the third path of the secondary same-name terminal is connected to the secondary opposite-name terminal through a parallel circuit composed of the second capacitor C2, the second clamping diode D2 and the fourth capacitor C4 in sequence; the cathode of the voltage-stabilizing diode VD1 is connected to the reference ground GND, and the signal output terminal SR is connected to the anode of the voltage-stabilizing diode VD1. Specifically, the anode of the second clamping diode D2 is connected between the second current limiting resistor R2 and the third current limiting resistor R3 via a lead wire, and the cathode of the second clamping diode D2 is connected to the reference ground GND.

[0016] In actual application, when the brushless DC motor driver is powered on, the PWM chopping signal passes through the driving transformer, and the signal output terminal SR generates a square wave signal, which is then inverted by the gate drive circuit or inverter and input into the logic circuit of the subsequent stage, so that the motor can operate normally; when the PWM is 100% duty cycle, due to the AC-passing and DC-blocking characteristics of the driving transformer, SR is always at a low level and the motor stops running.

[0017] It should be noted that the input end of the gate drive circuit is connected to the signal output end SR, and the output end of the gate drive circuit inverts the square wave signal of the signal output end SR and inputs it to the subsequent logic circuit. The input end of the inverter is connected to the signal output end SR, and the output end of the inverter inverts the square wave signal of the signal output end SR and inputs it to the subsequent logic circuit.

[0018] The specific working principle is as follows: The primary and secondary turns ratio of the driving transformer can be set to n according to the actual situation. The PWM signal is a high-frequency chopping signal. The secondary of the driving transformer will induce a PWM high-frequency square wave signal with an amplitude of about n times, and then pass through the voltage regulator diode VD1 to stabilize the voltage. The SR signal input to the gate drive circuit or inverter is a high-frequency square wave signal with a relatively stable amplitude, and PWMOUT is a high-frequency square wave signal with a relatively stable amplitude and inverted with the SR signal. R7 is the load of the secondary of the driving transformer, which can make the secondary voltage waveform relatively stable. D2 can clamp the negative voltage amplitude of the square wave signal within a certain range. R2 and R3 are the current limiting resistors of the voltage regulator diode VD1. The VD1 voltage regulator diode can stabilize the SR signal within a certain range. This circuit is suitable for brushless DC motor drivers. When the PWM speed regulation duty cycle is 100% constant high level, the driver will not drive the motor to run. This circuit uses a simple driving transformer to solve the technical problem of motor misoperation during the initialization process of motor drive control. Through the use of this circuit, the motor always remains in a stopped state during the initialization process of the control system, which can prevent the motor from running incorrectly.

[0019] It should be further explained that a buffer may be provided between the signal output terminal SR and the subsequent logic circuit or the signal output terminal SR and the subsequent logic circuit may be directly connected.

[0020] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A PWM speed regulation circuit for a brushless DC motor driver, characterized in that: It includes a driving transformer (T1), a signal input terminal (PWM), and a signal output terminal (SR), wherein: The signal input terminal (PWM) is connected to the primary same-name terminal of the driving transformer (T1) through a third capacitor (C3), the primary opposite-name terminal of the driving transformer (T1) is connected to the digital ground (DGND) through an eighth resistor (R8), a first clamping diode (D1) is connected between the signal input terminal (PWM) and the digital ground (DGND), and both ends of the primary of the driving transformer (T1) are connected to a primary load resistor (R6); The secondary same-name end of the driving transformer (T1) is divided into three paths, wherein: the first path of the secondary same-name end is connected to the anode of the voltage-stabilizing diode (VD1) through a second current-limiting resistor (R2) and a third current-limiting resistor (R3), the second path of the secondary same-name end is connected to the secondary opposite-name end through a secondary load (R7), and the third path of the secondary same-name end is connected to the secondary opposite-name end through a parallel circuit consisting of a second capacitor (C2), a second clamping diode (D2) and a fourth capacitor (C4) in sequence; The cathode of the voltage-stabilizing diode (VD1) is connected to the reference ground (GND), and the signal output end (SR) is connected to the anode of the voltage-stabilizing diode (VD1).

2. The PWM speed regulation circuit for a brushless DC motor driver according to claim 1, characterized in that: The anode of the second clamping diode (D2) is connected between the second current limiting resistor (R2) and the third current limiting resistor (R3) via a lead, and the cathode of the second clamping diode (D2) is connected to a reference ground (GND).

3. The PWM speed regulation circuit for a brushless DC motor driver according to claim 1, characterized in that: It also includes a gate drive circuit, the input end of the gate drive circuit is connected to the signal output end (SR), and the output end of the gate drive circuit inverts the square wave signal of the signal output end (SR) and inputs it into the subsequent logic circuit.

4. The PWM speed regulation circuit for a brushless DC motor driver according to claim 1, characterized in that: It also includes an inverter, the input end of the inverter is connected to the signal output end (SR), and the output end of the inverter inverts the square wave signal of the signal output end (SR) and inputs it into the subsequent logic circuit.

5. The PWM speed regulation circuit for a brushless DC motor driver according to claim 1, characterized in that: A buffer is also included, and the buffer is connected between the signal output terminal (SR) and the subsequent logic circuit.

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