Radio frequency amplifier temperature compensation circuit and method

Abstract

The invention relates to the technical field of radio frequency amplifiers, and discloses a radio frequency amplifier temperature compensation circuit and method.In the circuit, a VDD, an IREF, an adjustable resistor array and the ground are electrically connected in sequence, the VDD, the IREF and the grid electrode of a first MOS tube are electrically connected in sequence, the VDD is connected with the input end of a current mirror, one output end of the current mirror is electrically connected with the drain electrode or the source electrode of the first MOS tube, and the other output end of the current mirror is electrically connected with the ground. One output end of the current mirror is connected with a drain electrode of the first MOS tube, the other output end of the current mirror is connected with a grid electrode of the second MOS tube, a source electrode of the second MOS tube is grounded, the other output end of the current mirror, the R1 and the grid electrode of the third MOS tube are electrically connected in sequence, the VDD, the L1 and the drain electrode or the source electrode of the third MOS tube are electrically connected in sequence, and the other electrode of the third MOS tube is grounded. The problem that in the prior art, the circuit structure is complex is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of radio frequency amplifiers, and in particular to a temperature compensation circuit and method for a radio frequency amplifier. Background Art

[0002] RF amplifiers are widely used in wireless transceivers. In the receiver, the low noise amplifier amplifies the weak signal received; in the transmitter, the power amplifier amplifies the power of the signal sent to the antenna; at the same time, the modules in the receiver and transmitter that need to increase the gain all need amplifiers. RF transceivers usually also include amplitude / phase control circuits, up / down conversion circuits, power distribution circuits, and power synthesis circuits. For a two-stage amplifier in the 65nm CMOS process, the gain fluctuation is usually 4-5dB in the temperature range of -55℃ to 125℃. For a typical receiving or transmitting link, the gain fluctuation may be more than ten dB. If technical means to compensate for temperature changes are not taken, the gain fluctuation caused by temperature changes is usually unacceptable. Traditional temperature compensation methods include digital compensation methods and analog compensation methods. The digital compensation method usually uses a temperature sensor to detect the current operating temperature of the transistor, and converts the analog voltage signal containing temperature information into a digital signal through the ADC. The processor obtains compensation data by looking up the table based on the digital signal, and converts the data into an analog control voltage signal through the DAC. Digital temperature compensation has high accuracy, flexible control, and strong anti-interference, but the compensation circuit is complex, the chip area is large, and the cost is high. Analog temperature compensation usually uses PTAT current or PTAT plus constant current to bias the amplifier, but the circuit implementation of this method is relatively complex and the power consumption of the bias circuit itself is relatively large. Summary of the invention

[0003] In order to overcome the deficiencies of the prior art, the present invention provides a radio frequency amplifier temperature compensation circuit and method to solve the problems of complex circuit structure and the like in the prior art.

[0004] The technical solution adopted by the present invention to solve the above problems is:

[0005] A radio frequency amplifier temperature compensation circuit comprises a voltage source VDD, a reference current source IREF, an adjustable resistor array, a first MOS tube, a second MOS tube, a third MOS tube, a current mirror, a first resistor R1, and a first inductor L1. VDD, IREF, the adjustable resistor array, and ground are electrically connected in sequence. VDD, IREF, and the gate of the first MOS tube are electrically connected in sequence. VDD is connected to the input end of the current mirror. An output end of the current mirror is electrically connected to the drain or source of the first MOS tube. The remaining electrode of the first MOS tube is grounded. The other output end of the current mirror is connected to the drain of the second MOS tube. The other output end of the current mirror is connected to the gate of the second MOS tube. The source of the second MOS tube is grounded. The other output end of the current mirror, R1, and the gate of the third MOS tube are electrically connected in sequence. VDD, L1, and the drain or source of the third MOS tube are electrically connected in sequence. The remaining electrode of the third MOS tube is grounded.

[0006] As a preferred technical solution, the first MOS tube, the second MOS tube, and the third MOS tube are all NMOS tubes, which are respectively denoted as MN1, MN2, and MN3. One output end of the current mirror is electrically connected to the drain of MN1, the source of MN1 is grounded, the other output end of the current mirror is connected to the drain of MN2, the other output end of the current mirror is connected to the gate of MN2, the source of MN2 is grounded, the drains of VDD, L1, and MN3 are electrically connected in sequence, and the source of MN3 is grounded.

[0007] As a preferred technical solution, it includes a temperature sensing circuit electrically connected to the adjustable resistor array.

[0008] As a preferred technical solution, an input matching circuit is included which is electrically connected to the gate of MN3.

[0009] As a preferred technical solution, an output matching circuit is included which is electrically connected to the drain of MN3.

[0010] As a preferred technical solution, the first capacitor C1, the drain of MN2, C1 and the ground are electrically connected in sequence.

[0011] A radio frequency amplifier temperature compensation method uses a radio frequency amplifier temperature compensation circuit to perform temperature compensation on the radio frequency amplifier.

[0012] As a preferred technical solution, the temperature sensing circuit outputs a digital signal to adjust the resistance value of the adjustable resistor array.

[0013] As a preferred technical solution, the temperature sensing circuit outputs a digital signal to adjust the temperature coefficient of the adjustable resistor array.

[0014] As a preferred technical solution, the current mirror ratio of the current mirror is adjusted by a digital signal.

[0015] Compared with the prior art, the present invention has the following beneficial effects:

[0016] (1) The circuit structure is simple, the power consumption is low, and it is easy to implement and integrate into the chip;

[0017] (2) The positive temperature coefficient overdrive voltage of the first NMOS tube generates a positive temperature coefficient current which is provided to the drain of the second NMOS tube through the m:n current mirror. The current passes through the current mirror formed by the second NMOS tube and the third NMOS tube, and is filtered by the first capacitor and the first resistor before being provided to the third NMOS tube to compensate for its negative temperature coefficient transconductance;

[0018] (3) The temperature sensing circuit samples the ambient temperature and outputs a digital signal, and is capable of selecting resistors with different resistance values ​​and temperature coefficients in the adjustable resistor array to adjust the temperature compensation of the amplifier gain according to different temperatures;

[0019] (4) The m:n current mirror ratio can be flexibly adjusted through digital signals, process deviations can be compensated, and it is flexible and convenient to use;

[0020] (5) By simultaneously adjusting the adjustable resistor array and the m:n current mirror through digital signals, more flexible and effective gain compensation can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a schematic diagram of a temperature compensation circuit of a radio frequency amplifier according to an embodiment of the present invention;

[0022] Figure 2 is a schematic diagram of an adjustable resistor array according to an embodiment of the present invention;

[0023] Figure 3 It is a principle diagram of a current mirror capable of flexibly adjusting the mirror ratio according to an embodiment of the present invention;

[0024] Figure 4 This is a temperature compensation transconductance effect diagram of an embodiment of the present invention;

[0025] Figure 5 This is one of the effect diagrams of segmented compensation of transconductance according to different temperatures according to an embodiment of the present invention;

[0026] Figure 6 This is the second diagram of the transconductance compensation effect according to different temperatures in an embodiment of the present invention;

[0027] Figure 7 This is the third diagram of the transconductance effect of segmented compensation according to different temperatures according to an embodiment of the present invention. DETAILED DESCRIPTION

[0028] The present invention will be further described in detail below in conjunction with embodiments and drawings, but the embodiments of the present invention are not limited thereto.

[0029] Example 1

[0030] like Figures 1 to 7 As shown, the present invention proposes a RF amplifier temperature compensation circuit and method, which can effectively compensate for the amplifier gain caused by temperature changes, and the circuit is simple to implement.

[0031] The present invention aims to solve the problem that the gain of a radio frequency amplifier varies greatly with temperature and the temperature compensation circuit is complicated. To this end, the present invention provides a radio frequency amplifier temperature compensation circuit.

[0032] The present invention provides a radio frequency amplifier temperature compensation circuit, including a voltage source, a reference current source, a temperature sensing circuit, an adjustable resistor array, a first NMOS tube, a second NMOS tube, a third NMOS tube, an m:n current mirror, a first capacitor, a first resistor, a first inductor, an input matching circuit, and an output matching circuit. The gate of the first NMOS tube is connected to the output end of the reference current source, and is grounded through the adjustable resistor array, and its drain is connected to the first output end of the m:n current mirror; the control end of the adjustable resistor array is connected to the temperature sensing circuit; the gate of the second NMOS tube is simultaneously connected to the drain of the second NMOS tube, the second output end of the m:n current mirror, and one end of the first capacitor, and is connected to the gate of the third NMOS tube and one end of the input matching circuit through a first series resistor; the source of the second NMOS tube and the other end of the first capacitor are grounded; the other end of the input matching circuit inputs a radio frequency signal; the drain of the third NMOS tube is connected to one end of the first inductor and one end of the output matching circuit, and the source is grounded; the other end of the output matching circuit outputs a radio frequency signal; the voltage source is simultaneously connected to the input end of the reference current source, the first input end of the current mirror, and the other end of the first inductor.

[0033] The voltage drop generated by the output current of the reference current source on the adjustable resistor array provides a DC bias to the gate of the first NMOS tube;

[0034] The over-driving voltage of the first NMOS tube is a positive temperature coefficient, and a positive temperature coefficient current is generated and provided to the drain of the second NMOS tube connected in a diode type through an m:n current mirror;

[0035] The drain current of the second NMOS tube is provided to the third NMOS tube through a current mirror formed by the second NMOS tube and the third NMOS tube to compensate for the negative temperature coefficient transconductance thereof.

[0036] The temperature sensing circuit outputs a digital signal to adjust the resistance value and / or temperature coefficient of the adjustable resistor array, thereby realizing segmented temperature compensation of the RF amplifier gain;

[0037] By adjusting the m:n current mirror ratio through digital signals, the influence of process fluctuations on circuit gain can be compensated;

[0038] By simultaneously adjusting the adjustable resistor array and the m:n current mirror ratio through digital signals, more flexible and effective gain temperature compensation can be achieved.

[0039] The first inductor prevents the radio frequency signal from entering the voltage source, and the voltage source provides a DC bias to the drain of the third NMOS tube through the first inductor;

[0040] The first resistor blocks the radio frequency signal from passing through, and the first capacitor filters the drain voltage of the second NMOS tube;

[0041] The circuit structure is simple, the compensation effect is good, and the chip integration is easy.

[0042] Example 2

[0043] like Figures 1 to 7 As shown, as a further optimization of Example 1, based on Example 1, this embodiment also includes the following technical features:

[0044] Refer to the following Figures 1 to 7 A radio frequency amplifier temperature compensation circuit provided according to some embodiments of the present invention is described.

[0045] Some embodiments of the present application provide a radio frequency amplifier temperature compensation circuit.

[0046] Some embodiments of the present invention provide a radio frequency amplifier temperature compensation circuit. Figure 1 A radio frequency amplifier temperature compensation circuit is shown, which includes a voltage source, a reference current source, a temperature sensing circuit, an adjustable resistor array, a first NMOS tube, a second NMOS tube, a third NMOS tube, an m:n current mirror, a first capacitor, a first resistor, a first inductor, an input matching circuit, and an output matching circuit. The gate of the first NMOS tube is connected to the output end of the reference current source and is grounded through the adjustable resistor array, and its drain is connected to the first output end of the m:n current mirror; the control end of the adjustable resistor array is connected to the temperature sensing circuit; the gate of the second NMOS tube is simultaneously connected to the drain of the second NMOS tube, the second output end of the m:n current mirror, and one end of the first capacitor, and is connected to the gate of the third NMOS tube and one end of the input matching circuit through a first resistor in series; the source of the second NMOS tube and the other end of the first capacitor are grounded; the other end of the input matching circuit inputs a radio frequency signal; the drain of the third NMOS tube is connected to one end of the first inductor and one end of the output matching circuit, and the source is grounded; the other end of the output matching circuit outputs a radio frequency signal; the voltage source is simultaneously connected to the input end of the reference current source, the first input end of the current mirror, and the other end of the first inductor.

[0047] The output current of the reference current source IREF generates a DC voltage on the adjustable resistor array, which provides a gate bias voltage for the first NMOS transistor MN1. The leakage current of the NMOS transistor is expressed as:

[0048]

[0049] where μ n represents the electron mobility, C ox represents the gate oxide capacitance per unit area, W / L represents the width-to-length ratio of the NMOS transistor, V GS ─V TH represents the overdrive voltage. n It is a negative temperature coefficient, which decreases as the temperature increases; V GS ─V TH It is a positive temperature coefficient, which increases with increasing temperature; the leakage current I D The positive temperature coefficient of the overdrive voltage of the first NMOS tube MN1 can be used to provide a positive temperature coefficient current, which is provided to the second NMOS tube MN2 connected to the diode through the m:n current mirror, and is provided to the third NMOS tube NM3 through the current mirror to compensate for its negative temperature coefficient transconductance.

[0050] The temperature sensing circuit can output an s-bit digital control signal CTL1 according to the temperature. <s:1>, adjusting the resistance value and / or the temperature coefficient of the adjustable resistor array to adjust the amplifier gain compensation according to different temperatures;

[0051] The current mirror ratio of the m:n current mirror can be controlled by the digital control signal CTL2 <m:2>and CTL3<n:2> Flexible adjustment: by adjusting the mirror ratio, the influence of process fluctuation on gain can be compensated. At the same time, adjusting the adjustable resistor array can achieve more flexible and effective gain compensation.

[0052] The first capacitor C1 filters the drain voltage of the second NMOS transistor MN2, and provides a stable bias voltage to the gate of the third NMOS transistor through the first resistor R1; at the same time, the first resistor R1 prevents the gate RF signal of the third NMOS transistor MN3 from being transmitted to the drain of the second NMOS transistor MN2;

[0053] The third NMOS tube MN3 is an amplifier tube of the radio frequency amplifier;

[0054] The first inductor L1 is used as a choke inductor of the drain of the third NMOS transistor MN3, and the voltage source VDD provides a DC bias to the drain of the third NMOS transistor MN3 through the first inductor L1;

[0055] The input matching circuit performs impedance matching between the amplifier and the previous stage circuit, and the RF input signal is added to the gate of the third NMOS tube MN3 through the input matching circuit;

[0056] The output matching circuit performs impedance matching between the amplifier and the subsequent circuit, and the amplifier outputs the radio frequency signal to the subsequent circuit through the output impedance matching circuit;

[0057] In this embodiment, the amplifier adopts a common source structure, and in some embodiments, a common source and common gate structure or other structures may also be adopted;

[0058] The adjustable resistor array in this embodiment can also be implemented using other circuit structures;

[0059] The m:n current mirror in this embodiment can also be implemented using other circuit structures.

[0060] Figure 2 The circuit of the adjustable resistor array of this embodiment is shown. Optionally, the adjustable resistor array includes s resistors RT <s:1>and s electronic switches K <s:1>; Resistance RT and electronic switch K The switch resistors are connected in series, and the s groups of switch resistors are connected in parallel between the first input terminal A1 and the second input terminal A2 of the adjustable resistor array, wherein 1≤i≤s, s is a natural number; the temperature sensing circuit outputs a digital control signal CTL1 Connect the control end of the electronic switch to control the electronic switch K The conduction and cutoff of the electronic switch K On-state resistance RT Connected between A1 and A2, when the electronic switch K When disconnected, the resistor RT Disconnect from A1 and A2. The resistance and / or temperature coefficient of the s resistors are different. The resistance value and / or temperature coefficient of the resistor between A1 and A2 can be adjusted. The electronic switch can be implemented using NMOS or PMOS, or a combination thereof.

[0061] Figure 3 A circuit of a current mirror with a flexible mirror ratio of this embodiment is shown. Optionally, a current mirror with a flexible mirror ratio includes m PMOS tubes MPA <m:1>、n PMOS tubes MPB <n:1>, 2(m-1)+2(n-1) electronic switches KGA <m:2>、KDA <m:2>、KGB <n:2>、KDB <n:2>, where m and n are both natural numbers. PMOS tube MPA <1> and MPB <1> Constructs a basic current mirror; through the digital signal CTL2 <j>Control electronic switch KGA <j>and KDA <j>Can PMOS tube MPA <j>With MPA <1> Connect or disconnect in parallel, through digital signal CTL3 <k>Control electronic switch KGB <k>and KDB <k>Can PMOS tube MPB <j>With MPB <1> Parallel or disconnected, where 2≤j≤m, 2≤k≤n, j, k are natural numbers. <1> or / and MPB <1> The number of PMOS tubes in parallel can flexibly adjust the current mirror ratio. <m:1>The width-to-length ratio (W / L) can be the same or different. <n:1>The aspect ratio can be the same or different.

[0062] Figure 4 The temperature compensation transconductance effect of an embodiment of the present invention is shown. In this embodiment, a positive temperature coefficient overdrive voltage of an NMOS tube is used to generate a positive temperature coefficient current bias amplifier tube. Compared with a constant current bias amplifier tube, it can be seen that the temperature compensation of an embodiment of the present invention can effectively suppress the change of transconductance with temperature.

[0063] Figures 5 to 7 The temperature sensing circuit outputs a control code CTL1 according to the ambient temperature. <s:1>By adjusting the adjustable resistor array, changing the resistance value and / or temperature coefficient of the adjustable resistor array, and adjusting the current mirror ratio of the m:n current mirror, a more stable transconductance that is insensitive to temperature changes can be obtained, and a transconductance that increases or decreases in stages with temperature changes can also be obtained, which can be selected as needed. Here, s=3 is used as an example to illustrate that the adjustable resistor array has three resistors with different temperature coefficients and / or resistance values ​​that can be adjusted. Curves (1) to (3) are three temperature compensated transconductance curves obtained by adjusting the adjustable resistor array. Curves (1) and (2) have an intersection point n2, and curves (2) and (3) have an intersection point n3. T1, T2, T3, and T4 are four different temperatures, of which T2 corresponds to intersection point n2, and T3 corresponds to intersection point n3. In order to obtain a flatter transconductance ( Figure 5 ), segmented increase in transconductance ( Figure 6 ) and the segmented reduced transconductance ( Figure 7 ), take curve (1) within the temperature range of T1 to T2, i.e., segment n1 to n2 of curve (1); take curve (2) within the temperature range of T2 to T3, i.e., segment n2 to n3 of curve (2); take curve (3) within the temperature range of T3 to T4, i.e., segment n3 to n4 of curve (3). The transconductance that increases and decreases in segments within the temperature range of T1 to T4 can be used to compensate for the negative temperature coefficient and positive temperature coefficient of the gain of other circuits in the receiving / transmitting chain, respectively.

[0064] As described above, the present invention can be preferably implemented.

[0065] All features disclosed in all embodiments in this specification, or steps in all methods or processes implicitly disclosed, except for mutually exclusive features and / or steps, can be combined and / or expanded or replaced in any manner.

[0066] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any form. According to the technical essence of the present invention, within the spirit and principles of the present invention, any simple modification, equivalent replacement and improvement made to the above embodiment still falls within the protection scope of the technical solution of the present invention. < / j> < / k> < / k> < / k> < / j> < / j> < / j> < / j>

Claims

1. A radio frequency amplifier temperature compensation circuit, characterized in that: It includes a voltage source VDD, a reference current source IREF, an adjustable resistor array, a first MOS tube, a second MOS tube, a third MOS tube, a current mirror, a first resistor R1, and a first inductor L1. VDD, IREF, the adjustable resistor array, and ground are electrically connected in sequence. VDD, IREF, and the gate of the first MOS tube are electrically connected in sequence. VDD is connected to the input end of the current mirror. An output end of the current mirror is electrically connected to the drain or source of the first MOS tube. The remaining electrode of the first MOS tube is grounded. The other output end of the current mirror is connected to the drain of the second MOS tube. The other output end of the current mirror is connected to the gate of the second MOS tube. The source of the second MOS tube is grounded. The other output end of the current mirror, R1, and the gate of the third MOS tube are electrically connected in sequence. VDD, L1, and the drain or source of the third MOS tube are electrically connected in sequence. The remaining electrode of the third MOS tube is grounded.

2. The RF amplifier temperature compensation circuit according to claim 1, characterized in that: The first MOS tube, the second MOS tube, and the third MOS tube are all NMOS tubes, which are respectively denoted as MN1, MN2, and MN3. One output end of the current mirror is electrically connected to the drain of MN1, the source of MN1 is grounded, the other output end of the current mirror is connected to the drain of MN2, the other output end of the current mirror is connected to the gate of MN2, the source of MN2 is grounded, the drains of VDD, L1, and MN3 are electrically connected in sequence, and the source of MN3 is grounded.

3. The RF amplifier temperature compensation circuit according to claim 2, characterized in that: A temperature sensing circuit is included which is electrically connected to the adjustable resistor array.

4. The RF amplifier temperature compensation circuit according to claim 3, characterized in that: An input matching circuit is included that is electrically connected to the gate of MN3.

5. The RF amplifier temperature compensation circuit according to claim 3, characterized in that: An output matching circuit is included that is electrically connected to the drain of MN3.

6. A radio frequency amplifier temperature compensation circuit according to any one of claims 3 to 5, characterized in that: The first capacitor C1 includes a drain of MN2, C1, and ground which are electrically connected in sequence.

7. A method for temperature compensation of a radio frequency amplifier, characterized in that: A radio frequency amplifier temperature compensation circuit according to any one of claims 3 to 6 is used to perform temperature compensation on a radio frequency amplifier.

8. A method for temperature compensation of a radio frequency amplifier according to claim 7, characterized in that: The temperature sensing circuit outputs a digital signal to adjust the resistance value of the adjustable resistor array.

9. A method for temperature compensation of a radio frequency amplifier according to claim 7, characterized in that: The temperature sensing circuit outputs a digital signal to adjust the temperature coefficient of the adjustable resistor array.

10. A method for temperature compensation of a radio frequency amplifier according to any one of claims 7 to 9, characterized in that: The current mirror ratio of the current mirror is adjusted by a digital signal.

Images