Optical domain intelligent reconfiguration high integration modular optical fiber data link and operation method

Abstract

The application discloses an optical domain intelligent reconstruction high-integration modular optical fiber data chain and an operation method.The optical fiber data chain comprises a high-integration optical fiber data chain platform based on all-optical switching and electro-optical / optical-electric conversion dense arrays, the platform comprising an intelligent master control computer, electro-optical conversion dense array sub-cards, a high-integration VPX standard machine case, optical-electric conversion dense array sub-cards and a high-integration all-optical switching matrix board card; the electro-optical conversion dense array sub-cards and the optical-electric conversion dense array sub-cards are connected with the high-integration VPX standard machine case, the high-integration VPX standard machine case is connected with the high-integration all-optical switching matrix board card; the intelligent master control computer is connected with the high-integration VPX machine case through an Ethernet interface; and the optical fiber data chain platform realizes optical domain intelligent reconstruction of the high-integration modular optical fiber data chain based on high-isolation all-optical switching technology under the management and control of the master control computer.The application has the characteristics of good intelligent degree, high integration, high reliability, good universality, expansibility, replaceability, upgradability and simple operation.

Description

Technical Field

[0001] The present invention belongs to the field of optical communications, and in particular relates to optical fiber data link technology, specifically an optical domain intelligent reconstruction highly integrated modular optical fiber data link and an operation method. Background Art

[0002] Fiber-optic data links are one of the development trends in optical transmission network technology. Using fiber-optic data links to replace traditional electrical signal data links can not only effectively solve the communication capacity "bottleneck" problem, but also significantly reduce the size and cost of equipment. However, traditional fiber-optic data links not only have fixed optical routes and cannot achieve intelligent dynamic reconstruction, but also the equipment form and hardware connection method cannot be dynamically changed. If the system is to be upgraded or expanded, the existing data link system can only be scrapped and rebuilt. This has become a pain point and difficulty that restricts the promotion and application of fiber-optic data links. Therefore, there is an urgent need for a highly integrated modular fiber-optic data link system that supports optical domain intelligent reconstruction. This system not only realizes optical domain intelligent reconstruction, but also makes it "scalable, replaceable, upgradeable, and iterative" and significantly reduces the system size, weight, and power consumption.

[0003] The highly integrated modular fiber optic data link system that supports intelligent reconstruction of the optical domain involves several core key technologies, including high-isolation all-optical switching technology based on silicon-based micro-lens arrays, high-precision optical path reflection and coupling technology based on robust distribution of silicon-based micro-lens arrays, miniaturized integrated packaging technology of dense arrays of optoelectronic and electro-optical conversion, fully automatic data recording and processing technology, and automatic compensation technology for link loss. These core technologies make the highly integrated modular fiber optic data link that supports intelligent reconstruction of the optical domain technically difficult and have become a key factor restricting the user experience of the highly integrated modular fiber optic data link that supports intelligent reconstruction of the optical domain. Summary of the Invention

[0004] The present invention addresses the shortcomings of existing technologies by providing a highly integrated modular optical fiber data link with intelligent optical domain reconstruction and its operation method. Developed based on a modular approach, this invention can expand the scale and capacity of optical fiber data links. Furthermore, its operation method is simple to operate and highly practical. Its application in highly integrated modular optical fiber data links with intelligent optical domain reconstruction can reduce operational and maintenance difficulties and improve system reliability.

[0005] To achieve the above object, the technical solution adopted by the present invention is:

[0006] An optical domain intelligent reconstruction highly integrated modular optical fiber data link, comprising a highly integrated optical fiber data link platform based on all-optical switching and electro-optical / photoelectric conversion dense array, the highly integrated optical fiber data link platform comprising an intelligent main control computer, at least one electro-optical conversion dense array daughter card, a highly integrated VPX standard chassis, at least one photoelectric conversion dense array daughter card, and at least one highly integrated all-optical switching matrix board;

[0007] Among them, the intelligent main control computer is connected to the external network, the electro-optical conversion dense array daughter card and the photoelectric conversion dense array daughter card are connected to the highly integrated VPX standard chassis, and the highly integrated VPX standard chassis is connected to the highly integrated all-optical exchange matrix board card;

[0008] The intelligent main control computer and the highly integrated VPX chassis are connected via an Ethernet interface;

[0009] The fiber optic data link platform is composed of highly integrated all-optical switching matrix boards, electro-optical conversion dense array sub-cards, highly integrated VPX standard chassis, and photoelectric conversion dense array sub-cards. Under the control of the main control computer, the fiber optic data link platform realizes optical domain intelligent reconstruction of highly integrated modular fiber optic data links based on high-isolation all-optical switching technology.

[0010] The highly integrated all-optical switching matrix card implements 24×24 non-blocking all-optical switching, provides optical domain switching channels between the electro-optical conversion dense array sub-cards and the opto-electrical conversion dense array sub-cards, and intelligently changes the optical domain routing state of the optical fiber data link system under the unified control of the intelligent main control computer, and feeds back the current optical routing state parameters to the intelligent main control computer.

[0011] The electro-optical conversion dense array sub-card realizes 24-channel 12.75G high-speed electrical signal electro-optical conversion, and under the unified control of the intelligent main control computer, the corresponding channel lasers in the laser array are in working or low-power dormant state;

[0012] The photoelectric conversion dense array sub-card realizes the photoelectric conversion of 24 channels of 13.25G high-speed optical signals, and under the unified control of the intelligent main control computer, the corresponding channel detectors in the detector array are in working state or low-power dormant state;

[0013] The highly integrated VPX standard chassis provides card slots for plugging in electro-optical conversion dense array daughter cards, highly integrated all-optical switching matrix daughter cards, and photoelectric conversion dense array daughter cards. All cards inserted into the highly integrated VPX standard chassis realize optical and electrical signal interconnection through a high-speed backplane.

[0014] The intelligent main control computer receives IP network remote networking management and control information, and performs unified management and control on the electro-optical conversion dense array sub-card, the highly integrated all-optical exchange matrix board card, and the photoelectric conversion dense array sub-card.

[0015] Preferably, the highly integrated all-optical switching matrix board includes an embedded microprocessor and a DA drive control array, a power management unit, a health management unit, and a bus driver connected to the embedded microprocessor; wherein the power management unit and the health management unit are also connected to the DA drive control array and the bus driver, the DA drive control array is connected to the power management unit, the optical routing switching module, the health management unit, and the embedded microprocessor, and the optical routing switching module is connected to the DA drive control array and the optical connector of the electro-optical conversion dense array sub-card and the optical connector of the photoelectric conversion dense array sub-card provided on the highly integrated all-optical switching matrix board. Furthermore, the optical connector of the electro-optical conversion dense array sub-card is an optical connector with a 24-core MT connector, and the optical connector of the photoelectric conversion dense array sub-card is an optical connector with a 24-core MT connector; the control signal of the bus driver is connected to the highly integrated VPX chassis via the VPX electrical connector provided on the highly integrated all-optical switching matrix board.

[0016] Preferably, the electro-optical conversion matrix daughter card includes an embedded microprocessor and a field programmable logic device (FPGA) connected to the embedded microprocessor, a power management unit (PMU), and a bus driver. The PMU is further connected to the laser array module, the FPGA, and the bus driver. The laser array module is connected to the electro-optical conversion matrix daughter card electrical connector, the electro-optical conversion matrix daughter card optical connector, the PMU, and the FPGA. Furthermore, the electro-optical conversion matrix daughter card electrical connector is an electrical signal connector with a standard VPX connector, and the electro-optical conversion matrix daughter card optical connector is an optical signal connector with an MT connector. The bus driver's control signals are connected to the highly integrated VPX chassis via the VPX electrical connector on the electro-optical conversion matrix daughter card.

[0017] Preferably, the optoelectronic conversion array daughter card includes an embedded microprocessor and a field programmable logic device (FPGA) connected to the embedded microprocessor, a power management unit (PMU), and a bus driver. The PMU is further connected to the detector array module, the FPGA, the embedded microprocessor, and the bus driver. The detector array module is connected to the optoelectronic conversion array daughter card optical connector, the optoelectronic conversion array daughter card electrical connector, the PMU, and the FPGA. Furthermore, the optoelectronic conversion array daughter card electrical connector is an electrical signal connector with a standard VPX connector, and the optoelectronic conversion array daughter card optical connector is an optical signal connector with an MT connector. The bus driver's control signals are connected to the highly integrated VPX chassis via the VPX electrical connector on the optoelectronic conversion array daughter card.

[0018] Preferably, the highly integrated VPX chassis includes a high-speed backplane and a VPX frame structure. The high-speed backplane is installed on the VPX structure and is connected to the intelligent main control computer through an RJ45 Ethernet interface. The highly integrated VPX chassis provides 19 board slots. The electro-optical conversion dense array daughter card can be inserted into any slot from 1 to 6; the highly integrated all-optical switching matrix board card can be inserted into any slot from 7 to 13, among which slot 7 is a required slot; the opto-electrical conversion dense array daughter card can be inserted into any slot from 14 to 19.

[0019] A method for operating a highly integrated modular optical fiber data link with intelligent optical domain reconstruction includes the aforementioned highly integrated modular optical fiber data link with intelligent optical domain reconstruction. The method comprises the following steps:

[0020] 1) System self-test: Automatically detects whether the working status of the intelligent main control computer, electro-optical conversion dense array card, highly integrated VPX standard chassis, optoelectronic conversion dense array card, and highly integrated all-optical switch matrix board is normal, and controls the laser array of the electro-optical conversion dense array card, the detector array of the optoelectronic conversion dense array card, and the highly integrated all-optical switch matrix to be in the initialization working mode;

[0021] 2) Channel detection: The highly integrated modular fiber optic data link system supporting optical domain intelligent reconstruction is switched to a pass-through state, allowing the optical signal of the electro-optical conversion dense array card to be directly transmitted to the optoelectronic conversion dense array card. The detectors of the optoelectronic conversion dense array card detect the received optical power. If the optical power received by all detectors is greater than 3dB, the channel detection is normal. The pass-through state refers to the working state in which the 24 input and output channels of the highly integrated all-optical switching matrix are directly connected one-to-one.

[0022] 3) Configure the laser array: Configure the laser array registers of the electro-optical conversion dense array daughter card to put the 24-channel laser into operation. The register at address OX 0021 is configured to OX 3F, the register at address OX 0031 is configured to OX 42, the register at address OX 0022 is configured to OX 16, the register at address OX 0033 is configured to OX 21, the register at address OX 0014 is configured to OX 55, and the register at address OX 0053 is configured to OX 23. At this time, the electro-optical conversion dense array daughter card is in 12.75G high-speed electrical signal electro-optical conversion mode;

[0023] 4) Optical domain routing reconstruction: Based on the optical routing reconstruction table issued by the intelligent master control computer, the optical routing of the highly integrated all-optical switching matrix board is configured, so that the laser optical signal of the channel corresponding to the electro-optical conversion dense array sub-card is intelligently switched to the detector output of the channel corresponding to the opto-electrical conversion dense array sub-card;

[0024] 5) Link Verification: The link verification code received by the photoelectric conversion dense array sub-card detector array is reported to the intelligent main control computer and verified with the link verification code reported by the electro-optical conversion dense array sub-card to the intelligent main control computer. If the verification code is correct, the link verification is successful. During the link verification, the intelligent main control computer will also collect the verification start time, verification completion time, verification code, verification optical routing reconstruction table, optical power received by the detector during verification, parameter values ​​of the laser array register configuration during verification, operating voltage value detected during verification, and chip temperature information detected during verification.

[0025] 6) Post-processing: The intelligent main control computer performs post-processing on the configuration information and verification test data of step 5);

[0026] Preferably, the post-processing in step 6) is to generate a link verification report in accordance with the data format required by the operation and maintenance database; the content of the link verification report includes the verification start time, the verification completion time, the verification code used for verification, the optical routing reconstruction table during verification, the optical power received by the detector during verification, the parameter value of the laser array register configuration during verification, the 1.0V, 1.2V, 1.8V, 2.5V, and 3.3V operating voltage values ​​detected during verification, and the chip temperature detected during verification, and the generated link verification report is uploaded to the remote operation and maintenance database.

[0027] Compared with the prior art, the present invention has the following advantages:

[0028] 1. This invention is developed based on a modular approach. To expand the scale and capacity of the fiber optic data link, it is only necessary to insert more electro-optical conversion dense array primary daughter cards, optoelectronic conversion dense array secondary daughter cards, and highly integrated all-optical switch matrix boards into the standard VPX chassis. A maximum of six electro-optical conversion dense array primary daughter cards, six optoelectronic conversion dense array secondary daughter cards, and six highly integrated all-optical switch matrix boards can be inserted, thereby expanding the scale of the fiber optic data link from 24 to 144 channels, while supporting 144×144 scale non-blocking all-optical switching.

[0029] 2. This system has the characteristics of high intelligence, high integration, high reliability, good versatility, scalability, replaceability, upgradeability, iterativeness and low cost.

[0030] 3. The method of the present invention is simple to operate and has good practicality. When applied to the optical domain intelligent reconstruction of highly integrated modular optical fiber data links, it can reduce the difficulty of operation and maintenance, save human resources, improve system reliability, and reduce production costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 This is a principle block diagram of a highly integrated modular optical fiber data link with optical domain intelligent reconstruction according to the present invention;

[0032] Figure 2 This is the principle block diagram of the highly integrated all-optical switching matrix board;

[0033] Figure 3 This is the principle block diagram of the primary daughter card of the electro-optical conversion dense array;

[0034] Figure 4 This is the principle block diagram of the photoelectric conversion dense array secondary daughter card;

[0035] Figure 5 This is the principle block diagram of the highly integrated VPX chassis;

[0036] Figure 6 This is a flow chart of a method for operating a highly integrated modular optical fiber data link using intelligent reconstruction in the optical domain according to the present invention. DETAILED DESCRIPTION

[0037] In order to make the objects and advantages of the present invention more clear, the present invention is described in detail below with reference to the accompanying drawings and embodiments.

[0038] like Figure 1 The present invention discloses a highly integrated modular optical data link capable of intelligent optical domain reconstruction. The platform comprises a highly integrated optical data link platform based on all-optical switching and electro-optical / photoelectrical conversion dense arrays. The platform includes an intelligent main control computer, an electro-optical conversion dense array daughter card, a highly integrated VPX standard chassis, an optoelectronic conversion dense array daughter card, and a highly integrated all-optical switching matrix board. The main control computer is connected to an external network. The electro-optical conversion dense array daughter card and the optoelectronic conversion dense array daughter card are connected to the highly integrated VPX standard chassis via MT optical connectors and VPX electrical connectors. The highly integrated VPX standard chassis is connected to the highly integrated all-optical switching matrix board via MT optical connectors and VPX electrical connectors. The intelligent main control computer is connected to the highly integrated VPX chassis via a standard RJ45 Ethernet interface. The highly integrated all-optical switching matrix board, the electro-optical conversion dense array daughter card, the highly integrated VPX standard chassis, and the optoelectronic conversion dense array daughter card constitute the optical data link platform. Under the control of the main control computer, the optical data link platform utilizes high-isolation all-optical switching technology to achieve intelligent optical domain reconstruction of the highly integrated modular optical data link.

[0039] like Figure 2As shown, the highly integrated all-optical switch matrix board includes an embedded microprocessor and a DA drive control array, a power management unit, a health management unit, and a bus driver connected to the embedded microprocessor. The power management unit and the health management unit are also connected to the DA drive control array and the bus driver; the DA drive control array is connected to the power management unit, the optical routing switch module, the health management unit, and the embedded microprocessor; and the optical routing switch module is connected to the optical connector of the electro-optical conversion dense array sub-card, the optical connector of the photoelectric conversion dense array sub-card, and the DA drive control array on the highly integrated all-optical switch matrix board. The optical connector of the electro-optical conversion dense array sub-card is a 24-core MT optical connector, and the optical connector of the photoelectric conversion dense array sub-card is a 24-core MT optical connector. The bus driver's control signals are connected to the highly integrated VPX chassis via the VPX electrical connector on the highly integrated all-optical switch matrix board. The functions realized by the highly integrated all-optical switching matrix board include: a single board realizes 24×24 scale non-blocking all-optical switching, provides optical domain switching channels between electro-optical conversion dense array sub-cards and optoelectronic conversion dense array sub-cards, and intelligently changes the optical domain routing status of the fiber optic data link system under the unified control of the intelligent main control computer, and feeds back the current optical routing status parameters to the intelligent main control computer.

[0040] The power management unit is provided with an interconnected RSHF4644ARH power module and a C42605RCH power chip, wherein the output ends of the RSHF4644ARH power module and the C42605RCH power chip are independent of each other and the input ends are connected in parallel. The function of the RSHF4644ARH is to convert the 12V bus voltage into multiple groups of 2.5V and 3.3V working voltages for use by each module, and the function of the C42605RCH is to convert the 12V bus voltage into a 60V working voltage for use by each DA drive control array.

[0041] The DA drive control array is a functional array consisting of 48 AD5504 chips. The control ends of the 48 AD5504 chips are connected together in a way that every 8 chips share a group of SPI buses. The output ends of the 48 AD5504 chips are independent. The DA drive control array 5 can simultaneously provide 196 drive deflection voltages and drive the optical routing switching module to realize intelligent reconstruction of optical domain routing.

[0042] The health management unit is equipped with a microprocessor Loog 1J, a resistor voltage divider detection circuit, and a JSR706RD watchdog circuit. Its main function is to collect real-time health information on working temperature, working voltage amplitude, and watchdog working status, and report it to the intelligent main control computer.

[0043] The bus driver is a functional unit consisting of two independent transceiver chips DS34C87. The input / output interface of the driver is respectively connected to the TTL bus output / input interface of the embedded high-performance microprocessor unit Loog1J chip. Its main function is to provide a bus communication channel between the highly integrated all-optical switching matrix board and the highly integrated VPX chassis.

[0044] The embedded high-performance microprocessor is a functional unit composed of a Loog 1J chip. Its main function is to control the coordinated operation of all functional units on the automatic debugging host unit: controlling the amplitude and number of paths of the DA drive array output drive deflection voltage, controlling the communication between the bus driver and the main control computer, controlling the health management unit to collect the current working status of the equipment, and controlling the optical routing switching module to change the optical routing status.

[0045] The optical routing switching module is a functional unit composed of MS-24-24-1315-SM modules. Its main function is to achieve 24×24 scale high isolation non-blocking all-optical switching through the micro-lens array light reflection principle under the drive of the DA drive control array.

[0046] The electro-optical conversion dense array daughter card optical connector is a functional unit composed of RPB4F12Q connectors, and its main function is to provide an optical signal coupling channel between the electro-optical conversion dense array daughter card and the highly integrated all-optical switching matrix board through the highly integrated VPX chassis.

[0047] The optical connector of the photoelectric conversion dense array daughter card is a functional unit composed of RPB4F12Q connectors, and its main function is to provide an optical signal coupling channel between the photoelectric conversion dense array daughter card and the highly integrated all-optical switching matrix board through the highly integrated VPX chassis.

[0048] like Figure 3As shown, the electro-optical conversion array daughter card includes an embedded microprocessor and a field programmable logic unit (FPGA), a power management unit (PMU), and a bus driver connected to the embedded microprocessor. The PMU is also connected to the laser array module, the FPGA, and the bus driver. The laser array module is connected to the electro-optical conversion array daughter card's electrical connector, the optical connector, the PMU, and the FPGA. The electro-optical conversion array daughter card's electrical connector is an electrical signal connector with a standard VPX connector, while the optical connector is an optical signal connector with an MT connector. The bus driver's control signals are connected to the highly integrated VPX chassis via the VPX electrical connector on the electro-optical conversion array daughter card. The electro-optical conversion array daughter card performs the following functions: Single-board card performs 24-channel 12.75G high-speed electro-optical conversion of electrical signals, and under the unified control of the host computer, controls the corresponding channel lasers in the laser array to operate or enter a low-power sleep state.

[0049] The field programmable logic processor is composed of an FPGA chip XC7VX690TFFG1761. The function of XC7VX690TFFG1761 is to expand the number of IO ports of the embedded microprocessor and expand a 24-way SPI bus through protocol conversion to provide a transmission channel between the embedded microprocessor and the laser array.

[0050] The power management unit is composed of the RSHF4644ARH power module. The function of the RSHF4644ARH is to convert the 12V bus voltage into multiple groups of 1.0V, 1.2V, 1.8V, 2.5V, and 3.3V operating voltages for use by various modules.

[0051] The bus driver is a functional unit composed of two DS34C87 transceiver chips. The two DS34C87 transceiver chips are independent of each other. The input / output interface of the driver is respectively connected to the TTL bus output / input interface of the embedded high-performance microprocessor unit Loog1J chip. Its main function is to provide a bus communication channel between the electro-optical conversion dense array card and the highly integrated VPX chassis.

[0052] The embedded microprocessor is a functional unit composed of Loog 1J chips. Its main function is to control the coordinated operation of all functional units on the electro-optical conversion dense array card and control the laser array module to complete the electro-optical conversion of 24-channel 12.75G high-speed electrical signals on the single board.

[0053] The laser array module is a functional unit composed of ST-24-12-15-SM modules, and its main function is to complete the electro-optical conversion of 24-channel 12.75G high-speed electrical signals on a single board under the control of an embedded microprocessor.

[0054] like Figure 4 As shown, the optoelectronic conversion array daughter card includes an embedded microprocessor and a field programmable logic unit (FPGA), a power management unit (PMU), and a bus driver connected to the embedded microprocessor. The PMU is also connected to the detector array module, the FPGA, the embedded microprocessor, and the bus driver. The detector array module is connected to the optoelectronic conversion array daughter card's optical connector, the optoelectronic conversion array daughter card's electrical connector, the PMU, and the FPGA. The optoelectronic conversion array daughter card's electrical connector is an electrical signal connector with a standard VPX connector, while the optoelectronic conversion array daughter card's optical connector is an optical signal connector with an MT connector. The bus driver's control signals are connected to the highly integrated VPX chassis via the VPX electrical connector on the optoelectronic conversion array daughter card. The optoelectronic conversion array daughter card performs the following functions: A single card performs 24-channel 13.25G high-speed optical signal optoelectronic conversion, and under the unified control of the host computer, the detectors in the corresponding channels of the detector array are placed in an active state or a low-power sleep state.

[0055] The field programmable logic processor is composed of an FPGA chip XC7VX690TFFG1761. The function of XC7VX690TFFG1761 is to expand the number of IO ports of the embedded microprocessor and expand a 24-way SPI bus through protocol conversion to provide a transmission channel between the embedded microprocessor and the detector array.

[0056] The power management unit is composed of the RSHF4644ARH power module. The function of the RSHF4644ARH is to convert the 12V bus voltage into multiple groups of 1.0V, 1.2V, 1.8V, 2.5V, and 3.3V operating voltages for use by various modules.

[0057] The bus driver is a functional unit composed of two DS34C87 transceiver chips. The two DS34C87 transceiver chips are independent of each other. The input / output interface of the driver is respectively connected to the TTL bus output / input interface of the embedded high-performance microprocessor unit Loog1J chip. Its main function is to provide a bus communication channel between the optoelectronic conversion dense array card and the highly integrated VPX chassis.

[0058] The embedded microprocessor is a functional unit composed of Loog 1J chips, and its main function is to control all functional units on the photoelectric conversion dense array card to work together and control the detector array module to complete the photoelectric conversion of 24-channel 13.25GG high-speed optical signals on the single board card.

[0059] The detector array module is a functional unit composed of RR-24-12-15-SM modules, and its main function is to complete the photoelectric conversion of 24-channel 13.25G high-speed optical signals on a single board under the control of an embedded microprocessor.

[0060] like Figure 5 As shown, the highly integrated VPX chassis includes a high-speed backplane and VPX frame components. The high-speed backplane is mounted on the VPX components and connected to the host computer via an RJ45 Ethernet interface. The highly integrated VPX chassis provides 19 card slots. The electro-optical conversion matrix daughter card can be inserted into any slot 1 to 6, and the highly integrated all-optical switch matrix board can be inserted into any slot 7 to 13. Slot 7 is mandatory and requires a highly integrated all-optical switch matrix board. The electro-optical conversion matrix daughter card can be inserted into any slot 14 to 19. All boards inserted into the highly integrated VPX chassis achieve optical and electrical signal interconnection through the high-speed backplane.

[0061] The high-speed backplane is composed of 1 FPGA chip XC7VX690TFFG1761, 1 transceiver chip DS34C87, 19 24-core MT optical connectors RPB4F12Q, and 19 VPX electrical connectors VPX20-1132-0001. The function of the FPGA chip XC7VX690TFFG1761 is to aggregate the control signals transmitted from each board into one control signal, which is output from the transceiver chip DS34C87 to the RJ45 connector on the high-speed backplane.

[0062] The intelligent master computer is a multi-core computer or other PC computer with a multi-core processor, equipped with a communication protocol conversion module RT-USB-485-3237. The function of the communication protocol conversion module RT-USB-485-3237 is to convert the USB interface signal of the master computer into a bus signal that can be received by the transceiver chip DS34C87. The function of the intelligent master computer is to receive IP network remote network control information and to uniformly control the electro-optical conversion dense array sub-card, the highly integrated all-optical switching matrix board, and the opto-electrical conversion dense array sub-card. The control content includes controlling the optical fiber data link system to perform system self-test, controlling the optical fiber data link system to perform channel detection, configuring the laser array register parameters, configuring the detector array register parameters, downloading the light routing reconstruction table, and controlling the optical fiber data link system to perform link verification. The master computer is also responsible for post-processing the collected optical fiber data link system operation data and uploading the link verification report to the remote operation and maintenance database.

[0063] The highly integrated modular optical data link system with intelligent optical domain reconstruction of the present invention is developed based on a modular approach. To expand the scale and capacity of the optical data link, it is only necessary to insert more electro-optical conversion dense array sub-cards, optoelectronic conversion dense array sub-cards, and highly integrated all-optical switch matrix boards into the standard VPX chassis. It supports the insertion of up to six electro-optical conversion dense array sub-cards, six optoelectronic conversion dense array sub-cards, and six highly integrated all-optical switch matrix boards, thereby expanding the scale of the optical data link from 24 to 144 channels, while supporting 144×144 scale non-blocking all-optical switching.

[0064] like Figure 6 As shown, the present invention also discloses an operation method of an optical domain intelligent reconstruction highly integrated modular optical fiber data link, including the above-mentioned optical domain intelligent reconstruction highly integrated modular optical fiber data link, and the operation method includes the following steps:

[0065] 1) System self-test: Automatically detect whether the working status of the intelligent main control computer, electro-optical conversion dense array sub-card, highly integrated VPX standard chassis, optoelectronic conversion dense array sub-card, and highly integrated all-optical switch matrix board is normal, and control the laser array of the electro-optical conversion dense array sub-card, the detector array of the optoelectronic conversion dense array sub-card, and the highly integrated all-optical switch matrix to be in initialization working mode. If the detected 1.0V, 1.2V, 1.8V, 2.5V, and 3.3V operating voltage deviations are not less than 10%, and the detected chip temperature is lower than 50°C, the system self-test is normal.

[0066] 2) Channel Detection: The highly integrated modular fiber-optic data link system supporting optical domain intelligent reconstruction is switched to a direct-through state, allowing the optical signal from the electro-optical conversion matrix card to be directly transmitted to the optoelectronic conversion matrix card. The detectors on the optoelectronic conversion matrix card detect the received optical power. If the optical power received by all detectors is greater than 3dB, the channel detection is normal. The direct-through state refers to the operating state in which all 24 input and output channels of the highly integrated all-optical switching matrix are directly connected one-to-one.

[0067] 3) Configure the laser array: Configure the laser array registers of the electro-optical conversion dense array daughter card to put the 24-channel laser into operation. The register at address OX 0021 is configured to OX 3F, the register at address OX 0031 is configured to OX 42, the register at address OX 0022 is configured to OX 16, the register at address OX 0033 is configured to OX 21, the register at address OX 0014 is configured to OX 55, and the register at address OX 0053 is configured to OX 23. At this time, the electro-optical conversion dense array daughter card is in 12.75G high-speed electrical signal electro-optical conversion mode.

[0068] 4) Optical domain routing reconstruction: According to the optical routing reconstruction table issued by the intelligent main control computer, the optical routing of the highly integrated all-optical switching matrix board is configured so that the laser optical signal of the channel corresponding to the electro-optical conversion dense array sub-card is intelligently switched to the detector output of the channel corresponding to the opto-electrical conversion dense array sub-card.

[0069] 5) Link Verification: The link verification code received by the photoelectric conversion dense array sub-card detector array is reported to the intelligent main control computer and verified with the link verification code reported by the electro-optical conversion dense array sub-card to the intelligent main control computer. If the verification code is correct, the link verification is successful. During link verification, the intelligent main control computer also collects information such as the verification start time, verification completion time, verification code, verification optical routing reconstruction table, optical power received by the detector during verification, parameter values ​​configured in the laser array register during verification, 1.0V, 1.2V, 1.8V, 2.5V, and 3.3V operating voltage values ​​detected during verification, and chip temperature detected during verification.

[0070] 6) Post-processing: The intelligent master computer performs post-processing on the configuration information and verification test data from step 5). This post-processing primarily involves generating a link verification report in the data format required by the operation and maintenance database. This report includes the verification start time, verification completion time, verification code, the optical routing reconstruction table during verification, the optical power received by the detector during verification, the parameter values ​​configured in the laser array registers during verification, the operating voltage values ​​of 1.0V, 1.2V, 1.8V, 2.5V, and 3.3V detected during verification, and the chip temperature detected during verification. The generated link verification report is then uploaded to the remote operation and maintenance database.

[0071] The above embodiments are only specific examples to further illustrate the purpose, technical solutions and beneficial effects of the present invention, and the present invention is not limited thereto. Any modifications, equivalent replacements, improvements, etc. made within the scope of the disclosure of the present invention are included in the scope of protection of the present invention.

Claims

1. A highly integrated modular optical fiber data link system with intelligent optical reconstruction, characterized by: include A highly integrated fiber optic data link platform based on all-optical switching and electro-optical / photoelectric conversion dense array, comprising an intelligent main control computer, at least one electro-optical conversion dense array daughter card, a highly integrated VPX standard chassis, at least one photoelectric conversion dense array daughter card, and at least one highly integrated all-optical switching matrix board; Among them, the intelligent main control computer is connected to the external network, the electro-optical conversion dense array daughter card and the photoelectric conversion dense array daughter card are connected to the highly integrated VPX standard chassis, and the highly integrated VPX standard chassis is connected to the highly integrated all-optical exchange matrix board card; The intelligent main control computer and the highly integrated VPX chassis are connected via an Ethernet interface; The fiber optic data link platform is composed of highly integrated all-optical switching matrix boards, electro-optical conversion dense array sub-cards, highly integrated VPX standard chassis, and photoelectric conversion dense array sub-cards. Under the control of the main control computer, the fiber optic data link platform realizes optical domain intelligent reconstruction of highly integrated modular fiber optic data links based on high-isolation all-optical switching technology. The highly integrated all-optical switching matrix card implements 24×24 non-blocking all-optical switching, providing optical domain switching channels between the electro-optical conversion dense array sub-cards and the opto-electrical conversion dense array sub-cards. Under the unified control of the intelligent main control computer, it intelligently changes the optical domain routing status of the fiber optic data link system and feeds back the current optical routing status parameters to the intelligent main control computer. The electro-optical conversion dense array sub-card realizes 24-channel 12.75G high-speed electrical signal electro-optical conversion, and under the unified control of the intelligent main control computer, the corresponding channel lasers in the laser array are in working or low-power dormant state; The photoelectric conversion dense array sub-card realizes the photoelectric conversion of 24 channels of 13.25G high-speed optical signals, and under the unified control of the intelligent main control computer, the corresponding channel detectors in the detector array are in working state or low-power dormant state; The highly integrated VPX standard chassis provides card slots for plugging in electro-optical conversion dense array daughter cards, highly integrated all-optical switching matrix daughter cards, and photoelectric conversion dense array daughter cards. All cards inserted into the highly integrated VPX standard chassis realize optical and electrical signal interconnection through a high-speed backplane. The intelligent main control computer receives IP network remote networking management and control information, and performs unified management and control on the electro-optical conversion dense array sub-card, the highly integrated all-optical switching matrix board card, and the photoelectric conversion dense array sub-card; The execution method of the system includes the following steps: 1) System self-test: Automatically detects whether the intelligent main control computer, electro-optical conversion dense array card, highly integrated VPX standard chassis, optoelectronic conversion dense array card, and highly integrated all-optical switch matrix board are working normally, and controls the laser array of the electro-optical conversion dense array card, the detector array of the optoelectronic conversion dense array card, and the highly integrated all-optical switch matrix to be in initialization working mode; 2) Channel detection: The highly integrated modular fiber optic data link system supporting optical domain intelligent reconstruction is switched to a pass-through state, allowing the optical signal of the electro-optical conversion dense array card to be directly transmitted to the optoelectronic conversion dense array card. The detectors of the optoelectronic conversion dense array card detect the received optical power. If the optical power received by all detectors is greater than 3dB, the channel detection is normal. The pass-through state refers to the working state of a one-to-one direct connection between the 24 input and output channels of the highly integrated all-optical switching matrix. 3) Configure the laser array: Configure the laser array registers of the electro-optical conversion dense array daughter card to put the 24-channel laser into operation. The register at address OX 0021 is configured to OX 3F, the register at address OX 0031 is configured to OX 42, the register at address OX 0022 is configured to OX 16, the register at address OX 0033 is configured to OX 21, the register at address OX 0014 is configured to OX 55, and the register at address OX 0053 is configured to OX 23. At this time, the electro-optical conversion dense array daughter card is in the 12.75G high-speed electrical signal electro-optical conversion mode; 4) Optical domain routing reconstruction: Based on the optical routing reconstruction table issued by the intelligent master control computer, the optical routing of the highly integrated all-optical switching matrix board is configured, so that the laser optical signal of the channel corresponding to the electro-optical conversion dense array sub-card is intelligently switched to the detector output of the channel corresponding to the opto-electrical conversion dense array sub-card; 5) Link Verification: The link verification code received by the photoelectric conversion dense array sub-card detector array is reported to the intelligent main control computer and verified with the link verification code reported by the electro-optical conversion dense array sub-card to the intelligent main control computer. If the verification code is correct, the link verification is successful. During the link verification, the intelligent main control computer will also collect the verification start time, verification completion time, verification code, verification optical routing reconstruction table, optical power received by the detector during verification, parameter values ​​of the laser array register configuration during verification, operating voltage value detected during verification, and chip temperature information detected during verification. 6) Post-processing: The intelligent main control computer performs post-processing on the configuration information and verification test data of step 5).

2. The optical domain intelligent reconstruction highly integrated modular optical fiber data link system according to claim 1, characterized in that: The highly integrated all-optical switching matrix board includes an embedded microprocessor and a DA drive control array, a power management unit, a health management unit, and a bus driver connected to the embedded microprocessor; wherein the power management unit and the health management unit are also connected to the DA drive control array and the bus driver, the DA drive control array is connected to the power management unit, the optical routing switching module, the health management unit, and the embedded microprocessor, and the optical routing switching module is connected to the DA drive control array and the optical connector of the electro-optical conversion dense array daughter card and the optical connector of the photoelectric conversion dense array daughter card provided on the highly integrated all-optical switching matrix board.

3. The optical domain intelligent reconstruction highly integrated modular optical fiber data link system according to claim 2, characterized in that: The optical connector of the electro-optical conversion dense array card is a 24-core MT connector optical connector, and the optical connector of the photoelectric conversion dense array card is a 24-core MT connector optical connector; the control signal of the bus driver is connected to the highly integrated VPX chassis through the VPX electrical connector on the highly integrated all-optical switching matrix board.

4. The optical domain intelligent reconstruction highly integrated modular optical fiber data link system according to claim 1, characterized in that: The electro-optical conversion dense array daughter card includes an embedded microprocessor and a field programmable logic device, a power management unit, and a bus driver connected to the embedded microprocessor; wherein the power management unit is also connected to the laser array module, the field programmable logic processor, and the bus driver, and the laser array module is connected to the electro-optical conversion dense array daughter card electrical connector, the electro-optical conversion dense array daughter card optical connector, the power management unit, and the field programmable logic processor.

5. The optical domain intelligent reconstruction highly integrated modular optical fiber data link system according to claim 4, characterized in that: The electrical connector of the electro-optical conversion dense array card is an electrical signal connector with a standard VPX connector, and the optical connector of the electro-optical conversion dense array card is an optical signal connector with an MT connector; the control signal of the bus driver is connected to the highly integrated VPX chassis through the VPX electrical connector on the electro-optical conversion dense array card.

6. The optical domain intelligent reconstruction highly integrated modular optical fiber data link system according to claim 1, characterized in that: The photoelectric conversion dense array daughter card includes an embedded microprocessor and a field programmable logic device, a power management unit, and a bus driver connected to the embedded microprocessor; wherein the power management unit is also connected to the detector array module, the field programmable logic processor, the embedded microprocessor, and the bus driver, and the detector array module is connected to the photoelectric conversion dense array daughter card optical connector, the photoelectric conversion dense array daughter card electrical connector, the power management unit, and the field programmable logic processor.

7. The optical domain intelligent reconstruction highly integrated modular optical fiber data link system according to claim 6, characterized in that: The electrical connector of the optoelectronic conversion dense array card is an electrical signal connector with a standard VPX connector, and the optical connector of the optoelectronic conversion dense array card is an optical signal connector with an MT connector; the control signal of the bus driver is connected to the highly integrated VPX chassis through the VPX electrical connector on the optoelectronic conversion dense array card.

8. The optical domain intelligent reconstruction highly integrated modular optical fiber data link system according to claim 1, characterized in that: The highly integrated VPX chassis includes a high-speed backplane and a VPX frame structure. The high-speed backplane is installed on the VPX structure and is connected to the intelligent main control computer through an RJ45 Ethernet interface. The highly integrated VPX chassis provides 19 board slots. The electro-optical conversion dense array daughter card is inserted into any slot from 1 to 6; the highly integrated all-optical switching matrix board card is inserted into any slot from 7 to 13, among which slot 7 is a required slot; the opto-electrical conversion dense array daughter card is inserted into any slot from 14 to 19.

9. The optical domain intelligent reconstruction highly integrated modular optical fiber data link system according to claim 1, characterized in that: The post-processing in step 6) is to generate a link verification report in the data format required by the operation and maintenance database; the link verification report content includes the verification start time, verification completion time, verification code used for verification, the optical routing reconstruction table during verification, the optical power received by the detector during verification, the parameter values ​​configured in the laser array register during verification, the 1.0V, 1.2V, 1.8V, 2.5V, and 3.3V operating voltage values ​​detected during verification, and the chip temperature detected during verification. The generated link verification report is then uploaded to the remote operation and maintenance database.

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