Image sensor and manufacturing method thereof

Abstract

The invention provides an image sensor and a manufacturing method thereof, and the method comprises the steps: carrying out the non-crystallization ion implantation of a central region of a photodiode region through an implantation window of a patterned mask layer, forming a non-crystallization region in a substrate of the central region, and enlarging the implantation window of the patterned mask layer, the expanded injection window is enabled to expose the edge area of the photodiode area, and then second conductive type ions are injected into one of the central area and the edge area of the photodiode area through the expanded injection window to form a photodiode buried layer. Since the central region of the photodiode region is amorphized and the edge region is not amorphized, when the central region and the edge region are simultaneously subjected to second conduction type ion implantation, the edge region is easier to generate ion diffusion than the central region, and when the potential gradient of the central region reaches the level of the prior art, the edge region is easier to generate ion diffusion. The potential of the marginal region is relatively increased from low, and the potential gradient of the marginal region is effectively improved, so that the photoelectron storage capability of the photodiode is improved, and the effect of improving the full well capacity is achieved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices and manufacturing thereof, and in particular to an image sensor and a manufacturing method thereof. Background Art

[0002] An image sensor is a semiconductor device that converts light signals into electrical signals. It is divided into complementary metal oxide semiconductor (CMOS) image sensors and charge coupled device (CCD) image sensors. CMOS image sensors have the advantages of simple process, easy integration with other devices, small size, light weight, low power consumption and low cost. Therefore, with the development of image sensing technology, CMOS image sensors are increasingly replacing CCD image sensors in various electronic products. At present, CMOS image sensors have been widely used in digital cameras, medical cameras, and automotive cameras.

[0003] CMOS image sensors include front side illumination (FSI) image sensors and back side illumination (BSI) image sensors. In a back-illuminated image sensor, light is incident on the photodiode in the image sensor from the back side, thereby converting light energy into electrical energy. Full well capacity (FWC) is an important parameter that characterizes the performance of image sensors / photodiodes. It refers to the maximum number of electrons that can be carried in the photodiode capacitor. A larger full well capacity can enable a CMOS image sensor (CIS) unit to have a higher dynamic range, higher signal-to-noise ratio and sensitivity. It can be said that the size of the full well capacity can fundamentally determine the overall performance of pixel imaging.

[0004] However, with the development of technology and the expansion of the market, the size of CMOS image sensors has gradually decreased, and the area of ​​photodiodes has also decreased accordingly. The most direct impact is the reduction of the full well capacity of the image sensor. Summary of the invention

[0005] An object of the present invention is to provide an image sensor and a method for manufacturing the same, which can reduce the cost and increase the full well capacity of the image sensor.

[0006] To achieve the above object, the present invention provides a method for manufacturing an image sensor, which comprises the following steps:

[0007] Providing a substrate of a first conductivity type, forming a patterned mask layer having an injection window on a photodiode region of the substrate, wherein the patterned mask layer masks an edge region of the photodiode region and the injection window is aligned with a central region of the photodiode region;

[0008] Using the patterned mask layer as a mask, performing amorphization ion implantation into the substrate in the implantation window to form an amorphization region in the substrate in the central region;

[0009] Performing an enlargement process on the injection window to enlarge the injection window to expose the edge area;

[0010] The patterned mask layer after the injection window is enlarged is continued to be used as a mask to implant second conductive type ions into the substrate of the enlarged injection window to form a second conductive type photodiode buried layer in the substrate of the photodiode region.

[0011] Optionally, the ions used in the amorphization ion implantation include at least one of Ge, Si, Sb and C.

[0012] Optionally, the bottom of the amorphized region is shallower than or connected to the top of the photodiode buried layer; or, the width of the central area of ​​the photodiode region is 1 / 3 to 3 / 4 of the width W1 of the photodiode region.

[0013] Optionally, the implantation energy during amorphization ion implantation is 1 KeV to 100 KeV, and the implantation dose is 10 13 atom / cm 2 ~10 15 atom / cm 2 .

[0014] Optionally, the first conductivity type is P type, the second conductivity type is N type, and the second conductivity type ions include at least one of P, As, and Sb; or, the first conductivity type is N type, the second conductivity type is P type, and the second conductivity type ions include at least one of B, Ga, and In.

[0015] Optionally, the implantation energy when implanting the second conductive type ions into the enlarged substrate of the implantation window is 1000KeV to 5000KeV, and the implantation dose is 10 12 atom / cm 2 ~10 15 atom / cm 2 .

[0016] Optionally, the implantation window is enlarged by at least one of plasma ion bombardment and wet etching.

[0017] Optionally, the material of the patterned mask layer is photoresist, and the injection window is enlarged by a plasma physical bombardment process; or, the material of the patterned mask layer is an insulating dielectric material different from photoresist, and the injection window is enlarged by a wet etching process or a plasma bombardment process.

[0018] Optionally, the manufacturing method further includes: after providing a substrate of a first conductivity type and before forming the patterned mask layer on the photodiode region of the substrate, it also includes: forming an isolation well of a first conductivity type in the substrate, the isolation well being used to define the photodiode region.

[0019] Optionally, the manufacturing method also includes: before forming the isolation well, first forming a shallow trench isolation structure in the substrate, the isolation well surrounding the sidewalls and bottom surface of the shallow trench isolation structure; or, after forming the isolation well and before forming the patterned mask layer, forming a shallow trench isolation structure in the isolation well.

[0020] Based on the same inventive concept, the present invention also provides an image sensor, which includes:

[0021] A substrate of a first conductivity type, the substrate having a photodiode region, the photodiode region having a central region and an edge region located outside the central region;

[0022] an amorphized region formed in the substrate in a central region of the photodiode region;

[0023] A second conductive type photodiode buried layer is formed in the central region and extends from the central region to an edge region of the photodiode region.

[0024] Compared with the prior art, the technical solution of the present invention has at least one of the following beneficial effects:

[0025] 1. First, the amorphization ion implantation is performed on the central region of the photodiode region by using the implantation window of the patterned mask layer to form an amorphization region in the substrate of the photodiode region, and then the implantation window of the patterned mask layer is enlarged so that the enlarged implantation window can further expose the edge region of the photodiode region, and then the second conductive type ions are implanted into the central region and the edge region of the photodiode region through the enlarged implantation window to form a photodiode buried layer. Since the central region of the photodiode region is amorphized, while the edge region is not amorphized, when the second conductive type ion implantation is performed on the central region and the edge region at the same time, the edge region is more likely to produce ion diffusion than the central region, and when the potential gradient of the central region reaches the existing technical level, the potential of the edge region is relatively changed from low to high and the potential gradient of the edge region is effectively improved, thereby improving the photodiode's ability to store photoelectrons and achieving the effect of improving the full well capacity.

[0026] 2. By amorphizing the central region of the photodiode region, the longitudinal and lateral diffusion of the second conductive type ions injected into the central region during the subsequent second conductive type ion injection can be reduced, effectively preventing the occurrence of image tailing in the central region of the photodiode region.

[0027] 3. Since amorphization ion implantation and second conductivity type ion implantation can be completed with one mask, the mask cost is reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Those skilled in the art will appreciate that the accompanying drawings are provided for a better understanding of the present invention and do not constitute any limitation on the scope of the present invention.

[0029] Figure 1 It is a schematic diagram of the structure and potential distribution curve of the photodiode in the existing image sensor.

[0030] Figure 2 The figure is a schematic flow chart of a method for manufacturing an image sensor according to an embodiment of the present invention.

[0031] Figure 3 yes Figure 2 A schematic diagram of a device cross-sectional structure in a method for manufacturing an image sensor is shown.

[0032] Figure 4 It is a schematic diagram of a device cross-sectional structure in a method for manufacturing an image sensor in another embodiment of the present invention.

[0033] Figure 5 Schematic diagram of potential distribution curves of a basic standard line (BSL), a single As ion implantation, and an image sensor obtained according to an embodiment of the present invention. DETAILED DESCRIPTION

[0034] In the following description, a large number of specific details are given in order to provide a more thorough understanding of the present invention. However, it is obvious to those skilled in the art that the present invention can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present invention, some technical features known in the art are not described. It should be understood that the present invention can be implemented in different forms and should not be interpreted as being limited to the embodiments proposed here. On the contrary, providing these embodiments will make the disclosure thorough and complete, and the scope of the present invention will be fully conveyed to those skilled in the art. The same reference numerals represent the same elements from beginning to end. It should be understood that when an element is referred to as "connected to", "coupled" other elements, it can be directly connected to other elements, or there can be intervening elements. On the contrary, when an element is referred to as "directly connected to" other elements, there is no intervening element. When used here, the singular forms of "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates another way. It should also be understood that the term "comprising" is used to identify the presence of features, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, steps, operations, elements, components and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0035] A structure of a back-illuminated CMOS image sensor in the prior art is as follows: Figure 1 As shown, it includes a P+ isolation well and a photodiode buried layer formed in a substrate.

[0036] The inventors have found that the current process usually forms a P+ isolation well in the substrate to define the photodiode area, and then performs As and other N-type ion implantation on the photodiode area. After the As and other N-type ion implantation, the As and other N-type ions in the central and edge areas of the photodiode area diffuse, and the potential at the bottom of the edge area is lower than the potential at the same level in the central area, thereby causing the loss of the full well capacity between its potential distribution curve and the potential line Vpot that could have been partially used to accommodate photoelectrons, resulting in a small full well capacity and low overall pixel imaging performance.

[0037] Based on this, the present invention provides an image sensor and a manufacturing method thereof, firstly using the injection window of the patterned mask layer to perform amorphization ion implantation on the central area of ​​the photodiode area, forming an amorphization area in the substrate of the central area of ​​the photodiode area, and then enlarging the injection window of the patterned mask layer so that the enlarged injection window can further expose the edge area of ​​the photodiode area, and then injecting the second conductive type ions into the photodiode area (including the central area and the edge area) through the enlarged injection window to form a photodiode buried layer. Since the central area of ​​the photodiode area is amorphized, while the edge area is not amorphized, when the second conductive type ion implantation is performed on the central area and the edge area at the same time, the edge area is more likely to produce ion diffusion than the central area, and when the potential gradient of the central area reaches the existing technical level, the potential of the edge area is relatively changed from low to high and the potential gradient of the edge area is effectively improved, thereby improving the photodiode's ability to store photoelectrons and achieving the effect of improving the full well capacity. Moreover, the front and rear ion implantations of the photodiode area are completed by one mask, which reduces the mask cost. In addition, by amorphizing the central region of the photodiode region, the longitudinal and lateral diffusion of the second conductive type ions injected into the central region during the subsequent second conductive type ion injection can be reduced, effectively preventing the occurrence of image tailing in the central region of the photodiode region. When the first conductive type is P-type, the corresponding second conductive type is N-type, and when the first conductive type is N-type, the corresponding second conductive type is P-type.

[0038] The following is combined with Figures 2 to 5 The technical solution proposed by the present invention is further described in detail with specific embodiments. The advantages and features of the present invention will become clearer according to the following description. It should be noted that the drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0039] Please refer to Figure 2 An embodiment of the present invention provides a method for manufacturing an image sensor, which comprises the following steps:

[0040] S1, providing a substrate of a first conductivity type, and forming a patterned mask layer having an injection window on a photodiode region of the substrate, wherein the patterned mask layer masks an edge region of the photodiode region and the injection window is aligned with a central region of the photodiode region;

[0041] S2, using the patterned mask layer as a mask, performing amorphization ion implantation into the substrate in the implantation window to form an amorphization region in the substrate in the central region;

[0042] S3, enlarging the injection window to expand the injection window to expose the edge area;

[0043] S4, continue to use the patterned mask layer after the injection window is enlarged as a mask to perform second conductivity type ion implantation into the substrate of the enlarged injection window to form a second conductivity type photodiode buried layer in the substrate of the photodiode region.

[0044] Please refer to Figure 3 (A) in step S1, first, a substrate 100 of the first conductivity type is provided, and the substrate 100 can be any suitable semiconductor substrate material in the art, such as silicon, germanium, silicon germanium, silicon carbide, silicon on insulator, gallium arsenide or indium gallium, etc. The substrate 100 of the first conductivity type can be a substrate 100 that is globally lightly doped with ions of the first conductivity type, or a partial region is doped with ions of the first conductivity type to form a deep well (Deep Well Implant) region of the first conductivity type. Wherein, when the first conductivity type is P-type, the P-type ions doped in the substrate 100 include at least one of B, Ga, and In; when the first conductivity type is N-type, the N-type ions doped in the substrate 100 include at least one of P, As, and Sb.

[0045] Please refer to Figure 3 In (A) to (D), in step S1, then, any suitable process can be used to form a protective layer 101 on the substrate 100, and to form an isolation well 106 of a first conductivity type and a shallow trench isolation structure 104 in the substrate 100. The isolation well 106 and the shallow trench isolation structure 104 can define a photodiode region in the substrate 100 and achieve isolation between adjacent photodiode regions.

[0046] As an example, in step S1, based on the substrate 100, the following sub-steps are sequentially performed to form a protection layer 101, an isolation well 106 of the first conductivity type, and a shallow trench isolation structure 104:

[0047] (1) Please refer to Figure 3In (A), a protective layer 101 and a hard mask layer 102 are sequentially formed on the surface of the substrate 100 by any suitable process such as a thermal oxidation process, a thermal nitridation process or a vapor deposition process. The protective layer 101 may be a single-layer film structure or a structure formed by stacking multiple films of different materials, and its material may include at least one of silicon oxide, silicon nitride, silicon oxynitride, amorphous carbon, etc. The hard mask layer 102 may be a single-layer film structure or a structure formed by stacking multiple films of different materials, and its material may be at least one of silicon oxide, silicon nitride, silicon oxynitride, titanium, titanium nitride, tantalum, and titanium nitride. Preferably, the protective layer 101 serves as an etch stop layer for subsequent etching of the hard mask layer 102.

[0048] (2) Please continue to refer to Figure 3 In (A), a photoresist is coated on the hard mask layer 102 and a photolithography process such as exposure and development is performed to form a patterned photoresist layer (not shown) for defining a formation area of ​​a shallow trench isolation structure.

[0049] (3) Please continue to refer to Figure 3 In (A), the hard mask layer 102 is etched using the patterned photoresist layer as a mask and the protective layer 101 as an etch stop layer, thereby forming a shallow trench pattern in the hard mask layer 102 .

[0050] (4) Please continue to refer to Figure 3 In (A), the patterned photoresist layer is removed, and the protection layer 101 and a portion of the thickness of the substrate 100 are etched using the hard mask layer 102 as a mask, thereby forming a shallow trench 103 in the substrate 100.

[0051] (5) Please refer to Figure 3 In (B), the corresponding insulating dielectric material is deposited to fill each shallow trench 103, and the deposited insulating dielectric material is further subjected to chemical mechanical polishing (CMP), stopping at the hard mask layer 102, and further removing the hard mask layer 102 through a wet etching process, thereby forming a shallow trench isolation structure 104 filled in the shallow trench 103.

[0052] (6) Please refer to Figure 3 In (C), photoresist is further coated on the protective layer 101 and the shallow trench isolation structure 104, and photolithography processes such as exposure and development are performed to form a patterned photoresist layer 105 for defining the formation area of ​​the isolation well 106. The pattern window in the patterned photoresist layer 105 is aligned with the shallow trench isolation structure 104 and the line width is greater than the shallow trench isolation structure 104.

[0053] (7) Please continue to refer to Figure 3In (C) and (D), the patterned photoresist layer 105 is used as a mask to perform ion implantation of the first conductive type on the substrate 100 around and at the bottom of the shallow trench isolation structure 104 to form an isolation well 106 surrounding the sidewalls and bottom of the shallow trench isolation structure 104. The patterned photoresist layer 105 is then removed.

[0054] In the above example, a shallow trench isolation structure 104 is first formed in the substrate 100 , and then an isolation well 106 surrounding the sidewall and bottom surface of the shallow trench isolation structure 104 is formed in the substrate 100 by ion implantation.

[0055] As another example, consider combining Figure 3 In (A) to (D), in step S1, based on the substrate 100, the following sub-steps are sequentially performed to form a protection layer 101 and a first conductivity type isolation well 106 and a shallow trench isolation structure 104:

[0056] (1) Please refer to Figure 3 In (A), a protection layer 101 and a hard mask layer 102 are sequentially formed on the surface of the substrate 100 by any suitable process such as a thermal oxidation process, a thermal nitridation process or a vapor deposition process.

[0057] (2) Please refer to Figure 3 In (A), a photoresist is coated on the hard mask layer 102 and a photolithography process such as exposure and development is performed to form a patterned photoresist layer (not shown) for defining a formation region of an isolation well.

[0058] (3) Please continue to refer to Figure 3 In (A), the hard mask layer 102 is etched using the patterned photoresist layer as a mask and the protection layer 101 as an etch stop layer, thereby forming a pattern of the isolation well 106 in the hard mask layer 102 .

[0059] (4) The patterned photoresist layer is removed, and the first conductive type ion implantation is performed on the substrate 100 using the hard mask layer 102 as a mask, thereby forming an isolation well 106 .

[0060] (5) A photoresist is further coated on the protective layer 101 and the isolation well 106 and subjected to photolithography processes such as exposure and development to form a patterned photoresist layer (not shown) for defining a formation area of ​​the shallow trench isolation structure. The pattern window in the patterned photoresist layer is aligned with the isolation well 106 and has a line width smaller than the isolation well 106.

[0061] (6) Using the patterned photoresist layer as a mask, the protective layer 101 and a portion of the thickness of the substrate 100 are etched to form a shallow groove pattern in the substrate 100.

[0062] (7) The patterned photoresist layer is removed and a corresponding insulating dielectric material is deposited until each shallow trench 103 is filled, and the deposited insulating dielectric material is further subjected to chemical mechanical polishing (CMP), stopping at the hard mask layer 102, and further removing the hard mask layer 102 through a wet etching process, thereby forming a shallow trench isolation structure 104 filled in the shallow trench 103.

[0063] In the above example, the isolation well 106 is first formed in the substrate 100 , and then the shallow trench isolation structure 104 is further formed in the isolation well 106 .

[0064] Optionally, the material of the shallow trench isolation structure 104 is selected from at least one of silicon oxide, silicon nitride, undoped polysilicon (UndopedPoly) and high-K material. The process of depositing the material of the shallow trench isolation structure 104 may include a high-density plasma chemical vapor deposition (HDPCVD) process, a high-aspect ratio chemical vapor deposition (HARPCVD) process, a flowable chemical vapor deposition (FCVD) process, etc. The HDPCVD process and the HARPCVD process can better improve the hole filling ability of the dielectric material, so as to contact the shallow trench 103 more closely and reduce the possibility of forming voids in the shallow trench 103. The high-K material may be a dielectric material with a K value greater than 3.9, for example, it may be selected from at least one of HfO2, La2O3, HfSiON, HfAlO2, ZrO2, Al2O3 and HfSiO4.

[0065] Please refer to Figure 3 In (E), in step S1, after forming the isolation well 106 and the shallow trench isolation structure 104, a patterned mask layer 107 for defining the central region of the photodiode region (i.e., the region to be amorphized) can be formed by any suitable mask forming process. As an example, by coating a photoresist on the protective layer 101 and performing photolithography processes such as exposure and development, a patterned photoresist having an injection window 107a is formed as the patterned mask layer 107, and the patterned mask layer 107 exposes the central region of the photodiode region defined by the P isolation well 106 through its injection window 107a, and masks other regions.

[0066] In another example, the patterned mask layer 107 may also be composed of an insulating dielectric material different from the photoresist, and may be a single-layer insulating dielectric material film structure, or a structure formed by stacking multiple insulating dielectric material films, for example, it includes a hard mask layer (such as silicon nitride or silicon oxynitride, etc.), a bottom anti-reflective layer (not shown), a spin-on carbon layer (not shown), and other film layers located between the photoresist and the substrate. One or more film combinations. In this example, the patterned mask layer 107 is covered on the protective layer 101 by any suitable process such as chemical vapor deposition, and then a photoresist is coated on the patterned mask layer 107, and a photolithography is performed to form a central area (i.e., an area to be amorphized) in the photoresist for defining the photodiode region, and then, the photoresist after photolithography is used as a mask to etch the patterned mask layer 107 to form an injection window 107a before expansion in the patterned mask layer 107. The remaining photoresist on the patterned mask layer 107 can be directly removed after the pre-expansion injection window 107a is formed, thereby preventing the photoresist from causing adverse effects on subsequent amorphization ion implantation. In addition, without reducing device performance and increasing process difficulty, after the pre-expansion injection window 107a is formed, the remaining photoresist on the patterned mask layer 107 can also be retained until after step S3 or after step S4 before being removed.

[0067] Please continue to refer to Figure 3 (E) in step S2, with the patterned mask layer 107 as a mask, amorphizing ion implantation is performed into the substrate 100 at the bottom of the implantation window 107a (i.e., ions for amorphizing the substrate 100 are implanted into the substrate 100, and these ions are usually different from the base material elements of the substrate 100), so that at least the surface layer of the substrate 100 in the central region of the photodiode region is amorphized to form an amorphized region 108. The amorphized region 108 is used to block the diffusion of the ions implanted in the subsequent step S4 into the substrate 100 in the central region. Among them, the ions used for amorphizing ion implantation (i.e., the ions for amorphizing the substrate 100) can be any suitable ones, for example, any suitable at least one can be selected from Si, C, Ge, Sb and other ions. As an example, when the substrate 100 is a bulk silicon substrate or a silicon-on-insulator substrate (the substrate used to manufacture photodiodes is Si), the ions used for amorphizing ion implantation in this step can be selected from at least one of C, Ge, and Sb; when the substrate 100 is a silicon germanium substrate (the substrate is SiGe), the ions used for amorphizing ion implantation in this step can be selected from C or Sb or a mixed ion of C and Sb; when the substrate 100 is silicon carbide (the substrate is SiC), the ions used for amorphizing ion implantation in this step can be selected from Ge or Sb or a mixed ion of Ge and Sb.

[0068] The combined effect of the width, depth and amorphization degree of the amorphized region 108 and the ion implantation in the subsequent step S4 will affect the potential distribution curve trend at the photodiode region, thereby affecting the full well capacity of the image sensor.

[0069] Therefore, the width W1 of the amorphized region 108 can be adjusted according to the actual size of the pixel. For example, the amorphized region 108 occupies 1 / 3 to 3 / 4 of the width W2 of the photodiode region.

[0070] The implantation depth of the amorphized region 108 depends on the implantation process conditions such as the implanted ion species and the implantation energy, which are not specifically limited in the present invention. Optionally, the bottom depth of the amorphized region 108 is less than or equal to the bottom depth of the photodiode buried layer 109 formed in the subsequent step S4.

[0071] For example, the amorphized region 108 may be located only on the surface of the substrate 100 in the central region defined by the injection window 107a, and has no overlap with the photodiode buried layer 109 formed in step S4 in the vertical direction, that is, the bottom of the amorphized region 108 is not connected to the top of the photodiode buried layer 109 formed in step S4. Figure 3 As shown in (G) in .

[0072] For another example, the amorphized region 108 may be located only on the surface of the substrate 100 in the central region defined by the injection window 107a and may be connected to the photodiode buried layer 109 formed in step S4 in the vertical direction, that is, the bottom of the amorphized region 108 is adjacent to the top of the photodiode buried layer 109 formed in step S4, as shown in FIG. Figure 4 shown.

[0073] For another example, the amorphized region 108 is located in the substrate 100 in the central area defined by the injection window 107a and overlaps with the photodiode buried layer 109 formed in step S4 in the vertical direction. The amorphized region 108 can extend downward from the surface of the substrate 100 to below the top and above the bottom of the photodiode buried layer 109 formed in step S4.

[0074] As an example, in step S2, when amorphization ion implantation is performed on the substrate 100 at the bottom of the implantation window 107a, the implantation energy is 1KeV to 100KeV, and the implantation dose is 10 13 atom / cm 2 ~10 15 atom / cm 2 .

[0075] Please refer to Figure 3In (F), in step S3, the injection window 107a is enlarged by any suitable process such as ion bombardment (which can be physical, chemical, or a combination of physical and chemical) or etching to expand the injection window 107a to expose the edge area of ​​the photodiode region.

[0076] As an example, the patterned mask layer 107 is a photoresist, and the material of the corresponding thickness on the side wall of the injection window 107a is removed by plasma physical body bombardment (i.e., Descum process), so as to expand the injection window 107a to expose the edge area of ​​the photodiode region. In this way, no other film layers are needed, and only one photomask is used to lithograph the photoresist layer and further with the Descum process, so as to realize two different ion implantation windows before and after the Descum process, which has simple process steps, saves photomasks, and has low cost.

[0077] As another example, the material with the injection window 107a formed in step S1 is an insulating dielectric material such as silicon nitride, silicon oxynitride, titanium nitride or tantalum nitride, and the injection window 107a before expansion in the patterned mask layer 107 is formed by one-time photolithography and etching. Regardless of whether the remaining photoresist on the patterned mask layer 107 is removed in step S1, in step S3, the material of corresponding thickness on the side wall of the injection window 107a can be removed by a suitable process such as wet etching or plasma physical bombardment, thereby expanding the injection window 107a to expose the edge area of ​​the photodiode region. Therefore, the formation of two ion implantation windows of different sizes in steps S1 and S3 in this example only requires one photomask, which also saves the photomask. However, compared with the example in which the patterned mask layer 107 is a photoresist, the deposition and etching costs of the patterned mask layer will be increased (because the photoresist needs to be removed in the intermediate step).

[0078] Please refer to Figure 3 In step S4, the patterned mask layer 107 is used as a mask to perform second conductivity type ion implantation into the substrate 100 at the bottom of the expanded implantation window 107a, so as to implant second conductivity type ions into the substrate 100 in the central region and the edge region of the photodiode region, thereby forming a photodiode buried layer 109 in the substrate 100 in the photodiode region. The patterned mask layer 107 is then removed by any suitable process such as an ashing process.

[0079] The photodiode buried layer 109 formed in this step extends from the central area to the edge area, and under the obstruction of the amorphized region 108 in the central area, the longitudinal penetration ability and diffusion ability of the second conductive type ions injected in the central area are weakened, and the lateral diffusion of the second conductive type ions injected in the central area is also weakened. Therefore, the bottom depth of the photodiode buried layer 109 becomes shallower than the depth of its edge area, and the doping concentration of the photodiode buried layer 109 in the edge area is higher than the doping concentration in the central area, thereby increasing the potential gradient of the edge area of ​​the photodiode buried layer 109, so that the potential of the edge area changes from low to high compared with the potential of the edge area of ​​the photodiode buried layer formed under the prior art.

[0080] In addition, the injection windows for the two ion implantations in step S2 and step S4 are manufactured through the same patterned mask layer 107. Specifically, in step S2, photolithography is performed with the aid of a mask and subsequent corresponding processes are performed to form the required injection window. In step S4, the injection window is enlarged to form the required injection window. That is, step S2 and step S4 use the same mask and only require one exposure in step S2 to achieve the desired effect, thereby saving the cost of a mask and a photolithography process.

[0081] Optionally, when the second conductive type ions are implanted into the substrate 100 of the enlarged implantation window 107a, the implantation energy is 1000KeV to 5000KeV (eg, 1300KeV to 4400KeV), and the implantation dose is 10 12 atom / cm 2 ~10 15 atom / cm 2 (For example, 10 13 atom / cm 2 ~10 14 atom / cm 2 ).

[0082] It should be noted that, in this embodiment, the edge region of the photodiode region is connected to the edge of the isolation well 106, so the edge of the photodiode buried layer 109 formed is connected to the edge of the isolation well 106, but the technical solution of the present invention is not limited to this. In other embodiments, by controlling the line width of the expanded injection window 107a and the lateral distance between its boundary and the boundary of the isolation well 106, the lateral distance between the edge region of the photodiode buried layer 109 finally formed and the boundary of the isolation well 106 can be controlled. For example, in one embodiment, the edge region of the photodiode buried layer 109 does not overlap with the isolation well 106 and the boundaries of the two are not connected. For another example, in another embodiment, the expanded injection window 107a also exposes a part of the isolation well 106, so that a part of the edge region of the photodiode buried layer 109 formed can overlap with this part of the isolation well 106, and the overlapping part is of the second conductivity type.

[0083] In order to better illustrate the effect of the technical solution of the present invention, we have made a comparative analysis of the potential distribution curves of the basic standard line BSL (single As ion implantation with standard implantation energy to form a photodiode buried layer), single As ion implantation with an implantation energy higher than BSL to form a photodiode buried layer, and the present invention (amorphization ion implantation + As ion implantation with an implantation energy higher than BSL to form a photodiode buried layer). Please refer to Figure 5 , Figure 5 (A) is the potential distribution curve under the basic standard line BSL. Figure 5 (B) is the potential distribution curve when a single As ion is implanted at an energy higher than the BSL. Figure 5 (C) in FIG. 1 is the potential distribution curve of the present invention.

[0084] contrast Figure 5 From (A) and (B), it can be found that when other process conditions remain unchanged and only the As ion implantation energy is increased, the potential distribution curve of the photodiode region changes relative to the BSL, especially the potential curve in the central area will exceed the potential line Vpot, which can easily cause the image tailing in the central area.

[0085] In contrast Figure 5 It can be found from (B) and (C) in FIG. 1 that, since the present invention performs amorphous ion implantation in the central region before As ion implantation, the present invention adopts the same Figure 5When the same As ions are implanted in (B), under the blocking effect of the amorphous region, the potential curve of the central region can return to the potential height of the BSL (that is, return to within the potential line Vpot), thereby avoiding the occurrence of image tailing in the central region; at the same time, since the potential curve of the edge region is expanded outward relative to the curve of the BSL and is closer to the potential line Vpot, that is, the potential of the edge region is increased accordingly due to the increase in the As ion implantation energy compared to the BSL, the potential gradient of the edge region of the photodiode buried layer is increased, so that the potential of the edge region changes from low to high compared to the same region in the BSL, thereby making full use of the area between the potential curve of the BSL and the potential line Vpot, thereby improving the photodiode's ability to store photoelectrons, and ultimately improving the full well capacity of the image sensor with the photodiode buried layer.

[0086] In summary, the manufacturing method of the image sensor of the present invention first uses the injection window of the patterned mask layer to perform amorphization ion implantation on the central area of ​​the photodiode area, so as to form an amorphized area in the substrate of the photodiode area, and then expands the injection window of the patterned mask layer so that the expanded injection window can expose the edge area of ​​the photodiode area, and then injects the second conductive type of ions into the substrate of the central area and the edge area of ​​the photodiode area through the expanded injection window to form a photodiode buried layer. Since the central area of ​​the photodiode area is amorphized, while the edge area is not amorphized, when the second conductive type of ions are implanted into the central area and the edge area at the same time, the edge area is more likely to produce ion diffusion than the central area. When the potential gradient of the central area reaches the level of the prior art, the potential of the edge area is relatively changed from low to high and the potential gradient of the edge area is effectively improved, thereby improving the photodiode's ability to store photoelectrons and achieving the effect of improving the full well capacity. At the same time, by amorphizing the central region of the photodiode region, the longitudinal and lateral diffusion of the second conductive type ions injected into the central region during the subsequent second conductive type ion implantation can be reduced, effectively preventing the occurrence of image tailing in the central region of the photodiode region. In addition, since the amorphization ion implantation and the second conductive type ion implantation are completed using only one mask, the mask cost is reduced.

[0087] Based on the same invention concept, please refer to Figures 3 to 5 The present invention further provides an image sensor, which can be optionally formed by using the manufacturing method of the image sensor of the present invention, and the image sensor comprises:

[0088] A substrate 100 of a first conductive type, wherein the substrate 100 has a photodiode region, wherein the photodiode region has a central region and an edge region located outside the central region;

[0089] an amorphized region 108 formed in the substrate 100 in a central region of the photodiode region;

[0090] The second conductivity type photodiode buried layer 109 is formed in the central region and extends from the central region to the edge region of the photodiode region.

[0091] In this embodiment, the image sensor includes a plurality of photodiode regions, and adjacent photodiode regions are isolated by an isolation structure including an isolation well 106 and a shallow trench isolation structure 104. The isolation well 106 surrounds the sidewall and bottom surface of the shallow trench isolation structure 104.

[0092] Furthermore, the width W1 of the central region of the photodiode region is 1 / 3 to 3 / 4 of the width W1 of the photodiode region. For example, W1 is 600 nm to 800 nm.

[0093] Optionally, an amorphized region 108 is formed in the surface layer of the substrate 100 in the central region of the photodiode region; a photodiode buried layer 109 is formed in the photodiode region and in the substrate below the amorphized region 108, and extends from the central region of the photodiode region to the edge region of the photodiode region.

[0094] Optionally, the first conductivity type is P type, the second conductivity type is N type, and the second conductivity type ions doped in the photodiode buried layer 109 include at least one of P, As, and Sb; or, the first conductivity type is N type, the second conductivity type is P type, and the second conductivity type ions doped in the photodiode buried layer 109 include at least one of B, Ga, and In.

[0095] Since the image sensor of this embodiment is formed by adopting the manufacturing method of the image sensor of the present invention, the manufacturing cost is low and the full well capacity is large.

[0096] The above description is only a description of the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the technical solution of the present invention.

Claims

1. A method for manufacturing an image sensor, characterized in that: include: Providing a substrate of a first conductivity type, forming a patterned mask layer having an injection window on a photodiode region of the substrate, wherein the patterned mask layer masks an edge region of the photodiode region and the injection window is aligned with a central region of the photodiode region; Using the patterned mask layer as a mask, performing amorphization ion implantation into the substrate in the implantation window to form an amorphization region in the substrate in the central region; Performing an enlargement process on the injection window to enlarge the injection window to expose the edge area; Using the patterned mask layer after the implantation window is enlarged as a mask, second conductivity type ions are implanted into the substrate in the enlarged implantation window to form a second conductivity type photodiode buried layer in the substrate of the photodiode region.

2. The manufacturing method according to claim 1, characterized in that The ions used in the amorphization ion implantation include at least one of Ge, Si, Sb and C.

3. The manufacturing method according to claim 1, characterized in that: The bottom of the amorphized region is shallower than or in contact with the top of the photodiode buried layer; or, the width of the central area of ​​the photodiode region is 1 / 3 to 3 / 4 of the width W1 of the photodiode region.

4. The manufacturing method according to claim 1, characterized in that: The first conductivity type is P type, the second conductivity type is N type, and the second conductivity type ions include at least one of P, As, and Sb; or, the first conductivity type is N type, the second conductivity type is P type, and the second conductivity type ions include at least one of B, Ga, and In.

5. The manufacturing method according to claim 1, characterized in that: The implantation energy for amorphization ion implantation is 1KeV to 100KeV, and the implantation dose is 10 13 atom / cm 2 ~10 15 atom / cm 2 ; Alternatively, the implantation energy for implanting the second conductive type ions into the enlarged implantation window is 1300KeV to 4400KeV, and the implantation dose is 10 12 atom / cm 2 ~10 14 atom / cm 2 .

6. The manufacturing method according to claim 1, characterized in that: The implantation window is enlarged by at least one process selected from the group consisting of plasma bombardment and wet etching.

7. The manufacturing method according to claim 6, characterized in that: The material of the patterned mask layer is photoresist, and the injection window is enlarged by a plasma physical bombardment process; or, the material of the patterned mask layer is an insulating dielectric material different from photoresist, and the injection window is enlarged by a wet etching process or a plasma bombardment process.

8. The manufacturing method according to claim 1, characterized in that: After providing a substrate of the first conductivity type and before forming the patterned mask layer on the photodiode region of the substrate, the method further includes: forming an isolation well of the first conductivity type in the substrate, wherein the isolation well is used to define the photodiode region.

9. The manufacturing method according to claim 8, characterized in that: Also includes: Before forming the isolation well, a shallow trench isolation structure is first formed in the substrate, wherein the isolation well surrounds the sidewall and bottom surface of the shallow trench isolation structure; Alternatively, after forming the isolation well and before forming the patterned mask layer, a shallow trench isolation structure is formed in the isolation well.

10. An image sensor, characterized in that: include: A substrate of a first conductivity type, the substrate having a photodiode region, the photodiode region having a central region and an edge region located outside the central region; an amorphized region formed in the substrate in a central region of the photodiode region; A second conductive type photodiode buried layer is formed in the central region and extends from the central region to an edge region of the photodiode region.

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