Image sensor
By introducing a multi-layer light-shading layer structure into the image sensor, the parasitic light sensitivity problem caused by scattered light is solved, and the effect of improving image quality is achieved.
Patent Information
- Application Number
- CN202311077329.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-08-09
- Filing Date
- 2023-08-25
- Publication Date
- 2025-02-25
AI Technical Summary
Existing image sensors can easily improve parasitic light sensitivity under scattered light, resulting in a decrease in image quality.
By introducing a multi-layer light-shielding layer structure into the image sensor, including a first light-shielding layer, a second light-shielding layer and a third light-shielding layer, respectively, to prevent scattered light from irradiating the storage node.
It effectively reduces the parasitic light sensitivity of the image sensor, thereby improving the image quality.
Smart Images
Figure CN119521816A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a semiconductor structure, and in particular to an image sensor. Background Art
[0002] Currently, image sensors are widely used in many modern electronic devices. However, when stray light hits the storage node, it increases the parasitic light sensitivity (PLS), which reduces the image quality. Therefore, how to reduce the parasitic light sensitivity of image sensors is a goal that is being continuously worked on. Summary of the invention
[0003] The invention provides an image sensor, which can prevent scattered light from irradiating a storage node, thereby reducing parasitic light sensitivity.
[0004] The present invention provides an image sensor, comprising a substrate, a gate structure, a photodetector, a storage node, a dielectric layer, a first light shielding layer, a second light shielding layer and a third light shielding layer. The gate structure is located on the substrate. The photodetector is located in the substrate on one side of the gate structure. The storage node is located in the substrate on the other side of the gate structure. The dielectric layer is located on the substrate and the gate structure. The dielectric layer has a first opening located directly above the photodetector. The first light shielding layer is located in the dielectric layer. The first light shielding layer has a second opening located directly above the photodetector. The first opening is located above the second opening. The first light shielding layer has a first extension extending toward the substrate. The first extension is separated from the substrate. The second light shielding layer is located on the sidewall of the first opening. The second light shielding layer has a third opening located directly above the photodetector. The second light shielding layer is connected to the first light shielding layer. The third light shielding layer is located on the dielectric layer. The third light shielding layer is connected to the second light shielding layer. The third light shielding layer is located directly above the storage node.
[0005] According to an embodiment of the present invention, in the above-mentioned image sensor, the first light shielding layer may also be located directly above the storage node.
[0006] According to an embodiment of the present invention, in the above-mentioned image sensor, the second light shielding layer may protrude from the top surface of the dielectric layer.
[0007] According to an embodiment of the present invention, in the above-mentioned image sensor, the third light shielding layer may be located directly above the gate structure.
[0008] According to an embodiment of the present invention, in the image sensor, the first light shielding layer, the second light shielding layer and the third light shielding layer can be grounded.
[0009] According to an embodiment of the present invention, the image sensor may further include a termination layer. The termination layer is located between the dielectric layer and the substrate and between the dielectric layer and the gate structure. The first extension portion may be connected to the termination layer.
[0010] According to an embodiment of the present invention, the image sensor may further include a light pipe structure. The light pipe structure is located in the third opening.
[0011] According to an embodiment of the present invention, in the above-mentioned image sensor, the substrate may include a pixel region, and the image sensor may be located in the pixel region.
[0012] According to an embodiment of the present invention, in the above-mentioned image sensor, the third light shielding layer may extend from the second light shielding layer to the edge region of the pixel region.
[0013] According to an embodiment of the present invention, the image sensor may further include a doping region. The doping region is located in the substrate at the edge of the pixel region. The first light shielding layer may further include a second extension portion. The second extension portion may be electrically connected to the doping region.
[0014] Based on the above, in the image sensor proposed by the present invention, the dielectric layer has a first opening located directly above the light detector. The first light shielding layer is located in the dielectric layer. The first light shielding layer has a second opening located directly above the light detector. The first opening is located above the second opening. The first light shielding layer has a first extension extending toward the substrate. The second light shielding layer is located on the side wall of the first opening. The second light shielding layer has a third opening located directly above the light detector. The second light shielding layer is connected to the first light shielding layer. The third light shielding layer is located on the dielectric layer. The third light shielding layer is connected to the second light shielding layer. The third light shielding layer is located directly above the storage node. Therefore, the first light shielding layer, the second light shielding layer and the third light shielding layer can be used to prevent scattered light from irradiating the storage node, thereby reducing the parasitic light sensitivity of the image sensor, thereby improving the image quality.
[0015] In order to make the above features and advantages of the present invention more clearly understood, embodiments are given below with reference to the accompanying drawings for detailed description. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 is a cross-sectional view of an image sensor according to some embodiments of the present invention;
[0017] Figure 2 are cross-sectional views of image sensors according to other embodiments of the present invention;
[0018] Figure 3 are cross-sectional views of image sensors according to some other embodiments of the present invention.
[0019] Explanation of symbols
[0020] 10: Image sensor
[0021] 100: Base
[0022] 102,128,138,148: Gate structure
[0023] 104: Light Detector
[0024] 106: Storage Node
[0025] 108: Dielectric layer
[0026] 110,112,114: light shielding layer
[0027] 116: Isolation Structure
[0028] 118,130,140,150: Gate
[0029] 120,132,142,152: Gate dielectric layer
[0030] 122,134,144,154: gap wall
[0031] 124,136,146,156: Doping area
[0032] 126: Light pipe structure
[0033] 158: Termination layer
[0034] 160,162,164,166,168,170: Internal connection structure
[0035] 172: Flat layer
[0036] 174: Color filter layer
[0037] 176: Microlens
[0038] OP1,OP2,OP3: Open
[0039] P1, P2: Extension
[0040] R1: Pixel area
[0041] R2: Marginal Zone
[0042] S1: Top surface DETAILED DESCRIPTION
[0043] Figure 1 is a cross-sectional view of an image sensor according to some embodiments of the present invention.
[0044] Please refer to Figure 1, the image sensor 10 includes a substrate 100, a gate structure 102, a photodetector 104, a storage node 106, a dielectric layer 108, a light shielding layer 110, a light shielding layer 112, and a light shielding layer 114. The substrate 100 may include a pixel region R1. The image sensor 10 may be located in the pixel region R1. In some embodiments, the substrate 100 may be a semiconductor substrate, such as a silicon substrate. In some embodiments, the image sensor 10 may further include a plurality of isolation structures 116. In some embodiments, the isolation structure 116 may be a shallow trench isolation (STI) structure or a deep trench isolation (DTI) structure. In some embodiments, the material of the isolation structure 116 is, for example, silicon oxide.
[0045] The gate structure 102 is located on the substrate 100. The gate structure 102 may include a gate 118 and a gate dielectric layer 120. The gate 118 is located on the substrate 100. In some embodiments, the gate 118 may be used as a transfer gate. In some embodiments, the material of the gate 118 is, for example, doped polysilicon. The gate dielectric layer 120 is located between the gate 118 and the substrate 100. In some embodiments, the material of the gate dielectric layer 120 is, for example, silicon oxide. In some embodiments, the image sensor 10 may further include a spacer 122. The spacer 122 is located on the sidewall of the gate structure 102. In some embodiments, the material of the spacer 122 is, for example, silicon nitride, silicon oxide, or a combination thereof.
[0046] The light detector 104 is located in the substrate 100 on one side of the gate structure 102. In some embodiments, the light detector 104 is, for example, a photodiode.
[0047] The storage node 106 is located in the substrate 100 on the other side of the gate structure 102. In some embodiments, the storage node 106 may include a doped region.
[0048] Dielectric layer 108 is disposed on substrate 100 and gate structure 102. Dielectric layer 108 has an opening OP1 located directly above photodetector 104. In some embodiments, dielectric layer 108 may be a multi-layer structure. In some embodiments, the material of dielectric layer 108 is, for example, silicon oxide, silicon nitride, silicon oxynitride (SiON), silicon carbide nitride (SiCN), a low-k material, or a combination thereof.
[0049] The light shielding layer 110 is located in the dielectric layer 108. The light shielding layer 110 has an opening OP2 located directly above the light detector 104. The opening OP1 is located above the opening OP2. The light shielding layer 110 has an extension P1 extending toward the substrate 100. The extension P1 is separated from the substrate 100. In some embodiments, the light shielding layer 110 and the extension P1 may be integrally formed. In some embodiments, the light shielding layer 110 may also be located directly above the storage node 106. Figure 1 In the cross-sectional view of FIG. 1 , although the light shielding layer 110 is divided into multiple parts, the multiple parts of the light shielding layer 110 can be connected to each other and can be integrally formed. The dielectric layer 108 can be filled in the opening OP2. In some embodiments, the material of the light shielding layer 110 is, for example, tungsten.
[0050] The light shielding layer 112 is located on the sidewall of the opening OP1. The light shielding layer 112 has an opening OP3 located directly above the light detector 104. The light shielding layer 112 is connected to the light shielding layer 110. In some embodiments, the light shielding layer 112 may protrude from the top surface S1 of the dielectric layer 108. In some embodiments, the material of the light shielding layer 112 is, for example, titanium, titanium nitride, aluminum, tungsten, platinum, copper, tantalum, tantalum nitride, or a combination thereof.
[0051] The light shielding layer 114 is located on the dielectric layer 108. The light shielding layer 114 is connected to the light shielding layer 112. The light shielding layer 114 is located directly above the storage node 106. The light shielding layer 114 may also be located directly above the gate structure 102. In some embodiments, the light shielding layer 114 may extend from the light shielding layer 112 to the edge region R2 of the pixel region R1. In some embodiments, the material of the light shielding layer 114 is, for example, titanium, titanium nitride, tungsten, aluminum, copper, tantalum, tantalum nitride, or a combination thereof.
[0052] In some embodiments, the light shielding layer 110, the light shielding layer 112, and the light shielding layer 114 may be grounded. In some embodiments, the image sensor 10 may further include a doped region 124. The doped region 124 is located in the substrate 100 in the edge region R2 of the pixel region R1. In some embodiments, the doped region 124 may be located between two adjacent isolation structures 116. The doped region 124 may be grounded. In some embodiments, the doped region 124 may be grounded through an internal connection structure (not shown). In some embodiments, the light shielding layer 110 may extend into the edge region R2 of the pixel region R1, and the light shielding layer 110 may further have an extension portion P2. In some embodiments, the light shielding layer 110 and the extension portion P2 may be integrally formed. The extension portion P2 of the light shielding layer 110 may be electrically connected to the doped region 124, so that the light shielding layer 110, the light shielding layer 112, and the light shielding layer 114 may be grounded through the doped region 124, but the present invention is not limited thereto. In some other embodiments, the light shielding layer 110 , the light shielding layer 112 , and the light shielding layer 114 may be grounded via other interconnect structures (not shown).
[0053] In some embodiments, the image sensor 10 may further include a light pipe structure 126. The light pipe structure 126 is located in the opening OP3. The light pipe structure 126 may be a single-layer structure or a multi-layer structure. In some embodiments, the material of the light pipe structure 126 is, for example, silicon oxide, titanium oxide, an organic transparent layer, an inorganic transparent layer, or a combination thereof.
[0054] In some embodiments, the image sensor 10 may further include a gate structure 128. The gate structure 128 is located on the substrate 100 at one side of the storage node 106. The storage node 106 is located between the gate structure 102 and the gate structure 128. The gate structure 128 may include a gate 130 and a gate dielectric layer 132. The gate 130 is located on the substrate 100. In some embodiments, the gate 130 may serve as a transfer gate. In some embodiments, the material of the gate 130 is, for example, doped polysilicon. The gate dielectric layer 132 is located between the gate 130 and the substrate 100. In some embodiments, the material of the gate dielectric layer 132 is, for example, silicon oxide. In some embodiments, the image sensor 10 may further include a spacer 134. The spacer 134 is located on the sidewall of the gate structure 128. In some embodiments, the material of the spacer 134 is, for example, silicon nitride, silicon oxide, or a combination thereof.
[0055] In some embodiments, the image sensor 10 may further include a doped region 136. The doped region 136 is located in the substrate 100 on one side of the gate structure 128. The gate structure 128 is located between the storage node 106 and the doped region 136. In some embodiments, the doped region 136 may function as a floating diffusion region.
[0056] In some embodiments, the image sensor 10 may further include a gate structure 138. The gate structure 138 is located on the substrate 100 at one side of the doped region 136. The doped region 136 is located between the gate structure 128 and the gate structure 138. The gate structure 138 may include a gate 140 and a gate dielectric layer 142. The gate 140 is located on the substrate 100. In some embodiments, the material of the gate 140 is, for example, doped polysilicon. The gate dielectric layer 142 is located between the gate 140 and the substrate 100. In some embodiments, the material of the gate dielectric layer 142 is, for example, silicon oxide. In some embodiments, the image sensor 10 may further include a spacer 144. The spacer 144 is located on the sidewall of the gate structure 138. In some embodiments, the material of the spacer 144 is, for example, silicon nitride, silicon oxide, or a combination thereof.
[0057] In some embodiments, the image sensor 10 may further include a doping region 146. The doping region 146 is located in the substrate 100 on one side of the gate structure 138. The gate structure 138 is located between the doping region 136 and the doping region 146.
[0058] In some embodiments, image sensor 10 may further include gate structure 148. Gate structure 148 is located on substrate 100 at one side of photodetector 104. Photodetector 104 is located between gate structure 102 and gate structure 148. Gate structure 148 may include gate 150 and gate dielectric layer 152. Gate 150 is located on substrate 100. In some embodiments, the material of gate 150 is, for example, doped polysilicon. Gate dielectric layer 152 is located between gate 150 and substrate 100. In some embodiments, the material of gate dielectric layer 152 is, for example, silicon oxide. In some embodiments, image sensor 10 may further include spacers 154. Spacers 154 are located on sidewalls of gate structure 148. In some embodiments, the material of spacers 154 is, for example, silicon nitride, silicon oxide, or a combination thereof.
[0059] In some embodiments, image sensor 10 may further include doped region 156. Doped region 156 is located in substrate 100 on one side of gate structure 148. Gate structure 148 is located between photodetector 104 and doped region 156. In some embodiments, photodetector 104, storage node 106, doped region 136, doped region 146, and doped region 156 may be located between two adjacent isolation structures 116.
[0060] In some embodiments, the image sensor 10 may further include a stop layer 158. In some embodiments, the stop layer 158 may be a contact etch stop layer (CESL). The stop layer 158 is located between the dielectric layer 108 and the substrate 100 and between the dielectric layer 108 and the gate structure 102. In some embodiments, the stop layer 158 may also be located between the dielectric layer 108 and the gate structure 128, between the dielectric layer 108 and the gate structure 138, and between the dielectric layer 108 and the gate structure 148. In some embodiments, the extension P1 may be connected to the stop layer 158. In some embodiments, the extension P1 and the substrate 100 may be separated from each other by the stop layer 158. In some embodiments, the extension P2 may pass through the stop layer 158 and be electrically connected to the doped region 124. In some embodiments, the material of the stop layer 158 is, for example, silicon nitride or silicon oxynitride.
[0061] In some embodiments, image sensor 10 may further include at least one of interconnect structures 160, 162, 164, 166, 168, and 170. Interconnect structures 160, 162, 164, 166, 168, and 170 may be electrically connected to gate 118, gate 130, gate 140, doped region 146, gate 150, and doped region 156, respectively. In some embodiments, interconnect structures 160, 162, 164, 166, 168, and 170 may be electrically connected to gate 118, gate 130, gate 140, doped region 146, gate 150, and doped region 156, respectively, through termination layer 158. In some embodiments, the interconnect structure 160, the interconnect structure 162, the interconnect structure 164, the interconnect structure 166, the interconnect structure 168, and the interconnect structure 170 may include a contact, a wire, a via, or a combination thereof. In some embodiments, the material of the interconnect structure 160, the material of the interconnect structure 162, the material of the interconnect structure 164, the material of the interconnect structure 166, the material of the interconnect structure 168, and the material of the interconnect structure 170 are, for example, tungsten, aluminum, copper, titanium, titanium nitride, tantalum, tantalum nitride, or a combination thereof.
[0062] In some embodiments, the image sensor 10 may further include at least one of a planar layer 172, a color filter layer 174, and a microlens 176. The planar layer 172 is located on the light shielding layer 112, the light shielding layer 114, and the light pipe structure 126. In some embodiments, the material of the planar layer 172 may be a light-transmitting material, such as a photoresist material, silicon oxide, or silicon oxynitride. The color filter layer 174 is located on the planar layer 172. The microlens 176 is located on the color filter layer 174. In some embodiments, the color filter layer 174 and the microlens 176 may be located directly above the light detector 104.
[0063] Based on the above embodiments, in the image sensor 10, the dielectric layer 108 has an opening OP1 located directly above the photo detector 104. The light shielding layer 110 is located in the dielectric layer 108. The light shielding layer 110 has an opening OP2 located directly above the photo detector 104. The opening OP1 is located above the opening OP2. The light shielding layer 110 has an extension P1 extending toward the substrate 100. The light shielding layer 112 is located on the sidewall of the opening OP1. The light shielding layer 112 has an opening OP3 located directly above the photo detector 104. The light shielding layer 112 is connected to the light shielding layer 110. The light shielding layer 114 is located on the dielectric layer 108. The light shielding layer 114 is connected to the light shielding layer 112. The light shielding layer 114 is located directly above the storage node 106. Therefore, the light shielding layers 110 , 112 , and 114 can prevent scattered light from irradiating the storage node 106 , thereby reducing the parasitic light sensitivity of the image sensor 10 and improving the image quality.
[0064] Figure 2 are cross-sectional views of image sensors according to some other embodiments of the present invention.
[0065] Please refer to Figure 1 and Figure 2 , Figure 2 Image sensor 20 and Figure 1 The differences of the image sensor 10 are as follows. Figure 2 In the image sensor 20, the color filter layer 174 may fill the opening OP3, and the color filter layer 174 located in the opening OP3 may be used as a light pipe structure, while enhancing the filtering effect. In some embodiments, the image sensor 20 may not include Figure 1 The light pipe structure 126 and the flat layer 172 in the embodiment of the present invention are shown in FIG. Figure 1 Image sensor 10 and Figure 2 In the image sensor 20, the same components are denoted by the same reference numerals and their description is omitted here.
[0066] Based on the above embodiments, in the image sensor 20 , the light shielding layers 110 , 112 and 114 can be used to prevent scattered light from irradiating the storage node 106 , thereby reducing the parasitic light sensitivity of the image sensor 20 and improving the image quality.
[0067] Figure 3 are cross-sectional views of image sensors according to some other embodiments of the present invention.
[0068] Please refer to Figure 2 and Figure 3 , Figure 3 Image sensor 30 and Figure 2 The differences of the image sensor 20 are as follows. Figure 3In the image sensor 30, the color filter layer 174 is only located in the opening OP3. Light can be guided into the light pipe structure formed by the color filter layer 174 through the microlens 176, thereby achieving the effects of light guiding and light filtering at the same time. Figure 2 Image sensor 20 and Figure 3 In the image sensor 30, the same components are denoted by the same reference numerals and their description is omitted here.
[0069] Based on the above embodiments, in the image sensor 30 , the light shielding layers 110 , 112 and 114 can be used to prevent scattered light from irradiating the storage node 106 , thereby reducing the parasitic light sensitivity of the image sensor 30 and improving the image quality.
[0070] In summary, in the image sensor of the above embodiment, the dielectric layer has a first opening located directly above the light detector. The first light shielding layer is located in the dielectric layer. The first light shielding layer has a second opening located directly above the light detector. The first opening is located above the second opening. The first light shielding layer has a first extension extending toward the substrate. The second light shielding layer is located on the sidewall of the first opening. The second light shielding layer has a third opening located directly above the light detector. The second light shielding layer is connected to the first light shielding layer. The third light shielding layer is located on the dielectric layer. The third light shielding layer is connected to the second light shielding layer. The third light shielding layer is located directly above the storage node. Therefore, the first light shielding layer, the second light shielding layer and the third light shielding layer can prevent scattered light from irradiating the storage node, thereby reducing the parasitic light sensitivity of the image sensor, thereby improving the image quality.
[0071] Although the present invention is disclosed in conjunction with the above embodiments, they are not intended to limit the present invention. Any ordinary technician in the technical field may make slight changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be based on the definition of the attached claims.
Claims
1. An image sensor, comprising: substrate; A gate structure, located on the substrate; a light detector located in the substrate on one side of the gate structure; a storage node located in the substrate on the other side of the gate structure; a dielectric layer, located on the substrate and the gate structure, and having a first opening located directly above the light detector; A first light shielding layer, located in the dielectric layer and having a second opening located directly above the light detector, wherein the first opening is located above the second opening, and the first light shielding layer has a first extension portion extending toward the substrate, and the first extension portion is separated from the substrate; a second light shielding layer, located on a side wall of the first opening, having a third opening located directly above the light detector, wherein the second light shielding layer is connected to the first light shielding layer; as well as The third light shielding layer is located on the dielectric layer and connected to the second light shielding layer, wherein the third light shielding layer is located directly above the storage node. 2 . The image sensor as claimed in claim 1 , wherein the first light shielding layer is also located directly above the storage node. 3 . The image sensor as claimed in claim 1 , wherein the second light shielding layer protrudes from a top surface of the dielectric layer. 4 . The image sensor as claimed in claim 1 , wherein the third light shielding layer is also located directly above the gate structure. 5 . The image sensor as claimed in claim 1 , wherein the first light shielding layer, the second light shielding layer, and the third light shielding layer are grounded.
6. The image sensor according to claim 1, further comprising: The termination layer is located between the dielectric layer and the substrate and between the dielectric layer and the gate structure, wherein the first extension portion is connected to the termination layer.
7. The image sensor according to claim 1, further comprising: The light pipe structure is located in the third opening.
8. The image sensor of claim 1, wherein the substrate comprises a pixel region, and the image sensor is located in the pixel region. 9 . The image sensor as claimed in claim 8 , wherein the third light shielding layer extends from the second light shielding layer to an edge region of the pixel region.
10. The image sensor according to claim 8, further comprising: A doped region is located in the substrate at the edge of the pixel region, wherein The first light shielding layer also has a second extending portion, and The second extension portion is electrically connected to the doped region.