Solar cell and preparation method thereof

Abstract

The invention relates to a solar cell and a preparation method thereof. According to the preparation method of the solar cell, the amorphous silicon layer is formed on the back tunneling oxide layer, the doped polycrystalline silicon layer is formed in the first process through diffusion doping treatment, and the doped silicon oxide layer is formed on the doped polycrystalline silicon layer in the second process. And after the doped silicon oxide layer is formed, selective heavy doping of the back surface is realized by adopting a laser doping process, and a selective emitter is formed in a heavy doping region. On one hand, the doped silicon oxide layer can provide sufficient impurity ions for SE doping, and on the other hand, the doped silicon oxide layer can protect the tunneling oxide layer and reduce or prevent the tunneling oxide layer from being damaged in the SE laser doping process, so that a good passivation effect can be achieved.

Description

Technical Field

[0001] The invention relates to the field of photovoltaic technology, and in particular to a solar cell and a preparation method thereof. Background Art

[0002] In the photovoltaic field, the front surface of the TOPCon cell (tunneling oxide passivated contact cell) is similar to that of the conventional PERC cell (emitter back passivated cell). The characteristic of the TOPCon cell is that a tunneling oxide layer is arranged on the back, and a doped polysilicon layer is arranged on the tunneling oxide layer. The two together form a passivation contact structure, providing good interface passivation for the back surface of the silicon wafer.

[0003] The SE process is a selective emitter technology that performs high-concentration doping at the contact position between the gate line and the silicon wafer, and low-concentration doping in the area outside the electrode. On the one hand, it can reduce the contact resistance between the silicon wafer and the gate line and reduce the series resistance of the battery. On the other hand, the low-doped area can reduce surface recombination and increase the minority carrier lifetime, thereby increasing the short-circuit current and open-circuit voltage of the battery.

[0004] In traditional technology, a lightly doped first silicon layer is deposited first, and then a heavily doped second silicon layer is deposited on this basis. Subsequently, the second silicon layer in the non-metallized pattern area is removed according to the metallization pattern. Since the second silicon layer and the first silicon layer are essentially silicon, the only difference is the doping concentration. Therefore, no matter what method is used to remove them, the process window is difficult to control, and the first silicon layer is easily removed, exposing the silicon substrate and losing the back passivation structure. Summary of the invention

[0005] Based on this, it is necessary to provide a solar cell and a preparation method thereof to solve the problem that the traditional process easily removes the silicon layer, exposes the silicon substrate, and loses the back passivation structure.

[0006] A method for preparing a solar cell comprises the following steps:

[0007] forming a tunneling oxide layer on a first side of a silicon substrate;

[0008] forming an amorphous silicon layer on the tunnel oxide layer;

[0009] The diffusion doping treatment includes: a first process of introducing a doping source and an oxygen source into the diffusion chamber and heating the amorphous silicon layer so that the amorphous silicon layer forms a doped polysilicon layer and a doped oxide layer located on the doped polysilicon layer; a second process of stopping introducing the doping source and keeping introducing the oxygen source to increase the thickness of the doped oxide layer;

[0010] A heavily doped region is formed on the doped polysilicon layer by a laser doping process.

[0011] In one embodiment, the preparation method meets at least one of the following characteristics (1) to (2):

[0012] (1) In the first process, the process temperature is 820°C to 880°C;

[0013] (2) In the second process, the process temperature is 850°C to 920°C.

[0014] In one embodiment, the preparation method meets at least one of the following characteristics (1) to (2):

[0015] (1) The doping concentration of the doped polysilicon layer is 1×10 20 atoms / cm 3 ~3×10 21 atoms / cm 3 The doping concentration of the doped polysilicon layer is 1×10 20 atoms / cm 3 ~3×10 21 atoms / cm 3 ;

[0016] (2) The square resistance of the doped polysilicon layer is 25 ohm to 45 ohm.

[0017] In one of the embodiments, in the second process, the thickness of the doped oxide layer is controlled to be 80 nm to 120 nm.

[0018] In one embodiment, the preparation method meets at least one of the following characteristics (1) to (2):

[0019] (1) The thickness of the tunnel oxide layer is 0.5 nm to 2 nm;

[0020] (2) The thickness of the amorphous silicon layer is 15 nm to 40 nm.

[0021] In one embodiment, the preparation method meets at least one of the following characteristics (1) to (3):

[0022] (1) The wavelength of the light source used in the laser doping process is 350nm to 700nm;

[0023] (2) The width of the light spot formed by the laser doping process is 60nm to 120nm;

[0024] (3) The doping concentration of the heavily doped region is 2×10 20 atoms / cm 3 ~2×10 21 atoms / cm 3 ;

[0025] (4) The sheet resistance of the heavily doped region is 10 ohm to 25 ohm.

[0026] In one embodiment, after the laser doping process, the preparation method further includes the following steps:

[0027] A thermal oxide layer is formed on the back side by a thermal oxidation process.

[0028] In one embodiment, the preparation method meets at least one of the following characteristics (1) to (3):

[0029] (1) The temperature of the thermal oxidation process is 1000° C. to 1200° C.;

[0030] (2) The thermal oxidation process lasts for 4000s to 10000s;

[0031] (3) The thickness of the thermal oxidation layer is 60nm to 200nm.

[0032] In one embodiment, the preparation method further comprises the following steps:

[0033] An emitter is formed on a second side of the silicon substrate, wherein the second side is arranged opposite to the first side.

[0034] In one embodiment, the preparation method further comprises the following steps:

[0035] preparing a first electrode in contact with the heavily doped region; and / or

[0036] A second electrode is prepared in contact with the emitter.

[0037] A solar cell is prepared by the preparation method described in any one of the above embodiments.

[0038] Compared with the traditional solution, the above solar cell and its preparation method have the following beneficial effects:

[0039] The preparation method of the solar cell forms an amorphous silicon layer on the back tunneling oxide layer, forms a doped polysilicon layer in the first process through diffusion doping treatment, and forms a doped silicon oxide layer on the doped polysilicon layer in the second process. After the doped silicon oxide layer is formed, a laser doping process is used to achieve selective re-doping on the back side, and the heavily doped area forms a selective emitter. On the one hand, the doped silicon oxide layer can provide sufficient impurity ions for SE doping, and on the other hand, the doped silicon oxide layer can protect the tunneling oxide layer, reduce or avoid the tunneling oxide layer from being damaged during the laser doping SE process, so that it can play a good passivation effect.

[0040] In addition, due to the protective effect of the doped silicon oxide layer, it is beneficial to thin the doped polysilicon layer. Reducing the thickness of the doped polysilicon layer can significantly reduce the parasitic absorption in the long-wave band and increase the short-circuit current of the solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 The schematic diagram of the structure of a solar cell prepared by a preparation method of an embodiment is shown in FIG.

[0042] Description of reference numerals:

[0043] 100, solar cell; 110, silicon substrate; 120, tunneling oxide layer; 130, doped polysilicon layer; 140, heavily doped region; 150, emitter; 160, first passivation layer; 161, aluminum oxide layer; 162, first silicon nitride layer; 170, thermal silicon oxide layer; 180, second passivation layer; 191, first electrode; 192, second electrode. DETAILED DESCRIPTION

[0044] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.

[0045] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art to which the present application belongs. The terms used herein in the specification of the present application are only for the purpose of describing specific embodiments and are not intended to limit the present application. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0046] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0047] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, "plurality" means at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0048] In this application, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0049] The invention provides a method for preparing a solar cell. Figure 1 A solar cell 100 is prepared by a preparation method according to an embodiment.

[0050] The method for preparing the solar cell 100 according to an embodiment of the present invention comprises the following steps:

[0051] A tunnel oxide layer 120 is formed on a first side of the silicon substrate 110 .

[0052] An amorphous silicon layer is formed on the tunnel oxide layer 120 .

[0053] The diffusion doping treatment includes: a first process of introducing a doping source and an oxygen source into a diffusion chamber and heating the amorphous silicon layer so that the amorphous silicon layer forms a doped polysilicon layer 130 and a doped oxide layer located on the doped polysilicon layer 130; a second process of stopping the introduction of the doping source and keeping the introduction of the oxygen source to increase the thickness of the doped oxide layer.

[0054] A heavily doped region 140 is formed on the doped polysilicon layer 130 by a laser doping process.

[0055] The preparation method of the solar cell 100 forms an amorphous silicon layer on the back tunneling oxide layer 120, forms a doped polysilicon layer 130 in the first process by diffusion doping treatment, and forms a doped silicon oxide layer on the doped polysilicon layer 130 in the second process. After the doped silicon oxide layer is formed, a laser doping process is used to achieve back selective heavy doping, and the heavily doped region 140 forms a selective emitter. On the one hand, the doped silicon oxide layer can provide sufficient impurity ions for SE doping, and on the other hand, the doped silicon oxide layer can protect the tunneling oxide layer 120, reduce or avoid the tunneling oxide layer 120 from being damaged during the laser doping SE process, so that it can play a good passivation effect.

[0056] In addition, due to the protective effect of the doped silicon oxide layer, it is beneficial to thin the doped polysilicon layer 130 . Reducing the thickness of the doped polysilicon layer 130 can significantly reduce the parasitic absorption in the long-wave band and improve the short-circuit current of the solar cell 100 .

[0057] In one exemplary manufacturing method, an emitter 150 is formed on a second side of a silicon substrate 110 , where the second side is disposed opposite to the first side.

[0058] The emitter 150 may be formed by doping impurity ions on the second side, and a PN junction is formed between the emitter 150 and the silicon substrate 110. For example, if the silicon substrate 110 is N-type silicon, the emitter 150 may be a P+ doped layer formed by a boron diffusion process.

[0059] In one example, before forming the emitter 150 , the silicon substrate 110 is textured and cleaned to form a texture structure on the second side, which can achieve an anti-reflection effect.

[0060] In one example of the manufacturing method, a first passivation layer 160 is formed on the emitter 150. In one example, the first passivation layer 160 includes an aluminum oxide layer 161 and a first silicon nitride layer 162, and the aluminum oxide layer 161 is located between the emitter 150 and the first silicon nitride layer 162.

[0061] Since high concentration doping in the amorphous silicon layer on the back of the solar cell 100 will cause relatively large parasitic absorption, the doped polysilicon layer 130 needs to be made thinner, but at the same time, the sintering window of the slurry must be taken into account to prevent burn-through. Therefore, the relevant deposition process, diffusion process and laser parameters are the key to the SE technology on the back of the solar cell 100.

[0062] In one example, the tunnel oxide layer 120 is formed by deposition using a CVD process, and more preferably, by deposition using a LPCVD (low pressure chemical vapor deposition) process. It is understood that the precursor of the tunnel oxide layer 120 may be O2.

[0063] In one example, the deposition process parameters of the tunnel oxide layer 120 include:

[0064] The pressure is 740torr-780torr, preferably 755torr-765torr, and more preferably 760torr. The temperature is 550℃-650℃, preferably 590℃-610℃, and more preferably 600℃. The oxygen source flow rate is 20000sccm-40000sccm, preferably 25000sccm-35000sccm, and more preferably 30000sccm. The time is 500s-1500s, preferably 900s-1100s, and more preferably 1000s.

[0065] In one example, the thickness of the tunnel oxide layer 120 is 0.5 nm to 2 nm. In one example, the thickness of the tunnel oxide layer 120 is 1.5 nm.

[0066] In one example, the amorphous silicon layer is formed by deposition using a CVD process, and more preferably, by deposition using a LPCVD process. It is understood that the precursor of the amorphous silicon layer can be SiH4.

[0067] In one example, the deposition process parameters for the amorphous silicon layer include:

[0068] The pressure is 0.1torr-1torr, preferably 0.2torr-0.4torr, and more preferably 0.3torr. The temperature is 550℃-650℃, preferably 590℃-610℃, and more preferably 600℃. The SiH4 flow rate is 500sccm-2000sccm, preferably 1300sccm-1500sccm, and more preferably 1400sccm. The time is 150s-400s, preferably 180s-220s, and more preferably 200s.

[0069] In one of the examples, the thickness of the amorphous silicon layer is more than 15nm, for example, 15nm to 40nm. Studies have shown that an amorphous silicon layer with a thickness of about 15nm can meet the passivation requirements of the battery. The purpose of making the amorphous silicon layer thick is to avoid burn-through during subsequent electrode metallization. In one of the examples, the thickness of the amorphous silicon layer is 15nm to 20nm. In one of the examples, the thickness of the amorphous silicon layer is 20nm. In this example, the use of an ultra-thin amorphous silicon layer can significantly reduce parasitic absorption in the long-wave band and increase the short-circuit current of the solar cell 100.

[0070] In the first process of the diffusion doping treatment, a doping source and an oxygen source are introduced for deposition, and thermal diffusion is performed to dope the amorphous silicon layer to form a doped polysilicon layer 130 .

[0071] In one example, the doping source is a phosphorus source, such as phosphorus oxychloride, to dope the amorphous silicon layer with phosphorus impurities.

[0072] In the first process, the doping source is introduced by introducing nitrogen gas, which brings the liquid doping source such as phosphorus oxychloride in the source bottle into the furnace tube.

[0073] In one example, the process temperature in the first process is 820° C. to 880° C., preferably 860° C. to 880° C., and more preferably 870° C. In this example, compared with the conventional process, the diffusion temperature is lowered to prevent the impurities from diffusing too seriously when the amorphous silicon layer is thinned and destroying the passivation structure.

[0074] In one example, the process parameters of the first process also include:

[0075] The nitrogen flow rate is 500-1500sccm, preferably 800sccm-1200sccm, and more preferably 1000sccm. The oxygen source flow rate is 500-1500sccm, preferably 900sccm-1100sccm, and more preferably 1000sccm. The pressure is 100-500torr, preferably 150torr-250torr, and more preferably 200torr. The time is 400-2000s, preferably 600s-1000s, and more preferably 800s.

[0076] In the second process of the diffusion doping treatment, an oxygen source is introduced to form a doped silicon oxide layer on the doped polysilicon layer 130. In the second process, no more doping source is introduced, and the main purpose is to form a thicker doped silicon oxide layer.

[0077] If the doping source is a phosphorus source, such as phosphorus oxychloride, the doped silicon oxide layer formed is a phosphosilicate glass layer (PSG layer).

[0078] In one example, the process parameters of the second process include:

[0079] The temperature is 850°C to 920°C, preferably 865°C to 875°C, and more preferably 870°C. The oxygen source flow rate is 1000-4000sccm, preferably 1500sccm to 2500sccm, and more preferably 2000sccm. The pressure is 100-500torr, preferably 350torr to 450torr, and more preferably 400torr. The time is 2000-5000s, preferably 2500s to 3500s, and more preferably 3000s.

[0080] In one example, the thickness of the doped silicon oxide layer is 80nm to 120nm. In one example, the thickness of the doped silicon oxide layer is 90nm to 110nm. In one example, the thickness of the doped silicon oxide layer is 100nm. On the one hand, a thicker doped silicon oxide layer can provide sufficient impurity ions for SE doping, and on the other hand, a doped silicon oxide layer of this thickness can protect the tunneling oxide layer 120 from being damaged during the laser doping process, so that it can have a good passivation effect.

[0081] In one example, the doping concentration of the doped polysilicon layer 130 is 1×10 20 atoms / cm 3 ~3×10 21 atoms / cm 3 , preferably 1.5×10 21 atoms / cm 3 ~2.5×10 21 atoms / cm 3 , more preferably 2×10 21 atoms / cm 3 ;

[0082] In one example, the sheet resistance of the doped polysilicon layer 130 is 25 ohm to 45 ohm, preferably 32 ohm to 38 ohm, and more preferably 35 ohm.

[0083] After the doped silicon oxide layer is formed, laser is used to achieve selective back-side re-doping, and the heavily doped region 140 forms a selective emitter.

[0084] In one example, the wavelength of the light source used in the laser doping process is 350nm to 700nm. In one example, the wavelength of the light source used in the laser doping process is 532nm (green light). In one example, the wavelength of the light source used in the laser doping process is 355nm (purple light).

[0085] In one example, the width of the light spot formed by the laser doping process is 60 nm to 120 nm. In one example, the light spot formed by the laser doping process is a square light spot with a width of 80 nm.

[0086] In one example, the doping concentration of the heavily doped region 140 is 2×10 20 atoms / cm 3 ~2×10 21 atoms / cm 3 ; preferably 6×10 20 atoms / cm 3 ~1×10 21 atoms / cm3 , more preferably 8×10 20 atoms / cm 3 .

[0087] In one example, the square resistance of the heavily doped region 140 is 10 ohm to 25 ohm, preferably 13 ohm to 17 ohm, and more preferably 15 ohm.

[0088] In one of the exemplary preparation methods, after the laser doping process, the method further includes the step of forming a thermal oxidation layer on the back side through a thermal oxidation process.

[0089] In the above example, a thermal oxide silicon layer 170 is generated by thermal oxidation on the basis of the back SE. On the one hand, the thermal oxide silicon layer 170 can serve as a barrier layer for the metal slurry to prevent the ultra-thin doped polysilicon layer 130 from being burned through. On the other hand, the thermal oxide silicon layer 170 obtained by thermal oxidation growth is also an excellent passivation material and can play an auxiliary passivation effect.

[0090] In one example, the process parameters of the thermal oxidation process include: temperature of 1000° C.-1200° C.; time of 4000s-10000s.

[0091] The thermal oxide layer preferably has a certain thickness to ensure that the ultra-thin doped polysilicon layer 130 is not burned through. In one example, the thickness of the thermal oxide layer is 60nm to 200nm, preferably 70nm to 100nm, and more preferably 80nm.

[0092] In one exemplary preparation method, the doped silicon oxide layer and the doped polysilicon layer 130 on the front and side surfaces are removed by an etching and cleaning process. The etching and cleaning process may be performed after the laser doping process or after the thermal oxidation process.

[0093] In one of the examples of the preparation method, a second passivation layer 180 is deposited on the back side. In one example, the passivation layer includes a second silicon nitride layer. The step of depositing the second passivation layer 180 may be after the above-mentioned laser doping process, or after the above-mentioned thermal oxidation process, or after the etching and cleaning process.

[0094] The solar cell 100 may be, but is not limited to, a TOPCon cell.

[0095] The preparation method of the solar cell 100 forms an amorphous silicon layer on the back tunneling oxide layer 120, forms a doped polysilicon layer 130 in the first process by diffusion doping treatment, and forms a doped silicon oxide layer on the doped polysilicon layer 130 in the second process. After the doped silicon oxide layer is formed, a laser doping process is used to achieve back selective heavy doping, and the heavily doped region 140 forms a selective emitter. On the one hand, the doped silicon oxide layer can provide sufficient impurity ions for SE doping, and on the other hand, the doped silicon oxide layer can protect the tunneling oxide layer 120, reduce or avoid the tunneling oxide layer 120 from being damaged during the laser doping SE process, so that it can play a good passivation effect.

[0096] In addition, due to the protective effect of the doped silicon oxide layer, it is beneficial to thin the doped polysilicon layer 130 . Reducing the thickness of the doped polysilicon layer 130 can significantly reduce the parasitic absorption in the long-wave band and improve the short-circuit current of the solar cell 100 .

[0097] The steps of the present invention are simple and the process is easy to control. The preparation process does not involve complicated masks or related graphic steps, and can meet mass production requirements, improve efficiency and significantly reduce production costs.

[0098] Furthermore, the present invention also provides a solar cell, which is prepared by any of the preparation methods in the above examples.

[0099] The following specific examples are provided to further illustrate the present invention.

[0100] Example 1

[0101] This embodiment provides a method for preparing a solar cell, comprising the following steps:

[0102] S1, texturing and cleaning: Provide N-type silicon wafers and use alkaline washing process to form a pyramid texturing surface on the front side.

[0103] S2, Boron diffusion: Boron diffusion process is carried out on the front side to prepare the emitter and form a PN junction.

[0104] S3, back etching: cleaning the PN junction plating on the back and back polishing.

[0105] S4, LPCVD: tunneling silicon oxide and polysilicon are deposited in sequence using LPCVD.

[0106] When depositing tunneling silicon oxide, the process parameters include: pressure of 760 torr, temperature of 600° C., oxygen flow rate of 30,000 sccm, and time of 1,000 s.

[0107] The thickness of the formed tunnel oxide layer is 1.5 nm.

[0108] When depositing polysilicon, the process parameters include: pressure of 0.3 torr, temperature of 600° C., SiH 4 flow rate of 1400 sccm, and time of 200 s.

[0109] The thickness of the formed amorphous silicon layer was 20 nm.

[0110] S5, phosphorus diffusion: a phosphorus diffusion process is performed on the back side to form N-type doped polysilicon (n-poly).

[0111] Phosphorus diffusion is mainly divided into the first process and the second process.

[0112] In the first process, phosphorus source and oxygen are introduced for deposition, and phosphorus doping is promoted at high temperature. The phosphorus source is introduced by nitrogen to bring liquid phosphorus oxychloride in the source bottle into the furnace tube.

[0113] The process parameters of the first process include: deposition temperature of 860° C., nitrogen flow rate of 1000 sccm, oxygen flow rate of 1000 sccm, pressure of 200 torr, and time of 800 s.

[0114] In the second process, oxygen is introduced without a phosphorus source, the main purpose of which is to form a thicker PSG layer.

[0115] The process parameters of the second process include: deposition temperature of 870° C., oxygen flow rate of 2000 sccm, pressure of 400 torr, and time of 3000 s.

[0116] The thickness of the PSG layer formed in this phosphorus diffusion step is 100 nm and the doping concentration is 2×10 20 atoms / cm 3 , the square resistance is 35ohm.

[0117] S6, back laser SE: Use laser to perform heavy doping at the back gate line to form a selective emitter.

[0118] The process uses a 532nm green laser. The spot is a square spot with a width of 80nm. The doping concentration in the heavily doped area is 8×10 20 atoms / cm 3 The sheet resistance of the heavily doped region is 15 ohm.

[0119] S7, thermal oxidation: a thermal silicon oxide layer is grown on the back side using tubular thermal oxidation.

[0120] The process parameters include: temperature of 1100°C and time of 8000s.

[0121] The thickness of the thermal silicon oxide layer is 80 nm.

[0122] S8, etching and cleaning: using chain and slot cleaning to remove the PSG layer and amorphous silicon layer on the front and side surfaces.

[0123] S9, coating: depositing an aluminum oxide layer and a first silicon nitride layer on the front side in sequence, and depositing a second silicon nitride layer on the back side.

[0124] S10, metallization: printing silver aluminum paste on the front side and silver paste on the back side, high temperature sintering metallization to obtain gate lines.

[0125] Example 2

[0126] This embodiment provides a method for preparing a solar cell, comprising the following steps:

[0127] S1, texturing and cleaning: provide single crystal silicon wafers and use alkaline washing process to form a pyramid texturing surface on the front side.

[0128] S2, Boron diffusion: Boron diffusion process is carried out on the front side to prepare the emitter and form a PN junction.

[0129] S3, back etching: cleaning the PN junction plating on the back and back polishing.

[0130] S4, LPCVD: tunneling silicon oxide and polysilicon are deposited in sequence using LPCVD.

[0131] When depositing tunneling silicon oxide, the process parameters include: pressure of 760 torr, temperature of 600° C., oxygen flow rate of 30,000 sccm, and time of 1,000 s.

[0132] The thickness of the formed tunnel oxide layer is 1.5 nm.

[0133] When depositing polysilicon, the process parameters include: pressure of 0.3 torr, temperature of 600° C., SiH 4 flow rate of 1400 sccm, and time of 200 s.

[0134] The thickness of the formed amorphous silicon layer was 20 nm.

[0135] S5, phosphorus diffusion: a phosphorus diffusion process is performed on the back side to form N-type doped polysilicon (n-poly).

[0136] Phosphorus diffusion is mainly divided into the first process and the second process.

[0137] In the first process, phosphorus source and oxygen are introduced for deposition, and phosphorus doping is promoted at high temperature. The phosphorus source is introduced by nitrogen to bring liquid phosphorus oxychloride in the source bottle into the furnace tube.

[0138] The process parameters of the first process include: deposition temperature of 860° C., nitrogen flow rate of 1000 sccm, oxygen flow rate of 1000 sccm, pressure of 200 torr, and time of 800 s.

[0139] In the second process, oxygen is introduced without a phosphorus source, the main purpose of which is to form a thicker PSG layer.

[0140] The process parameters of the second process include: deposition temperature of 870° C., oxygen flow rate of 2000 sccm, pressure of 400 torr, and time of 1000 s.

[0141] The thickness of the PSG layer formed in this phosphorus diffusion step is 30nm and the doping concentration is 2×10 20 atoms / cm 3 , the square resistance is 35ohm.

[0142] S6, back laser SE: Use laser to perform heavy doping at the back gate line to form a selective emitter.

[0143] The process uses a 532nm green laser. The spot is a square spot with a width of 80nm. The doping concentration in the heavily doped area is 8×10 20 atoms / cm 3 The sheet resistance of the heavily doped region is 15 ohm.

[0144] S7, thermal oxidation: a thermal silicon oxide layer is grown on the back side using tubular thermal oxidation.

[0145] The process parameters include: temperature of 1100°C and time of 8000s.

[0146] The thickness of the thermal silicon oxide layer is 80 nm.

[0147] S8, etching and cleaning: using chain and slot cleaning to remove the PSG layer and amorphous silicon layer on the front and side surfaces.

[0148] S9, coating: depositing an aluminum oxide layer and a first silicon nitride layer on the front side in sequence, and depositing a second silicon nitride layer on the back side.

[0149] S10, metallization: printing silver aluminum paste on the front side and silver paste on the back side, high temperature sintering metallization to obtain gate lines.

[0150] Comparative Example 1

[0151] The preparation method of the solar cell of this comparative example comprises the following steps:

[0152] S1, texturing and cleaning: provide single crystal silicon wafers and use alkaline washing process to form a pyramid texturing surface on the front side.

[0153] S2, Boron diffusion: Boron diffusion process is carried out on the front side to prepare the emitter and form a PN junction.

[0154] S3, back etching: cleaning the PN junction plating on the back and back polishing.

[0155] S4, LPCVD: tunneling silicon oxide and polysilicon are deposited in sequence using LPCVD.

[0156] When depositing tunneling silicon oxide, the process parameters include: pressure of 760 torr, temperature of 600° C., oxygen flow rate of 30,000 sccm, and time of 1,000 s.

[0157] The thickness of the formed tunnel oxide layer is 1.5 nm.

[0158] When depositing polysilicon, the process parameters include: pressure of 0.3 torr, temperature of 600° C., SiH 4 flow rate of 1400 sccm, and time of 1200 s.

[0159] The thickness of the formed amorphous silicon layer was 120 nm.

[0160] S5, phosphorus diffusion: a phosphorus diffusion process is performed on the back side to form N-type doped polysilicon (n-poly).

[0161] Phosphorus diffusion is mainly divided into the first process and the second process.

[0162] In the first process, phosphorus source and oxygen are introduced for deposition, and phosphorus doping is promoted at high temperature. The phosphorus source is introduced by nitrogen to bring liquid phosphorus oxychloride in the source bottle into the furnace tube.

[0163] The process parameters of the first process include: deposition temperature of 860° C., nitrogen flow rate of 1000 sccm, oxygen flow rate of 1000 sccm, pressure of 200 torr, and time of 800 s.

[0164] In the second process, oxygen is introduced without a phosphorus source.

[0165] The process parameters of the second process include: deposition temperature of 870° C., oxygen flow rate of 2000 sccm, pressure of 400 torr, and time of 1000 s.

[0166] The thickness of the PSG layer formed in this phosphorus diffusion step is 30nm and the doping concentration is 2×10 20 atoms / cm 3 , the square resistance is 35ohm.

[0167] S6, etching and cleaning: using chain and slot cleaning to remove the PSG layer and amorphous silicon layer on the front and side surfaces.

[0168] S7, coating: depositing an aluminum oxide layer and a first silicon nitride layer on the front side in sequence, and depositing a second silicon nitride layer on the back side.

[0169] S8, metallization: printing silver aluminum paste on the front side and silver paste on the back side, high temperature sintering metallization to obtain gate lines.

[0170] Comparative Example 2

[0171] The preparation method of the solar cell of this comparative example comprises the following steps:

[0172] S1, texturing and cleaning: provide single crystal silicon wafers and use alkaline washing process to form a pyramid texturing surface on the front side.

[0173] S2, Boron diffusion: Boron diffusion process is carried out on the front side to prepare the emitter and form a PN junction.

[0174] S3, back etching: cleaning the PN junction plating on the back and back polishing.

[0175] S4, LPCVD: tunneling silicon oxide and polysilicon are deposited in sequence using LPCVD.

[0176] When depositing tunneling silicon oxide, the process parameters include: pressure of 760 torr, temperature of 600° C., oxygen flow rate of 30,000 sccm, and time of 1,000 s.

[0177] The thickness of the formed tunnel oxide layer is 1.5 nm.

[0178] When depositing polysilicon, the process parameters include: pressure of 0.3 torr, temperature of 600° C., SiH 4 flow rate of 1400 sccm, and time of 200 s.

[0179] The thickness of the formed amorphous silicon layer was 20 nm.

[0180] S5, phosphorus diffusion: a phosphorus diffusion process is performed on the back side to form N-type doped polysilicon (n-poly).

[0181] Phosphorus diffusion is mainly divided into the first process and the second process.

[0182] In the first process, phosphorus source and oxygen are introduced for deposition, and phosphorus doping is promoted at high temperature. The phosphorus source is introduced by nitrogen to bring liquid phosphorus oxychloride in the source bottle into the furnace tube.

[0183] The process parameters of the first process include: deposition temperature of 860° C., nitrogen flow rate of 1000 sccm, oxygen flow rate of 1000 sccm, pressure of 200 torr, and time of 800 s.

[0184] In the second process, oxygen is introduced without a phosphorus source.

[0185] The process parameters of the second process include: deposition temperature of 870° C., oxygen flow rate of 2000 sccm, pressure of 400 torr, and time of 1000 s.

[0186] The thickness of the PSG layer formed in this phosphorus diffusion step is 30nm and the doping concentration is 2×1020 atoms / cm 3 , the square resistance is 35ohm.

[0187] S6, etching and cleaning: using chain and slot cleaning to remove the PSG layer and amorphous silicon layer on the front and side surfaces.

[0188] S7, coating: depositing an aluminum oxide layer and a first silicon nitride layer on the front side in sequence, and depositing a second silicon nitride layer on the back side.

[0189] S8, metallization: printing silver aluminum paste on the front side and silver paste on the back side, high temperature sintering metallization to obtain gate lines.

[0190] Comparative Example 3

[0191] The preparation method of the solar cell of this comparative example comprises the following steps:

[0192] S1, texturing and cleaning: provide single crystal silicon wafers and use alkaline washing process to form a pyramid texturing surface on the front side.

[0193] S2, Boron diffusion: Boron diffusion process is carried out on the front side to prepare the emitter and form a PN junction.

[0194] S3, back etching: cleaning the PN junction plating on the back and back polishing.

[0195] S4, LPCVD: tunneling silicon oxide and polysilicon are deposited in sequence using LPCVD.

[0196] When depositing tunneling silicon oxide, the process parameters include: pressure of 760 torr, temperature of 600° C., oxygen flow rate of 30,000 sccm, and time of 1,000 s.

[0197] The thickness of the formed tunnel oxide layer is 1.5 nm.

[0198] When depositing polysilicon, the process parameters include: pressure of 0.3 torr, temperature of 600° C., SiH 4 flow rate of 1400 sccm, and time of 200 s.

[0199] The thickness of the formed amorphous silicon layer was 20 nm.

[0200] S5, phosphorus diffusion: a phosphorus diffusion process is performed on the back side to form N-type doped polysilicon (n-poly).

[0201] Phosphorus diffusion is mainly divided into the first process and the second process.

[0202] In the first process, phosphorus source and oxygen are introduced for deposition, and phosphorus doping is promoted at high temperature. The phosphorus source is introduced by nitrogen to bring liquid phosphorus oxychloride in the source bottle into the furnace tube.

[0203] The process parameters of the first process include: deposition temperature of 860° C., nitrogen flow rate of 1000 sccm, oxygen flow rate of 1000 sccm, pressure of 200 torr, and time of 800 s.

[0204] In the second process, oxygen is introduced without a phosphorus source.

[0205] The process parameters of the second process include: deposition temperature of 870° C., oxygen flow rate of 2000 sccm, pressure of 400 torr, and time of 1000 s.

[0206] The thickness of the PSG layer formed in this phosphorus diffusion step is 30nm and the doping concentration is 2×10 20 atoms / cm 3 , the square resistance is 35ohm.

[0207] S6, thermal oxidation: a thermal silicon oxide layer is grown on the back side using tubular thermal oxidation.

[0208] The process parameters include: temperature of 1100°C and time of 8000s.

[0209] The thickness of the thermal silicon oxide layer is 80 nm.

[0210] S8, etching and cleaning: using chain and slot cleaning to remove the PSG layer and amorphous silicon layer on the front and side surfaces.

[0211] S9, coating: depositing an aluminum oxide layer and a first silicon nitride layer on the front side in sequence, and depositing a second silicon nitride layer on the back side.

[0212] S10, metallization: printing silver aluminum paste on the front side and silver paste on the back side, high temperature sintering metallization to obtain gate lines.

[0213] The differences between the above-mentioned Examples 1-2 and Comparative Examples 1-3 are shown in Table 1.

[0214] Table 1 Differences between Examples 1 to 2 and Comparative Examples 1 to 3

[0215]

[0216] The solar cells prepared in the above Examples 1 to 2 and Comparative Examples 1 to 3 were tested for electrical performance, and the results are shown in Table 2.

[0217] Table 2 Electrical properties of solar cells prepared in Examples 1 to 2 and Comparative Examples 1 to 3

[0218]

[0219] From the test results in Table 2, it can be seen that the thickness of the doped polysilicon layer in Comparative Example 1 is greater than that in Comparative Example 2, so the parasitic absorption is more serious, resulting in a relatively low short-circuit current. Although Comparative Example 2 forms a thinner doped polysilicon layer, the open circuit voltage is seriously reduced compared to Comparative Example 1. This is because although the current gain is relatively large when the doped polysilicon layer is simply thinned, it also causes the silver paste on the back to burn through the doped polysilicon layer and directly contact the silicon substrate, resulting in a large amount of recombination, thereby reducing the open circuit voltage.

[0220] Compared with Comparative Example 2, in Comparative Example 3, a thicker thermal silicon oxide layer is grown on the doped polysilicon layer. The dense thermal silicon oxide layer can play a good blocking and passivation role, so that a high current gain can be obtained while maintaining a high open circuit voltage.

[0221] In both Example 1 and Example 2, a PSG layer is formed on the doped polysilicon layer, and a laser doping process is performed. From the perspective of electrical performance results, compared with Comparative Examples 1 to 3, the open circuit voltage of Example 1 and Example 2 is significantly higher, at least 7 mV higher. Compared with Example 1 and Example 2, although the formation of the PSG layer in Example 2 plays a certain protective role on the doped polysilicon layer, due to its thin thickness, the laser still causes certain damage to the tunneling silicon oxide layer during the laser doping process, making the open circuit voltage of Example 2 relatively low.

[0222] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0223] The above-mentioned embodiments only express several implementation methods of the present invention, and the description is relatively specific and detailed, but it cannot be understood as limiting the scope of the invention patent. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be based on the attached claims, and the description can be used to interpret the content of the claims.

Claims

1. A method for preparing a solar cell, characterized in that: The following steps are involved: forming a tunneling oxide layer on a first side of a silicon substrate; forming an amorphous silicon layer on the tunnel oxide layer; The amorphous silicon layer is subjected to diffusion doping treatment, comprising: a first process, introducing a doping source and an oxygen source into the diffusion chamber, and heating the amorphous silicon layer, so that the amorphous silicon layer forms a doped polysilicon layer and a doped oxide layer located on the doped polysilicon layer; a second process, stopping introducing the doping source and keeping introducing the oxygen source to increase the thickness of the doped oxide layer; A heavily doped region is formed on the doped polysilicon layer by a laser doping process.

2. The method for preparing a solar cell according to claim 1, characterized in that: The preparation method meets at least one of the following characteristics (1) to (2): (1) In the first process, the process temperature is 820°C to 880°C; (2) In the second process, the process temperature is 850°C to 920°C.

3. The method for preparing a solar cell according to claim 1, characterized in that: In the second process, the thickness of the doped oxide layer is controlled to be 80 nm to 120 nm.

4. The method for preparing a solar cell according to claim 1, characterized in that: The preparation method meets at least one of the following characteristics (1) to (2): (1) The thickness of the tunnel oxide layer is 0.5 nm to 2 nm; (2) The thickness of the amorphous silicon layer is 15 nm to 40 nm.

5. The method for preparing a solar cell according to claim 1, characterized in that: The preparation method meets at least one of the following characteristics (1) to (3): (1) The wavelength of the light source used in the laser doping process is 350nm to 700nm; (2) The width of the light spot formed by the laser doping process is 60nm to 120nm; (3) The doping concentration of the heavily doped region is 2×10 20 atoms / cm 3 ~2×10 21 atoms / cm 3 ; (4) The sheet resistance of the heavily doped region is 10 ohm to 25 ohm.

6. The method for preparing a solar cell according to any one of claims 1 to 5, characterized in that: After the laser doping process, the preparation method further comprises the following steps: A thermal oxide layer is formed on the back side by a thermal oxidation process.

7. The method for preparing a solar cell according to claim 6, characterized in that: The preparation method meets at least one of the following characteristics (1) to (3): (1) The temperature of the thermal oxidation process is 1000° C. to 1200° C.; (2) The thermal oxidation process lasts for 4000s to 10000s; (3) The thickness of the thermal oxidation layer is 60nm to 200nm.

8. The method for preparing a solar cell according to any one of claims 1 to 5, characterized in that: The preparation method further comprises the following steps: An emitter is formed on a second side of the silicon substrate, wherein the second side is arranged opposite to the first side.

9. The method for preparing a solar cell according to claim 8, characterized in that: The preparation method further comprises the following steps: preparing a first electrode in contact with the heavily doped region; and / or A second electrode is prepared in contact with the emitter.

10. A solar cell, characterized in that: It is prepared by the preparation method according to any one of claims 1 to 9.

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