Semiconductor packaging soldering quality inspection methods

Abstract

This invention provides a method for inspecting the welding quality of semiconductor packages. The method, based on a semiconductor package welding quality inspection system, includes the following steps: an IC bonding wire detection unit sends an excitation signal to the bonding wires via a BITS detection circuit and samples the reflected signal from the bonding wires to output a waveform detection signal; the IC bonding wire detection unit determines whether to receive a control command from a host computer based on the waveform detection signal; upon receiving the control command from the host computer, the bonding wires are voltage-calibrated and a calibration value is calculated; an ignition logic control unit initiates the ignition process via an EFO control circuit and adjusts the ignition parameters based on the calibration value; after the ignition process ends, the bonding wires are inspected and the inspection result is output. According to this invention, a semiconductor package welding quality inspection method can be provided that filters out interference signals, improves inspection accuracy, and increases production efficiency.

Description

Technical Field

[0001] This invention belongs to the field of wire bonding machine technology, and specifically relates to a method for inspecting the welding quality of semiconductor packaging. Background Technology

[0002] Wire bonding machines are indispensable equipment in semiconductor packaging processes. Their main function is to bond gold wires (or metal leads) to the die (or chip carrier). With the rapid development of the semiconductor industry, IC design is becoming increasingly diversified and high-speed, and the requirements for the accuracy of wire bonding integrity testing are also becoming higher and higher.

[0003] Currently, conventional wire bonding machines typically employ hardware circuitry for RMS conversion, transforming the test signal and interference noise into a single effective signal and filtering it uniformly. Logical judgments are then made based on the filtered effective signal to monitor the bonding process of each IC circuit in real time. For example, Chinese invention patents with publication numbers CN109975687A and CN116984708A disclose related IC bonding wire quality inspection devices and methods. Meanwhile, Chinese invention patent CN1773786A introduces a logic control circuit based on a programmable logic device (CPLD) for self-monitoring of arc bonding and ball formation.

[0004] However, the aforementioned existing technologies generally design the ignition control system (EFO) and IC bonding wire detection (BITS) logic function circuits separately. This design method has problems such as poor filtering effect, weak anti-interference ability, time-consuming process and difficulty in achieving high-precision detection. Summary of the Invention

[0005] The present invention aims to overcome the deficiencies in the prior art and provide a semiconductor packaging welding quality inspection method that can filter out interference signals and improve detection accuracy and production efficiency.

[0006] To achieve the above objectives, the present invention provides a semiconductor packaging soldering quality inspection method. This method utilizes a semiconductor packaging soldering quality inspection system to inspect the soldering quality of semiconductor packages. The system includes a semiconductor packaging soldering quality inspection device and a host computer. The semiconductor packaging soldering quality inspection device includes a main control chip, an EFO control circuit, and a BITS detection circuit. The main control chip includes a communication unit connected to the host computer, an ignition logic control unit connected to the EFO control circuit, and an IC bonding wire detection unit connected to the BITS detection circuit. The method includes the following steps: the IC bonding wire detection unit communicates with the host computer... The BITS detection circuit sends an excitation signal to the bonding wire and samples the reflected signal of the bonding wire to output a waveform detection signal. The IC bonding wire detection unit determines whether to receive a control command sent by the host computer based on the waveform detection signal. After receiving the control command sent by the host computer, the IC bonding wire detection unit performs voltage calibration on the bonding wire and calculates the calibration value. The ignition logic control unit starts the ignition process through the EFO control circuit and adjusts the ignition parameters based on the calibration value. After the ignition process ends, the IC bonding wire detection unit detects the bonding wire and outputs the detection result.

[0007] In this invention, the main control chip integrates an ignition logic control unit and an IC bonding wire detection unit. Compared with the prior art, which designs the ignition control system (EFO) and IC bonding wire detection (BITS) logic function circuits separately for detection, this invention can improve the filtering effect, anti-interference ability, detection speed and detection accuracy.

[0008] Optionally, the semiconductor packaging welding quality inspection method of the present invention may further include: the IC bonding wire inspection unit sending the inspection result to the host computer.

[0009] In the semiconductor packaging welding quality inspection method of the present invention, optionally, the IC bonding wire detection unit includes a detection module, a waveform transmission module, and a waveform sampling module. The detection module is configured to calculate the calibration value before arcing and detect the IC bonding wire after arcing. The waveform transmission module is configured to send an excitation signal to the bonding wire. The waveform sampling module is configured to collect the detection waveform signal reflected by the bonding wire.

[0010] In the semiconductor packaging welding quality inspection method of the present invention, optionally, when the ignition process is started, the waveform sending module stops sending excitation signals.

[0011] In the semiconductor packaging welding quality inspection method of the present invention, optionally, the communication unit includes an SPI communication master module and an SPI communication slave module. The SPI communication slave module is configured to receive control commands sent by a host computer, and the SPI communication master module is configured to send feedback commands to the host computer, the feedback commands including the detection results.

[0012] In the semiconductor packaging welding quality inspection method of the present invention, optionally, before sending the excitation signal to the bonding wire, the method further includes: initializing the main control chip and loading the stored parameters in the memory.

[0013] In the semiconductor packaging welding quality inspection method of the present invention, optionally, the main control chip further includes a synchronizer unit, which is configured to synchronize the signals input to the control chip.

[0014] In the semiconductor packaging welding quality inspection method of the present invention, optionally, the main control chip further includes a filter unit, which is configured to filter the signal input to the control chip.

[0015] In the semiconductor packaging welding quality inspection method of the present invention, optionally, the main control chip further includes a connection unit, and the connection module is configured to be connected to the ignition logic control unit, the IC bonding lead detection unit and the communication unit respectively and to perform data interaction.

[0016] In the semiconductor packaging welding quality inspection method of the present invention, optionally, the BITS detection circuit includes a first digital-to-analog converter and a first amplifier circuit, the waveform sending module sends the excitation signal and sends it to the bonding wire via the first digital-to-analog converter and the first amplifier circuit, and the waveform sampling module samples the detection waveform signal reflected by the bonding wire.

[0017] According to the present invention, a semiconductor packaging welding quality inspection method is provided that filters out interference signals, improves detection accuracy and production efficiency. The perfect integration of the arcing system and BITS inspection greatly improves the working efficiency of the semiconductor packaging welding quality inspection device and system. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings in the description are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1This is a functional block diagram of the main control chip involved in the embodiments of the present invention.

[0020] Figure 2 This is a functional block diagram of Embodiment 1 of the semiconductor packaging welding quality system involved in the present invention.

[0021] Figure 3 This is a flowchart of a semiconductor packaging welding quality inspection method according to an embodiment of the present invention.

[0022] Figure 4 This is a functional block diagram of Embodiment 2 of the semiconductor packaging welding quality system involved in the present invention.

[0023] Figure 5 This is a flowchart of the ignition control logic involved in the embodiments of the present invention.

[0024] Figure 6 This is a flowchart of IC bonding wire detection involved in the embodiments of the present invention. Detailed Implementation

[0025] To make the objectives, technical solutions, and advantages of the invention clearer, the technical solutions of the embodiments of the invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the invention, not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without creative effort are within the scope of protection of the invention.

[0026] The first aspect of this invention provides a semiconductor packaging soldering quality inspection method implemented by a semiconductor packaging soldering quality inspection system. This semiconductor packaging soldering quality inspection method can also be referred to as an integrated soldering quality inspection method based on FPGA (Field-Programmable Gate Array) EFO (Electronic Flame-Off) and BITS (Bond Integrity Test System).

[0027] A second aspect of the present invention provides a main control chip. Preferably, the main control chip can be an FPGA chip. The FPGA chip has the advantage of parallel data processing.

[0028] A third aspect of the present invention provides a semiconductor package soldering quality inspection device including the main control chip. This semiconductor package soldering quality inspection device can also be referred to as an FPGA-based EFO and BITS integrated soldering quality inspection device.

[0029] A fourth aspect of the present invention provides a semiconductor package welding quality inspection system including the semiconductor package welding quality inspection device. This semiconductor package welding quality inspection system can also be referred to as an FPGA-based EFO and BITS integrated welding quality inspection system.

[0030] EFO is used to form gold balls during wire bonding. BITS is used to inspect wire bonding quality.

[0031] In some embodiments, the bonding wires in this invention can be gold wires, silver wires, copper wires, aluminum wires, etc.

[0032] The present invention aims to address the shortcomings of the prior art, which generally designs the two logic function circuits of the ignition control system (EFO) and IC bonding wire detection (BITS) separately, and provides a semiconductor packaging welding quality inspection method that can filter out interference signals and improve detection accuracy and production efficiency.

[0033] Reference Figure 1 To achieve the above objectives, the present invention provides a main control chip 10. The main control chip 10 can be connected to the EFO control circuit 30, the BITS detection circuit 20, and the host computer 2, respectively.

[0034] In some embodiments, the main control chip 10 may include an ignition logic control unit 12, an IC bonding wire detection unit 11, and a communication unit 13. The main control chip 10 is connected to the EFO control circuit 30 via the ignition logic control unit 12. The main control chip 10 is connected to the BITS detection circuit 20 via the IC bonding wire detection unit 11. The main control chip 10 is communicatively connected to the host computer 2 via the communication unit 13.

[0035] In this invention, the main control chip 10 integrates an ignition logic control unit 12 and an IC bonding wire detection unit 11. Compared to the prior art, which designs the ignition control system (EFO) and IC bonding wire detection (BITS) logic circuits separately, this improves the filtering effect, anti-interference capability, detection speed, and detection accuracy of the main control chip 10. By integrating the ignition control system (EFO) and IC bonding wire detection (BITS) onto the same main control chip 10, a tight functional integration is achieved. This integration not only saves hardware resources but also greatly improves the system response speed and efficiency. In particular, by utilizing the parallel processing characteristics of the FPGA, multiple logic judgments are performed simultaneously during the ignition and detection processes, significantly improving the overall processing efficiency of the detection device 1.

[0036] Reference Figure 2The present invention provides a semiconductor packaging welding quality inspection device 1 (hereinafter referred to as the inspection device). The inspection device 1 may include a main control chip 10, and an EFO control circuit 30 and a BITS detection circuit 20 respectively connected to the main control chip 10.

[0037] In some embodiments, the main control chip 10 may include an ignition logic control unit 12, an IC bonding wire detection unit 11, and a communication unit 10. The main control chip 10 is connected to the EFO control circuit 30 through the ignition logic control unit 12, the main control chip 10 is connected to the BITS detection circuit 20 through the IC bonding wire detection unit 11, and the main control chip 10 is connected to the host computer 2 through the communication unit 13.

[0038] In this invention, since the main control chip 10 integrates the ignition logic control unit 12 and the IC bonding lead detection unit 11, when ignition and quality detection are performed by the semiconductor packaging welding quality inspection device 1, compared with the prior art technology that designs the ignition control system (EFO) and IC bonding lead detection (BITS) two logic function circuits separately, the filtering effect, anti-interference ability, detection speed and detection accuracy of the main control chip 10 can be improved.

[0039] This invention provides a semiconductor packaging welding quality inspection system (hereinafter referred to as the inspection system). (Refer to...) Figure 2 The detection system may include a semiconductor packaging welding quality detection device 1 and a host computer 2. The semiconductor packaging welding quality detection device 1 can communicate with the host computer.

[0040] The present invention also provides a semiconductor packaging welding quality inspection method (hereinafter referred to as the inspection method), which can be a method for inspecting the welding quality of semiconductor packaging according to a semiconductor packaging welding quality inspection system.

[0041] Reference Figure 3 In some embodiments, the detection method may include step S100, sending an excitation signal to the bonding wire 23 and sampling the reflected signal of the bonding wire 23 to output a waveform detection signal. Specifically, the IC bonding wire detection unit 11 may send an excitation signal to the bonding wire 23 and sample the reflected signal of the bonding wire 23 through the BITS detection circuit 20 to output a waveform detection signal.

[0042] In some embodiments, the detection method may include step S200, determining whether a control command sent by the host computer 2 is received based on the waveform detection signal. Specifically, the IC bonding wire detection unit 11 may determine whether a control command sent by the host computer 2 is received based on the waveform detection signal.

[0043] In some embodiments, the host computer 2 can send control commands to the SPI communication slave module of the FPGA via the SPI protocol for protocol parsing, thereby extracting ignition parameters and detection parameters, etc.

[0044] In some embodiments, the detection method may include step S300, which involves calibrating the voltage of the bonding wire and calculating the calibration value after receiving a control command from the host computer 2. Specifically, the IC bonding wire detection unit 11 may calibrate the voltage of the bonding wire 23 and calculate the calibration value after receiving a control command from the host computer 2.

[0045] In some embodiments, the detection method may include step S400, initiating the ignition process and adjusting the ignition parameters based on calibration values. Specifically, the ignition logic control unit 12 may initiate the ignition process via the EFO control circuit 30.

[0046] In some embodiments, the detection method may include step S500, which involves detecting the bonding wires and outputting the detection results after the ignition process is completed. Specifically, the IC bonding wire detection unit 11 detects the bonding wires 23 and outputs the detection results after the ignition process is completed.

[0047] In some embodiments, the types of inspections may include first-weld inspection, second-weld inspection, and short-tail inspection, etc.

[0048] In this invention, the parallel processing capability of the main control chip 10 is utilized to perform relevant logic judgments simultaneously during the ignition and BITS detection processes, and the ignition and bonding wire detection are performed sequentially and continuously. After the ignition process ends, the detection state can be entered immediately, reducing process interference, making the timing connection more compact, and improving processing efficiency.

[0049] In some embodiments, the detection method may further include sending the detection result to the host computer 2. Specifically, the IC bonding wire detection unit 11 may send the detection result to the host computer 2.

[0050] In some embodiments, the SPI communication host module can send the detection results and the status information of the main control chip 10 to the host computer 2, or send alarm information to the host computer 2 when the detection fails.

[0051] Reference Figure 4 In some embodiments, the IC bonding wire detection unit 11 may include a detection module 111, a waveform transmission module 112, and a waveform sampling module 113. The detection module 111 may be configured to calculate calibration values ​​before arcing and detect IC bonding wires after arcing. The waveform transmission module 112 may be configured to send an excitation signal to the bonding wire. The waveform sampling module 113 may be configured to acquire the detection waveform signal reflected by the bonding wire.

[0052] In some embodiments, when the ignition process is started, the waveform sending module 112 stops sending excitation signals.

[0053] In some embodiments, the waveform transmitting module 112 can transmit an excitation signal with a specified frequency and a specified amplitude.

[0054] In some embodiments, the communication unit 113 may include an SPI communication master module and an SPI communication slave module. The SPI communication slave module may be configured to receive control commands sent by a host computer. The SPI communication master module may be configured to send feedback commands to the host computer. In some embodiments, the feedback command may include a detection result.

[0055] In some embodiments, the main control chip 10 may further include a synchronizer unit 14. The synchronizer unit 14 may be configured to synchronize signals input to the main control chip 10. The synchronizer unit 14 is capable of synchronizing asynchronous signals input externally to the main control chip 10 to ensure data consistency and reliability.

[0056] In some embodiments, the main control chip 10 may further include a filter unit 15. The filter unit 15 can be configured to filter the signals input to the control chip 10. The filter unit 15 can filter the signals input external to the main control chip 10, effectively reducing noise interference and improving signal quality. This invention implements filtering and synchronization processing in software, which is more flexible and easier to adjust and optimize compared to hardware implementation.

[0057] In some embodiments, the main control chip 10 may further include a connection unit 16. The connection module 16 can be configured to connect to and interact with the ignition logic control unit 12, the IC bonding lead detection unit 11, and the communication unit 13, respectively. The connection module 16 in this invention can play a central control role. Through SPI (Serial Peripheral Interface) communication, it can transmit the instructions sent by the host computer 2 to the ignition logic control unit 12 and the IC bonding lead detection unit 11. At the same time, it can monitor the status of the two modules at any time and transmit the status information to the host computer 2 in a timely manner.

[0058] In some embodiments, the BITS detection circuit 20 may include a first digital-to-analog converter 21 and a first amplifier circuit 22. The waveform transmission module 112 may transmit an excitation signal to the bonding wire via the first digital-to-analog converter 21 and the first amplifier circuit 22. The waveform sampling module 113 may sample the detection waveform signal reflected by the bonding wire.

[0059] In some embodiments, before sending an excitation signal to the bonding wire 23, the method further includes: initializing the main control chip 10 and loading stored parameters into the memory.

[0060] In some embodiments, the ignition logic control unit, IC bonding wire detection unit, SPI communication master module, SPI communication slave module, synchronizer module, filter module and connection module in the FPGA can be initialized, and ignition parameters and detection parameters can be loaded from Flash.

[0061] In some embodiments, the IC bonding wire detection unit 11 may further include an enable control module 115, which may be configured to process control commands sent by the host computer 2 and send them to other modules.

[0062] In some embodiments, the control chip 10 may further include a PID adjustment control module 114 and a second digital-to-analog converter output drive module 116. The PID adjustment control module 114 is used to dynamically adjust the sampling signal voltage of the external circuit to ensure detection accuracy. The use of the PID algorithm enables the system to respond quickly and stabilize at the optimal sampling voltage. The use of the PID algorithm to dynamically adjust the sampling signal voltage ensures optimal detection accuracy under different operating conditions.

[0063] In some embodiments, the BITS detection circuit 20 may include an analog-to-digital converter 26, a second amplifier circuit 25, a second digital-to-analog converter 27, and a detection current feedback circuit 24. The detection current feedback circuit 24 can detect the detection waveform signal and send the detection waveform signal sequentially through the second amplifier circuit 25 and the analog-to-digital converter 26 to the waveform sampling module 113. The waveform sampling module 113 can send the detection waveform signal to the PID adjustment control module 114. The PID adjustment control module 114 can send an adjustment signal to the second digital-to-analog converter 27 through the second digital-to-analog converter output drive module 116 to adjust the output voltage of the second amplifier circuit 25, thereby keeping the output voltage of the analog-to-digital converter 26 within a predetermined range.

[0064] In some embodiments, the detection device 1 may further include a memory, which may be connected to the main control chip 10. The memory may store detection parameters and operating parameters required by the main control chip 10. In some embodiments, the memory may be a Flash memory, a RAM memory, a ROM memory, etc.

[0065] In some embodiments, the EFO control circuit 30 may further include a negative high-voltage control circuit 38, a negative high-voltage high-frequency transformer 39, a negative low-voltage control circuit 36, a negative low-voltage high-frequency transformer 37, a third digital-to-analog converter, a constant current control circuit 35, a current sampling circuit 33, a detection feedback circuit 32, and an arc discharge circuit 31. The EFO control circuit 30 can control the arcing of the bonding leads through the arc discharge circuit 31. The EFO control circuit 30 can control the arcing intensity through the negative high-voltage control circuit 38, the negative high-voltage high-frequency transformer 39, the negative low-voltage control circuit 36, the negative low-voltage high-frequency transformer 37, the third digital-to-analog converter, and the constant current control circuit 35. The EFO control circuit 30 can sample the arcing intensity through the current sampling circuit 33 and the detection feedback circuit 32, thereby achieving dynamic adjustment of the arcing.

[0066] Reference Figure 5 The ignition control logic flow of this invention may include: initializing the ignition logic control unit; starting the watchdog timer; determining whether an ignition command has been received from the host computer 2, and if not, returning to receive it again; if received, preparing to run the ignition parameters sent by the host computer 2; outputting an initial segment current command, enabling current output, and enabling the low-voltage transformer output; determining whether a short circuit has occurred in the ignition rod, and if so, judging the ignition state as short-time and shutting off the current and voltage outputs; if not, delaying for 50 microseconds to wait for low-voltage stabilization; starting ignition and enabling the high-voltage transformer output; determining whether a breakdown current has been detected, and if not, restarting ignition, at which point it can be determined whether the number of repeated ignitions has been used up, and if not, starting ignition and enabling the high-voltage transformer output, and if so, starting the ignition... Set the status to ON and turn off the current and voltage outputs; if a breakdown current is detected, ignition is successful, and the high-voltage output is turned off with a 5-microsecond delay to prevent malfunction; check if the air gap is blocked. If not, set the ignition status to ON and turn off the current and voltage outputs; if yes, delay for a period of time to maintain the initial current; check if the current is unexpectedly disconnected. If yes, set the ignition status to GLITCH (temporary problem) and turn off the current and voltage outputs; if the current is not unexpectedly disconnected, output the burning current command segment by segment; check if the burning is finished. If yes, set the ignition status to wait and turn off the current and voltage outputs; if not, check if the burning current has disappeared. If yes, set the ignition status to GLITCH and turn off the current and voltage outputs.

[0067] Reference Figure 6The IC bonding wire detection process of this invention may include: initializing the IC bonding wire detection unit; starting the watchdog timer; determining whether a calibration command has been received from the host computer 2, and if not, returning to receive it again; if yes, preparing to run calibration parameters; sampling the detection current of the IC bonding wire circuit and calculating the calibration value according to the calibration parameters; determining whether an ignition completion signal has been received from the ignition logic control unit, and if not, returning to receive it again; if yes, detecting the first weld, second weld, and short wire tail according to the calibration value; determining whether the first weld detection is normal, and if not, reporting an error message of first weld not sticking, and delaying for a period of time to wait for the next detection; determining whether the short tail detection is normal, and if not, reporting an error message of short wire arc; if the short tail detection is normal, determining whether the second weld detection is normal, and if not, reporting an error message of second weld not sticking; if yes, reporting a normal detection message; delaying for a period of time and performing the next detection; and receiving the calibration command from the host computer again.

[0068] In practical applications, the present invention can be modified in terms of parameters and expanded in terms of functionality according to specific needs. For example, the arcing parameters and detection thresholds can be adjusted according to different types of IC products; more detection items can be added; and the system performance can be further improved by optimizing the data processing algorithm inside the FPGA.

[0069] In summary, this invention provides an efficient, accurate, and scalable method for inspecting the quality of semiconductor packaging welding, offering a new solution for the development of wire bonding machine technology.

[0070] According to the present invention, a main control chip, a semiconductor packaging welding quality inspection device, system, and method are provided to filter out interference signals and improve detection accuracy and production efficiency. The perfect integration of the arcing system and BITS inspection can greatly improve the working efficiency of the semiconductor packaging welding quality inspection device and system.

[0071] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for inspecting the soldering quality of semiconductor packaging, comprising a semiconductor packaging soldering quality inspection system for inspecting the soldering quality of semiconductor packaging, the system including a semiconductor packaging soldering quality inspection device and a host computer, the semiconductor packaging soldering quality inspection device including a main control chip, an EFO control circuit and a BITS detection circuit, the main control chip including a communication unit communicatively connected to the host computer, an arcing logic control unit connected to the EFO control circuit, and an IC bonding wire detection unit connected to the BITS detection circuit, characterized in that... The following steps are involved: The IC bonding wire detection unit sends an excitation signal to the bonding wire through the BITS detection circuit and samples the reflected signal of the bonding wire to output a waveform detection signal. The IC bonding wire detection unit determines whether to receive a control command sent by the host computer based on the waveform detection signal. After receiving the control command sent by the host computer, the IC bonding wire detection unit performs voltage calibration on the bonding wire and calculates the calibration value. The ignition logic control unit initiates the ignition process through the EFO control circuit and adjusts the ignition parameters based on the calibration value. The IC bonding wire detection unit detects the bonding wires after the ignition process is completed and outputs the detection results. The IC bonding wire detection unit includes a detection module, a waveform transmission module, and a waveform sampling module. The detection module is configured to calculate the calibration value before arcing and detect the IC bonding wire after arcing. The waveform transmission module is configured to send an excitation signal to the bonding wire. The waveform sampling module is configured to collect the detection waveform signal reflected by the bonding wire.

2. The semiconductor packaging welding quality inspection method according to claim 1, characterized in that, Also includes: The IC bonding wire detection unit sends the detection results to the host computer.

3. The semiconductor packaging welding quality inspection method according to claim 1, characterized in that, When the ignition process is started, the waveform sending module stops sending excitation signals.

4. The semiconductor packaging welding quality inspection method according to claim 1, characterized in that, The communication unit includes an SPI communication master module and an SPI communication slave module. The SPI communication slave module is configured to receive control commands sent by a host computer, and the SPI communication master module is configured to send feedback commands to the host computer. The feedback commands include the detection results.

5. The semiconductor packaging welding quality inspection method according to claim 1, characterized in that, Before sending the excitation signal to the bonding wire, the process also includes: initializing the main control chip and loading the stored parameters into the memory.

6. The semiconductor packaging welding quality inspection method according to claim 1, characterized in that, The main control chip also includes a synchronizer unit, which is configured to synchronize the signals input to the main control chip.

7. The semiconductor packaging welding quality inspection method according to claim 1, characterized in that, The main control chip also includes a filter unit, which is configured to filter the signals input to the main control chip.

8. The semiconductor packaging welding quality inspection method according to claim 1, characterized in that, The main control chip also includes a connection unit, which is configured to connect to and interact with the ignition logic control unit, the IC bonding wire detection unit and the communication unit respectively.

9. The semiconductor packaging welding quality inspection method according to claim 1, characterized in that, The BITS detection circuit includes a first digital-to-analog converter and a first amplifier circuit. The waveform sending module sends the excitation signal and sends it to the bonding wire via the first digital-to-analog converter and the first amplifier circuit. The waveform sampling module samples the detection waveform signal reflected by the bonding wire.

Images