Composite sensitive sensor chip integration and packaging automation system

Abstract

The present invention relates to the field of sensor chip integration technology, and more specifically, to an automated system for integrating and packaging composite sensitive sensor chips. The system comprises a position layout unit, a distance noise unit, an interference optimization unit, and an integrated packaging unit. The chip layout module of the present invention uses visual technology to obtain the dimensions of a silicon wafer, pressure, flow, and temperature sensor chips, and the center position of the pressure, flow, and temperature sensor chips. The position of the pressure, flow, and temperature sensor chips on a single silicon wafer is calculated based on the dimensions of the silicon wafer and the pressure, flow, and temperature sensor chips. By calculating a reasonable layout position, the available area of ​​the silicon wafer can be maximized, waste can be reduced, and production efficiency and cost can be improved. At the same time, a reasonable position layout makes it easier to integrate multiple sensor chips into smaller, lighter materials, thereby improving practicality.

Description

Technical Field

[0001] The present invention relates to the technical field of sensor chip integration, in particular to an automatic system for integrating and packaging composite sensitive sensor chips. Background Art

[0002] The automation of composite sensitive sensor chip integration and packaging achieves efficient and high-precision sensor chip production through multi-sensor integration technology, advanced packaging technology, and automated production lines. This technology has broad application prospects in the fields of automotive electronics, industrial automation, and consumer electronics. The development of a new monolithic integrated composite sensor structure design based on single-silicon wafer single-sided micromachining can significantly improve the cost-effectiveness and market competitiveness of sensor chips. The realization of selective self-stop etching of microstructures within single-crystal silicon wafers will expand the application of traditional bulk silicon micromachining technology in the processing of three-dimensional micromechanical structures. Due to the unreasonable chip position layout during the integration process of composite sensitive sensor chips, the available area of ​​the silicon wafer cannot be maximized, resulting in resource waste and increased costs. When multiple chips are arranged in an unreasonable position, the signal line layout between each chip will also be unreasonable, causing external signal interference and internal signal crosstalk during high-frequency signal and high-speed data transmission, resulting in reduced signal quality and stability. Therefore, we provide a composite sensitive sensor chip integration and packaging automation system. Summary of the Invention

[0003] The object of the present invention is to provide a composite sensitive sensor chip integration and packaging automation system to solve the problems raised in the above background technology.

[0004] To achieve the above-mentioned object, the present invention provides a composite sensitive sensor chip integration and packaging automation system, comprising a position layout unit, a distance noise unit, an interference optimization unit and an integrated packaging unit;

[0005] The position layout unit obtains the size of the silicon chip and the pressure, flow, and temperature sensor chip and the center position of the pressure, flow, and temperature sensor chip, and obtains historical data, and calculates the position of the pressure, flow, and temperature sensor chip layout on the single silicon chip and the position of the signal line layout according to the size of the silicon chip and the pressure, flow, and temperature sensor chip;

[0006] The distance noise unit is used to receive the layout position and historical data of the pressure, flow, and temperature sensor chip signal lines in the position layout unit, calculate the distance between the power line and each signal line and calculate the capacitive coupling, and use the capacitive coupling to determine the signal interference problem;

[0007] The interference optimization unit is used to receive a command from the distance noise unit that there is a signal interference problem on the signal line, and the interference optimization unit obtains the distance from the power line to the signal line from the distance noise unit and optimizes the distance;

[0008] The distance noise unit is used to receive the distance optimized in the interference optimization unit and the historical data in the position layout unit, calculate the optimized capacitive coupling according to the optimized distance and the historical data, and re-determine the signal interference problem;

[0009] The integrated packaging unit is used to receive commands from the distance noise unit that will not cause signal interference problems. The integrated packaging unit obtains the size of the silicon wafer, pressure, flow and temperature sensor chips, the center position of the pressure, flow and temperature sensor chips, the position and historical data of the pressure, flow and temperature sensor chip layout from the position layout unit, layouts the position of the pressure, flow and temperature sensor chip layout on a single silicon wafer, analyzes the number and position of micro-bumps required for connecting the pressure sensor chip, flow sensor chip and temperature sensor chip to the single silicon wafer, connects the chip to the single silicon wafer, integrates the composite sensitive sensor chip, and then packages the integrated composite sensitive sensor chip.

[0010] As a further improvement of the present technical solution, the position layout unit includes a chip layout module and a signal line module;

[0011] The chip layout module uses visual technology to obtain the size of the silicon wafer, pressure, flow and temperature sensor chips and the center position of the pressure, flow and temperature sensor chips, and obtains historical data. It calculates the position of the pressure sensor chip layout on the single silicon wafer based on the size of the silicon wafer and the pressure sensor chip, and obtains the position of the pressure sensor chip layout , where 4 and 2 refer to the proportionality coefficients, Refers to dividing the length of the silicon wafer into four equal parts. Refers to half the length of the pressure sensor chip. The position of the flow sensor chip layout on a single silicon chip is calculated based on the size of the silicon chip and the flow sensor chip. ,in, It means placing the center of the flow sensor chip at the third equal part of the silicon wafer length, and then calculating the position of the temperature sensor chip on the single silicon wafer based on the size of the silicon wafer and the temperature sensor chip, and obtaining the position of the temperature sensor chip layout. ,in, Refers to dividing the width of the silicon wafer into four equal parts. As a further improvement to this technical solution, the signal line module is used to receive the size of the silicon wafer and the pressure, flow, and temperature sensor chips, and the center position of the pressure, flow, and temperature sensor chips in the chip layout module, and obtain the length of the pressure, flow, and temperature sensor chips from the size of the pressure, flow, and temperature sensor chips, and then use the minimum safety distance between the set signal lines and the length of the pressure, flow, and temperature sensor chips to calculate the spacing between the signal lines. According to the spacing between the signal lines, the signal lines of the pressure, flow, and temperature sensor chips are rationally laid out from the center of the pressure, flow, and temperature sensor chips along the vertical direction to the top of the single silicon wafer, and the layout positions of the signal lines of the pressure, flow, and temperature sensor chips are recorded.

[0012] As a further improvement of the technical solution, the distance noise unit includes a distance coupling module and a coupling noise module;

[0013] The distance coupling module is used to receive the layout positions of the pressure, flow, and temperature sensor chip signal lines in the signal line module and the historical data in the chip layout module, obtain the layout position of the power line, the vacuum permittivity, and the dielectric constant from the historical data, use a measuring tool to measure the overlapping area of ​​the pressure sensor chip signal line, the flow sensor chip signal line, the temperature sensor chip signal line, and the power line, calculate the distance between the power line and the signal line according to the layout positions of the pressure, flow, and temperature sensor chip signal lines and the layout position of the power line, integrate the distances between the power line and the signal line into a power line to signal line distance set, and calculate the capacitive coupling using the power line to signal line distance set, the vacuum permittivity, and the dielectric constant;

[0014] The coupling noise module is used to receive the capacitive coupling in the distance coupling module, and use the capacitive coupling and the set standard capacitive coupling to determine whether the distance between the signal line and the power line is close. When the capacitive coupling is greater than the set standard capacitive coupling, it means that the distance between the signal line and the power line is close. The pressure, flow and temperature sensor chips generate noise on the power line during the high-frequency signal transmission process, resulting in a signal interference problem. A measuring tool is used to detect the rate of change of the signal voltage and the change in time. The rate of change of the signal voltage, the change in time and the capacitive coupling are then used to calculate the induced noise voltage. The induced noise voltage and the set induced noise voltage threshold are used to determine whether there is a signal interference problem. When the induced noise voltage is greater than the set induced noise voltage threshold, it means that there is a signal interference problem on the signal line.

[0015] As a further improvement of the present technical solution, the interference optimization unit is used to receive a command that there is a signal interference problem on the signal line in the coupling noise module. The interference optimization unit obtains the distance set from the power line to the signal line and the overlapping area set of the signal line and the power line from the distance coupling module, optimizes the distance according to the distance set from the power line to the signal line and the set standard distance parameter change, and then optimizes the overlapping area according to the overlapping area set of the signal line and the power line and the set standard overlapping area parameter change.

[0016] As a further improvement of the present technical solution, the coupling noise module is used to receive the optimized distance, optimized overlapping area and historical data in the chip layout module in the interference optimization unit, receive the capacitive coupling in the distance coupling module, obtain the vacuum permittivity and dielectric constant from the historical data, and calculate the optimized capacitive coupling based on the optimized distance, optimized overlapping area, vacuum permittivity and dielectric constant. The optimized capacitive coupling and the set standard capacitive coupling are then used to determine whether the distance between the signal line and the power line is close. When the optimized capacitive coupling is less than the set standard capacitive coupling, it means that the distance between the signal line and the power line is far. The pressure, flow and temperature sensor chips send signals at high frequency, so that no noise and signal interference problems are generated on the power line during the high-frequency signal process, and the command that will not cause signal interference problems is transmitted to the integrated packaging unit.

[0017] As a further improvement of the present technical solution, the integrated packaging unit is used to receive commands in the coupling noise module that will not cause signal interference problems, obtain the dimensions of the silicon wafer and the pressure, flow, and temperature sensor chips and the center position of the pressure, flow, and temperature sensor chips, and the layout position of the pressure, flow, and temperature sensor chips from the chip layout module, and layout the layout position of the pressure, flow, and temperature sensor chips on a single silicon wafer. Then, a scanning electron microscope is used to analyze the number of micro-bumps required for connecting the pressure, flow, and temperature sensor chips to the single silicon wafer and the corresponding micro-bump positions based on the dimensions of the silicon wafer and the pressure, flow, and temperature sensor chips and the center position of the pressure, flow, and temperature sensor chips. The pressure, flow, and temperature sensor chips are connected to the single silicon wafer according to the corresponding micro-bump positions and the number of micro-bumps, and a composite sensitive sensor chip is integrated. Then, the corresponding packaging material is selected from the historical data, and the integrated composite sensitive sensor chip is encapsulated in the corresponding packaging material using the large wafer level capping pre-packaging technology.

[0018] Compared with the prior art, the present invention has the following beneficial effects:

[0019] 1. In the composite sensitive sensor chip integration and packaging automation system, the chip layout module uses visual technology to obtain the size of the silicon wafer, pressure, flow and temperature sensor chips and the center position of the pressure, flow and temperature sensor chips, and calculates the position of the pressure, flow and temperature sensor chips on the single silicon wafer according to the size of the silicon wafer and the pressure, flow and temperature sensor chips. By calculating the reasonable layout position, the available area of ​​the silicon wafer can be maximized, waste can be reduced, and production efficiency and cost can be improved. At the same time, the reasonable position layout makes it easier to integrate multiple sensor chips into smaller and lighter materials, thereby improving practicality.

[0020] 2. In the composite sensitive sensor chip integration and packaging automation system, the signal line module is used to receive the size of the silicon wafer and the pressure, flow, and temperature sensor chip in the chip layout module, and the center position of the pressure, flow, and temperature sensor chip, and obtain the length of the pressure, flow, and temperature sensor chip from the size of the pressure, flow, and temperature sensor chip, and then use the set minimum safety distance between the signal lines and the length of the pressure, flow, and temperature sensor chip to calculate the spacing between the signal lines. According to the spacing between the signal lines, the signal lines of the pressure, flow, and temperature sensor chips are reasonably laid out from the center position of the pressure, flow, and temperature sensor chip along the vertical direction to the top position of the single silicon wafer. By calculating the spacing between the signal lines, external interference and internal crosstalk can be avoided during high-frequency signal and high-speed data transmission. Reasonable spacing can ensure high-speed transmission of signals and improve signal stability. At the same time, when the signal line position is reasonably laid out according to the spacing between the signal lines, it can be ensured that the distance between the signal lines is far enough, thereby reducing signal interference caused by capacitive coupling and electromagnetic induction between the signal lines, and improving the quality and stability of the signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 A unit block diagram of the present invention;

[0022] Figure 2 It is a block diagram of a module unit of the present invention;

[0023] Figure 3 It is a block diagram of the position layout unit of the present invention;

[0024] Figure 4 This is a block diagram of the distance noise unit of the present invention.

[0025] The meaning of each number in the figure is:

[0026] 1. Position layout unit; 11. Chip layout module; 12. Signal line module;

[0027] 2. Distance noise unit; 21. Distance coupling module; 22. Coupling noise module;

[0028] 3. Interference optimization unit; 4. Integrated packaging unit. DETAILED DESCRIPTION

[0029] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention. Example 1

[0030] The present invention provides a composite sensitive sensor chip integration and packaging automation system, please refer to Figure 1 , including a position layout unit 1, a distance noise unit 2, an interference optimization unit 3 and an integrated packaging unit 4.

[0031] The position layout unit 1 obtains the size of the silicon wafer and the pressure, flow, and temperature sensor chip and the center position of the pressure, flow, and temperature sensor chip, and obtains historical data, and calculates the position of the pressure, flow, and temperature sensor chip layout on the single silicon wafer and the position of the signal line layout based on the size of the silicon wafer and the pressure, flow, and temperature sensor chip.

[0032] The distance noise unit 2 is used to receive the layout position and historical data of the pressure, flow, and temperature sensor chip signal lines in the position layout unit 1, calculate the distance between the power line and each signal line and calculate the capacitive coupling, and use the capacitive coupling to determine the signal interference problem.

[0033] The interference optimization unit 3 is used to receive a command from the distance noise unit 2 indicating that there is a signal interference problem on the signal line. The interference optimization unit 3 obtains the distance from the power line to the signal line from the distance noise unit 2 and optimizes the distance. The distance noise unit 2 is used to receive the distance optimized in the interference optimization unit 3 and the historical data in the position layout unit 1, calculates the optimized capacitive coupling based on the optimized distance and historical data, and determines the signal interference problem again.

[0034] The integrated packaging unit 4 is used to receive commands from the distance noise unit 2 that will not cause signal interference problems. The integrated packaging unit 4 obtains the size of the silicon wafer, pressure, flow and temperature sensor chips, the center position of the pressure, flow and temperature sensor chips, the position and historical data of the pressure, flow and temperature sensor chip layout from the position layout unit 1, layouts the position of the pressure, flow and temperature sensor chip layout on a single silicon wafer, and analyzes the number and position of micro-bumps required for connecting the pressure sensor chip, flow sensor chip and temperature sensor chip to the single silicon wafer, connects the chip to the single silicon wafer, integrates the composite sensitive sensor chip, and then packages the integrated composite sensitive sensor chip.

[0035] The following is a refinement of the above units, see Figure 2-Figure 4 ;

[0036] The position layout unit 1 includes a chip layout module 11 and a signal line module 12 .

[0037] Chip layout module 11 obtains the size of the silicon wafer through visual technology , the size of the pressure sensor chip , the size of the flow sensor chip and the size of the temperature sensor chip , the center position of the pressure sensor chip , the center position of the flow sensor chip and the center position of the temperature sensor chip , and obtain historical data, based on the size of the silicon wafer and the size of the pressure sensor chip Calculate the location of the pressure sensor chip layout on a single silicon wafer and obtain the location of the pressure sensor chip layout ; Among them, 4 and 2 refer to the scale factors, which are used to determine the center position of the sensor chip relative to the position of the silicon wafer. It means dividing the length of the silicon wafer into four equal parts and taking the position of the first equal part as the reference point. Refers to half the length of the pressure sensor chip, depending on the size of the silicon wafer and the size of the flow sensor chip Calculate the location of the flow sensor chip layout on a single silicon wafer ,in, It means placing the center of the flow sensor chip at the third equal part of the length of the silicon wafer to ensure the uniform distribution of the chips on the silicon wafer. and the size of the temperature sensor chip Calculate the location of the temperature sensor chip layout on a single silicon wafer and obtain the location of the temperature sensor chip layout ,in, It means dividing the width of the silicon wafer into four equal parts and taking the position of the first equal part as the reference point.

[0038] Historical data includes the location of power line layouts , vacuum permittivity , dielectric constant , corresponding packaging materials.

[0039] The signal line module 12 is used to receive the size of the silicon chip in the chip layout module 11 , the size of the pressure sensor chip , the size of the flow sensor chip and the size of the temperature sensor chip , the center position of the pressure sensor chip , the center position of the flow sensor chip and the center position of the temperature sensor chip and from the size of the pressure sensor chip , the size of the flow sensor chip and the size of the temperature sensor chip Get the length of the pressure sensor chip , the length of the flow sensor chip and the length of the temperature sensor chip , and then use the minimum safety distance between signal lines to set The length of the pressure sensor chip , the length of the flow sensor chip and the length of the temperature sensor chip Calculate the spacing between signal lines By calculating the spacing between signal lines, external interference and internal crosstalk can be avoided during high-frequency signal and high-speed data transmission. Reasonable spacing can ensure high-speed signal transmission and improve signal stability. Connect the signal lines of the pressure sensor chip from the center of the pressure sensor chip to the Vertically to the top of the single silicon wafer Make reasonable layout and move the signal line of flow sensor chip from the center of flow sensor chip Vertically to the top of the single silicon wafer Make reasonable layout and move the signal line of temperature sensor chip from the center of flow sensor chip Vertically to the top of the single silicon wafer Make a reasonable layout and record the layout position of the pressure sensor chip signal line , Layout position of flow sensor chip signal line Layout position of the temperature sensor chip signal line .

[0040] The distance noise unit 2 includes a distance coupling module 21 and a coupling noise module 22;

[0041] The distance coupling module 21 is used to receive the layout position of the pressure sensor chip signal line in the signal line module 12 , Layout position of flow sensor chip signal line , Layout position of temperature sensor chip signal line and historical data in the chip layout module 11, and obtaining the location of the power line layout from the historical data , vacuum permittivity , dielectric constant , use the measuring tool to measure the overlapping area of ​​the pressure sensor chip signal line, flow sensor chip signal line, temperature sensor chip signal line and power line 、 、 , integrate the overlapping areas of the pressure sensor chip signal line, flow sensor chip signal line, temperature sensor chip signal line and power line into the overlapping area set of signal line and power line , according to the layout position of the pressure sensor chip signal line , Layout position of flow sensor chip signal line , Layout position of temperature sensor chip signal line and the location of the power cord layout Calculate the distance between the power line and each signal line, and integrate the distance between the power line and each signal line into a set of distances from the power line to the signal line. , using the overlapping area of ​​signal lines and power lines , the distance from the power line to the signal line , vacuum permittivity and dielectric constant Calculating capacitive coupling By calculating the capacitive coupling value, the coupling effect between signal lines and power lines can be quantified. This helps designers understand potential interference sources in the circuit and take appropriate measures to optimize them.

[0042] Steps to calculate the distance between the power line and each signal line:

[0043] Step 1: According to the layout position of the pressure sensor chip signal line and the location of the power cord layout Calculate the distance between the power line and the pressure sensor chip signal line , the specific algorithm formula is: ;

[0044] Among them, by calculating the distance between the power line and the signal line of the pressure sensor chip, the distance between the power line and the signal line of the pressure sensor chip can be increased, signal noise and crosstalk can be reduced, and signal quality and stability can be improved.

[0045] Step 2: According to the layout position of the flow sensor chip signal line and the location of the power cord layout Calculate the distance between the power line and the signal line of the flow sensor chip , the specific algorithm formula is: ;

[0046] Among them, by calculating the distance between the power line and the signal line of the pressure sensor chip, the distance between the power line and the signal line of the pressure sensor chip can be increased, signal noise and crosstalk can be reduced, and signal quality and stability can be improved.

[0047] Step 3: According to the layout position of the temperature sensor chip signal line and the location of the power cord layout Calculate the distance between the power line and the pressure sensor chip signal line , the specific algorithm formula is: ;

[0048] Among them, by calculating the distance between the power line and the signal line of the pressure sensor chip, the distance between the power line and the signal line of the pressure sensor chip can be increased, signal noise and crosstalk can be reduced, and signal quality and stability can be improved.

[0049] The coupling noise module 22 is used to receive the capacitance coupling noise in the distance coupling module 21. , using capacitive coupling The capacitance coupling with the set standard determines whether the distance between the signal line and the power line is close. When the capacitance coupling is greater than the set standard, it means that the distance between the signal line and the power line is close. The pressure, flow and temperature sensor chips are sending signals at high frequency, which generates noise on the power line during the high-frequency signal process, resulting in signal interference. The measurement tool is used to detect the rate of change of the signal voltage. and time variation , using the rate of change of signal voltage , the change in time and capacitive coupling Calculating the Induced Noise Voltage By calculating the induced noise voltage, the influence of induced noise between signal lines and power lines can be quantified, which helps designers understand potential noise sources and take corresponding measures to optimize them. The induced noise voltage threshold is used to determine whether there is a signal interference problem. When the voltage is greater than the set induced noise threshold, it indicates that there is a signal interference problem on the signal line.

[0050] The interference optimization unit 3 is used to receive the command that the signal line has a signal interference problem in the coupling noise module 22, and the interference optimization unit 3 obtains the distance set from the power line to the signal line from the distance coupling module 21. , the overlapping area of ​​signal lines and power lines , according to the distance from the power line to the signal line and the change in the set standard distance parameter Optimize the distance and get the optimized distance , by optimizing the distance , which can increase the spacing between signal lines and power lines and significantly reduce capacitive coupling, and then according to the overlapping area of ​​signal lines and power lines, and the change in the set standard overlap area parameter Optimize the overlapping area and obtain the optimized overlapping area , by optimizing the overlapping area , reducing the overlapping area between signal lines and power lines and reducing capacitive coupling.

[0051] The coupling noise module 22 is used to receive the distance optimized by the interference optimization unit 3. , optimized overlapping area and historical data in the chip layout module 11, and the capacitive coupling in the receiving distance coupling module 21 , obtain vacuum permittivity from historical data , dielectric constant , according to the optimized distance , optimized overlapping area , vacuum permittivity , dielectric constant Calculate the optimized capacitive coupling By optimizing the capacitance coupling, the capacitance coupling value can be reduced and the coupling effect between the signal line and the power line can be significantly reduced, thereby reducing signal noise and crosstalk, improving signal stability, and then using the optimized capacitance coupling The distance between the signal line and the power line is judged again by the set standard capacitance coupling. When the capacitance coupling is less than the set standard, it means that the distance between the signal line and the power line is far. The pressure, flow and temperature sensor chips send signals at high frequency, so that no noise and signal interference problems are generated on the power line during the high-frequency signal process. The command that will not cause signal interference problems is transmitted to the integrated packaging unit 4.

[0052] The integrated packaging unit 4 is used to receive the command from the coupling noise module 22 that does not cause signal interference problems, and obtain the size of the silicon chip from the chip layout module 11. , the size of the pressure sensor chip , the size of the flow sensor chip and the size of the temperature sensor chip , the center position of the pressure sensor chip , the center position of the flow sensor chip and the center position of the temperature sensor chip The location of the pressure sensor chip layout, the location of the flow sensor chip layout, the location of the temperature sensor chip layout and historical data are laid out on a single silicon wafer, and then a scanning electron microscope is used to calculate the location of the pressure sensor chip layout, the location of the flow sensor chip layout and the location of the temperature sensor chip layout according to the size of the silicon wafer. , the size of the pressure sensor chip , the size of the flow sensor chip and the size of the temperature sensor chip , the center position of the pressure sensor chip , the center position of the flow sensor chip and the center position of the temperature sensor chip Analyze the number of micro-bumps required to connect the pressure sensor chip, flow sensor chip and temperature sensor chip to the single silicon wafer, as well as the corresponding micro-bump positions, and then connect the pressure sensor chip, flow sensor chip and temperature sensor chip to the single silicon wafer according to the corresponding micro-bump positions and number of micro-bumps, integrate the composite sensitive sensor chip, select the corresponding packaging material from historical data, and then use the large wafer level capping pre-packaging technology to encapsulate the integrated composite sensitive sensor chip in the corresponding packaging material.

[0053] The above shows and describes the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The above embodiments and descriptions are merely preferred examples of the present invention and are not intended to limit the present invention. Various changes and improvements may be made to the present invention without departing from the spirit and scope of the present invention. Such changes and improvements fall within the scope of the present invention. The scope of protection claimed in the present invention is defined by the appended claims and their equivalents.

Claims

1. Composite sensitive sensor chip integration and packaging automation system, characterized by: It includes a position layout unit (1), a distance noise unit (2), an interference optimization unit (3) and an integrated packaging unit (4); The position layout unit (1) obtains the size of the silicon chip and the pressure, flow, and temperature sensor chip and the center position of the pressure, flow, and temperature sensor chip, and obtains historical data, the historical data including the position of the power line layout, vacuum permittivity, and dielectric constant, and calculates the position of the pressure, flow, and temperature sensor chip layout on the single silicon chip and the position of the signal line layout based on the size of the silicon chip and the pressure, flow, and temperature sensor chip; The distance noise unit (2) is used to receive the layout position and historical data of the pressure, flow, and temperature sensor chip signal lines in the position layout unit (1), calculate the distance between the power line and each signal line and calculate the capacitive coupling, and use the capacitive coupling to determine the signal interference problem; The interference optimization unit (3) is used to receive a command from the distance noise unit (2) indicating that a signal interference problem exists on the signal line, and the interference optimization unit (3) obtains the distance from the power line to the signal line from the distance noise unit (2) and optimizes the distance; The distance noise unit (2) is used to receive the distance optimized in the interference optimization unit (3) and the historical data in the position layout unit (1), calculate the optimized capacitive coupling based on the optimized distance and the historical data, and re-determine the signal interference problem; The integrated packaging unit (4) is used to receive commands from the distance noise unit (2) that will not cause signal interference problems. The integrated packaging unit (4) obtains the size of the silicon chip and the size of the pressure, flow, and temperature sensor chips from the position layout unit (1), obtains the center position of the pressure, flow, and temperature sensor chips and the position and historical data of the pressure, flow, and temperature sensor chip layout from the position layout unit (1), layouts the position of the pressure, flow, and temperature sensor chips on a single silicon chip, analyzes the number and position of micro-bumps required for connecting the pressure sensor chip, the flow sensor chip, and the temperature sensor chip to the single silicon chip, connects the chip to the single silicon chip, integrates the composite sensitive sensor chip, and then packages the integrated composite sensitive sensor chip.

2. The composite sensitive sensor chip integration and packaging automation system according to claim 1, characterized in that: The position layout unit (1) comprises a chip layout module (11) and a signal line module (12); The chip layout module (11) obtains the size of the silicon chip, the pressure, flow and temperature sensor chip and the center position of the pressure, flow and temperature sensor chip through visual technology, and obtains historical data, calculates the position of the pressure sensor chip layout on the single silicon chip according to the size of the silicon chip and the pressure sensor chip, and obtains the position of the pressure sensor chip layout , where 4 and 2 refer to the proportionality coefficients, Refers to dividing the length of the silicon wafer into four equal parts. Refers to half the length of the pressure sensor chip. The position of the flow sensor chip layout on a single silicon chip is calculated based on the size of the silicon chip and the flow sensor chip. ,in, It means placing the center of the flow sensor chip at the third equal part of the silicon wafer length, and then calculating the position of the temperature sensor chip on the single silicon wafer based on the size of the silicon wafer and the temperature sensor chip, and obtaining the position of the temperature sensor chip layout. ,in, Refers to dividing the width of the silicon wafer into four equal parts.

3. The composite sensitive sensor chip integration and packaging automation system according to claim 2, characterized in that: The signal line module (12) is used to receive the size of the silicon chip and the size of the pressure, flow, and temperature sensor chips in the chip layout module (11), receive the center position of the pressure, flow, and temperature sensor chips in the chip layout module (11), and obtain the length of the pressure, flow, and temperature sensor chips from the size of the pressure, flow, and temperature sensor chips, and then calculate the spacing between the signal lines by using the minimum safety distance between the set signal lines and the length of the pressure, flow, and temperature sensor chips. According to the spacing between the signal lines, the signal lines of the pressure, flow, and temperature sensor chips are rationally laid out from the center of the pressure, flow, and temperature sensor chips along the vertical direction to the top of the single silicon wafer, and the layout positions of the signal lines of the pressure, flow, and temperature sensor chips are recorded.

4. The composite sensitive sensor chip integration and packaging automation system according to claim 3, characterized in that: The distance noise unit (2) comprises a distance coupling module (21) and a coupling noise module (22); The distance coupling module (21) is used to receive the layout positions of the pressure, flow, and temperature sensor chip signal lines in the signal line module (12) and the historical data in the chip layout module (11), obtain the layout position of the power line, the vacuum permittivity, and the dielectric constant from the historical data, use a measuring tool to measure the overlapping area of ​​the pressure sensor chip signal line, the flow sensor chip signal line, the temperature sensor chip signal line, and the power line, calculate the distance between the power line and the signal line according to the layout positions of the pressure, flow, and temperature sensor chip signal lines and the layout position of the power line, integrate the distance between the power line and the signal line into a power line to signal line distance set, and use the power line to signal line distance set, the vacuum permittivity, and the dielectric constant to calculate the capacitive coupling; The coupling noise module (22) is used to receive the capacitive coupling in the distance coupling module (21), and use the capacitive coupling and the set standard capacitive coupling to determine whether the distance between the signal line and the power line is close. When the capacitive coupling is greater than the set standard capacitive coupling, it means that the distance between the signal line and the power line is close. The pressure, flow and temperature sensor chips generate noise on the power line during the high-frequency signal transmission process, resulting in a signal interference problem. The measurement tool is used to detect the rate of change of the signal voltage and the amount of change over time. The rate of change of the signal voltage, the amount of change over time and the capacitive coupling are then used to calculate the induced noise voltage. The induced noise voltage and the set induced noise voltage threshold are used to determine whether there is a signal interference problem. When the induced noise voltage is greater than the set induced noise voltage threshold, it means that there is a signal interference problem on the signal line.

5. The composite sensitive sensor chip integration and packaging automation system according to claim 4, characterized in that: The interference optimization unit (3) is used to receive a command from the coupling noise module (22) indicating that a signal interference problem exists on the signal line. The interference optimization unit (3) obtains a distance set from the power line to the signal line and an overlapping area set between the signal line and the power line from the distance coupling module (21), optimizes the distance based on the distance set from the power line to the signal line and a set standard distance parameter variation, and then optimizes the overlapping area based on the overlapping area set between the signal line and the power line and a set standard overlapping area parameter variation.

6. The composite sensitive sensor chip integration and packaging automation system according to claim 5, characterized in that: The coupling noise module (22) is used to receive the distance optimized in the interference optimization unit (3), the optimized overlapping area and the historical data in the chip layout module (11), receive the capacitance coupling in the distance coupling module (21), obtain the vacuum permittivity and dielectric constant from the historical data, calculate the optimized capacitance coupling according to the optimized distance, the optimized overlapping area, the vacuum permittivity and the dielectric constant, and then use the optimized capacitance coupling and the set standard capacitance coupling to judge whether the distance between the signal line and the power line is close. When the optimized capacitance coupling is less than the set standard capacitance coupling, it means that the distance between the signal line and the power line is far. In this case, the pressure, flow and temperature sensor chips are transmitting signals at high frequency, so that the high frequency signal does not generate noise and signal interference problems on the power line, and the command that does not generate signal interference problems is transmitted to the integrated packaging unit (4).

7. The composite sensitive sensor chip integration and packaging automation system according to claim 6, characterized in that: The integrated packaging unit (4) is used to receive commands from the coupling noise module (22) that do not cause signal interference problems. The integrated packaging unit (4) obtains the size of the silicon chip and the size of the pressure, flow, and temperature sensor chip from the chip layout module (11), obtains the center position of the pressure, flow, and temperature sensor chip and the layout position of the pressure, flow, and temperature sensor chip from the chip layout module (11), and layouts the layout position of the pressure, flow, and temperature sensor chip on a single silicon chip. Then, a scanning electron microscope is used to analyze the number of micro-bumps required for connecting the pressure, flow, and temperature sensor chip to the single silicon chip and the corresponding micro-bump positions based on the size of the silicon chip and the pressure, flow, and temperature sensor chip and the center position of the pressure, flow, and temperature sensor chip. The pressure, flow, and temperature sensor chip is connected to the single silicon chip according to the corresponding micro-bump positions and the number of micro-bumps, and a composite sensitive sensor chip is integrated. Then, a corresponding packaging material is selected from historical data, and the integrated composite sensitive sensor chip is packaged in the corresponding packaging material using a large wafer level capping pre-packaging technology.

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