Discrete device BVDSS test method

Abstract

The invention provides a discrete device BVDSS test method. The discrete device BVDSS test method comprises the steps that a superposed power supply formed by n floating sources is connected between a source electrode and a drain electrode of a discrete device and is initialized; performing FV operation on the first (n-1) floating sources; performing FI operation on the nth floating source; after waiting for a corresponding stabilization time, performing MV operation on each floating source, and recording the MV operation as MVx; performing MI operation on each floating source, and recording the MI operation as MIx; closing all floating sources; the sum of the voltages correspondingly measured by the floating sources serves as an initial test value V0 to be output; whether the MVx and the MIx are abnormal or not is judged, and if not, the final test value V is the initial test value V0; if abnormity exists, assigning the initial test value again according to an agreed rule, and outputting the MVx and the MIx in the abnormal state to an additional document; and outputting a final test value, and performing bin division. According to the method, the BVDSS test quality of the discrete device can be improved, missed killing and mass production test quality accidents are avoided, and rapid positioning analysis of abnormities is realized.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to a BVDSS testing method for discrete devices. Background Art

[0002] Breakdown voltage (BVDSS) is a parameter that must be measured statically for discrete devices. The test schematic is shown in the figure below. Figure 1 As shown, the gate (G) and source (S) of the tested bare chip (die), i.e., the discrete device of MOSFET, are short-circuited, a specific current is stimulated (forced) between the drain (D) and S, and the voltage across the two ends is measured.

[0003] When the die under test needs to be pressurized higher, one test method is to use multiple floating sources to provide voltage. For example, if four floating sources are used to provide voltage, the maximum voltage provided to the die under test can be four times that of a single floating source. The test circuit is as follows: Figure 2 and Figure 3 As shown, Figure 2 The chip under test is a discrete device in common drain mode; Figure 3 The chip under test is a discrete device in top drain mode.

[0004] In the prior art, when using n floating sources to test BVDSS, first use n-1 floating sources to provide a reference voltage, then use the last floating source to provide current, wait for a period of time to ensure that the current is stable, and then measure the voltages of the n floating sources respectively, and add them up as the test value output, and automatically bin according to the test value and spce setting. Specifically, Figure 4 As shown, it is a flow chart of the existing discrete device BVDSS test method; the existing discrete device BVDSS test method includes the following steps:

[0005] Step S101, floating source 1 / 2 / … / ninit. init means initialization, and floating source 1 / 2 / … / n means n floating sources.

[0006] Step S102, floating source 1 / 2 ... / n-1FV. Floating source 1 / 2 ... / n-1FV means performing FV operation on the first to n-1th floating sources, and the FV operation means providing an excitation voltage for the floating source.

[0007] Step S103, floating source nFI. The floating source nFI indicates that the FI operation is performed on the nth floating source, and the FI operation indicates providing an excitation current for the floating source.

[0008] Step S104, wait t0 time. t0 represents the stabilization time after the floating source nFI and before the subsequent floating source nMI. The stabilization time can be set according to the actual characteristics of the measured product.

[0009] Step S105, floating source 1 / 2 / ... / nMV, represents performing MV operation on the first to nth floating sources. The MV operation is to measure the voltages of the first to nth floating sources.

[0010] Step S106, floating source 1 / 2 / … / noff, indicating turning off all floating sources.

[0011] Step S107, calculate the test value V=MV1+MV2+...MVn.

[0012] Step S108: output the test value V and divide it into bins.

[0013] If one of the floating sources is abnormal, or the die under test has a special abnormality, the above conventional test will cause missed kills, resulting in mass production test quality accidents. It is also difficult to infer the root cause of the abnormality through the test value. Summary of the invention

[0014] In view of this, the present invention provides a discrete device BVDSS test method to improve the discrete device BVDSS test quality, avoid missed tests and mass production test quality accidents, and achieve rapid location analysis of abnormalities.

[0015] The present invention provides a discrete device BVDSS testing method, comprising the following steps:

[0016] Step 1: Connect a superimposed power supply formed by n floating sources between the source and drain of a discrete device to form a test circuit;

[0017] Step 2: initializing each of the floating sources;

[0018] Step 3, performing FV operation on the first n-1 floating sources, wherein the FV operation means providing the floating sources with excitation voltages FVx, which are FV1, FV2, ..., FVn-1 respectively;

[0019] Step 4: performing FI operation on the floating source of the nth block, wherein the FI operation indicates providing an excitation current I0 for the floating source;

[0020] Step 5, after waiting for a corresponding stabilization time, perform MV operation on each of the floating sources, wherein the MV operation means measuring the voltage of the floating source, and the corresponding measured voltages are denoted as MVx, which are MV1, MV2, ..., MVn respectively;

[0021] Step 6: Perform MI operation on each floating source, wherein the MI operation means measuring the current of the floating source, and the corresponding measured currents are recorded as MIx, namely MI1, MI2, ..., MIn;

[0022] Step 7: Turn off all the floating sources;

[0023] Step 8, adding the voltages measured corresponding to the floating sources and outputting it as the initial test value V0;

[0024] Step 9: Determine whether the MVx and the MIx have anomalies. If no anomalies exist, the final test value V is the initial test value V0; if anomalies exist, the initial test value is reassigned as the final test value V according to the agreed rules, and the MVx and MIx in the abnormal state are output to an additional document;

[0025] Step 10: Output the final test value and divide it into bins.

[0026] Preferably, in step 1, n is a natural number and is greater than or equal to 2.

[0027] Preferably, the connection structure between the superimposed power supply and the source or drain of the discrete device in step 1 includes a probe.

[0028] Preferably, the method for determining whether the MVx and the MIx are abnormal in step nine is:

[0029] If |FVx-MVx|>A or |FVx-MVx| / FVx>B, it is determined that the MVx is abnormal; or,

[0030] If |I0-MIx|>C or |I0-MIx| / I0>D, it is determined that the MIx is abnormal.

[0031] Preferably, the values ​​of A, B, C, and D are selected according to actual conditions.

[0032] Preferably, the agreed rules in step nine include:

[0033] If the initial test value is within the preset threshold value SPEC, then

[0034] V=V0+Kn*10(n+3)+……K2*10(2+3)+K1*10(1+3);

[0035] If the initial test value is outside SPEC, then V=V0+Kn*10(-n-1)+……

[0036] K2*10(-2-1)+K1*10(-1-1).

[0037] Preferably, the value of K depends on whether the MVx and the MIx are abnormally large or small; whether the MVx is large or small depends on the difference with FVx, if the difference is greater than 0, it is large, and if it is less than 0, it is small; whether the MIx is large or small depends on the difference with I0, if the difference is greater than 0, it is large, and if it is less than 0, it is small.

[0038] Preferably, in the case where the MVx is too large, if the MIx is too large, the K value is 1; if the MIx is too small, the K value is 2; if the MIx is normal, the K value is 3;

[0039] In the case where the MVx is too small, if the MIx is too large, the K value is 4; if the MIx is too small, the K value is 5; if the MIx is normal, the K value is 6;

[0040] When the MVx is normal, if the MIx is too large, the K value is 7; if the MIx is too small, the K value is 8; if the MIx is normal, the K value is 0.

[0041] Preferably, the method further includes, when executing step six, first performing MI operation on only one of the floating sources, and recording the measured current as MI1, and then in step nine, judging whether MI1 and MVx have abnormalities, and if no abnormality exists, the current of other floating sources is no longer measured, and the initial test value is directly output as the final test value.

[0042] Preferably, if an abnormality exists, it is necessary to perform MI operation on the floating sources of other blocks before executing subsequent steps.

[0043] In the conventional test process, the present invention adds a step of measuring the current of all floating sources after measuring the voltage of each floating source; before outputting the test value, it adds a step of judging MVx and MIx, and reassigns the test value according to the judgment result. In addition, MVx and Mix in the abnormal state are output to an additional file to assist in analyzing and judging the root cause of the test abnormality. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0045] Figure 1 Shown is the circuit schematic for BVDSS testing of discrete devices;

[0046] Figure 2 Shown is an actual test circuit diagram in the existing discrete device BVDSS test method;

[0047] Figure 3Shown is an actual test circuit diagram in the existing discrete device BVDSS test method;

[0048] Figure 4 A flowchart showing an existing discrete device BVDSS test method;

[0049] Figure 5 Shown is a flow chart of a discrete device BVDSS testing method according to an embodiment of the present invention;

[0050] Figure 6 It is a schematic diagram showing re-assigning the initial test value according to the MVx / MIx value according to an embodiment of the present invention;

[0051] Figure 7 Shown is a schematic diagram of assigning a K value according to a floating source according to an embodiment of the present invention;

[0052] Figure 8 It is a flowchart of a BVDSS testing method for discrete devices according to an embodiment of the present invention. DETAILED DESCRIPTION

[0053] The present invention is described below based on embodiments, but the present invention is not limited to these embodiments. In the detailed description of the present invention below, some specific details are described in detail. It is possible for a person skilled in the art to fully understand the present invention without the description of these details. In order to avoid confusing the essence of the present invention, known methods, processes, flows, components and circuits are not described in detail.

[0054] In addition, persons of ordinary skill in the art will appreciate that the drawings provided herein are for illustration purposes and are not necessarily drawn to scale.

[0055] Unless the context clearly requires otherwise, the words "include", "comprising" and similar words throughout the application should be interpreted as including rather than exclusive or exhaustive; that is, the meaning is "including but not limited to".

[0056] In the description of the present invention, it should be understood that the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In addition, in the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0057] Figure 5 The flowchart of the BVDSS test method for discrete devices according to an embodiment of the present invention is shown. Figure 5 As shown, the discrete device BVDSS test method of the embodiment of the present invention includes the following steps:

[0058] Step 1: Connect a superimposed power supply formed by n floating sources between the source and drain of a discrete device to form a test circuit.

[0059] In the embodiment of the present invention, the number of floating sources is n, and n is greater than or equal to 2. The connection structure used between the superimposed power supply and the source or drain of the discrete device includes a probe. The specific circuit can be referred to Figure 2 or Figure 3 The superimposed power supply is used to provide the source-drain voltage required for IDSS testing of discrete devices.

[0060] Step 2: Initialize each floating source.

[0061] Step 3: Perform FV operation on the first n-1 floating sources. The FV operation means providing excitation voltages FVx to the floating sources, which are FV1, FV2, ..., FVn-1 respectively.

[0062] In the embodiment of the present invention, the 1st to n-1th floating sources are used to provide a basic voltage for the source-drain voltage.

[0063] Step 4: Perform FI operation on the nth floating source, where FI operation indicates providing an excitation current I0 for the floating source.

[0064] In the embodiment of the present invention, the nth floating source provides the excitation current I0.

[0065] Step 5: After waiting for a corresponding stabilization time, perform MV operation on each floating source. The MV operation means measuring the voltage of the floating source. The corresponding measured voltages are denoted as MVx, which are MV1, MV2, ..., MVn.

[0066] Step 6: Perform MI operation on each floating source. MI operation means measuring the current of the floating source. The corresponding measured currents are recorded as MIx, which are MI1, MI2...MIn.

[0067] In the embodiment of the present invention, the stabilization time corresponding to each floating source should be set according to the actual characteristics of the measured product. Assuming that n floating sources are F1, F2, ... Fn, the corresponding measured voltages are MV1, MV2, ... MVn; the corresponding measured currents are MI1, MI2, ... MIn.

[0068] In the embodiment of the present invention, in the original conventional test process, after measuring the voltage of each floating source, an additional step of measuring the current of all floating sources is added.

[0069] Step 7. Close all floating sources.

[0070] Step 8: The sum of the voltages measured corresponding to the floating sources is output as the initial test value V0.

[0071] Step nine, determine whether there are any abnormalities in MVx and MIx. If there are no abnormalities, the final test value V is the initial test value V0; if there are abnormalities, the initial test value is reassigned as the final test value V according to the agreed rules, and MVx and MIx in the abnormal state are output to an additional document.

[0072] In an embodiment of the present invention, the method for determining whether MVx and MIx are abnormal includes:

[0073] If the absolute value of (FVx-MVx) is greater than the first set value A, or the ratio of the absolute value of (FVx-MVx) to FVx is greater than the second set value B, it is considered that the MV operation result of the floating source is abnormal.

[0074] If the absolute value of (I0-MIx) is greater than the third set value C, or the ratio of the absolute value of (I0-MIx) to I0 is greater than the fourth set value D, the MI operation result of the floating source is considered abnormal. Wherein, FVx represents the excitation voltage provided by the FV operation. MVx represents the measured voltage measured by the MV operation. I0 represents the excitation voltage provided by the FI operation. MIx represents the measured current measured by the MI operation. The values ​​of A, B, C, and D are selected according to actual conditions. For example: the first set value is not greater than 10V. The second set value is not greater than 5%.

[0075] In the embodiment of the present invention, Figure 6 As shown in the figure, if there is no abnormality in MVx and MIx, the final test value V = the initial test value V0. If there is an abnormality in either MVx or MIx, the initial test value is reassigned as the final test value V according to the agreed rules. The agreed rules include: if the initial test value is within the preset threshold SPEC, then

[0076] V=V0+Kn*10(n+3)+…K2*10(2+3)+K1*10(1+3); if the initial test value is outside the preset threshold value SPEC, then V=V0+Kn*10(-n-1)+…K2*10(-2-1)+K1*10(-1-1).

[0077] The value of K depends on whether MVx and MIx are abnormally large or small. Combine FVx-MVx greater than 0 or less than 0 to determine whether the test voltage MVx is abnormally small or large, and combine I0-MIx greater than 0 or less than 0 to determine whether the test current MIx is abnormally small or large. Figure 7 As shown, when MVx is too large, if MIx is too large, the K value is 1; if MIx is too small, the K value is 2; if MIx is normal, the K value is 3.

[0078] When MVx is small, if MIx is large, the K value is 4; if MIx is small, the K value is 5; if MIx is normal, the K value is 6.

[0079] When MVx is normal, if MIx is too large, the K value is 7; if MIx is too small, the K value is 8; if MIx is normal, the K value is 0.

[0080] Step 10: Output the final test value and divide it into bins.

[0081] Figure 8 The flowchart of the BVDSS test method for discrete devices according to an embodiment of the present invention is shown. Figure 8 As shown, there are three different ways to assign the final test value V, which will not be described in detail here.

[0082] In the embodiment of the present invention, when testing BVDSS with multiple floating sources, the current and voltage of each floating source are monitored, and the current and voltage of each floating source in an abnormal state are output to a document, so as to quickly analyze and locate the root cause of the abnormality.

[0083] When the test value is within the spec range and anomalies are detected in the current and voltage of each floating source, the test value is reassigned using the agreed rules to ensure its fail, so that the bin monitoring system can identify it and avoid missing it. The problem point can be quickly located through the test value.

[0084] When the test value is outside the spec range and abnormalities are detected in the current and voltage of each floating source, the test value is reassigned using the agreed rules. This helps to quickly locate the problem point, especially the abnormalities that are not easy to reproduce, without affecting the original test value.

[0085] contrast Figure 4 and Figure 5 It can be seen that in the embodiment of the present invention, after measuring the voltage of each floating source in the original conventional test process, an additional step of measuring the current of all floating sources is added, and before outputting the test value, an additional step of judging MVx and MIx is added, and the test value is reassigned according to the judgment result. In addition, MVx and Mix in the abnormal state are output to an additional document to assist in analyzing and judging the root cause of the test abnormality, thereby improving the BVDSS test quality of discrete devices, avoiding the occurrence of missed kills and mass production test quality accidents, and achieving the purpose of rapid positioning and analysis of abnormalities.

[0086] In addition, in order to save test time, the embodiment of the present invention has another implementation method: only measure the current MI1 of the F1 floating source, judge MI1 and MVx, and if there is no abnormality, no longer measure the current of other floating sources. That is, when executing step 6, first only perform MI operation on one floating source, and the measured current is recorded as MI1, and then when it comes to step 9, first judge whether MI1 and MVx are abnormal, if there is no abnormality, no longer measure the current of other floating sources, and directly output the initial test value as the final test value.

[0087] Of course, if there is an exception, it is necessary to perform MI operations on other block floating sources before executing subsequent steps.

[0088] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A BVDSS test method for discrete devices, characterized in that: The following steps are involved: Step 1: Connect a superimposed power supply formed by n floating sources between the source and drain of a discrete device to form a test circuit; Step 2: initializing each of the floating sources; Step 3, performing FV operation on the first n-1 floating sources, wherein the FV operation means providing the floating sources with excitation voltages FVx, which are FV1, FV2, ..., FVn-1 respectively; Step 4: performing FI operation on the floating source of the nth block, wherein the FI operation indicates providing an excitation current I0 for the floating source; Step 5, after waiting for a corresponding stabilization time, perform MV operation on each of the floating sources, wherein the MV operation means measuring the voltage of the floating source, and the corresponding measured voltages are denoted as MVx, which are MV1, MV2, ..., MVn respectively; Step 6: Perform MI operation on each floating source, wherein the MI operation means measuring the current of the floating source, and the corresponding measured currents are recorded as MIx, namely MI1, MI2, ..., MIn; Step 7: Turn off all the floating sources; Step 8, adding the voltages measured corresponding to the floating sources and outputting it as the initial test value V0; Step nine, judging whether the MVx and the MIx are abnormal, if not, the final test value V is the initial test value V0; If there is an exception, the initial test value is reassigned as the final test value V according to the agreed rules, and MVx and MIx in the abnormal state are output to an additional document; Step 10: Output the final test value and divide it into bins.

2. The discrete device BVDSS test method according to claim 1, characterized in that: In step 1, n is a natural number and is greater than or equal to 2.

3. The discrete device BVDSS test method according to claim 1, characterized in that: The connection structure used between the superimposed power supply and the source or drain of the discrete device in step 1 includes a probe.

4. The discrete device BVDSS test method according to claim 1, characterized in that: The method for determining whether the MVx and the MIx are abnormal in step nine is: If |FVx-MVx|>A or |FVx-MVx| / FVx>B, it is determined that the MVx is abnormal; or, If |I0-MIx|>C or |I0-MIx| / I0>D, it is determined that the MIx is abnormal.

5. The discrete device BVDSS test method according to claim 4, characterized in that: The values ​​of A, B, C, and D are selected according to actual conditions.

6. The discrete device BVDSS test method according to claim 1, characterized in that: The agreed rules described in step nine include: If the initial test value is within the preset threshold value SPEC, then V=V0+Kn*10Λ(n+3)+......K2*10Λ(2+3)+K1*10Λ(1+3); If the initial test value is outside SPEC, then V=V0+Kn*10Λ(-n-1)+…… K2*10Λ(-2-1)+K1*10Λ(-1-1).

7. The discrete device BVDSS test method according to claim 6, characterized in that: The value of K depends on whether the MVx and the MIx are abnormally large or small; whether the MVx is large or small depends on the difference with FVx, if the difference is greater than 0, it is large, and if it is less than 0, it is small; whether the MIx is large or small depends on the difference with I0, if the difference is greater than 0, it is large, and if it is less than 0, it is small.

8. The discrete device BVDSS test method according to claim 7, characterized in that: In the case where the MVx is too large, if the MIx is too large, the K value is 1; if the MIx is too small, the K value is 2; if the MIx is normal, the K value is 3; In the case where the MVx is too small, if the MIx is too large, the K value is 4; if the MIx is too small, the K value is 5; if the MIx is normal, the K value is 6; When the MVx is normal, if the MIx is too large, the K value is 7; if the MIx is too small, the K value is 8; if the MIx is normal, the K value is 0.

9. The discrete device BVDSS test method according to claim 1, characterized in that: The method also includes, when executing step six, first performing MI operation on only one of the floating sources, and recording the measured current as MI1, and then in step nine, judging whether MI1 and MVx are abnormal, and if no abnormality exists, no longer measuring the current of other floating sources, and directly outputting the initial test value as the final test value.

10. The discrete device BVDSS test method according to claim 9, characterized in that: If there is an abnormality, it is necessary to perform MI operation on the floating sources described in other blocks before executing subsequent steps.

Images