Memory management method and device, computer equipment and program product
Through a memory management method, dynamically apply and release DDR memory, the problem of insufficient complexity and flexibility in traditional methods is solved, and efficient memory utilization and system flexibility is achieved.
Patent Information
- Application Number
- CN202411378397.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-29
- Publication Date
- 2025-02-28
AI Technical Summary
The traditional DDR memory management method has a complex structure and requires additional hardware modules and design work, which increases the complexity and design cost of the system. It is not flexible enough to meet the expansion requirements under different needs. The space reuse rate is low, which limits the effective utilization of system resources.
Through a memory management method, memory application instructions are received to detect whether there is an application tag in the mapping information. If it does not exist, based on the memory linked list corresponding to the memory index, the target node that meets the size of the application space is determined, its status and information are updated, and the mapping relationship between the application tag and the memory linked list is established to realize dynamic space application and release.
It realizes dynamic application and release of storage space. Compared with the static allocation method of traditional technology, DDR resources can be flexibly managed during the program operation, improving memory utilization and system flexibility.
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Abstract
Description
Technical Field
[0001] The present application relates to the field of chip testing technology, and in particular to a memory management method, apparatus, computer equipment and computer program product. Background Art
[0002] In the field of semiconductor test equipment, the management of DDR memory has received widespread attention.
[0003] Traditional DDR management methods mainly include hardware-based management solutions, which use specially designed hardware modules to directly control and manage DDR memory. Such hardware-based management solutions are complex in structure and require additional hardware modules and design work, which increases the complexity and design cost of the system. This solution is not flexible enough to meet the expansion requirements under different needs. Usually, a certain function is deeply bound to the occupied space, and the space cannot be dynamically applied or released, resulting in a low space reuse rate and limiting the effective use of system resources. Summary of the invention
[0004] Based on this, it is necessary to provide a memory management method, apparatus, computer device and computer program product that can dynamically apply for or release space and improve resource utilization in response to the above technical problems.
[0005] In a first aspect, the present application provides a memory management method, the method comprising:
[0006] Receive a memory application instruction, wherein the memory application instruction carries a memory index, an application space size, and an application tag;
[0007] Detecting whether the application tag exists in the mapping information;
[0008] In the case where the application tag does not exist in the mapping information, based on the memory linked list corresponding to the memory index, determining a target node in the corresponding memory linked list that meets the application space size;
[0009] Updating the target node to an occupied state, and updating the node information of the target node based on the application space size and the application label;
[0010] A mapping relationship between the application tag and the memory linked list is established, and the mapping relationship is updated into the mapping information.
[0011] In one embodiment, after updating the target node to an occupied state and updating the node information of the target node based on the application space size and the application tag, the method further includes:
[0012] When the size of the application space is equal to the size of the space corresponding to the target node, continue to execute the steps of establishing a mapping relationship between the application tag and the memory linked list, and updating the mapping relationship into the mapping information;
[0013] In the case where the applied space size is smaller than the space size corresponding to the target node, a new node is generated, and the space size corresponding to the new node is updated to be the difference between the space size corresponding to the target node and the applied space size, the state of the new node is updated to be an idle state, and the label corresponding to the new node is initialized, wherein the new node is the next node of the target node;
[0014] Add the new node to the memory linked list corresponding to the memory index.
[0015] In one embodiment, after receiving the memory request instruction, the method further includes:
[0016] The memory index, the application space size and the application tag are stored as backup management data;
[0017] The method further comprises:
[0018] When no target node satisfying the requested space size is found from the memory linked list corresponding to the memory index, the backup management data is rolled back.
[0019] In one embodiment, receiving the memory request instruction includes:
[0020] Receive memory request instructions from at least two threads;
[0021] The determining, based on the memory linked list corresponding to the memory index, a target node in the corresponding memory linked list that meets the requested space size includes:
[0022] In a case where the memory indexes corresponding to the memory application instructions of the at least two threads are different, the at least two threads are used in parallel to determine a target node that meets the application space size based on the memory linked lists corresponding to the memory indexes;
[0023] When the memory indexes corresponding to the memory application instructions of the at least two threads are the same, the at least two threads are controlled by a mutex lock to determine the target node that meets the application space size based on the memory linked list corresponding to the memory index in turn.
[0024] In one embodiment, the method further comprises:
[0025] When the application tag exists in the mapping information, the memory space corresponding to the application tag is released.
[0026] In one embodiment, the method further comprises:
[0027] When the memory space needs to be released, a target memory linked list corresponding to the application tag is obtained;
[0028] Based on the application tag, query each node in the target memory linked list to obtain the node to be released;
[0029] The state of the node to be released is updated to an idle state, and the mapping relationship between the application tag and the target memory linked list in the mapping information is deleted.
[0030] In one of the embodiments, after updating the state of the to-be-released node to an idle state, the method includes:
[0031] Based on the status of each node in the target memory linked list, adjacent free nodes are merged.
[0032] In one embodiment, merging adjacent idle nodes based on the status of each node in the target memory linked list includes:
[0033] In the case where the node to be released is not the head node of the target memory linked list, detecting whether the node state of the previous node of the node to be released is an idle state;
[0034] In the case that the node state of the previous node of the node to be released is an idle state, merging the previous node and the node to be released to obtain a new first idle node, and updating the node information of the new first idle node;
[0035] In the case where the node state of the previous node of the to-be-released node is not an idle state or the to-be-released node is the head node of the target memory linked list, detecting whether the to-be-released node is the tail node of the target memory linked list;
[0036] In the case where the node to be released is not the tail node of the target memory linked list, detecting whether the node state of a node following the node to be released is an idle state;
[0037] When the node state of a node following the node to be released is an idle state, merging the following node and the node to be released to obtain a new second idle node, and updating the node information of the new second idle node;
[0038] In the case where the node to be released is the tail node of the target memory linked list, idle node merging is not performed.
[0039] In a second aspect, the present application further provides a memory management device, the device comprising:
[0040] A receiving module, used for receiving a memory application instruction, wherein the memory application instruction carries a memory index, an application space size, and an application tag;
[0041] A detection module, used for detecting whether the application tag exists in the mapping information;
[0042] A target node determination module, configured to determine, when the application tag does not exist in the mapping information, a target node that satisfies the application space size in the corresponding memory linked list based on the memory linked list corresponding to the memory index;
[0043] A node information updating module, used to update the target node to an occupied state, and update the node information of the target node based on the application space size and the application label;
[0044] A mapping module is used to establish a mapping relationship between the application tag and the memory linked list, and update the mapping relationship into the mapping information.
[0045] In a third aspect, the present application further provides a computer device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the above method when executing the computer program.
[0046] In a fourth aspect, the present application also provides a computer program product, including a computer program, which implements the steps of the above method when executed by a processor.
[0047] The above-mentioned memory management method, device, computer equipment and computer program product, after receiving a memory application instruction, the memory application instruction carries a memory index, an application space size and an application tag, detects whether there is an application tag in the mapping information, and when there is no application tag in the mapping information, determines the target node that meets the application space size in the corresponding memory linked list based on the memory linked list corresponding to the memory index; updates the target node to an occupied state, and updates the node information of the target node based on the application space size and the application tag; establishes a mapping relationship between the application tag and the memory linked list, and updates the mapping relationship to the mapping information. This method realizes dynamic application of storage space through mapping information and memory linked lists. Compared with the static allocation method of traditional technology, it can flexibly manage DDR resources during program operation, thereby improving memory utilization and system flexibility. BRIEF DESCRIPTION OF THE DRAWINGS
[0048] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments of the present application or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.
[0049] Figure 1 An application environment diagram of a memory management method in one embodiment;
[0050] Figure 2 A schematic diagram of a flow chart of a memory management method in one embodiment;
[0051] Figure 3 A schematic diagram of memory space application in one embodiment;
[0052] Figure 4 A flowchart of space application steps in one embodiment;
[0053] Figure 5 A schematic diagram of a DDR space corresponding to a release step in an embodiment;
[0054] Figure 6 A flowchart of a release step in one embodiment;
[0055] Figure 7 is a structural block diagram of a memory management device in one embodiment;
[0056] Figure 8 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION
[0057] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0058] The memory management method provided in the embodiment of the present application can be applied to Figure 1 In the application environment shown, each thread can apply to or release storage space in the test machine from the memory management module, such as DDR space.
[0059] Optionally, during initialization, the thread can configure the number of DDRs in the test machine, the capacity of each DDR, etc. through the initialization interface according to the usage scenario. In addition, DDR space for other functions can be reserved, which is not specifically limited here. The capacity of each DDR can be equal or unequal, which is not specifically limited here.
[0060] Combination Figure 1 The test machine may include multiple DDR spaces, each DDR space corresponds to a memory linked list, the memory linked list includes multiple nodes, each node includes an occupied state and an idle state, and the mapping relationship between the memory index corresponding to each DDR space and the application tag is stored in the mapping information. In this way, it is possible to first determine whether there is a corresponding memory space based on the application tag. If it does not exist, the memory space is applied for directly, otherwise it is necessary to release the original memory space of the application tag first.
[0061] Figure 1 The memory management method in this paper is applicable to the test machine with multiple resource boards and multiple DDR scenarios. Each DDR has an independent linked list corresponding to its memory space. All applied spaces are managed through a map. When applying, determine whether the same application tag exists in the map. If it does exist, release the memory space corresponding to the application tag, and then reapply for the memory space according to the needs of this application tag. When releasing, find the memory index corresponding to the application tag in the map, and then operate the memory linked list corresponding to the memory index based on the application tag, delete / merge nodes, and delete the mapping information between this application tag and the corresponding memory index in the map.
[0062] Specifically, during the operation of each thread, storage space can be applied to any DDR space. Specifically, each thread sends a memory application instruction, which carries a memory index, an application space size, and an application tag; the memory management module detects whether there is an application tag in the mapping information. If not, the corresponding memory linked list is directly obtained based on the memory index, and then the target node that meets the application space size in the corresponding memory linked list is determined, and the target node is updated to an occupied state, and the node information of the target node is updated based on the application space size and the application tag; a mapping relationship between the application tag and the memory linked list is established, and the mapping relationship is updated to the mapping information. In this way, dynamic application of storage space is realized by means of mapping information and memory linked lists. Compared with the static allocation method of traditional technology, DDR resources can be flexibly managed during program operation, which improves memory utilization and system flexibility.
[0063] In an exemplary embodiment, Figure 2 As shown, a memory management method is provided, which is applied to Figure 1 Taking the memory management module in as an example, the method includes the following steps 202 to 210.
[0064] in:
[0065] S202: Receive a memory application instruction, where the memory application instruction carries a memory index, an application space size, and an application tag.
[0066] The memory index is a unique identifier of each DDR space, and a DDR space can be uniquely determined by the memory index. In one optional embodiment, a memory initialization step is included, and the memory initialization step includes: receiving a memory configuration instruction, the memory configuration instruction at least carries the number of memory spaces and the size of each memory space; based on the number of memory spaces and the size of each memory space, a corresponding memory linked list is generated for each memory space. According to the actual use scenario, the number of memory spaces and the size of each memory space of the test machine can be configured through the initialization interface, and then a corresponding number of memory spaces are generated based on the number of memory spaces, and the size of each memory space is configured, so as to support the flexible configuration and expansion of the DDR space, so as to support the functions of DDR quantity setting, capacity setting, etc., improve the flexibility and adaptability of the system, meet the needs of different use scenarios, and facilitate the expansion and optimization of the system. Each memory space corresponds to a memory linked list, and each node in the memory linked list represents a continuous storage space (occupied or idle), and the node information of the node includes the application tag, memory index, application space address, length and node status of this storage space, etc., so that through the ordered characteristics of the memory linked list, the nodes in the memory linked list are sequentially corresponded to the actual memory space.
[0067] The application space size is the size of the application space required for this memory application, such as 4 bytes, etc., and is not specifically limited here.
[0068] The application tag is used to apply for memory space. The application tag is bound to the applied memory space, for example, there is a mapping relationship. The space information of the applied memory space can be obtained through the application tag. The space information includes memory index, application space address and application space size. The DDR space can be easily read or written through the space information. Optionally, the application tag can be a string, and the string corresponding to each thread is different. In this application, the DDR space application and DDR space release are decoupled from the actual hardware resources through the application tag. The user does not need to care about the actual DDR space address information of the application and release. This application tag is updated and maintained by the memory management module.
[0069] S204: Check whether there is an application tag in the mapping information.
[0070] The mapping information is used to store the mapping relationship between the application label and the memory space applied for. The mapping information may include the mapping relationship between the application label and the memory index. The mapping information may be stored through a map, which may include multiple KEY-VALUEs, where KEY is the application label and VALUE is the corresponding memory index. In this way, through the mapping characteristics of the map, the corresponding memory linked list and node information can be found through the application label.
[0071] In the case where there is no application tag in the mapping information, that is, there is no memory space bound to the application tag, the corresponding memory space can be directly allocated to the application tag.
[0072] In one of the optional embodiments, the method further includes: when there is an application tag in the mapping information, releasing the memory space corresponding to the application tag.
[0073] In the case where there is an application tag in the mapping information, that is, the application tag has been bound to a memory space, if the memory space needs to be reapplied, the applied memory space needs to be released.
[0074] S206: When there is no application tag in the mapping information, based on the memory linked list corresponding to the memory index, determine the target node in the corresponding memory linked list that meets the application space size.
[0075] Among them combined Figure 1 Each DDR space corresponds to a unique memory index, each memory index corresponds to a unique memory linked list, the memory linked list includes multiple nodes, each node corresponds to a continuous memory space. Each node includes node information, the node information includes node status, application label, application space address, length and memory index.
[0076] Specifically, combined Figure 3 As shown, Figure 3 The present invention is a schematic diagram of memory space application in an embodiment. In this embodiment, the corresponding memory linked list can be determined based on the memory index, and the target node that meets the application space size can be obtained by traversing the memory linked list based on the application space size. Optionally, due to the order of the memory linked list, each node can be traversed in the order of each node in the memory linked list, and the length in the node information can be read, and the length is compared with the application space size, so as to obtain the first free node whose length is greater than or equal to the application space size as the target node.
[0077] S208: Update the target node to an occupied state, and update the node information of the target node based on the application space size and the application label.
[0078] After obtaining the target node, the memory space corresponding to the target node is used as the memory space for this application, so the node state of the target node is changed to occupied state, and the node information of the target node is updated based on the application space size and the application label, for example, the application label is added to the node information of the node, and the length of the node is updated based on the application space size.
[0079] Optionally, after updating the target node to an occupied state and updating the node information of the target node based on the applied space size and the applied label, it also includes: when the applied space size is equal to the space size corresponding to the target node, continuing to execute the steps of establishing a mapping relationship between the applied label and the memory linked list, and updating the mapping relationship to the mapping information; when the applied space size is smaller than the space size corresponding to the target node, generating a new node, and updating the space size corresponding to the new node to the difference between the space size corresponding to the target node and the applied space size, updating the state of the new node to an idle state, initializing the label corresponding to the new node, wherein the new node is the next node of the target node; adding the new node to the memory linked list corresponding to the memory index.
[0080] Among them, the update of the memory linked list mainly includes two situations. The first situation is that when the length of the node is equal to the size of the application space, only the node information of the target node in the memory linked list needs to be updated, that is, the application label is added to the target node, and the node state of the target node is modified to the occupied state. The second situation is that the length of the node is greater than the size of the application space. At this time, a new node needs to be generated based on the length of the target node and the size of the application space. For the new node, there is the orderliness of the memory linked list. Therefore, a new node is inserted after the target node in the memory linked list, and the node information of the new node is set, including the node state is idle, the application label is empty, the memory index is the memory index corresponding to the memory linked list, the space address of the new node is the end address of the target node, and the length is the difference between the length of the original target node and the size of the application space. For the target node, the length of the target node is updated to the size of the application space, the application label is added to the target node, and the node state of the target node is modified to the occupied state.
[0081] S210: Establish a mapping relationship between the application tag and the memory linked list, and update the mapping relationship into the mapping information.
[0082] After allocating the memory space, the mapping information is also updated, that is, the mapping relationship between the application label and the memory linked list, so you can directly add the corresponding KEY-VALUE in the map.
[0083] The above-mentioned memory management method, after receiving a memory application instruction, the memory application instruction carries a memory index, an application space size and an application tag, detects whether there is an application tag in the mapping information, and when there is no application tag in the mapping information, determines the target node that meets the application space size in the corresponding memory linked list based on the memory linked list corresponding to the memory index; updates the target node to an occupied state, and updates the node information of the target node based on the application space size and the application tag; establishes a mapping relationship between the application tag and the memory linked list, and updates the mapping relationship to the mapping information. This method realizes dynamic application of storage space through mapping information and memory linked lists. Compared with the static allocation method of traditional technology, it can flexibly manage DDR resources during program operation, thereby improving memory utilization and system flexibility.
[0084] In one of the optional embodiments, after receiving the memory application instruction, it also includes: storing the memory index, the application space size and the application tag as backup management data; the method also includes: rolling back the backup management data when the target node that meets the application space size is not queried from the memory linked list corresponding to the memory index.
[0085] In this embodiment, after receiving each memory application instruction, backup management will be performed, that is, the memory index, the application space size and the application tag are stored as backup management data, for example, the three are stored in association, and if the application fails later due to insufficient remaining space in the DDR, the backup management data can be rolled back, that is, the data storing the DDR management information will be restored to the state before the application, which will not affect the subsequent use. Therefore, the user can select other DDR space to continue to try to apply.
[0086] In the above embodiment, data rollback is achieved through backup management without affecting subsequent use.
[0087] For ease of understanding, combined Figure 4 As shown, Figure 4 The flowchart is a space application step in an embodiment. In this embodiment, an application tag is first constructed, and then a corresponding application instruction is generated based on the application tag, and the application tag, memory index and application space size corresponding to the application instruction are backed up; the map is searched to see if the application tag exists. If so, the corresponding memory space is released, otherwise the memory index corresponding to the application tag is obtained, and then the node in the memory linked list corresponding to the memory index is queried based on the application tag. If a target node whose size meets the application space size is found, the node information of the target node is updated and the process ends. Otherwise, the application tag, memory index and application space size corresponding to the backup application instruction are rolled back. After updating the node information of the target node, the mapping information of the application tag and memory index in the map also needs to be updated.
[0088] In the above embodiment, dynamic application of DDR space is realized, and DDR space can be flexibly managed during program operation, thereby improving DDR space utilization and system flexibility.
[0089] In one of the optional embodiments, receiving a memory application instruction includes: receiving memory application instructions from at least two threads; determining a target node in the corresponding memory linked list that meets the application space size based on a memory linked list corresponding to a memory index, including: when the memory indexes corresponding to the memory application instructions of at least two threads are different, determining the target node that meets the application space size based on the memory linked list corresponding to each memory index in parallel by at least two threads; when the memory indexes corresponding to the memory application instructions of at least two threads are the same, controlling at least two threads through a mutex lock to determine the target node that meets the application space size based on the memory linked list corresponding to the memory index in sequence.
[0090] The space management method of the present application supports a thread-safe mechanism, that is, the space management method of the present application can be applied to multi-threaded usage scenarios, and different threads do not interfere with each other's operations on different DDR spaces to ensure data integrity and consistency; at the same time, operations on the same DDR memory are mutually exclusive protected to avoid data competition and conflicts.
[0091] Specifically, when the memory indexes corresponding to the memory application instructions of at least two threads are different, for example, thread 1 applies for the memory space of DDR space 1, and thread 2 applies for the memory space of DDR space 2, thread 1 and thread 2 operate on different DDR spaces respectively, so the two do not interfere with each other and can be processed in parallel, thereby improving processing efficiency.
[0092] Optionally, since multiple DDR spaces do not interfere with each other, the same data can be written to multiple DDR spaces at the same time, improving the writing efficiency of the DDR space. This function requires the communication protocol to support group operations or broadcast instructions, that is, space application instructions can be implemented through group operations or broadcast instructions, so that multiple DDR spaces can be operated at one time, improving the overall data processing speed and performance of the system, and meeting the needs of semiconductor testing equipment and other fields for high-performance DDR management solutions.
[0093] When the memory indexes corresponding to the memory application instructions of at least two threads are the same, for example, thread 1 applies for the memory space of DDR space 1, and thread 2 also applies for the memory space of DDR space 1, since they operate on the same DDR space, they are implemented through a mutex lock, and each application is processed in sequence based on the order of application. For example, thread 1's application is processed first, and the corresponding DDR space is allocated to it, and then thread 2's application is processed to complete the allocation of DDR space.
[0094] In addition, the process of releasing DDR space for multiple threads can also be the same operation, that is, receiving memory release instructions from at least two threads; based on the memory linked list corresponding to the memory index, determining the target node in the corresponding memory linked list that meets the applied space size, including: when the memory indexes corresponding to the memory release instructions of at least two threads are different, determining the nodes to be released based on the memory linked list corresponding to each memory index in parallel by at least two threads; when the memory indexes corresponding to the memory release instructions of at least two threads are the same, controlling at least two threads through a mutex lock to determine the nodes to be released based on the memory linked list corresponding to the memory index in sequence.
[0095] In the above embodiment, the thread safety of DDR management is realized by a mutex lock, and the shared data and DDR space reading and writing are mutually exclusive. Each DDR space has a "lock". When a thread occupies this DDR space, due to the protection of the mutex lock, other threads will not be able to operate on the same DDR space, but it will not affect the operation of other DDR spaces, taking into account both thread safety and efficiency. It also ensures that different threads do not interfere with each other in the operation of different DDR spaces, and mutually exclusive protection is performed on the same DDR space to prevent data competition and errors.
[0096] In one of the optional embodiments, the method also includes: when the memory space needs to be released, obtaining the target memory linked list corresponding to the application tag; querying each node in the target memory linked list based on the application tag to obtain the node to be released; updating the state of the node to be released to an idle state, and deleting the mapping relationship between the application tag and the target memory linked list in the mapping information.
[0097] There are two situations where memory space needs to be released: the first is that the thread actively releases the memory space, that is, the memory management module receives the space release instruction sent by the thread, which carries the application tag, memory index and the corresponding released space size. The other is that when processing the memory application instruction, it is found that the application tag has a corresponding memory index, so the memory space corresponding to the application tag needs to be released first.
[0098] Based on the above analysis, the above two situations include corresponding application tags, so the corresponding memory index can be queried based on the application tag. For example, the mapping information in the map is queried to obtain the memory index corresponding to the application tag, and then the target memory linked list corresponding to the memory index is obtained. Subsequently, each node in the target memory linked list is queried based on the application tag to obtain the node to be released, and then the node state of the node to be released is updated to the idle state, and the mapping information in the map is updated, for example, the mapping relationship between the application tag and the target memory linked list in the mapping information is deleted.
[0099] For ease of understanding, when dynamically releasing, pass in the application tag and the bound DDR space will be released. The uniqueness of this application tag is guaranteed by the user. In actual use, a meaningful string can be combined according to the usage scenario. For example, the application tag "Slot0_Ch0_AWG_Wave1" represents the first waveform of the AWG of channel 0 of the board in slot 0 of the test equipment (the application tag mentioned later represents this string). The corresponding target memory linked list is found by passing in the application tag, and the corresponding node to be released is traversed through the target memory linked list. The node status of the node to be released is marked as idle.
[0100] In the above embodiment, the DDR space release is decoupled from the actual hardware resources through the application tag, and the user does not need to care about the actual DDR space address information released, and this information is updated and maintained by the space management module.
[0101] In one of the optional embodiments, after updating the state of the node to be released to the idle state, the method further includes: merging adjacent idle nodes based on the state of each node in the target memory linked list.
[0102] Specifically, after marking the node to be released as idle, it is detected whether the node status of the two nodes before and after the node to be released is idle. If they are idle, they are merged, the node information is updated, and the redundant idle nodes are deleted.
[0103] Specifically, combined Figure 5 As shown, Figure 5 This is a schematic diagram of the DDR space corresponding to the release step in an embodiment. Automatic merging of free space occurs during the dynamic release process. When a section of DDR space is released, it is detected whether the adjacent (front and back) space is free. If it is free, the two sections of free space will be merged to ensure the continuity of the free space.
[0104] In one of the optional embodiments, based on the status of each node in the target memory linked list, adjacent idle nodes are merged, including: when the node to be released is not the head node of the target memory linked list, detecting whether the node status of the previous node of the node to be released is an idle state; when the node status of the previous node of the node to be released is an idle state, merging the previous node and the node to be released to obtain a new first idle node, and updating the node information of the new first idle node; when the node status of the previous node of the node to be released is not an idle state or the node to be released is the head node of the target memory linked list, detecting whether the node to be released is the tail node of the target memory linked list; when the node to be released is not the tail node of the target memory linked list, detecting whether the node status of the next node of the node to be released is an idle state; when the node status of the next node of the node to be released is an idle state, merging the next node and the node to be released to obtain a new second idle node, and updating the node information of the new second idle node.
[0105] For ease of understanding, combined Figure 6 As shown, Figure 6 The figure is a flowchart of the release step in an embodiment. In this embodiment, after the DDR space is used up, a DDR empty release instruction is issued, an application tag is constructed, and then a search is performed in the map to find out whether the application tag exists. If not, a prompt indicating that the application tag does not exist is output.
[0106] If the application tag exists in the map, the memory index corresponding to the application tag is obtained, and the target memory linked list corresponding to the memory index is obtained. The target memory linked list is queried based on the application tag, that is, the application tag is matched with the node information of each node in the target memory linked list, and the node with successful matching is obtained as the node to be released, and the node to be released is marked as an idle node, and the memory merge operation is performed later.
[0107] The memory merging operation includes first determining whether the node to be released is the head node of the target memory linked list. If not, detecting whether the node state of the previous node of the node to be released is an idle state. When the node state of the previous node of the node to be released is an idle state, merging the previous node and the node to be released to obtain a new first idle node, and updating the node information of the new first idle node. When the node state of the previous node of the released node is not an idle node or the node to be released is the head node of the target memory linked list, detecting whether the node to be released is the tail node of the target memory linked list. When the node to be released is not the tail node of the target memory linked list, detecting whether the node state of the next node of the node to be released is an idle state; when the node state of the next node of the node to be released is an idle state, merging the next node and the node to be released to obtain a new second idle node, and updating the node information of the new second idle node; when the node to be released is the tail node of the target memory linked list, no idle node merging is performed.
[0108] After the memory merge operation is completed, the mapping information needs to be updated, that is, the mapping information between the application label and the corresponding memory index in the map is deleted.
[0109] In the above embodiment, when a section of DDR space is released, it will be detected whether the adjacent (front and back) space is free. If it is free, the two sections of free space will be merged to ensure the continuity of the free space, avoid memory fragmentation, improve memory reuse and utilization, and reduce the complexity and cost of memory management in the long-term operation of the system.
[0110] It should be understood that, although the steps in the flowcharts involved in the above embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above embodiments may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.
[0111] Based on the same inventive concept, the embodiment of the present application also provides a memory management device for implementing the memory management method involved above. The implementation scheme for solving the problem provided by the device is similar to the implementation scheme recorded in the above method, so the specific limitations in one or more memory management device embodiments provided below can refer to the limitations on the memory management method above, and will not be repeated here.
[0112] In an exemplary embodiment, Figure 7 As shown, a memory management device is provided, including: a receiving module 701, a detection module 702, a target node determination module 703, a node information update module 704 and a mapping module 705, wherein:
[0113] The receiving module 701 is used to receive a memory application instruction, where the memory application instruction carries a memory index, an application space size, and an application tag;
[0114] A detection module 702 is used to detect whether there is an application tag in the mapping information;
[0115] The target node determination module 703 is used to determine the target node that meets the application space size in the corresponding memory linked list based on the memory linked list corresponding to the memory index when there is no application tag in the mapping information;
[0116] The node information updating module 704 is used to update the target node to an occupied state, and update the node information of the target node based on the application space size and the application label;
[0117] The mapping module 705 is used to establish a mapping relationship between the application tag and the memory linked list, and update the mapping relationship into the mapping information.
[0118] In one of the optional embodiments, the above-mentioned node information update module 704 is also used to continue to execute the steps of establishing a mapping relationship between the application label and the memory linked list and updating the mapping relationship to the mapping information when the application space size is equal to the space size corresponding to the target node; when the application space size is smaller than the space size corresponding to the target node, generate a new node, and update the space size corresponding to the new node to the difference between the space size corresponding to the target node and the application space size, update the state of the new node to the idle state, initialize the label corresponding to the new node, wherein the new node is the next node of the target node; and add the new node to the memory linked list corresponding to the memory index.
[0119] In one of the optional embodiments, the above device further includes:
[0120] A backup module, used to store memory index, application space size and application tag as backup management data;
[0121] The rollback module is used to roll back the backup management data when the target node that meets the requested space size is not found in the memory linked list corresponding to the memory index.
[0122] In one of the optional embodiments, the receiving module 701 is further used to receive memory request instructions of at least two threads;
[0123] The above-mentioned target node determination module 703 is also used to determine the target node that meets the application space size by at least two threads in parallel based on the memory linked lists corresponding to the memory indexes when the memory application instructions of at least two threads correspond to different memory indexes; when the memory indexes corresponding to the memory application instructions of at least two threads are the same, at least two threads are controlled by a mutex lock to determine the target node that meets the application space size based on the memory linked lists corresponding to the memory indexes in sequence.
[0124] In one of the optional embodiments, the above-mentioned device further includes: a first releasing module, configured to release the memory space corresponding to the application tag when the application tag exists in the mapping information.
[0125] In one of the optional embodiments, the above-mentioned device also includes: a second release module, which is used to obtain the target memory linked list corresponding to the application tag when the memory space needs to be released; query each node in the target memory linked list based on the application tag to obtain the node to be released; update the state of the node to be released to an idle state, and delete the mapping relationship between the application tag and the target memory linked list in the mapping information.
[0126] In one of the optional embodiments, the second release module is specifically used to merge adjacent free nodes based on the status of each node in the target memory linked list.
[0127] In one of the optional embodiments, the above-mentioned second release module is specifically used to detect whether the node state of the previous node of the node to be released is an idle state when the node to be released is not the head node of the target memory linked list; when the node state of the previous node of the node to be released is an idle state, merge the previous node and the node to be released to obtain a new first idle node, and update the node information of the new first idle node; when the node state of the previous node of the node to be released is not an idle state or the node to be released is the head node of the target memory linked list, detect whether the node to be released is the tail node of the target memory linked list; when the node to be released is not the tail node of the target memory linked list, detect whether the node state of the next node of the node to be released is an idle state; when the node state of the next node of the node to be released is an idle state, merge the next node and the node to be released to obtain a new second idle node, and update the node information of the new second idle node; when the node to be released is the tail node of the target memory linked list, do not merge the idle nodes.
[0128] Each module in the above memory management device can be implemented in whole or in part by software, hardware or a combination thereof. Each module can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in a computer device in the form of software, so that the processor can call and execute operations corresponding to each module.
[0129] In an exemplary embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as shown in FIG. Figure 8 As shown. The computer device includes a processor, a memory, an input / output interface, a communication interface, a display unit and an input device. The processor, the memory and the input / output interface are connected via a system bus, and the communication interface, the display unit and the input device are connected to the system bus via the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be implemented through WIFI, a mobile cellular network, near field communication (NFC) or other technologies. When the computer program is executed by the processor, a memory management method is implemented. The display unit of the computer device is used to form a visually visible picture, which can be a display screen, a projection device or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer device can be a touch layer covering the display screen, or a button, trackball or touchpad set on the computer device shell, or an external keyboard, touchpad or mouse.
[0130] Those skilled in the art will understand that Figure 8 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.
[0131] In one embodiment, a computer device is further provided, including a memory and a processor, wherein a computer program is stored in the memory, and the processor implements the steps in the above method embodiments when executing the computer program.
[0132] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments are implemented.
[0133] In one embodiment, a computer program product is provided, including a computer program, which implements the steps in the above method embodiments when executed by a processor.
[0134] It should be noted that the data involved in this application (including but not limited to data used for analysis, stored data, displayed data, etc.) are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant regulations.
[0135] Those of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, an artificial intelligence (AI) processor, etc., but are not limited to this.
[0136] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.
[0137] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.
Claims
1. A memory management method, characterized in that: The method comprises: Receive a memory application instruction, wherein the memory application instruction carries a memory index, an application space size, and an application tag; Detecting whether the application tag exists in the mapping information; In the case where the application tag does not exist in the mapping information, based on the memory linked list corresponding to the memory index, determining a target node in the corresponding memory linked list that meets the application space size; Updating the target node to an occupied state, and updating the node information of the target node based on the application space size and the application label; A mapping relationship between the application tag and the memory linked list is established, and the mapping relationship is updated into the mapping information.
2. The method according to claim 1, characterized in that After updating the target node to an occupied state and updating the node information of the target node based on the application space size and the application tag, the method further includes: When the size of the application space is equal to the size of the space corresponding to the target node, continue to execute the steps of establishing a mapping relationship between the application tag and the memory linked list, and updating the mapping relationship into the mapping information; In the case where the applied space size is smaller than the space size corresponding to the target node, a new node is generated, and the space size corresponding to the new node is updated to be the difference between the space size corresponding to the target node and the applied space size, the state of the new node is updated to be an idle state, and the label corresponding to the new node is initialized, wherein the new node is the next node of the target node; Add the new node to the memory linked list corresponding to the memory index.
3. The method according to claim 1, characterized in that After receiving the memory application instruction, the method further includes: The memory index, the application space size and the application tag are stored as backup management data; The method further comprises: When no target node satisfying the requested space size is found from the memory linked list corresponding to the memory index, the backup management data is rolled back.
4. The method according to claim 1, characterized in that: The receiving of the memory application instruction comprises: Receive memory request instructions from at least two threads; The determining, based on the memory linked list corresponding to the memory index, a target node in the corresponding memory linked list that meets the requested space size includes: In a case where the memory indexes corresponding to the memory application instructions of the at least two threads are different, the at least two threads are used in parallel to determine a target node that meets the application space size based on the memory linked lists corresponding to the memory indexes; When the memory indexes corresponding to the memory application instructions of the at least two threads are the same, the at least two threads are controlled by a mutex lock to determine the target node that meets the application space size based on the memory linked list corresponding to the memory index in turn.
5. The method according to claim 1, characterized in that The method further comprises: When the application tag exists in the mapping information, the memory space corresponding to the application tag is released.
6. The method according to claim 1 or 5, characterized in that: The method further comprises: When the memory space needs to be released, a target memory linked list corresponding to the application tag is obtained; Based on the application tag, query each node in the target memory linked list to obtain the node to be released; The state of the node to be released is updated to an idle state, and the mapping relationship between the application tag and the target memory linked list in the mapping information is deleted.
7. The method according to claim 6, characterized in that After the state of the node to be released is updated to an idle state, the method further comprises: Based on the status of each node in the target memory linked list, adjacent free nodes are merged.
8. The method according to claim 7, characterized in that The step of merging adjacent idle nodes based on the status of each node in the target memory linked list includes: In the case where the node to be released is not the head node of the target memory linked list, detecting whether the node state of the previous node of the node to be released is an idle state; In the case that the node state of the previous node of the node to be released is an idle state, merging the previous node and the node to be released to obtain a new first idle node, and updating the node information of the new first idle node; In the case where the node state of the previous node of the to-be-released node is not an idle state or the to-be-released node is the head node of the target memory linked list, detecting whether the to-be-released node is the tail node of the target memory linked list; In the case where the node to be released is not the tail node of the target memory linked list, detecting whether the node state of a node following the node to be released is an idle state; When the node state of a node following the node to be released is an idle state, merging the following node and the node to be released to obtain a new second idle node, and updating the node information of the new second idle node; In the case where the node to be released is the tail node of the target memory linked list, idle node merging is not performed.
9. A memory management device, characterized in that: The device comprises: A receiving module, used for receiving a memory application instruction, wherein the memory application instruction carries a memory index, an application space size, and an application tag; A detection module, used for detecting whether the application tag exists in the mapping information; A target node determination module, used to determine, when the application tag does not exist in the mapping information, a target node that satisfies the application space size in the corresponding memory linked list based on the memory linked list corresponding to the memory index; A node information updating module, used to update the target node to an occupied state, and update the node information of the target node based on the application space size and the application label; A mapping module is used to establish a mapping relationship between the application tag and the memory linked list, and update the mapping relationship into the mapping information.
10. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 8 are implemented.
11. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 8 are implemented.