Tapered mesa vertical cavity surface emitting laser
By etching the conical mesa in the top mirror of the VCSEL, the noise and RIN problems of multi-mode VCSEL in high-speed performance are solved, and the effects of reducing noise, improving high-speed performance and improving electrical performance are achieved.
Patent Information
- Application Number
- CN202411021770.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-12-19
- Filing Date
- 2024-07-29
- Publication Date
- 2025-02-28
AI Technical Summary
Existing multimodal VCSELs have noise and relative intensity noise (RIN) problems in high-speed performance, resulting in degradation of communication performance, measurement accuracy, 3D imaging performance, and gesture recognition performance.
The optical mode filtering is achieved by etching the conical mesa in the top reflector mirror, reducing the number of reflector layers outside the center cross section of the mesa. The tapered mesa cone outward from the top surface to the periphery, the central section has more reflector layers to enhance optical gain, while the external section reduces the reflector layers to suppress higher order optical modes.
It realizes noise reduction, improved high-speed performance, reduced resistance of VCSEL, and improved electrical performance and service life.
Smart Images
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Abstract
Description
[0001] Cross-reference to related applications
[0002] This patent application claims priority to U.S. Provisional Patent Application No. 63 / 535,897, filed on August 31, 2023, entitled “TAPERED MESA VERTICAL CAVITY SURFACE EMISSION LASER”. The disclosure of the prior application is considered a part of and incorporated by reference into this patent application. Technical Field
[0003] The present disclosure generally relates to vertical cavity surface emitting lasers (VCSELs) and tapered mesa VCSELs. Background Art
[0004] A vertical emitting laser device, such as a VCSEL, is a laser that emits a beam in a direction perpendicular to the surface of a substrate (eg, perpendicular to the surface of a semiconductor wafer). Multiple vertical emitting devices can be arranged in an array with a common substrate. Summary of the invention
[0005] In some implementations, the VCSEL includes a substrate, a first reflector on the substrate, an active region on the first reflector, and a second reflector on the active region. The second reflector may include a plurality of reflector layers. A table may be defined in the second reflector. The table may taper outward from the top surface of the table to the periphery of the table. The number of reflector layers in a cross section of the table may decrease from a central cross section of the table below the top surface to the periphery of the table.
[0006] In some implementations, all of the plurality of reflector layers are in a central cross-section of the mesa.
[0007] In some implementations, the VCSEL further includes: an insulating layer on the second reflector, wherein the insulating layer has a central opening to expose at least a top surface of the mesa.
[0008] In some implementations, the VCSEL further includes: a contact layer on the insulating layer and over the central opening, wherein the contact layer is electrically connected to the second reflector via the central opening.
[0009] In some implementations, the contact layer is a first contact layer, and wherein the VCSEL further comprises: a second contact layer on the substrate on a side of the substrate opposite the first reflector.
[0010] In some implementations, the VCSEL further includes an isolation region surrounding a region defined below the mesa.
[0011] In some implementations, the mesas taper toward the active area.
[0012] In some implementations, a region of the mesa outside a central cross-section of the mesa is configured to filter out an optical mode.
[0013] In some implementations, the mesa has a shape of a frustum of a cone.
[0014] In some implementations, the VCSEL includes a substrate, a first reflector on the substrate, an active area on the first reflector, and a second reflector on the active area. The second reflector may include a plurality of reflector layers. A table may be defined in the second reflector. The table may taper outward from the top surface of the table to the periphery of the table. The number of reflector layers in the cross section of the table may be reduced from a central cross section of the table below the top surface to the periphery of the table. The VCSEL may include an insulating layer on the second reflector, wherein the insulating layer has a central opening to expose at least the top surface of the table. The VCSEL may include a contact layer on the insulating layer and above the central opening, wherein the contact layer is electrically connected to the second reflector via the central opening.
[0015] In some implementations, all of the plurality of reflector layers are in a central cross-section of the mesa.
[0016] In some implementations, the VCSEL is a bottom-emitting emitter.
[0017] In some implementations, the periphery of the mesa is defined in the second reflector by a trench etched down in the second reflector.
[0018] In some implementations, the mesas taper toward the active area.
[0019] In some implementations, a method includes forming a first reflector on a substrate, forming an active region on the first reflector, forming a second reflector on the active region, wherein the second reflector includes a plurality of reflector layers therein, and etching the second reflector to define a mesa that tapers outward from a top surface of the mesa toward a periphery of the mesa. The number of the plurality of reflector layers in a cross-section of the mesa can decrease from a central cross-section of the mesa below the top surface to the periphery of the mesa.
[0020] In some implementations, the method further includes applying a photoresist spot to the second reflector, wherein etching the second reflector uses the photoresist spot.
[0021] In some implementations, the method further includes performing ion implantation in one or more of the second reflector, the active region, or the first reflector using the photoresist dots to form an isolation region, wherein the isolation region surrounds a region defined below the mesa.
[0022] In some implementations, the method further includes: forming an insulating layer on the second reflector; and etching a central opening in the insulating layer to expose a top surface of the mesa.
[0023] In some implementations, the method further includes forming a contact layer on the insulating layer, wherein the contact layer is electrically connected to the second reflector via the central opening.
[0024] In some implementations, all of the plurality of reflector layers are in a central cross-section of the mesa. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] Figure 1 A cross-sectional view of an example VCSEL is shown.
[0026] Figure 2 Shows Figure 1 A close-up cross-sectional view of an example VCSEL.
[0027] Figure 3 is a flow chart of an example process for forming a tapered mesa VCSEL. DETAILED DESCRIPTION
[0028] The following detailed description of example implementations refers to the accompanying drawings.The same reference numbers in different drawings may identify the same or similar elements.
[0029] Mode competition of a beam between a fundamental mode and other modes (e.g., non-fundamental modes or undesired modes) may affect the performance of an optical system using the beam. For example, mode competition may degrade communication performance, measurement accuracy, three-dimensional (3D) imaging performance, or gesture recognition performance, etc. As a result, multi-mode VCSELs experience noise and increased relative intensity noise (RIN), which results in poor high-speed performance.
[0030] By reducing the number of modes and / or by controlling the modes to be more stable, the high speed performance of VCSEL devices can be improved. In some examples, top gratings, top dielectric films, patterned dielectric and / or metal features etched into semiconductors, and / or aperture shaping can be used for mode filtering or selection in multi-mode VCSELs. However, these techniques may be associated with additional process steps, may require a high level of process control, and / or may use expensive equipment for production.
[0031] Some implementations described herein provide mode filtering in a multi-mode VCSEL. In some implementations, the VCSEL may include an active region between a bottom reflector and a top reflector, and the table may be defined in the top reflector. The table may taper outward from the top surface of the table toward the active region. In this configuration, the number of reflector layers of the top reflector may vary across various cross-sections of the table. For example, all of the reflector layers of the top reflector may be in a narrow central cross-section of the table below the top surface, and the number of reflector layers of the top reflector in the cross-section of the table may decrease from the central cross-section to the periphery of the table.
[0032] In this manner, low-order optical modes in the central cross section may experience increased optical gain and intensity on each return path (e.g., because the central cross section includes the entire structure of the top reflector), while optical modes outside the central cross section, typically higher-order modes, are in the lossy reflector region (e.g., because the region outside the central cross section includes less than the entire structure of the top reflector), and are therefore suppressed (e.g., filtered out) when the optical modes pass vertically through the mesa. Thus, the VCSELs described herein can have reduced noise and improved high-speed performance (e.g., improved high-speed stability). In addition, the taper of the mesa increases the width of the mesa from the top surface of the mesa to the base, thereby reducing the resistance of the VCSEL by allowing current to expand as it flows vertically down the mesa. Thus, the VCSELs described herein can have improved electrical performance and / or longer operating life relative to VCSELs using other mode filtering techniques.
[0033] Figure 1 A cross-sectional view of an example VCSEL 100 is shown, and Figure 2 A close-up cross-sectional view of an example VCSEL 100 is shown. In some implementations, the VCSEL 100 can be included in an array of emitters (e.g., an array of VCSELs 100). In some implementations, such as Figure 1 As shown, VCSEL 100 is a bottom-emitting emitter. Alternatively, in some implementations, VCSEL 100 may be a top-emitting emitter (e.g., having Figure 1 A structure similar to that shown in and modified to achieve top emission).
[0034] The VCSEL 100 may include a substrate 102. The substrate 102 includes a support material on which or within which one or more layers or features of the VCSEL 100 are grown or fabricated. In some implementations, the substrate 102 includes an n-type material. In some implementations, the substrate 102 includes a semi-insulating type of material. In some implementations, the substrate 102 may be formed of a semiconductor material, such as gallium arsenide (GaAs), indium phosphide (InP), or another type of semiconductor material.
[0035] A set of epitaxial layers 104 may be disposed (e.g., formed) on a substrate 102. The set of epitaxial layers 104 may include a first mirror 106 (referred to herein as "bottom mirror 106"), a second mirror 108 (referred to herein as "top mirror 108"), and an active region 110 between the bottom mirror 106 and the top mirror 108. For example, the bottom mirror 106 is on the substrate 102, the active region 110 is on the bottom mirror 106, and the top mirror 108 is on the active region 110.
[0036] The bottom reflector 106 is a bottom reflector of an optical resonator of the VCSEL 100. For example, the bottom reflector 106 may include a distributed Bragg reflector (DBR), or another type of reflector structure. In some implementations, the bottom reflector 106 is formed of an n-type material. The bottom reflector 106 may include a plurality of reflector layers (e.g., a reflector pair, such as a DBR pair). In some implementations, a plurality of reflector layers (e.g., aluminum gallium arsenide (AlGaAs) layers) may be grown using a metal organic chemical vapor deposition (MOCVD) technique, a molecular beam epitaxy (MBE) technique, or another technique.
[0037] The active region 110 includes one or more layers where electrons and holes recombine to emit light and define the emission wavelength range of the VCSEL 100. The active region 110 may be in the form of a quantum well. The active region 110 may be disposed in an optical cavity defined between the bottom reflector 106 and the top reflector 108.
[0038] The top reflector 108 is a top reflector of an optical resonator of the VCSEL 100. For example, the top reflector 108 may include a DBR, or another type of reflector structure. In some implementations, the top reflector 108 is formed of a p-type material. The top reflector 108 may include multiple reflector layers (e.g., a reflector pair, such as a DBR pair). In some implementations, the multiple reflector layers (e.g., AlGaAs layers) may be grown using MOCVD technology, MBE technology, or another technology.
[0039] The mesa 112 may be defined in the top reflector 108. For example, a channel 114 may be etched down in the top reflector 108 to define a periphery 112b of the mesa 112 (e.g., where the channel 114 surrounds the mesa 112). The mesa 112 may include a top surface 112a (e.g., a surface of the top reflector 108 farthest from the active region 110), and the top surface 112b may be substantially flat. In some implementations, the width (e.g., diameter) of the top surface 112a may be in a range of 1 micrometer (μm) to 5 μm, or in a range of 1 μm to 3 μm. In some implementations, the area of the top surface 112a may be circular, square, diamond, or another shape.
[0040] The mesa 112 can taper outward from a top surface 112a of the mesa 112 toward a periphery 112b of the mesa 112. For example, the mesa 112 can taper toward the active region 110 (e.g., the top mirror 108 can be etched downward toward the active region 110). In particular, the base of the mesa 112 can be above the active region 110 such that the active region 110 and the bottom mirror 106 are not part of the mesa 112.
[0041] The mesa 112 may be tapered such that the width (e.g., diameter) of the top surface 112a is less than the width (e.g., diameter) across the base of the mesa 112 (e.g., across the periphery 112b of the mesa 112). In other words, the mesa 112 may have a shape of a conical frustum (e.g., the mesa 112 may have a non-zero taper). Thus, due to the taper of the mesa 112 (e.g., which increases the width of the mesa 112 from the top surface 112a to the base of the mesa 112), the resistance of the VCSEL 100 is reduced by allowing current to expand as it flows from the top surface 112a to the base of the mesa 112, thereby improving the electrical performance and / or lifetime of the VCSEL 100.
[0042] Due to the taper of the mesa 112, the number of reflector layers of the top reflector 108 in various cross-sections of the mesa 112 can vary. A “cross-section” of the mesa 112 can refer to a cross-section of the mesa 112 (e.g., a slice perpendicular to the top surface 112a) or a core cross-section of the mesa 112 (e.g., taken perpendicular to the top surface 112a). In some implementations, all of the reflective layers of the top reflector 108 can be in a central cross-section 112c of the mesa 112 that is below the top surface 112a. “Below” means directly below, such that the central cross-section 112c is defined by a boundary extending perpendicularly from the periphery of the top surface 112a to the base of the mesa 112. In some implementations, the top reflector 108 in the cross-section of the mesa 112 (at Figure 2The number of reflector layers in the top reflector 108 (exemplified by the cross sections 112d and 112e in the figure) decreases from the central cross section 112c to the periphery 112b. For example, the number of reflective layers of the top reflector 108 included in a first cross section 112d of the mesa 112 closer to the central cross section 112c may be greater than the number of reflective layers of the top reflector 108 included in a second cross section 112e of the mesa 112 closer to the periphery 112b.
[0043] In this manner, only the central section 112c of the mesa 112 includes the entire structure of the top reflector 108, and there is less than the entire structure of the top reflector 108 outside the central section 112c. Therefore, the area of the mesa 112 outside the central section 112c can exhibit lossy optical behavior (e.g., can be configured to filter optical modes due to the reduced number of reflector layers). For example, lower order optical modes in the central section 112c may experience increased optical gain and intensity on each return path (e.g., the optical modes in the central section 112c are the modes selected for the lower order modes), while optical modes outside the central section 112c (typically higher order modes) are in the lossy reflector region and are therefore suppressed (e.g., filtered out) when the optical modes pass vertically through the mesa 112. Therefore, due to the taper of the mesa 112, the mesa 112 provides mode filtering.
[0044] The VCSEL 100 may include an insulating layer 116. The insulating layer 116 may be composed of a dielectric material (e.g., the insulating layer 116 may be a dielectric layer), such as silicon nitride, silicon dioxide, a polymer dielectric (e.g., polyimide), or another type of insulating material. The insulating layer 116 may be disposed on the top reflector 108 (e.g., on the mesa 112). The insulating layer 116 may have a central opening to expose the top surface 112a of the mesa 112 (e.g., expose at least the top surface 112a of the mesa 112). For example, the central opening in the insulating layer 116 may be wider than the top surface 112a so as to expose the top surface 112a and an area of the mesa 112 surrounding the top surface 112a (but not so wide as to expose the entire mesa 112). In some implementations, the central opening in the insulating layer 116 may be defined by etching the insulating layer 116.
[0045] The VCSEL 100 may include a contact layer 118 (e.g., a metal contact layer). In some implementations, the contact layer 118 is formed of a p-type material. In some implementations, the contact layer 118 includes an annealed metallization layer. In some implementations, the contact layer 118 may include a chromium-gold (Cr-Au) layer, a gold-germanium-nickel (AuGeNi) layer, a palladium-germanium-gold (PdGeAu) layer, etc. The contact layer 118 may be disposed on the insulating layer 116 and above the central opening in the insulating layer 116, and the insulating layer 116 may insulate the contact layer 118 from other layers. The contact layer 118 may be electrically connected (e.g., to allow current to flow) to the group of epitaxial layers 104 via the central opening in the insulating layer 116. For example, the contact layer 118 may be electrically connected to the top reflector 108 via the central opening in the insulating layer 116.
[0046] The contact layer 118 may be a first contact layer, and the VCSEL 100 may include a second contact layer (not shown). For example, the VCSEL 100 may include an anode contact and a cathode contact. In some implementations, the second contact layer may be disposed on the substrate 102 (e.g., on the bottom surface of the substrate 102), on a side of the substrate 102 opposite to the group of epitaxial layers 104 (e.g., to the bottom reflector 106). In some implementations, the second contact layer may define an opening (e.g., the second contact may be annular or partially annular), through which the VCSEL 100 will emit light. In some implementations, the second contact layer is formed of an n-type material. In some implementations, the second contact layer includes an annealed metallization layer, in a manner similar to that described above. In some implementations, the bottom surface of the substrate 102 may include an anti-reflective coating. For example, the anti-reflective coating may be in an opening defined in the second contact layer.
[0047] In some implementations, the VCSEL 100 may include an isolation region 120 (e.g., an isolation implant region) surrounding a region defined below the mesa 112 (e.g., in the set of epitaxial layers 104). For example, the isolation region 120 may be an annular region in the set of epitaxial layers 104 below the channel 114 so as to surround a cylindrical region in the set of epitaxial layers 104 below the mesa 112. The isolation region 120 may be configured to provide current confinement in the VCSEL 100. For example, the isolation region 120 may be a region of the set of epitaxial layers 104 that is doped (e.g., by ion implantation) with oxygen ions, hydrogen ions, etc. Additionally or alternatively, the VCSEL 100 may include (e.g., within the mesa 112) an oxide pore (not shown) for current confinement.
[0048] By using the tapered mesa 112 in the top reflector 108, the VCSEL 100 can have reduced noise and improved high speed performance. In addition, the tapered mesa can reduce the resistance of the VCSEL 100, thereby improving the electrical performance of the VCSEL 100 and / or increasing the lifetime of the VCSEL 100.
[0049] As indicated above, Figure 1 and Figure 2 Provided as an example. Other examples may be Figure 1 and Figure 2 The content described is different. As an example, the VCSEL 100 can be in a top emission configuration. For example, in the top emission configuration of the VCSEL 100, the contact layer 118 can define an opening (e.g., the contact layer 118 can be annular or partially annular), and the VCSEL 100 will emit light through the opening. As another example, the contact layer 118 can be a light-transmitting material, such as indium tin oxide (ITO). In addition, in the top emission configuration of the VCSEL 100, the VCSEL 100 can include one or more oxide layers that define oxide pores (e.g., one or more of which can be in the mesa 112). In addition, in the top emission configuration of the VCSEL 100, the contact layer 118 can be a first contact layer, and the VCSEL 100 can include a second contact layer (not shown) disposed on the substrate 102 (e.g., on the bottom surface of the substrate 102), on the side of the substrate 102 opposite to the group of epitaxial layers 104. Additionally, a set of layers (e.g., one or more layers) of the VCSEL 100 may perform one or more functions described as being performed by another set of layers of the VCSEL 100, and any layer may include more than one layer. Furthermore, although described herein in terms of a VCSEL, the techniques and structures described herein may be used in conjunction with another type of vertically emitting (e.g., top emitting or bottom emitting) optical device, such as a light emitting diode (LED), or the like.
[0050] Figure 3 is a flow chart of an example process 300 for forming a tapered mesa VCSEL. In some implementations, Figure 3 One or more process blocks of may be performed by various semiconductor manufacturing equipment.
[0051] like Figure 3 As shown, process 300 may include forming a first reflector on a substrate (block 310). For example, the first reflector may be a bottom DBR, as described herein. Figure 3 As further shown, process 300 may include forming an active region on the first reflector (block 320). Figure 3As further shown, process 300 can include forming a second reflector on the active area, wherein the second reflector includes a plurality of reflector layers (block 330). For example, the second reflector can be a top DBR, as described herein.
[0052] like Figure 3 As further shown, process 300 may include etching the second reflector to define a table that tapers outward from the top surface of the table to the periphery of the table (box 340). For example, a trench may be etched in the second reflector to define the periphery of the table. In some implementations, process 300 may include applying a photoresist dot to the second reflector and etching the second reflector using the photoresist dot. For example, the etching of the second reflector may be an isotropic etch (e.g., resulting in undercutting of the photoresist dot). The diameter of the photoresist dot may be greater than 5 μm, such as a diameter of 7 μm to 9 μm. In some implementations, the number of reflector layers in the cross-section of the table of the multiple reflector layers decreases from the central cross-section of the table below the top surface to the periphery of the table. For example, all of the reflective layers in the multiple reflector layers may be in the central cross-section of the table.
[0053] In some implementations, process 300 includes performing ion implantation in one or more of the second reflector, the active region, or the first reflector to form an isolation region. For example, the isolation region may surround an area defined below the mesa. In some implementations, the ion implantation may be performed using photoresist dots.
[0054] In some implementations, process 300 includes forming an insulating layer on the second reflector, and etching a central opening in the insulating layer to expose the top surface of the mesa. In some implementations, process 300 includes forming a contact layer on the insulating layer and above the central opening. The contact layer can be electrically connected to the second reflector via the central opening.
[0055] although Figure 3 An example block diagram of process 300 is shown, but in some implementations, Figure 3 Process 300 may include additional blocks, fewer blocks, different blocks, or differently arranged blocks than those depicted.
[0056] In some implementations, the light source may include the VCSEL 100. In some implementations, the optical system may include the VCSEL 100. In addition, the optical system may include one or more lenses, one or more optical elements (e.g., diffractive optical elements, refractive optical elements, etc.), one or more reflector elements, and / or one or more optical sensors, etc. In some implementations, the VCSEL 100 may be included in a lidar system or a three-dimensional sensing system (e.g., may be configured for use in a lidar system or a three-dimensional sensing system).
[0057] According to some implementations, a method may include generating light pulses for lidar using VCSEL 100; receiving signals based on reflections of the light pulses from an object; and / or determining the distance and / or speed of the object based on the signals. According to some implementations, a method may include generating (or forming) an array of light spots for three-dimensional sensing using VCSEL 100; receiving signals based on reflections of the light spots from an object; and / or generating a depth map based on the signals. According to some implementations, a method may include generating (or forming) a light pattern for three-dimensional sensing using VCSEL 100; receiving signals based on reflections of the light pattern from an object; and / or generating a depth map based on the signals.
[0058] The foregoing disclosure provides illustration and description, but is not intended to be exhaustive or to limit implementation to the disclosed precise form. Modifications and changes may be made based on the above disclosure, or modifications and changes may be obtained from the practice of implementation. In addition, unless the foregoing disclosure explicitly provides a reason why one or more implementations may not be combined, any implementation described herein may be combined.
[0059] Even if a specific combination of features is described in the claims and / or a specific combination of features is disclosed in the specification, these combinations are not intended to limit the disclosure of various implementations. In fact, many of these features can be combined in a manner that is not specifically described in the claims and / or not specifically disclosed in the specification. Although each dependent claim listed below can only directly depend on one claim, the disclosure of various implementations includes each dependent claim combined with each other claim in the claim set. As used herein, the phrase "at least one" referring to a list of items refers to any combination of those items, including a single member. As an example, "at least one of a, b, or c" is intended to cover a, b, c, ab, ac, bc, and abc, as well as any combination of multiples in the same item.
[0060] Unless clearly described as such, any element, action or instruction used herein should not be interpreted as critical or necessary. In addition, as used herein, the article "a (a)" and "an (an)" are intended to include one or more projects, and can be used interchangeably with "one or more". In addition, as used in the text, the article "the (the)" is intended to include one or more projects quoted in conjunction with the article "the", and can be used interchangeably with "the one or more". In addition, as used herein, the term "group" is intended to include one or more projects (for example, a combination of related projects, unrelated projects, or related projects and unrelated projects), and can be used interchangeably with "one or more". In the case of only intending a project, the phrase "only one" or similar language is used. In addition, as used herein, the term "has (has)", "have (have)" and "having (having)" etc. are intended to be open terms. In addition, unless otherwise clearly stated, the phrase "based on" is intended to mean "at least partially based on". In addition, unless otherwise expressly stated (e.g., if used in combination with "either" or "only one of"), as used herein, the term "or" when used in series is intended to be inclusive and may be used interchangeably with "and / or". In addition, for ease of description, spatially relative terms such as "below," "lower," "above," "upper," "below," etc. may be used herein to describe the relationship of one element or feature to another element or feature as shown in the accompanying drawings. In addition to the orientations depicted in the accompanying drawings, spatially relative terms are intended to cover different orientations of devices, devices, and / or elements in use or operation. The device may be oriented in other ways (rotated 90 degrees or oriented in other orientations), and the spatially relative descriptors used herein may also be interpreted accordingly.
Claims
1. A vertical cavity surface emitting laser (VCSEL), comprising: substrate; a first reflector on the substrate; an active region on the first reflector; as well as a second reflector on the active area, comprising a plurality of reflector layers, wherein a table is defined in the second reflector, wherein the table tapers outwardly from a top surface of the table to a periphery of the table, and The number of reflector layers of the plurality of reflector layers in a cross section of the mesa decreases from a central cross section of the mesa below the top surface to the periphery of the mesa. 2 . The VCSEL of claim 1 , wherein all of the plurality of reflector layers are in the central cross-section of the mesa.
3. The VCSEL according to claim 1, further comprising: an insulating layer on the second reflector, The insulating layer has a central opening to expose at least the top surface of the mesa.
4. The VCSEL according to claim 3, further comprising: a contact layer on the insulating layer and above the central opening, The contact layer is electrically connected to the second reflector via the central opening.
5. The VCSEL of claim 4, wherein the contact layer is a first contact layer, and The VCSEL further comprises: A second contact layer is on the substrate and on a side of the substrate opposite to the first reflector.
6. The VCSEL according to claim 1, further comprising: An isolation region surrounds an area defined below the mesa.
7. The VCSEL of claim 1, wherein the mesa tapers toward the active region.
8. The VCSEL of claim 1, wherein a region of the mesa outside the central cross-section of the mesa is configured to filter out an optical mode.
9. The VCSEL of claim 1, wherein the mesa has a shape of a conical frustum.
10. A vertical cavity surface emitting laser (VCSEL), comprising: substrate; a first reflector on the substrate; an active region on said first reflector; a second reflector on the active area, comprising a plurality of reflector layers, wherein a table is defined in the second reflector, wherein the table tapers outwardly from a top surface of the table to a periphery of the table, and wherein the number of reflector layers of the plurality of reflector layers in a cross section of the mesa decreases from a central cross section of the mesa below the top surface to the periphery of the mesa; an insulating layer on the second reflector, wherein the insulating layer has a central opening to expose the top surface of the mesa; as well as a contact layer on the insulating layer and above the central opening, The contact layer is electrically connected to the second reflector via the central opening.
11. The VCSEL of claim 10, wherein all of the plurality of reflector layers are in the central cross-section of the mesa.
12. The VCSEL of claim 10, wherein the VCSEL is a bottom emitting emitter.
13. The VCSEL of claim 10, wherein the periphery of the mesa is defined in the second reflector by a trench etched down in the second reflector.
14. The VCSEL of claim 10, wherein the mesa tapers toward the active region.
15. A method comprising: forming a first reflector on a substrate; forming an active area on the first reflector; forming a second reflector on the active area, wherein said second reflector comprises a plurality of reflector layers; as well as etching the second reflector to define a mesa that tapers outwardly from a top surface of the mesa toward a periphery of the mesa, The number of reflector layers of the plurality of reflector layers in a cross section of the mesa decreases from a central cross section of the mesa below the top surface to the periphery of the mesa.
16. The method according to claim 15, further comprising: applying a photoresist spot to the second mirror, wherein etching the second reflector uses the photoresist dots.
17. The method according to claim 16, further comprising: performing ion implantation in one or more of the second reflector, the active region, or the first reflector using the photoresist dots to form an isolation region, The isolation region surrounds a region defined below the mesa.
18. The method according to claim 15, further comprising: forming an insulating layer on the second reflector; as well as A central opening is etched in the insulating layer to expose the top surface of the mesa.
19. The method according to claim 18, further comprising: forming a contact layer on the insulating layer, The contact layer is electrically connected to the second reflector via the central opening.
20. The method of claim 15, wherein all of the plurality of reflector layers are in the central cross-section of the mesa.