Method and system for suppressing common-mode conducted noise of WPT system

Abstract

The invention provides a method and a system for suppressing common-mode conducted noise of a WPT system, which are used for solving the technical problem of large conducted interference on a high-frequency input side and a high-frequency output side of an existing WPT system. Comprising a primary side circuit and a secondary side circuit, the primary side circuit comprises a direct-current power supply, an output capacitor, a full-bridge inverter circuit, a primary side compensation circuit and a primary side coil, the secondary side circuit comprises a secondary side coil, a secondary side compensation circuit, a rectification circuit, an output capacitor and a load, and a linear impedance network LISN is arranged between the direct-current power supply and the output capacitor. And a passive cancellation circuit is arranged between the output capacitor and the full-bridge inverter circuit. According to the invention, common-mode conducted noise generated by primary and secondary resonant capacitors and common-mode conducted interference caused by rapid change of bridge port potential and resonant capacitors are eliminated by combining a balance capacitance method and a passive cancellation circuit.

Description

Technical Field

[0001] The present invention relates to the field of wireless power transmission, and in particular to a method and system for suppressing common-mode conducted noise of a WPT system. Background Art

[0002] Wireless power transmission technology (WPT) is a power transmission technology that does not use wires to directly connect the power transmitter and the receiver. It is a power transmission technology with the advantages of safety, convenience, flexibility and durability. These advantages make it have broad application prospects in mobile devices, medical equipment, industrial automation, smart homes and other fields.

[0003] However, for the above application scenarios, electromagnetic compatibility (EMC) issues may cause interference with other signals during wireless charging, affecting the normal function of the device. Especially for medical implantable devices, it is necessary to ensure that the system does not interfere with the normal operation of other critical life support systems. Ensuring good EMC performance is essential to maintaining the reliability and safety of wireless power transmission systems.

[0004] EMC refers to the ability of electronic equipment and systems to work properly in their electromagnetic environment and not to generate unacceptable electromagnetic interference to other devices in the environment. EMC involves two aspects. On the one hand, it is electromagnetic interference (EMI), that is, the interference signal generated by electronic equipment when it is working, which may affect the normal function of other devices. On the other hand, it is electromagnetic immunity, that is, the ability of the equipment to maintain its expected performance when subjected to electromagnetic interference. According to the form of action, it is divided into radiated interference and conducted interference. Among them, the common mode interference in the conducted interference has a more serious impact on the system. Therefore, it is very necessary to suppress the common mode conducted interference and improve the stability of the system. Although a lot of research has been done on EMI problems in the field of power converters, the research and analysis of EMI problems in WPT systems is still in the preliminary research stage and needs further supplementation. Summary of the invention

[0005] The purpose of the present invention is to provide a method and system for suppressing common-mode conducted noise of a WPT system, so as to solve the technical problem of large conducted interference on the high-frequency input side and output side of the existing WPT system.

[0006] A system for suppressing common-mode conducted noise of a WPT system comprises a primary circuit and a secondary circuit, wherein the primary circuit comprises a DC power supply, an output capacitor, a full-bridge inverter circuit, a primary compensation circuit and a primary coil, and the secondary circuit comprises a secondary coil, a secondary compensation circuit, a rectifier circuit, an output capacitor and a load, and a passive cancellation circuit is arranged between the output capacitor and the full-bridge inverter circuit.

[0007] Optionally, the output end of the DC power supply and the output capacitor connected in parallel is connected to the input end of the full-bridge inverter circuit, and the passive cancellation circuit includes a first passive cancellation branch and a second passive cancellation branch;

[0008] The first passive cancellation branch includes a transformer T1, and the two ends of the secondary side of the transformer T1 are respectively connected to the input end and an output end of the full-bridge inverter circuit. The second passive cancellation branch includes a transformer T2, and the two ends of the secondary side of the transformer T2 are respectively connected to the input end and another output end of the full-bridge inverter circuit.

[0009] Optionally, the first passive cancellation branch further includes a DC blocking capacitor C b1 and grounding capacitor C com1 ;

[0010] The DC blocking capacitor C b1 One end of the DC blocking capacitor C is connected to one end of the secondary side of the transformer T1. b1 The other end of the secondary side of the transformer T1 is connected to an output end of the full-bridge inverter circuit, and the other end of the secondary side of the transformer T1 is connected to an input end of the full-bridge inverter circuit;

[0011] The grounding capacitor C com1 One end of the grounding capacitor C is connected to one end of the primary side of the transformer T1. com1 The other end of the primary side of the transformer T1 is connected to the input end of the full-bridge inverter circuit.

[0012] Optionally, the second passive cancellation branch further includes a DC blocking capacitor C b2 and grounding capacitor C com2 ;

[0013] The DC blocking capacitor C b2 One end of the DC blocking capacitor C is connected to one end of the secondary side of the transformer T2. b2 The other end of the transformer T2 is connected to the other output end of the full-bridge inverter circuit, and the other end of the secondary side of the transformer T2 is connected to the input end of the full-bridge inverter circuit;

[0014] The grounding capacitor C com2 One end of the grounding capacitor C is connected to one end of the primary side of the transformer T2. com2 The other end of the primary side of the transformer T2 is connected to the input end of the full-bridge inverter circuit.

[0015] Optionally, the primary compensation circuit includes a first primary compensation capacitor C P1 and the second primary compensation capacitor C P2 The secondary side compensation circuit includes a first secondary side compensation capacitor C S1 and the second secondary compensation capacitor CS2 ;

[0016] The first primary compensation capacitor C P1 The capacitance is equal to the second primary compensation capacitor C P2 The capacitance of the first secondary compensation capacitor C S1 The capacitance is equal to the second secondary compensation capacitor C S2 Capacitance value.

[0017] Optionally, the first primary compensation capacitor C P1 The two ends of are respectively connected to an output end of the full-bridge inverter circuit and one end of the primary coil, and the second primary compensation capacitor C P2 The two ends are respectively connected to the other output end of the full-bridge inverter circuit and the other end of the primary coil;

[0018] The first secondary compensation capacitor C S1 The two ends of are respectively connected to an input end of the rectifier circuit and one end of the secondary coil, and the second secondary compensation capacitor C S2 The two ends are respectively connected to the other input end of the rectifier circuit and the other end of the secondary coil.

[0019] Optionally, the DC power supply is connected in parallel with the output capacitor, and a linear impedance network LISN is provided between the DC power supply and the output capacitor, wherein the linear impedance network LISN includes an impedance inductor L Z1 and L Z2 , and the impedance capacitance C Z1 , C Z2 , C Z3 and C Z4 , and the impedance resistor R L and R N ;

[0020] The impedance inductance L Z1 and impedance capacitance C Z1 One end of each is connected to one end of the DC power supply, and the impedance inductor L Z2 and impedance capacitance C Z2 One end of each is connected to the other end of the DC power supply, and the impedance capacitor C Z3 One end of the impedance resistor R L One end of the impedance capacitor C Z4 One end of the impedance resistor R N One end of the impedance inductor L Z1 and impedance capacitance C Z3 The other end is connected to one end of the output capacitor, the impedance inductor L Z2 and impedance capacitance C Z4 The other end of is connected to the other end of the output capacitor;

[0021] The impedance capacitance C Z1 , Impedance and Capacitance C Z2 , Impedance resistor R L and impedance resistor R N The other end is connected to the ground terminal PE.

[0022] A method for suppressing common-mode conducted noise of a WPT system, using the above-mentioned system for suppressing common-mode conducted noise of a WPT system, the specific method is:

[0023] Set the grounding capacitance C according to the system parameters com1 The capacitance is equal to the primary parasitic capacitance C PA The parasitic capacitance C of the first coil PS1 The sum of the capacitance values ​​of com2 The capacitance is equal to the primary parasitic capacitance C PB The parasitic capacitance C of the first coil PS2 The sum of the capacitance values;

[0024] Where: Parasitic capacitance C PA is the parasitic capacitance of the bridge port at one output end of the full-bridge inverter circuit, and the primary parasitic capacitance C PB is the parasitic capacitance of the bridge port at the other output end of the full-bridge inverter circuit, and the parasitic capacitance of the first coil C PS1 The capacitance is equal to the parasitic capacitance C of the first coil PS2 The capacitance of the first coil is C PS1 The parasitic capacitance C of the first coil PS2 The sum of the capacitances is equal to the distributed capacitance C between the primary coil and the secondary coil PS .

[0025] Optionally, the first primary compensation capacitor C is set according to the system parameters. P1 , the second primary compensation capacitor C P2 , the first secondary compensation capacitor C S1 and the second secondary compensation capacitor C S2 Capacitance value;

[0026] The first primary compensation capacitor C P1 With the second primary compensation capacitor C P2 The sum of the capacitances is equal to the primary compensation circuit C in the primary compensation circuit P The capacitance of the first secondary compensation capacitor C S1 With the second secondary compensation capacitor C S2 The sum of the capacitances is equal to the secondary compensation circuit C in the primary compensation circuit S Capacitance value.

[0027] Due to the adoption of the above technical solution, the present invention has the following advantages:

[0028] This application eliminates the common-mode conduction noise generated by the original secondary resonant capacitor and the common-mode conduction interference caused by the rapid change of the bridge port potential and the resonant capacitor by balancing the compensation capacitor and combining it with a passive cancellation circuit. This method will not affect the parameter setting of the existing WPT system and has strong applicability.

[0029] Other advantages, objectives and features of the present invention will be described in the following description to some extent, and to some extent, will be obvious to those skilled in the art based on the following examination and study, or can be taught from the practice of the present invention. The objectives and other advantages of the present invention can be realized and obtained through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The accompanying drawings of the present invention are as follows.

[0031] Figure 1 It is a schematic diagram of the structure of the common-mode conducted noise suppression system of the WPT system of the present invention.

[0032] Figure 2 This is a schematic diagram of the conducted noise test principle of the SS topology WPT system of the present invention.

[0033] Figure 3 The diagram is a parasitic capacitance and common mode noise conduction path diagram of the system of the present invention.

[0034] Figure 4 Schematic diagram of the coupling coil of the present invention.

[0035] Figure 5 This is an equivalent model diagram of the two capacitors of the coupling coil distributed capacitance of the present invention.

[0036] Figure 6 This is the equivalent circuit diagram of the common-mode conducted interference model of the present invention.

[0037] Figure 7 This is a sub-circuit diagram of the current source acting alone in the present invention.

[0038] Figure 8 This is the simplified sub-circuit diagram of the current source acting alone in the present invention.

[0039] Fig. 9 This is a sub-circuit diagram of the voltage source acting alone in the present invention.

[0040] Fig.10 This is a simplified sub-circuit diagram of each voltage source acting independently in the present invention.

[0041] Fig.11 This is the common-mode conducted noise equivalent circuit using the symmetrical capacitance method.

[0042] Fig.12This is an equivalent circuit diagram of the simplified common-mode conducted noise using the symmetrical capacitance method of the present invention.

[0043] Fig.13 This is an equivalent circuit diagram of the passive cancellation of common-mode conducted noise at the primary bridge port of the present invention.

[0044] Fig.14 It is the time domain waveform diagram of the common mode conducted noise of the unbalanced capacitance method and the balanced capacitance method of the present invention.

[0045] Fig.15 It is the frequency domain waveform diagram of common mode conducted noise of unbalanced capacitance and balanced capacitance method of the present invention.

[0046] Fig.16 The diagram is a time domain waveform diagram of common-mode conducted noise without and with the passive cancellation circuit added in the present invention.

[0047] Fig.17 This is the frequency domain waveform diagram of the common-mode conducted noise of the present invention without and with the passive cancellation circuit.

[0048] Fig.18 It is a time domain waveform diagram of the common-mode conducted noise of the unbalanced capacitor plus passive cancellation and the balanced capacitor plus passive cancellation of the present invention.

[0049] Fig.19 It is a frequency domain waveform diagram of common-mode conducted noise of unbalanced capacitor plus passive cancellation and balanced capacitor plus passive cancellation of the present invention.

[0050] Fig. 20 It is a comparison diagram of the time domain waveforms of common-mode conducted noise of the three processing methods of the present invention.

[0051] Fig.21 This is a comparison diagram of the frequency domain waveforms of common-mode conducted noise in the three processing methods of the present invention. DETAILED DESCRIPTION

[0052] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0053] Embodiment 1:

[0054] like Figure 2 A WPT system shown includes a primary circuit and a secondary circuit, wherein the primary circuit includes a DC power supply, an output capacitor, a full-bridge inverter circuit, a primary compensation circuit and a primary coil, and the secondary circuit includes a secondary coil, a secondary compensation circuit, a rectifier circuit, an output capacitor and a load.

[0055] In this embodiment, if Figure 1 As shown, the DC power supply is U in ; Output capacitor is C in ; The primary coil is L P ; The primary compensation circuit includes the primary compensation capacitor CP The full-bridge inverter circuit includes 4 switch tubes S1-S4. The switch tubes S1 and S2 are connected in series and intersect at point A. The switch tubes S3 and S4 are connected in series and intersect at point B. The secondary coil is L S ; The secondary side compensation circuit includes a first secondary side compensation capacitor C S1 and the second secondary compensation capacitor C S2 , and the sum of the capacitances is equal to the secondary compensation capacitor C S The capacitance value of the primary compensation circuit and the secondary compensation circuit is SS topology; the rectifier circuit includes 4 switch tubes S5-S8, S5 and S6 intersect at point D, S7 and S8 intersect at point C; the output capacitor is C out ;The load is R.

[0056] 1. Analysis of the common mode noise conduction path of the WPT system:

[0057] like Figure 2 In the SS topology WPT system shown in the figure, one end of the two bridge arm branches of the rectifier circuit is connected to the ground terminal PE during testing. A linear impedance network LISN is set between the DC power supply and the output capacitor. The LISN provides a constant impedance for the system in the conducted interference frequency band (150kHZ~30MHZ) and filters the conducted interference on the power supply side. The current on the L line and the N line is converted into a voltage signal by the 50Ω resistor in the LISN and sent to the noise separator, and finally to the EMI receiver or spectrum analyzer. The common-mode conducted noise is expressed as:

[0058]

[0059] In formula (1), i L is the current on line L, i N is the current on the N line.

[0060] In this embodiment, the linear impedance network LISN includes an impedance inductor L Z1 and L Z2 , and the impedance capacitance C Z1 , C Z2 , C Z3 and C Z4 , and the impedance resistor R L and R N ;

[0061] The impedance inductance L Z1 and impedance capacitance C Z1 One end of each is connected to one end of the DC power supply, and the impedance inductor L Z2 and impedance capacitance C Z2 One end of each is connected to the other end of the DC power supply, and the impedance capacitor C Z3 One end of the impedance resistor RL One end of the impedance capacitor C Z4 One end of the impedance resistor R N One end of the impedance inductor L Z1 and impedance capacitance C Z3 The other end is connected to one end of the output capacitor, the impedance inductor L Z2 and impedance capacitance C Z4 The other end of is connected to the other end of the output capacitor;

[0062] The impedance capacitance C Z1 , Impedance and Capacitance C Z2 , Impedance resistor R L and impedance resistor R N The other end is connected to the ground terminal PE.

[0063] In this embodiment, the impedance capacitor C Z1 , C Z2 , C Z3 and C Z4 The capacitance value is 0.1uF, the impedance resistance R L and impedance resistor R N The resistance value is 50Ω, the impedance and inductance L Z1 and L Z2 Both are 50uH.

[0064] like Figure 3 As shown in the figure, the dotted line indicates the main transmission path of the common-mode conducted interference of the WPT system, including the parasitic capacitance C from the midpoints A and B of the bridge arm to the safety ground respectively. PA and C PB , and the distributed capacitance C between the primary and secondary coils of the coupling mechanism ps It can be seen that the flow through C PA and C PB The displacement current is related to the potential of points A and B. The current flowing through the primary and secondary coils of the coupling mechanism is C ps The displacement current is related to the potential of each point of the coupling mechanism. The voltage across the coupling coil is affected by the voltage of the primary and secondary resonant capacitors and the potential of the bridge port. A 、V B 、V cp , V cs It can be regarded as a voltage source that causes common-mode conducted interference.

[0065] 2. Establishment of common mode conduction interference model of the system:

[0066] 2.1 Derivation of the two-capacitor model of the primary and secondary coil distributed capacitance:

[0067] like Figure 4The coupling coil model is derived based on the principle that the total displacement current flowing through the primary and secondary coils is equal to the distributed capacitance of the two capacitance models, and the two capacitance models between the primary and secondary coils are set:

[0068] (1) The potential changes linearly with the length from one end of the coil to the other end;

[0069] (2) The parasitic capacitance between the primary coil and the secondary coil is uniform;

[0070] (3) The primary and secondary coil models are symmetrical. Set the two ends of the primary coil to points a and b, and the two ends of the secondary coil to points c and d.

[0071] The coil length is l ab = l cd Point P is a point on the primary coil, the distance from point a is l, and the point on the secondary coil corresponding to point P is S.

[0072] Then the potential V at point P is p for:

[0073]

[0074] Then the potential V at point S is s for:

[0075]

[0076] In formulas (2) and (3), V a 、V b 、V c and V d are the potentials of a, b, c and d respectively.

[0077] Displacement current between points P and S

[0078]

[0079] The total displacement current is then:

[0080]

[0081] From the above formula, it can be obtained that the distributed capacitance model of the primary and secondary coupling coils can be equivalent to a two-capacitor model with two capacitances equal to half of the total capacitance.

[0082]

[0083] like Figure 5 As shown, C PS It is the total parasitic capacitance (i.e. distributed capacitance) of the primary and secondary coils.

[0084] 2.2 Establishment of common mode conduction interference model:

[0085] Use the substitution theorem to derive the common-mode conducted interference model of the full-bridge converter, and pay attention to avoid the appearance of pure voltage source loops and pure current source cut sets in the circuit after substitution. In the 150kHZ-30MHZ conducted interference frequency band, the input capacitor C in , output capacitor C out The impedance is very small, so it can be approximated as a short circuit. It can be seen from formula (1) that the common-mode conducted interference equivalent impedance of LISN is a 25Ω resistor. The coupling coil is replaced by a pair of controlled voltage sources and current sources with the same waveform. In order to avoid the appearance of a pure voltage source loop, the switch tubes S1 and S3, S5 and S7 are replaced by current sources with the same waveform. At the same time, the distributed capacitance at both ends of the coupling coil is replaced by two total capacitance models, and the original secondary side resonant capacitance is replaced by a voltage source with the same waveform. Through the above substitution, the equivalent circuit of the common-mode conducted interference model of the SS topology WPT system can be obtained, as shown in Figure 6 shown.

[0086] 2.3 Simplify the common mode conduction interference model:

[0087] By substitution theorem we get Figure 6 The equivalent circuit of the common-mode conducted interference model uses the superposition theorem to analyze the impact of different sources on the common-mode noise. Whether common-mode conducted interference is generated is reflected in whether a voltage is generated on the 25Ω common-mode conducted interference equivalent resistor.

[0088] Considering only the effect of the current source will Figure 6 All independent voltage sources are short-circuited to obtain Figure 7 The current source shown acts alone in the sub-circuit, which can be simplified as follows Figure 8 As shown, from Figure 8 It can be seen that all current sources in this subcircuit are short-circuited, so the current source subcircuit has no effect on common-mode conducted interference.

[0089] Next, we only consider the effect of voltage sources, such as Fig. 9 The voltage source acts alone in the sub-circuit shown, and all independent current sources are open-circuited. After simplification, each voltage source acts alone in the sub-circuit as shown in Fig.10 As shown, Fig.10 (a) is V s2 , V s4 The actor circuit, Fig.10 (b) is V cp , V cs The actor circuit, Fig.10 (c) is the Vs6, Vs8 action sub-circuit. Fig.10It can be seen that there are six voltage sources in this subcircuit that will affect the common-mode noise, namely, the lower tube of the primary leading bridge arm, the lower tube of the primary lagging bridge arm, the primary resonant capacitor, the lower tube of the secondary leading bridge arm, and the lower tube of the secondary lagging bridge arm. The change in the potential of the secondary resonant capacitor affects the common-mode conducted interference.

[0090] Depend on Fig. 9 The expression for the common-mode conduction voltage can be obtained:

[0091]

[0092] in:

[0093]

[0094] Embodiment 2:

[0095] like Figure 1 A system for suppressing common-mode conducted noise of a WPT system is shown, comprising the WPT system described in Example 1, wherein a passive cancellation circuit is arranged between the output capacitor and the full-bridge inverter circuit.

[0096] like Figure 1 As shown, the primary compensation capacitor C P Split into the first primary compensation capacitor C P1 and the second primary compensation capacitor C P2 , the primary compensation capacitor C S The secondary side compensation circuit includes a first secondary side compensation capacitor C S1 and the second secondary compensation capacitor C S2 ;

[0097] The first primary compensation capacitor C P1 The capacitance is equal to the second primary compensation capacitor C P2 The capacitance of the first secondary compensation capacitor C S1 The capacitance is equal to the second secondary compensation capacitor C S2 The capacitance value, and C P1 +C P2 =C P , C S1 +C S2 =C S .

[0098] like Figure 1 As shown, the first primary compensation capacitor C P1 The two ends of are respectively connected to an output end (A end) of the full-bridge inverter circuit and one end of the primary coil, and the second primary compensation capacitor C P2 The two ends are connected to the other output end (B end) of the full-bridge inverter circuit and the other end of the primary coil;

[0099] The first secondary compensation capacitor C S1 The two ends of the capacitor are respectively connected to an input end of the rectifier circuit and one end (end C) of the secondary coil. The second secondary compensation capacitor C S2 The two ends are respectively connected to the other input end (D end) of the rectifier circuit and the other end of the secondary coil.

[0100] In this embodiment, Figure 1 Middle C PA , C PB , C PC and C PD The parasitic capacitance of the bridge port to the ground is point A, point B, point C and point D respectively. Fig. 9 It can be seen that if common-mode conducted noise is to be suppressed, V S2 、V S4 、V cp 、V cs 、V S6 、V S8 , V cp and V cs Common-mode noise is generated on the 25Ω common-mode conducted interference equivalent impedance through the coil distributed capacitance and the bridge port parasitic capacitance to ground. Based on the idea of ​​common-mode conducted interference cancellation, in order to eliminate V cp and V cs To reduce the influence of the secondary coil, an opposite compensation source V can be connected in series at the other end of the primary and secondary coils. CP2 and V CS2 , the opposite voltage source will generate opposite voltage on the 25Ω common mode conduction interference equivalent impedance, thereby eliminating the common mode conduction noise generated by the primary and secondary resonant capacitors. The implementation means is to connect the compensation capacitors C P and C S It is divided into two parts and connected in series to the two ends of the original secondary coil. Since they are in the same loop, the resonant capacitor after the split does not affect the normal operation of the original SS topology WPT system. cp1 , V cp2 , V cs1 , V cs2 The equivalent circuit of the action is as follows Fig.11 As shown, the simplified equivalent circuit of the common-mode conducted noise of the symmetrical capacitance method is as follows Fig.12 shown.

[0101]

[0102] For a full-bridge converter, the distance and relative area between S1-S4 and the heat sink are generally the same as the medium, so C PA , C PB The parasitic capacitance can be approximately equal. That is:

[0103] CPA =C PB =C P (10)

[0104] And because the two split capacitors have the same capacitance and are connected in series in the same circuit, they are equivalent to the same voltage source, that is:

[0105]

[0106] From the above analysis, it can be seen that V CP1 、V CP2 With V CS1 、V CS2 The two generate opposite potentials on the 25Ω equivalent resistor and cancel each other out, thus eliminating the common-mode conducted noise caused by the primary and secondary resonant capacitors.

[0107] like Figure 1 As shown, the output end of the DC power supply and the output capacitor connected in parallel is connected to the input end of the full-bridge inverter circuit, and the passive cancellation circuit includes a first passive cancellation branch and a second passive cancellation branch;

[0108] The first passive cancellation branch includes a transformer T1, and the two ends of the secondary side of the transformer T1 are respectively connected to the input end and an output end of the full-bridge inverter circuit. The second passive cancellation branch includes a transformer T2, and the two ends of the secondary side of the transformer T2 are respectively connected to the input end and another output end of the full-bridge inverter circuit.

[0109] like Figure 1 As shown, the first passive cancellation branch also includes a DC blocking capacitor C b1 and grounding capacitor C com1 ;

[0110] The DC blocking capacitor C b1 One end of the DC blocking capacitor C is connected to one end of the secondary side of the transformer T1. b1 The other end of the secondary side of the transformer T1 is connected to an output end of the full-bridge inverter circuit, and the other end of the secondary side of the transformer T1 is connected to an input end of the full-bridge inverter circuit;

[0111] The grounding capacitor C com1 One end of the grounding capacitor C is connected to one end of the primary side of the transformer T1. com1 The other end of the primary side of the transformer T1 is connected to the input end of the full-bridge inverter circuit.

[0112] like Figure 1 As shown, the second passive cancellation branch also includes a DC blocking capacitor C b2 and grounding capacitor C com2 ;

[0113] The DC blocking capacitor Cb2 One end of the DC blocking capacitor C is connected to one end of the secondary side of the transformer T2. b2 The other end of the transformer T2 is connected to the other output end of the full-bridge inverter circuit, and the other end of the secondary side of the transformer T2 is connected to the input end of the full-bridge inverter circuit;

[0114] The grounding capacitor C com2 One end of the grounding capacitor C is connected to one end of the primary side of the transformer T2. com2 The other end of the primary side of the transformer T2 is connected to the input end of the full-bridge inverter circuit.

[0115] In this embodiment, the effect of the primary bridge port potential change on the common mode noise is analyzed separately. cp 、V cs 、V s6 and V s8 Short circuit, and get the common mode conduction interference model which is only acted by the lower tube of the leading bridge arm and the lower tube of the lagging bridge arm of the primary side.

[0116] According to the basic idea of ​​cancellation, it is only necessary to construct an opposite voltage source and a capacitor of the same capacitance in series at both ends to generate an opposite current on the common-mode equivalent resistance to cancel out the common-mode interference caused by the change in bridge potential through the parasitic capacitance of the bridge to the ground. Fig.13 shown.

[0117]

[0118] in:

[0119]

[0120] If:

[0121]

[0122] but:

[0123]

[0124] Easy to get V CM =0, that is, the common-mode conducted interference voltage generated by the rapid change of the primary bridge potential is eliminated.

[0125] Embodiment 3:

[0126] A method for suppressing common-mode conducted noise of a WPT system, using a system for suppressing common-mode conducted noise of a WPT system described in Example 2. According to the above analysis, the suppression of common-mode conducted noise can be achieved when the system parameters meet the following requirements:

[0127] 1. Set the grounding capacitance C according to the system parameterscom1 The capacitance is equal to the primary parasitic capacitance C PA The parasitic capacitance C of the first coil PS1 The sum of the capacitance values ​​of com2 The capacitance is equal to the primary parasitic capacitance C PB The parasitic capacitance C of the first coil PS2 The sum of the capacitance values;

[0128] Where: Parasitic capacitance C PA is the parasitic capacitance of the bridge port at one output end of the full-bridge inverter circuit, and the primary parasitic capacitance C PB is the parasitic capacitance of the bridge port at the other output end of the full-bridge inverter circuit, and the parasitic capacitance of the first coil C PS1 The capacitance is equal to the parasitic capacitance C of the first coil PS2 The capacitance of the first coil is C PS1 The parasitic capacitance C of the first coil PS2 The sum of the capacitances is equal to the distributed capacitance C between the primary coil and the secondary coil PS .

[0129] 2. Root system parameters setting: the first primary compensation capacitor C P1 , the second primary compensation capacitor C P2 , the first secondary compensation capacitor C S1 and the second secondary compensation capacitor C S2 Capacitance value;

[0130] The first primary compensation capacitor C P1 With the second primary compensation capacitor C P2 The sum of the capacitances is equal to the primary compensation circuit C in the primary compensation circuit P The capacitance of the first secondary compensation capacitor C S1 With the second secondary compensation capacitor C S2 The sum of the capacitances is equal to the secondary compensation circuit C in the primary compensation circuit S Capacitance value.

[0131] Simulation verification:

[0132] In order to verify the effectiveness of this method, a WPT system with SS topology was established in Simulink. The system model consists of power supply, LISN, common mode noise calculation module, waveform display module, inverter module, compensation network and rectifier module, load and four bridge port parasitic capacitors C pA , C pB , C pC and C pD The parasitic capacitance of the two coils forms C ps1 , C ps2, by using a spectrum analyzer and an oscilloscope to measure and record the common-mode conducted interference in the frequency domain and time domain respectively. The parameters of the system model are shown in Table 1.

[0133] Table 1 System parameters

[0134]

[0135] The system simulation model of the unbalanced capacitor method, the system simulation model of the balanced capacitor method, the system simulation model of the passive cancellation method, and the system simulation model of the balanced capacitor method plus the passive cancellation method are constructed respectively.

[0136] Construct a system simulation model of the unbalanced capacitor method, which does not include the passive cancellation circuit, C p and C s No splitting is performed.

[0137] Construct a system simulation model of the balanced capacitor method, which does not include the passive cancellation circuit, C p Split into two capacitors C with the same capacitance and the sum of the capacitance equal to Cp p1 and C p2 , secondary side C s Use the same method as the original side.

[0138] Construct a system simulation model of the passive cancellation method, which includes the passive cancellation circuit, but C p and C s In order to construct the same s2 、V s4 The opposite compensation voltage is used to sample the potential changes of the leading bridge arm midpoint A and the lagging bridge arm midpoint B through the transformer, and the opposite current is generated on the equivalent resistance through the series compensation capacitor to offset the voltage caused by V s2 、V s4 The common mode conducted noise generated. C connected in series with the transformer and the bridge arm midpoint A / B b1 , C b2 It is a DC blocking capacitor, which filters out the DC component of the primary ground at point A and point B, preventing the DC component from directly loading both ends of the transformer and causing the transformer to work in a saturated state. In order not to affect the analysis of common-mode conducted interference in the equivalent circuit, the value of this capacitor should be large, and the impedance should be small enough to be regarded as a short circuit.

[0139] Construct a system simulation model of balanced capacitor method plus passive cancellation method. Figure 1 As shown, it contains a passive cancellation circuit, C p Split into two capacitors C with the same capacitance and the sum of the capacitance equal to Cp p1 and C p2 , secondary side C s Use the same method as the original side.

[0140] In order to analyze and compare the effectiveness of the balanced capacitance method and the passive cancellation method, four processing methods are obtained according to whether the combination of the balanced capacitance method and the passive cancellation method is used.

[0141] Fig.14 and Fig.15 The waveforms of the common-mode interference voltage in the time domain and frequency domain when the system is stable are given respectively using the balanced capacitor method and not using the balanced capacitor method. By comparing the time domain waveforms, it can be seen that most of the common-mode conducted interference caused by the distributed capacitance between the coils can be eliminated by using the balanced capacitor method.

[0142] Fig.16 and Fig.17 The time domain and frequency domain waveforms of the common-mode interference voltage without and with the passive cancellation circuit are given respectively. By comparing the time domain waveforms, it can be seen that a small part of the common-mode conducted interference caused by the parasitic capacitance of the bridge port to the ground can be eliminated by adding the passive cancellation circuit.

[0143] Fig.18 and Fig.19 The time domain and frequency domain waveforms of the common mode interference voltage without any processing and with the passive cancellation circuit combined with the balanced capacitor method are given respectively.

[0144] Fig. 20 and Fig.21 The time domain waveform comparison diagram of the common-mode conducted noise of the three processing methods and the frequency domain waveform comparison diagram of the common-mode conducted noise of the three processing methods are given respectively.

[0145] By comparison, it can be seen that the balanced capacitor method has a better suppression effect on the common-mode interference voltage than the passive cancellation circuit when only the balanced capacitor method is used and the passive cancellation circuit is added. This is because the resonant capacitor voltage has a larger AC voltage component than the bridge port, and the distributed capacitance between the coils is larger than the parasitic capacitance between the bridge port and the ground. Therefore, the common-mode interference voltage caused by the resonant capacitor through the distributed capacitance of the coil is larger. However, by comparing the balanced capacitor method alone with the balanced capacitor method and the passive cancellation method, the best common-mode interference suppression effect is achieved by combining the balanced capacitor with the passive cancellation circuit and the balanced capacitor method. This fully demonstrates the effectiveness and necessity of the combination of the balanced capacitor method and the passive cancellation circuit in suppressing the common-mode interference voltage of the SS topology to the WPT system.

[0146] In summary, in the wireless power transmission system, the high-frequency changes in the potential of the two bridge arms of the primary inverter and the secondary rectifier and the resonant capacitor are the sources of common-mode conduction interference. This application derives the common-mode interference model of the SS topology WPT system, analyzes the model, and proposes to use the balanced capacitor method and add a passive cancellation circuit to eliminate the common-mode conduction interference caused by the potential changes of the bridge arms and the resonant capacitor. Finally, the SS-type WPT system was built in Simulink and the common-mode conduction interference simulation results of the four schemes were compared and analyzed. The effectiveness of the system and method of this application is verified, providing a simple and effective solution for eliminating the common-mode conduction interference of the WPT system.

[0147] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the relevant field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents. Any modification or equivalent replacement that does not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A system for suppressing common-mode conducted noise of a WPT system, comprising a primary circuit and a secondary circuit, wherein the primary circuit comprises a DC power supply, an output capacitor, a full-bridge inverter circuit, a primary compensation circuit and a primary coil, and the secondary circuit comprises a secondary coil, a secondary compensation circuit, a rectifier circuit, an output capacitor and a load, characterized in that: A passive cancellation circuit is arranged between the output capacitor and the full-bridge inverter circuit.

2. A WPT system common mode conduction noise suppression system according to claim 1, characterized in that: The output end of the DC power supply and the output capacitor connected in parallel is connected to the input end of the full-bridge inverter circuit, and the passive cancellation circuit includes a first passive cancellation branch and a second passive cancellation branch; The first passive cancellation branch includes a transformer T1, and the two ends of the secondary side of the transformer T1 are respectively connected to the input end and an output end of the full-bridge inverter circuit. The second passive cancellation branch includes a transformer T2, and the two ends of the secondary side of the transformer T2 are respectively connected to the input end and another output end of the full-bridge inverter circuit.

3. A WPT system common mode conduction noise suppression system according to claim 2, characterized in that: The first passive cancellation branch also includes a DC blocking capacitor C b1 and grounding capacitor C com1 ; The DC blocking capacitor C b1 One end of the DC blocking capacitor C is connected to one end of the secondary side of the transformer T1. b1 The other end of the secondary side of the transformer T1 is connected to an output end of the full-bridge inverter circuit, and the other end of the secondary side of the transformer T1 is connected to an input end of the full-bridge inverter circuit; The grounding capacitor C com1 One end of the grounding capacitor C is connected to one end of the primary side of the transformer T1. com1 The other end of the primary side of the transformer T1 is connected to the input end of the full-bridge inverter circuit.

4. A WPT system common mode conduction noise suppression system according to claim 3, characterized in that: The second passive cancellation branch also includes a DC blocking capacitor C b2 and grounding capacitor C com2 ; The DC blocking capacitor C b2 One end of the DC blocking capacitor C is connected to one end of the secondary side of the transformer T2. b2 The other end of the transformer T2 is connected to the other output end of the full-bridge inverter circuit, and the other end of the secondary side of the transformer T2 is connected to the input end of the full-bridge inverter circuit; The grounding capacitor C com2 One end of the grounding capacitor C is connected to one end of the primary side of the transformer T2. com2 The other end of the primary side of the transformer T2 is connected to the input end of the full-bridge inverter circuit.

5. The system for suppressing common-mode conducted noise of a WPT system according to claim 1, characterized in that: The primary compensation circuit includes a first primary compensation capacitor C P1 and the second primary compensation capacitor C P2 The secondary side compensation circuit includes a first secondary side compensation capacitor C S1 and the second secondary compensation capacitor C S2 ; The first primary compensation capacitor C P1 The capacitance is equal to the second primary compensation capacitor C P2 The capacitance of the first secondary compensation capacitor C S1 The capacitance is equal to the second secondary compensation capacitor C S2 Capacitance value.

6. A WPT system common mode conduction noise suppression system according to claim 5, characterized in that: The first primary compensation capacitor C P1 The two ends of are respectively connected to an output end of the full-bridge inverter circuit and one end of the primary coil, and the second primary compensation capacitor C P2 The two ends are respectively connected to the other output end of the full-bridge inverter circuit and the other end of the primary coil; The first secondary compensation capacitor C S1 The two ends of are respectively connected to an input end of the rectifier circuit and one end of the secondary coil, and the second secondary compensation capacitor C S2 The two ends are respectively connected to the other input end of the rectifier circuit and the other end of the secondary coil.

7. The system for suppressing common-mode conducted noise of a WPT system according to claim 1, characterized in that: The DC power supply is connected in parallel with the output capacitor, and a linear impedance network LISN is provided between the DC power supply and the output capacitor. The linear impedance network LISN includes an impedance inductor L Z1 and L Z2 , and the impedance capacitance C Z1 , C Z2 , C Z3 and C Z4 , and the impedance resistor R L and R N ; The impedance inductance L Z1 and impedance capacitance C Z1 One end of each is connected to one end of the DC power supply, and the impedance inductor L Z2 and impedance capacitance C Z2 One end of each is connected to the other end of the DC power supply, and the impedance capacitor C Z3 One end of the impedance resistor R L One end of the impedance capacitor C Z4 One end of the impedance resistor R N One end of the impedance inductor L is connected Z1 and impedance capacitance C Z3 The other end is connected to one end of the output capacitor, the impedance inductor L Z2 and impedance capacitance C Z4 The other end of is connected to the other end of the output capacitor; The impedance capacitance C Z1 , Impedance and Capacitance C Z2 , Impedance resistor R L and impedance resistor R N The other end is connected to the ground terminal PE.

8. A method for suppressing common-mode conducted noise of a WPT system, using a system for suppressing common-mode conducted noise of a WPT system according to any one of claims 1 to 7, wherein the specific method is: Set the grounding capacitance C according to the system parameters com1 The capacitance is equal to the primary parasitic capacitance C PA The parasitic capacitance C of the first coil PS1 The sum of the capacitance values ​​of com2 The capacitance is equal to the primary parasitic capacitance C PB The parasitic capacitance C of the first coil PS2 The sum of the capacitance values; in: Parasitic capacitance C PA is the parasitic capacitance of the bridge port at one output end of the full-bridge inverter circuit, and the primary parasitic capacitance C PB is the parasitic capacitance of the bridge port at the other output end of the full-bridge inverter circuit, and the parasitic capacitance of the first coil C PS1 The capacitance is equal to the parasitic capacitance C of the first coil PS2 The capacitance of the first coil is C PS1 The parasitic capacitance C of the first coil PS2 The sum of the capacitances is equal to the distributed capacitance C between the primary coil and the secondary coil PS .

9. A method for suppressing common-mode conducted noise of a WPT system according to claim 8, characterized in that: The root system parameter sets the first primary compensation capacitor C P1 , the second primary compensation capacitor C P2 , the first secondary compensation capacitor C S1 and the second secondary compensation capacitor C S2 Capacitance value; The first primary compensation capacitor C P1 With the second primary compensation capacitor C P2 The sum of the capacitances is equal to the primary compensation circuit C in the primary compensation circuit P The capacitance of the first secondary compensation capacitor C S1 With the second secondary compensation capacitor C S2 The sum of the capacitances is equal to the secondary compensation circuit C in the primary compensation circuit S Capacitance value.

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