Preparation method of silicon-on-insulator structure

Abstract

The invention relates to a preparation method of a silicon-on-insulator structure, which comprises the following steps of: (1) providing two substrates, namely a first substrate and a second substrate; (2) performing electrochemical corrosion on the first substrate, changing process parameters, and forming a double-layer porous silicon structure consisting of a first porous silicon layer and a second porous silicon layer; (3) performing high-temperature heat treatment on the first substrate; (4) extending a transition layer on the first porous silicon layer; (5) extending a device layer on the transition layer; (6) performing thermal oxidation on the device layer to form a buried oxide layer; (7) bonding the first substrate and the second substrate, and separating to form a silicon-on-insulator substrate and a monocrystalline silicon substrate; and (8) removing the double-layer porous silicon structure from the silicon-on-insulator substrate by using a first corrosive agent, and removing the transition layer by using a second corrosive agent to form the silicon-on-insulator structure. According to the preparation method of the silicon-on-insulator structure, the effect similar to that of ion implantation can be achieved when the porous silicon layer is stripped.

Description

Technical Field

[0001] The invention belongs to the field of semiconductors, and in particular relates to a method for preparing a silicon-on-insulator structure. Background Art

[0002] The SOI (Silicon-On-Insulator) structure introduces a buried oxide layer (BOX) between the top silicon and the back substrate, which makes it have the advantages of small parasitic capacitance, high integration density, fast speed, simple process, and small short channel effect. It is currently widely used in large-scale integrated circuits, MEMS micro-electromechanical systems and other fields. The existing SOI processes include: oxygen injection isolation (SIMOX) technology, back side thinning (BESOI) technology, and smart stripping (Smart-cut) technology that achieves top silicon layer transfer through ion implantation plus high-temperature stripping technology. However, the high-temperature stripping method is limited by the depth of hydrogen injection when preparing some customized SOI layer sizes, resulting in some SOI wafers with different thickness sizes being difficult to prepare.

[0003] At the beginning of the 21st century, the technology of epitaxially growing single crystal silicon on a porous silicon layer and performing bonding and peeling was proposed. Peeling at the porous silicon layer can achieve an effect similar to ion implantation, and selective etching can protect the top silicon layer while removing the porous silicon layer.

[0004] Prior art CN1272684A discloses a substrate and a method for manufacturing the same, wherein a first substrate having a porous layer is bonded to a second substrate to prepare a bonded substrate stack, and the bonded substrate stack is separated into two substrates at the porous layer, thereby preventing defects in the separation step. However, the selective etching ratio between porous silicon and single crystal silicon can only reach 10:1, and it cannot be guaranteed that the top silicon will not be damaged during the etching process. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a method for preparing silicon on insulator, so that stripping at the porous silicon layer can achieve an effect similar to ion implantation, and the top silicon layer can be protected while removing the porous silicon layer through selective etching.

[0006] The present invention provides a method for preparing a silicon-on-insulator structure, comprising the following steps:

[0007] (1) providing two substrates, namely a first substrate and a second substrate;

[0008] (2) electrochemically etching the first substrate and changing process parameters to form a double-layer porous silicon structure consisting of a first porous silicon layer and a second porous silicon layer;

[0009] (3) performing high temperature heat treatment on the first substrate;

[0010] (4) epitaxially growing a transition layer on the first porous silicon layer;

[0011] (5) epitaxially growing a device layer on the transition layer;

[0012] (6) performing thermal oxidation on the device layer to form a buried oxide layer;

[0013] (7) bonding the first substrate to the second substrate, and separating them to form a silicon-on-insulator substrate and a single crystal silicon substrate;

[0014] (8) Using a first etchant to remove the double-layer porous silicon structure from the silicon-on-insulator substrate, and using a second etchant to remove the transition layer, thereby forming a silicon-on-insulator structure.

[0015] Preferably, the first substrate in step (1) is a single crystal silicon substrate; and the second substrate is a silicon, sapphire, SiC, GaN or GaO substrate.

[0016] More preferably, the first substrate and the second substrate in step (1) are both single crystal silicon substrates.

[0017] Preferably, the electrolyte solution used for the electrochemical corrosion in step (2) is a mixed solution of hydrofluoric acid and an alcohol organic agent; the process parameters are that the current density when forming the first porous silicon layer is 5-20 mA / cm 2 The oxidation time is 10-30min; the current density when forming the second porous silicon layer is 30-70mA / cm 2 , oxidation time is 10-60min.

[0018] More preferably, the electrolyte solution in step (2) is a mixed solution of 49 wt % hydrofluoric acid solution and anhydrous ethanol, with a volume ratio of 1:1.

[0019] Preferably, in the step (2), the porosity of the first porous silicon layer is less than 30%, and the porosity of the second porous silicon layer is greater than 50%.

[0020] More preferably, the porosity of the first porous silicon layer in step (2) is less than 20%, and the porosity of the second porous silicon layer is greater than 70%.

[0021] Preferably, the heat treatment temperature in step (3) is 1000-1200° C., and the atmosphere is pure H 2 or pure Ar.

[0022] Preferably, the transition layer in step (4) is a heavily doped P-type silicon or silicon germanium layer.

[0023] Preferably, the epitaxial temperature in step (4) is 600-800°C, and the precursor gases are DCS and GeH4.

[0024] Preferably, the epitaxial temperature in step (5) is 1050-1100°C, and the precursor gas is DCS and H2 or TCS and H2; the thermal oxidation temperature in step (6) is 900-1000°C, and the atmosphere is O2 or a mixed gas of O2 and H2.

[0025] Furthermore, the separation method in step (7) is water jet method, external mechanical force or ultrasound.

[0026] Preferably, the first etchant in step (8) is a hydrofluoric acid aqueous solution, a mixed solution of hydrofluoric acid and an alcohol organic agent, a mixed solution of hydrofluoric acid and hydrogen peroxide, or a mixed solution of hydrofluoric acid, nitric acid, and acetic acid; the second etchant is a mixed solution of hydrofluoric acid, nitric acid, and acetic acid, or a mixed solution of hydrofluoric acid, hydrogen peroxide, and acetic acid.

[0027] More preferably, the first etchant in step (8) is a mixed solution of 49 wt % hydrofluoric acid, 30 wt % hydrogen peroxide and water, and the second etchant is a mixed solution of 49 wt % hydrofluoric acid, nitric acid and acetic acid.

[0028] The present invention also provides a silicon-on-insulator structure, which is prepared according to the above-mentioned preparation method. The silicon-on-insulator structure includes a substrate, a buried oxide layer and a device layer. It is formed by arranging a porous silicon layer, a transition layer, a device layer and a buried oxide layer on a substrate, bonding them to another substrate and separating them at the porous silicon layer, and etching.

[0029] Beneficial Effects

[0030] The method for preparing the silicon-on-insulator structure of the present invention can achieve an effect similar to ion implantation when stripping is performed at the porous silicon layer, and can protect the top silicon layer while removing the porous silicon layer through selective etching. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 Schematic diagram of a double-layer porous silicon structure formed by anodization.

[0032] Figure 2 Schematic diagram of epitaxial formation of transition layer.

[0033] Figure 3 Schematic diagram of epitaxial formation of device layers.

[0034] Figure 4 Schematic diagram of the formation of a buried oxide layer by thermal oxidation.

[0035] Figure 5 Schematic diagram of bonding the first substrate and the second substrate.

[0036] Figure 6 Schematic diagram of bonded substrate separation.

[0037] Figure 7 Schematic diagram of the silicon-on-insulator structure after etching. DETAILED DESCRIPTION

[0038] The present invention will be further described below in conjunction with specific embodiments. It should be understood that these embodiments are only used to illustrate the present invention and are not intended to limit the scope of the present invention. In addition, it should be understood that after reading the content taught by the present invention, those skilled in the art can make various changes or modifications to the present invention, and these equivalent forms fall within the scope limited by the appended claims of the application equally.

[0039] The present invention prepares a silicon-on-insulator structure according to the following method:

[0040] Provide two substrates, namely a first substrate W1 and a second substrate W2;

[0041] The first substrate W1 is electrochemically etched to form a first porous silicon layer S1 with low porosity; the process parameters are changed to form a second porous silicon layer S2 with high porosity, such as Figure 1 As shown;

[0042] Will Figure 1 The first substrate W1 is subjected to high temperature heat treatment to form a non-porous structure on the surface for epitaxy of a single crystal silicon layer;

[0043] The transition layer S3 is epitaxially grown on the first porous silicon layer S1, such as Figure 2 As shown;

[0044] The device layer S4 is epitaxially grown on the transition layer S3, such as Figure 3 As shown;

[0045] Thermal oxidation is performed on the device layer S4 to form a buried oxide layer S5, such as Figure 4 As shown;

[0046] The first substrate W1 is bonded to the second substrate W2, as shown in FIG. Figure 5 As shown; the bonded substrate is separated to form a silicon-on-insulator substrate W3 and a single crystal silicon substrate W4, as shown Figure 6 As shown;

[0047] The separated silicon-on-insulator substrate W3 is subjected to a first etchant to remove the first porous silicon layer S1 and the second porous silicon layer S2; the transition layer S3 is removed by a second etchant, and finally a silicon-on-insulator structure is formed, such as Figure 7 shown.

[0048] Example

[0049] In this embodiment, a silicon-on-insulator structure is obtained according to the following preparation method:

[0050] Two substrates are provided, namely a first substrate W1 and a second substrate W2, and both substrates are single crystal silicon substrates.

[0051] like Figure 1 As shown, the surface of the first substrate W1 is anodized to form a first porous silicon layer S1 with low porosity. The electrolyte solution is a mixed solution of 49wt% hydrofluoric acid solution and anhydrous ethanol, with a volume ratio of 1:1 and a current density of 5mA / cm 2 , the oxidation time is 20min; continue to anodic oxidation to form a second porous silicon layer S2 with high porosity, at this time the current density is 50mA / cm 2 , oxidation time is 20min;

[0052] The first substrate W1 with a double-layer porous silicon structure is subjected to high-temperature heat treatment at a temperature of 1100° C. in a pure Ar atmosphere;

[0053] like Figure 2 As shown, a silicon germanium transition layer S3 is formed on the first porous silicon layer S1 by reduced pressure epitaxy, wherein the epitaxy temperature is 800° C., and the precursor gases are DCS and GeH4;

[0054] like Figure 3 As shown, a device layer S4 is grown on the silicon germanium transition layer S3 by normal pressure epitaxy, wherein the epitaxy temperature is 1100° C. and the precursor gases are DCS and H2;

[0055] like Figure 4 As shown, thermal oxidation is performed on the device layer S4 to form a buried oxide layer S5, the oxidation temperature is 1000° C., and the atmosphere is O2;

[0056] like Figure 5 As shown, the first substrate W1 is bonded to the second substrate W2; Figure 6 As shown, the bonded substrate is separated to form a silicon-on-insulator substrate W3 and a single crystal silicon substrate W4, and the separation method is a water jet method;

[0057] The separated silicon-on-insulator substrate W3 is treated with a first etchant to remove the first porous silicon layer S1 and the second porous silicon layer S2. The first etchant is a mixed solution of 49 wt% hydrofluoric acid, 30 wt% hydrogen peroxide and water. The silicon-germanium transition layer S3 is removed with a second etchant. The second etchant is a mixed solution of 49 wt% hydrofluoric acid, nitric acid and acetic acid. Finally, a Figure 7 The silicon-on-insulator structure shown.

Claims

1. A method for preparing a silicon-on-insulator structure, comprising the following steps: (1) providing two substrates, namely a first substrate and a second substrate; (2) electrochemically etching the first substrate and changing process parameters to form a double-layer porous silicon structure consisting of a first porous silicon layer and a second porous silicon layer; (3) performing high temperature heat treatment on the first substrate; (4) epitaxially growing a transition layer on the first porous silicon layer; (5) epitaxially growing a device layer on the transition layer; (6) performing thermal oxidation on the device layer to form a buried oxide layer; (7) bonding the first substrate to the second substrate, and separating them to form a silicon-on-insulator substrate and a single crystal silicon substrate; (8) Using a first etchant to remove the double-layer porous silicon structure from the silicon-on-insulator substrate, and using a second etchant to remove the transition layer, thereby forming a silicon-on-insulator structure.

2. The preparation method according to claim 1, characterized in that: The first substrate in step (1) is a single crystal silicon substrate; the second substrate is a silicon, sapphire, SiC, GaN or GaO substrate.

3. The preparation method according to claim 1, characterized in that: The electrolyte solution used for the electrochemical etching in step (2) is a mixed solution of hydrofluoric acid and an alcohol organic agent. The process parameters are as follows: when forming the first porous silicon layer, the current density is 5-20 mA / cm 2 The oxidation time is 10-30min; the current density when forming the second porous silicon layer is 30-70mA / cm 2 , oxidation time is 10-60min.

4. The preparation method according to claim 1, characterized in that: In the step (2), the porosity of the first porous silicon layer is less than 30%, and the porosity of the second porous silicon layer is greater than 50%.

5. The preparation method according to claim 1, characterized in that: The heat treatment temperature in step (3) is 1000-1200° C., and the atmosphere is pure H 2 or pure Ar.

6. The preparation method according to claim 1, characterized in that: The transition layer in step (4) is a heavily doped P-type silicon or silicon germanium layer.

7. The preparation method according to claim 1, characterized in that: The epitaxial growth temperature in step (5) is 1050-1100° C., and the precursor gas is DCS and H2 or TCS and H2; the thermal oxidation temperature in step (6) is 900-1000° C., and the atmosphere is O2 or a mixed gas of O2 and H2.

8. The preparation method according to claim 1, characterized in that: The separation method in step (7) is water jet method, external mechanical force or ultrasound.

9. The preparation method according to claim 1, characterized in that: The first etchant in step (8) is a hydrofluoric acid aqueous solution, a mixed solution of hydrofluoric acid and an alcohol organic agent, a mixed solution of hydrofluoric acid and hydrogen peroxide, or a mixed solution of hydrofluoric acid, nitric acid, and acetic acid; the second etchant is a mixed solution of hydrofluoric acid, nitric acid, and acetic acid, or a mixed solution of hydrofluoric acid, hydrogen peroxide, and acetic acid.

10. A silicon-on-insulator structure, characterized in that: The silicon-on-insulator structure is prepared according to the preparation method described in any one of claims 1 to 9, wherein the silicon-on-insulator structure includes a substrate, a buried oxide layer and a device layer, and is formed by arranging a porous silicon layer, a transition layer, a device layer and a buried oxide layer on a substrate, bonding them to another substrate and separating them at the porous silicon layer, and etching.

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