Manufacturing method of multi-junction solar cell and multi-junction solar cell structure

Abstract

The invention discloses a manufacturing method of a multi-junction solar cell and a multi-junction solar cell structure, and the manufacturing method comprises the steps: preparing a multi-junction solar cell epitaxial wafer which is provided with a front side and a back side which are opposite to each other; forming a back electrode on the back side of the epitaxial wafer; forming a second substrate on the back electrode; forming a positive electrode on the front side of the epitaxial wafer; performing chip isolation on the epitaxial wafer in an etching mode; and carrying out wet passivation on the epitaxial wafer after chip isolation, and repairing the etching damage of the epitaxial wafer caused by aggravation of transverse corrosion of the etching liquid due to lattice mismatch stress. According to the manufacturing method of the multi-junction solar cell and the multi-junction solar cell structure, side wall damage caused by aggravation of transverse corrosion of etching liquid to the side wall of the cell due to large lattice mismatch stress can be passivated, and the performance of a device is remarkably improved.

Description

Technical Field

[0001] The invention belongs to the technical field of solar cell manufacturing, and in particular relates to a manufacturing method of a multi-junction solar cell with large lattice mismatch stress and a multi-junction solar cell structure. Background Art

[0002] Chip isolation of GaAs solar cells is a key step in the manufacturing process, which enables independent operation of battery cells. Today, there are two main methods for low-cost chip isolation: mechanical scribing and wet etching. The mechanical stress generated during mechanical scribing may introduce microcracks and defects on the surface and edges of the battery, which may become unfavorable charge recombination centers and affect the performance of the battery.

[0003] Nowadays, as the demand for high efficiency and low loss in solar cells becomes increasingly strong, their structure is developing towards multi-junctions that broaden the absorption range and subdivide the spectrum. However, solar cells with more junctions mean thicker epitaxial layers and more complex structures. At the same time, there will be greater lattice mismatch stress in the epitaxial wafer. For samples with lattice mismatch stress, the existing lattice mismatch stress will be aggravated due to mechanical stress during the slicing process, thereby introducing new defects in the material.

[0004] Wet etching is a chemical process that does not involve physical contact, so it does not introduce additional mechanical stress or microcracks, which is particularly important in materials with lattice mismatch stress. Therefore, in the actual manufacturing process, wet etching is often used to complete the chip isolation of solar cells.

[0005] However, the large lattice mismatch stress in the sample epitaxial wafer itself may cause slight distortions in the material structure, thereby increasing the chemical reaction activity in certain areas. In addition, large lattice mismatch stress may also change the energy state of the material surface, resulting in increased surface activity, which is unavoidable in the process of manufacturing, and can only be used for chip isolation by wet etching, which has a smaller impact on it. However, large lattice mismatch stress will still aggravate the lateral etching of the side walls of the solar cell by the non-selective etching solution, causing damage to the side walls of the cell, resulting in defects and irregular areas, thereby causing cross-coupling effects between the junction cells, resulting in large electrical losses. Moreover, GaAs exposed to the environment is easily oxidized to form highly complex oxides, increasing the surface state density and defects. The complex structure and interface of multi-junction cells mean that there may be more recombination centers and defects at the side walls, which will increase the probability of carrier recombination during transmission and aggravate non-radiative recombination.

[0006] Therefore, how to passivate the sidewalls of GaAs multi-junction solar cells after chip isolation to reduce non-radiative recombination and leakage losses of photogenerated carriers at the sidewalls is a technical problem that needs to be solved.

[0007] The information disclosed in this background technology section is only intended to enhance the understanding of the overall background of the invention and should not be regarded as an acknowledgment or any form of suggestion that the information constitutes the prior art already known to a person skilled in the art. Summary of the invention

[0008] The object of the present invention is to provide a method for manufacturing a multi-junction solar cell and a multi-junction solar cell structure, which can passivate the side wall damage caused by the intensified lateral corrosion of the cell side wall by the etching solution caused by the large lattice mismatch stress, increase the parallel resistance of the device, reduce the side wall leakage and the non-radiative recombination loss of photogenerated carriers, improve the fill factor and photoelectric conversion efficiency of the device, and significantly improve the performance of the device.

[0009] In order to achieve the above object, a technical solution provided by a specific embodiment of the present invention is as follows:

[0010] A method for manufacturing a multi-junction solar cell, comprising:

[0011] Prepare a multi-junction solar cell epitaxial wafer, the epitaxial wafer having a front side and a back side arranged oppositely;

[0012] forming a back electrode on the back side of the epitaxial wafer;

[0013] forming a second substrate on the back electrode;

[0014] forming a positive electrode on the front side of the epitaxial wafer;

[0015] Using etching to isolate the epitaxial wafer;

[0016] The epitaxial wafer after chip isolation is wet passivated to repair the etching damage of the epitaxial wafer caused by the etching solution aggravating the lateral corrosion of the epitaxial wafer due to the lattice mismatch stress.

[0017] In one or more embodiments of the present invention, the epitaxial wafer is isolated by etching, including:

[0018] The epitaxial wafer is isolated by wet etching.

[0019] In one or more embodiments of the present invention, wet passivation is performed on the epitaxial wafer after chip isolation, including:

[0020] A mixed solution of citric acid, hydrogen peroxide and water is used to wet-passivate the epitaxial wafer after chip isolation.

[0021] In one or more embodiments of the present invention, the ratio of citric acid, hydrogen peroxide and water is: (1:1:10)-(4:5:10);

[0022] The temperature of the wet passivation is 20-50°C;

[0023] The wet passivation time is less than or equal to 1 minute.

[0024] In one or more embodiments of the present invention, preparing a multi-junction solar cell epitaxial wafer includes:

[0025] providing a first substrate;

[0026] forming a barrier layer, a front contact layer, a window layer, a plurality of sub-cell epitaxial structures and a back contact layer in sequence on the surface of the first substrate;

[0027] The side where the first substrate is located is the front side of the epitaxial wafer, and the side where the back contact layer is located is the back side of the epitaxial wafer.

[0028] In one or more embodiments of the present invention, before the step of forming a positive electrode on the front side of the epitaxial wafer, the method further comprises:

[0029] forming a third substrate on the second substrate and removing the first substrate and the barrier layer;

[0030] The second substrate is a flexible substrate, and the third substrate is a rigid substrate.

[0031] In one or more embodiments of the present invention, before or after the step of wet passivating the epitaxial wafer after chip isolation, the step further includes:

[0032] The second substrate is cut and the third substrate is removed to form a single multi-junction solar cell structure.

[0033] In one or more embodiments of the present invention, after the step of forming a positive electrode on the front side of the epitaxial wafer, the step further includes forming a window on the front contact layer to expose a portion of the window layer.

[0034] In one or more embodiments of the present invention, after the step of wet passivating the epitaxial wafer after chip isolation, the method further includes the step of forming an anti-reflection layer in the window.

[0035] In one or more embodiments of the present invention, the doping concentration of the front contact layer is greater than 5e18cm -3 and / or,

[0036] The material of the back electrode includes one or more of Ti, Pt, Pd, Au, and Zn; and / or,

[0037] The material of the first substrate includes GaAs and Ge;

[0038] The material of the second substrate includes one of copper, PI, and PET; and / or,

[0039] The material of the third substrate includes one of GaAs, Si, SiC, and glass; and / or,

[0040] The material of the anti-reflection layer includes one or more of SiO2, Ti2O3, MgF2, ZnS, and Al2O3.

[0041] A multi-junction solar cell structure is manufactured by the above-mentioned method for manufacturing a multi-junction solar cell. The multi-junction solar cell structure comprises:

[0042] A second substrate having a first surface;

[0043] a back electrode formed on the first surface;

[0044] a back contact layer formed on a surface of the back electrode facing away from the second substrate;

[0045] A plurality of subcell epitaxial structures are formed on a surface of the back contact layer facing away from the back electrode;

[0046] A window layer is formed on a surface of the subcell epitaxial structure away from the back contact layer;

[0047] a front contact layer, formed on the surface of the window layer away from the sub-cell epitaxial structure, the front contact layer being provided with a window, and an anti-reflection layer being provided in the window; and

[0048] A positive electrode is formed on a surface of the front contact layer facing away from the window layer.

[0049] Compared with the prior art, the manufacturing method and structure of the multi-junction solar cell of the present invention are aimed at GaAs multi-junction solar cells with large lattice mismatch stress. After the chip isolation is completed by wet etching, a mixed solution composed of citric acid, hydrogen peroxide and water is used to passivate the side wall damage caused by the etching solution caused by the large lattice mismatch stress, which intensifies the lateral corrosion of the cell side wall. This passivation method is non-toxic and harmless, has a simple process, and is low in cost. It can quickly passivate and repair the side wall damage of the multi-junction solar cell, increase the parallel resistance of the device, reduce the side wall leakage and the non-radiative recombination loss of photogenerated carriers, improve the fill factor and photoelectric conversion efficiency of the device, and significantly improve the performance of the device.

[0050] The multi-junction solar cell manufacturing method and multi-junction solar cell structure of the present invention can better maintain the integrity of samples with large lattice mismatch stress by using wet etching combined with passivation treatment, and reduce the negative impact of defects and surface states on cell performance.

[0051] The multi-junction solar cell manufacturing method and multi-junction solar cell structure of the present invention not only reduce production costs, but also simplify the process route, ensure human health and environmental safety, quickly passivate and repair side wall damage of the multi-junction solar cell, reduce the electrical loss of the device, and realize safe and efficient flexible multi-junction solar cell manufacturing. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0053] Figure 1 is a flow chart of a method for manufacturing a multi-junction solar cell in one embodiment of the present invention;

[0054] Figure 2a-2k A process diagram of a method for manufacturing a multi-junction solar cell according to an embodiment of the present invention;

[0055] Figure 3 FIG. 4 is a cross-sectional view of a multi-junction solar cell structure according to an embodiment of the present invention. DETAILED DESCRIPTION

[0056] In order to enable those skilled in the art to better understand the technical solutions in the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0057] Terminology explanation:

[0058] Lattice mismatch stress: refers to the mechanical stress caused by the mismatch of lattice constants between adjacent material layers during heteroepitaxial growth.

[0059] Passivation: A surface treatment technology that uses various atoms in the passivation film to combine with dangling bonds on the semiconductor surface to saturate the defect energy levels introduced by the dangling bonds, thereby reducing the activity of the surface and inhibiting the non-radiative recombination of carriers, thereby improving the chemical stability, corrosion resistance and electrical properties of the device.

[0060] As mentioned in the background technology, the mechanical stress generated during the mechanical scribing process may introduce microcracks and defects on the surface and edge of the epitaxial wafer, and these defects may become unfavorable charge recombination centers. Solar cells with more junctions mean thicker epitaxial layers and more complex structures. At the same time, there will be greater lattice mismatch stress in the epitaxial layer. For multi-junction solar cells, which have large lattice mismatch stress, mechanical scribing is used for chip isolation. During the scribing process, the existing lattice mismatch stress will be aggravated due to mechanical stress, thereby introducing new defects in the material, causing greater damage to the battery and making passivation repair more difficult.

[0061] Wet etching is a chemical process that does not involve physical contact, so it does not introduce additional mechanical stress or microcracks, which is particularly important in materials with lattice mismatch stress. However, for multi-junction solar cells, the larger lattice mismatch stress will still aggravate the lateral etching of the solar cell sidewalls by the non-selective etching solution, causing damage to the cell sidewalls, defects and irregular areas, thereby causing cross-coupling effects between the junction cells and resulting in greater electrical losses.

[0062] Therefore, a solution has emerged to passivate the sidewalls of multi-junction solar cells after chip isolation to reduce non-radiative recombination and leakage losses of photogenerated carriers at the sidewalls.

[0063] There are currently two main passivation methods: one is physical passivation: by forming a physical barrier on the surface of the material to isolate the surface and the environment, reducing the recombination of surface states with carriers; the other is chemical passivation: mainly through chemical reactions to change the chemical properties of the material surface state, thereby reducing the surface state density and surface recombination rate.

[0064] However, both of the above passivation methods have defects. For physical passivation, complex deposition equipment and strict process control are required, which will increase manufacturing costs and process complexity. For other chemical passivation, some chemical reagents have certain toxicity, which seriously endangers human health and environmental safety. Appropriate safety measures must be taken when using and handling chemicals, which increases operational complexity and cost.

[0065] In order to solve the above problems, the present invention provides a method for manufacturing a multi-junction solar cell, which uses wet etching to complete the chip isolation step, and then uses a mixed solution composed of citric acid, hydrogen peroxide, and water to passivate the sidewall damage caused by the etching solution caused by the large lattice mismatch stress, which intensifies the lateral corrosion of the cell sidewall. The method for manufacturing a multi-junction solar cell of the present invention, due to the use of wet passivation, does not use mechanical scribing and then cause microcracks and other damage to the solar cell epitaxial layer during the scribing process. At the same time, the method for manufacturing a multi-junction solar cell of the present invention can quickly passivate and repair the sidewall damage of the multi-junction solar cell, increase the parallel resistance of the device, reduce the sidewall leakage and the non-radiative recombination loss of photogenerated carriers, improve the fill factor and photoelectric conversion efficiency of the device, and significantly improve the performance of the device.

[0066] The present invention provides a method for manufacturing a multi-junction solar cell. Wet etching combined with passivation treatment can better maintain the integrity of a cell epitaxial wafer that has a large lattice mismatch stress, and reduce the negative impact of defects and surface states on cell performance.

[0067] like Figure 1 As shown, a method for manufacturing a multi-junction solar cell in one embodiment of the present invention comprises the following steps:

[0068] S1, preparing a multi-junction solar cell epitaxial wafer, wherein the epitaxial wafer has a front side and a back side that are arranged oppositely.

[0069] Among them, preparing a multi-junction solar cell epitaxial wafer includes:

[0070] providing a first substrate;

[0071] A barrier layer, a front contact layer, a window layer, a plurality of subcell epitaxial structures and a back contact layer are sequentially formed on the surface of the first substrate. The side where the first substrate is located is the front side of the epitaxial wafer, and the side where the back contact layer is located is the back side of the epitaxial wafer.

[0072] The first substrate is preferably a GaAs substrate or a Ge substrate. The front contact layer is preferably a GaAs layer, and the doping concentration of the front contact layer is greater than 5e18cm -3 The back contact layer is preferably a (In)GaAs layer. The front contact layer and the back contact layer have opposite doping types.

[0073] In the multiple sub-cell epitaxial structure, each sub-cell can include a stacked front sub-contact layer, a back sub-contact layer and a sub-window layer, and adjacent sub-cells can be connected by tunnel junctions. A buffer layer can also be set between adjacent sub-cells to release part of the lattice mismatch stress. Since the multiple sub-cell epitaxial structure is not the innovative point of this application, this application will not be described in detail here.

[0074] S2, forming a back electrode on the back side of the epitaxial wafer.

[0075] Specifically, a back electrode is formed on a surface of the back contact layer away from the plurality of sub-cell epitaxial structures. The material of the back electrode includes one or more of Ti, Pt, Pd, Au, and Zn.

[0076] S3, forming a second substrate on the back electrode.

[0077] Specifically, a second substrate is formed on the surface of the back electrode away from the back contact layer. The second substrate is a flexible substrate or a rigid substrate. The second substrate is preferably a flexible substrate, and the material includes one of flexible materials such as copper, PI, and PET.

[0078] S4, forming a third substrate on the second substrate.

[0079] Specifically, a third substrate is bonded on the surface of the second substrate away from the back electrode by bonding technology. The third substrate is a rigid substrate. The material of the third substrate includes one or more rigid materials such as GaAs, Si, SiC, glass, etc.

[0080] S5, removing the first substrate and the barrier layer, and forming a positive electrode on the front side of the epitaxial wafer.

[0081] The first substrate and the barrier layer are removed by dry and / or wet etching, a positive electrode is prepared on the front contact layer using photolithography technology and evaporation equipment, and low-temperature annealing technology is used to achieve ohmic contact of the positive electrode.

[0082] S6, forming a window on the front contact layer to expose a portion of the window layer, and forming an anti-reflection layer in the window.

[0083] The redundant front contact layer is removed by dry and / or wet etching to form a window, so that the window layer is exposed.

[0084] S7, using etching to isolate the epitaxial wafer, wet passivating the epitaxial wafer after chip isolation, and repairing the etching damage caused by the etching solution that intensifies the lateral corrosion of the epitaxial wafer due to lattice mismatch stress.

[0085] The epitaxial wafer is isolated by wet etching. The epitaxial wafer after chip isolation is wet passivated by a mixed solution of citric acid, hydrogen peroxide and water. The ratio of citric acid, hydrogen peroxide and water is: (1:1:10)-(4:5:10); the temperature of wet passivation is 20-50°C; the time of wet passivation is less than or equal to 1 minute.

[0086] S8, forming an anti-reflection layer in contact with the window layer.

[0087] After the wet passivation step is completed, an anti-reflection layer is formed in the window of the front contact layer to contact the window layer. The material of the anti-reflection layer includes one or more of SiO2, Ti2O3, MgF2, ZnS, and Al2O3.

[0088] Before or after the step of wet passivating the epitaxial wafer after chip isolation, the method further includes: cutting the second substrate, removing the third substrate, and forming a single multi-junction solar cell structure.

[0089] The second substrate may be cut by one or more of blade cutting and laser cutting. The third substrate may be removed by one or more of mechanical separation, solvent dissolution, laser lift-off, and chemical etching.

[0090] In the solution of the present invention, the wet passivation process can be completed after the chip is isolated, or after the second substrate is cut, and of course it can also be implemented after the entire multi-junction solar cell is manufactured. The wet passivation repair can not only passivate the sidewall damage caused by the increased lateral corrosion introduced by the lattice mismatch stress during the chip isolation process, but also repair the unpassivated surface caused by the cracking of the epitaxial wafer due to excessive cell stress.

[0091] For multi-junction solar cells that have large lattice mismatch stress, wet etching is used to complete chip isolation. The entire process does not involve physical contact, so no additional mechanical stress or microcracks are introduced, which is very important for multi-junction solar cells with lattice mismatch stress. Compared with mechanical scribing, wet etching can usually achieve a smoother surface without the need for additional processing. After wet etching completes chip isolation, a mixed solution of citric acid, hydrogen peroxide, and water is used for passivation to achieve a good passivation effect.

[0092] In general, for multi-junction solar cells that have large lattice mismatch stress, the use of wet etching combined with wet passivation treatment to complete the chip isolation process can better maintain the integrity of the material and reduce the negative impact of defects and surface states on cell performance.

[0093] The passivation solution in the present invention is a mixed solution of citric acid, hydrogen peroxide and water, which is an environmentally friendly chemical and has no harm to human health and environmental safety. The side wall damage of the solar cell repaired by wet passivation is caused by the lattice mismatch stress existing in the cell epitaxial wafer itself, which causes the lateral corrosion of the etching solution to intensify, and the epitaxial wafer of the solar cell is cracked and damaged due to the lattice mismatch stress. When using this chemical for passivation treatment, the process is simple and safe, and it can quickly passivate and repair the side wall damage of multi-junction solar cells, reduce the electrical loss of the device, and significantly improve the fill factor and photoelectric conversion efficiency of the solar cell. The passivation effect is excellent, and the cost is low, and no special equipment is required.

[0094] The following describes in detail the method for manufacturing the multi-junction solar cell of the present invention through a specific embodiment.

[0095] Embodiment 1:

[0096] refer to Figure 2a As shown, a multi-junction GaAs solar cell epitaxial wafer is provided.

[0097] The GaAs solar cell epitaxial wafer includes a growth substrate 10, a barrier layer 20, a front contact layer 30, a window layer 40, a plurality of subcell epitaxial structures 50 and a back contact layer 60. The growth substrate 10 can be a GaAs substrate or a Ge substrate. The front contact layer 30 is an N-type GaAs contact layer with a doping concentration of 5e18cm -3 The back contact layer 60 is a P-type (In)GaAs layer.

[0098] refer to Figure 2b As shown, a back electrode 70 is formed on the back contact layer 60 of the solar cell epitaxial wafer.

[0099] The back electrode material is composed of various materials such as Ti, Pt, Pd, Au, and Zn.

[0100] refer to Figure 2c As shown, a flexible material is formed on the back electrode 70 to serve as a flexible substrate 80 .

[0101] Preferably, the flexible substrate 80 can be selected from a variety of flexible materials with bendability such as thin Cu, PI, PET, etc., and the thickness of the flexible substrate 80 is 20um to 50um.

[0102] refer to Figure 2d As shown, a rigid support substrate 90 is formed on the flexible substrate 80 .

[0103] Preferably, the forming means is bonding by a bonding machine or a laminator using bonding glue, etc. The rigid support substrate 90 includes a rigid substrate such as GaAs, Si, SiC and glass.

[0104] refer to Figure 2e As shown, the growth substrate 10 and the barrier layer 20 of the GaAs solar cell are removed by etching.

[0105] Preferred etching processes include dry and wet etching.

[0106] refer to Figure 2f As shown, a positive electrode 100 is formed on the front contact layer 30 .

[0107] The preferred formation method is photolithography or other techniques, and the positive electrode includes a mixture of one or more of Ti, Au, Cu, Ge, Pd, etc.

[0108] The positive electrode 100 and the front contact layer 30 are annealed at low temperature to form an ohmic contact.

[0109] A preferred method for forming an ohmic contact is rapid thermal annealing, so that the positive electrode 100 forms an ohmic contact with the front contact layer 30 .

[0110] refer to Figure 2g As shown, the front contact layer 30 of the solar cell is etched to expose the window layer 40 .

[0111] Preferred etching methods are dry etching and wet etching.

[0112] refer to Figure 2h As shown, the solar cell is isolated on a single chip basis.

[0113] The isolation process is preferably a wet etching process, which is performed from the side where the positive electrode is located to the surface of the back electrode 70 .

[0114] Passivation repairs the sidewalls of multi-junction solar cells, increases the parallel resistance of the cells, and reduces leakage losses. The preferred passivation process is wet passivation. The wet passivation solution is a mixed solution of citric acid, hydrogen peroxide, and water. The ratio of citric acid, hydrogen peroxide, and water is: (1:1:10)-(4:5:10); the temperature of wet passivation is 20-50°C; the time of wet passivation is less than or equal to 1 minute.

[0115] refer to Figure 2i As shown, the anti-reflection layer 110 is formed in the region where the window layer 40 is exposed in the front contact layer 30 .

[0116] The material of the anti-reflection layer 110 includes one or more materials such as SiO2, Ti2O3, MgF2, ZnS, Al2O3, etc., and the coating temperature is preferably between room temperature and 200°C.

[0117] refer to Figure 2j As shown, the cutting separates the back electrode 70 and the flexible substrate 80 of the solar cell.

[0118] Preferably, the cutting process is completed by physical cutting, and the process is not limited to one or more of blade cutting and laser cutting.

[0119] refer to Figure 2k As shown, the rigid support substrate 90 is removed to obtain a single flexible multi-junction solar cell.

[0120] Preferred removal methods include one or more of mechanical separation, solvent dissolution, laser lift-off, and chemical etching.

[0121] refer to Figure 3As shown, the present invention also provides a multi-junction solar cell structure, which is manufactured by the above-mentioned multi-junction solar cell manufacturing method. The multi-junction solar cell structure includes:

[0122] A second substrate (flexible substrate 80) having a first surface;

[0123] A back electrode 70 formed on the first surface;

[0124] A back contact layer 60 formed on a surface of the back electrode 70 facing away from the second substrate;

[0125] A plurality of subcell epitaxial structures 50 are formed on a surface of the back contact layer 60 facing away from the back electrode 70;

[0126] A window layer 40 is formed on a surface of the subcell epitaxial structure 50 that is away from the back contact layer 60;

[0127] A front contact layer 30 is formed on the surface of the window layer 40 and the back ion battery epitaxial structure 50. A window is opened on the front contact layer 30, and an anti-reflection layer 110 is arranged in the window; and

[0128] The positive electrode 100 is formed on the surface of the front contact layer 30 facing away from the window layer 40 .

[0129] Compared with the prior art, the manufacturing method and structure of the multi-junction solar cell of the present invention are aimed at GaAs multi-junction solar cells with large lattice mismatch stress. After the chip isolation is completed by wet etching, a mixed solution composed of citric acid, hydrogen peroxide and water is used to passivate the side wall damage caused by the etching solution caused by the large lattice mismatch stress, which intensifies the lateral corrosion of the cell side wall. This passivation method is non-toxic and harmless, has a simple process, and is low in cost. It can quickly passivate and repair the side wall damage of the multi-junction solar cell, increase the parallel resistance of the device, reduce the side wall leakage and the non-radiative recombination loss of photogenerated carriers, improve the fill factor and photoelectric conversion efficiency of the device, and significantly improve the performance of the device.

[0130] The multi-junction solar cell manufacturing method and multi-junction solar cell structure of the present invention can better maintain the integrity of samples with large lattice mismatch stress by using wet etching combined with passivation treatment, and reduce the negative impact of defects and surface states on cell performance.

[0131] The multi-junction solar cell manufacturing method and multi-junction solar cell structure of the present invention not only reduce production costs, but also simplify the process route, ensure human health and environmental safety, quickly passivate and repair side wall damage of the multi-junction solar cell, reduce the electrical loss of the device, and realize safe and efficient flexible multi-junction solar cell manufacturing.

[0132] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

[0133] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. A method for manufacturing a multi-junction solar cell, characterized in that: include: Prepare a multi-junction solar cell epitaxial wafer, the epitaxial wafer having a front side and a back side arranged oppositely; forming a back electrode on the back side of the epitaxial wafer; forming a second substrate on the back electrode; forming a positive electrode on the front side of the epitaxial wafer; Using etching to isolate the epitaxial wafer; The epitaxial wafer after chip isolation is wet passivated to repair the etching damage of the epitaxial wafer caused by the etching solution aggravating the lateral corrosion of the epitaxial wafer due to the lattice mismatch stress.

2. The method for manufacturing a multi-junction solar cell according to claim 1, characterized in that: The epitaxial wafer is isolated by etching, comprising: The epitaxial wafer is isolated by wet etching.

3. The method for manufacturing a multi-junction solar cell according to claim 1, characterized in that: Wet passivation is performed on the epitaxial wafer after chip isolation, including: A mixed solution of citric acid, hydrogen peroxide and water is used to wet-passivate the epitaxial wafer after chip isolation.

4. The method for manufacturing a multi-junction solar cell according to claim 3, characterized in that: The ratio of citric acid, hydrogen peroxide and water is: (1:1:10)-(4:5:10); The temperature of the wet passivation is 20-50°C; The wet passivation time is less than or equal to 1 minute.

5. The method for manufacturing a multi-junction solar cell according to claim 1, characterized in that: Preparation of multi-junction solar cell epitaxial wafers, including: providing a first substrate; forming a barrier layer, a front contact layer, a window layer, a plurality of sub-cell epitaxial structures and a back contact layer in sequence on the surface of the first substrate; The side where the first substrate is located is the front side of the epitaxial wafer, and the side where the back contact layer is located is the back side of the epitaxial wafer.

6. The method for manufacturing a multi-junction solar cell according to claim 5, characterized in that: Before the step of forming a positive electrode on the front side of the epitaxial wafer, the method further comprises: forming a third substrate on the second substrate and removing the first substrate and the barrier layer; The second substrate is a flexible substrate, and the third substrate is a rigid substrate.

7. The method for manufacturing a multi-junction solar cell according to claim 6, characterized in that: Before or after the step of wet passivating the epitaxial wafer after chip isolation, the method further includes: The second substrate is cut and the third substrate is removed to form a single multi-junction solar cell structure.

8. The method for manufacturing a multi-junction solar cell according to claim 6, characterized in that: After the step of forming a positive electrode on the front side of the epitaxial wafer, the step further includes forming a window on the front contact layer to expose a portion of the window layer; After the step of wet passivating the epitaxial wafer after chip isolation, the method further includes the step of forming an anti-reflection layer in the window.

9. The method for manufacturing a multi-junction solar cell according to claim 8, characterized in that: The doping concentration of the front contact layer is greater than 5e18cm -3 and / or, The material of the back electrode includes one or more of Ti, Pt, Pd, Au, and Zn; and / or, The material of the first substrate includes GaAs and Ge; The material of the second substrate includes one of copper, PI, and PET; and / or, The material of the third substrate includes one of GaAs, Si, SiC, and glass; and / or, The material of the anti-reflection layer includes one or more of SiO2, Ti2O3, MgF2, ZnS, and Al2O3.

10. A multi-junction solar cell structure, characterized in that: The multi-junction solar cell is manufactured by the manufacturing method of any one of claims 1 to 9.

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