Low-orbit near-earth satellite flight control system execution method and module

Abstract

The invention discloses a low-orbit near-earth satellite flight control system execution method and module, and belongs to the technical field of instruction management for spacecrafts. According to the execution method, an instruction channel and an instruction value are sent to a satellite, after the satellite receives the instruction channel and the instruction value, verification is conducted through a verification instruction so as to detect whether a transmission error exists or not, and if verification passes, a specific instruction is analyzed according to the content of the instruction channel and the instruction value; then the satellite executes a corresponding task according to the analyzed instruction and the delay output instruction; and if an exception occurs in the execution process, triggering an error correction mechanism according to an output enabling error correction instruction, and outputting a corresponding error correction instruction to correct an error. According to the method, the flexibility and the intelligent degree of the control system are improved by increasing the instruction delay output capability, whether the instruction code after error correction is output or not can be effectively controlled by increasing the error correction instruction output enabling part, and the reliability and the accuracy of anti-error instruction output of the control system are greatly improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of spacecraft instruction management, and relates to an execution method and module of a low-orbit near-Earth satellite flight control system. Background Art

[0002] The open collector (OC) instruction is a special instruction output mode. In electronic devices, the OC instruction output function is usually used to drive external loads, such as relays, light-emitting diodes, etc. The OC instruction output function is one of the most common functions in electronic devices. Due to its high reliability, flexibility and convenience, the OC instruction output function has been widely used in high-tech equipment such as satellites and aircraft. With the continuous advancement of satellite and aircraft technology, the tasks they perform have become more and more complex, requiring more instructions to control and coordinate the work of various systems. In addition, the system scale of satellites and aircraft is constantly expanding, including more sensors, actuators, communication equipment, etc. These devices need to be controlled and coordinated through instructions. At the same time, with the continuous development of artificial intelligence technology, satellites and aircraft have also put forward higher requirements for the intelligence of instructions. Intelligent instruction systems can more accurately identify and execute tasks and improve the efficiency and reliability of the system. Therefore, as a common output mode in digital logic circuits, the demand for OC instructions is increasing day by day, and the degree of intelligence is increasing day by day.

[0003] OC instruction output control is a common type of output driver in digital logic circuits, which can realize level conversion and logic control functions. In modern electronic devices, field programmable gate array (FPGA) or custom integrated circuit (ASIC) chips are often used as control interface driver devices to achieve precise control of OC instruction output. The current instruction control is divided into instruction channel, instruction code and checksum. Among them, the instruction channel is the core part of OC instruction output control. It is responsible for receiving the instruction code issued by the processor and transmitting it to the instruction control module. The instruction code is a specific instruction issued by the processor to instruct the OC output driver to perform a specific operation. The instruction code usually includes two parts: operation code and operand. The operation code is used to specify the operation type, and the operand is used to specify the object or parameter of the operation. Checksum is a mechanism for detecting instruction errors. In OC instruction output control, the checksum is calculated by performing a specific calculation on the instruction code and is attached to the instruction code. When the instruction control module receives the instruction code, it recalculates the checksum and compares it with the attached checksum. If the two are equal, it means that the instruction code is correct. If they are not equal, it means that there is an error in the instruction code and the instruction will be processed in a special way, such as discarding it as invalid. The control flow of instruction output is as follows: (1) Instruction reception: The processor sends the instruction code and transmits it to the instruction control module through the instruction channel. (2) Checksum verification: After receiving the instruction code, the instruction control module first performs a checksum verification on it. If the checksum is correct, it continues to execute the next step; if the checksum is wrong, the instruction is discarded as invalid. (3) Instruction execution: The instruction code that has been checked and verified will be sent to the OC output driver for execution. The OC output driver controls the state of the output pin according to the specific content of the instruction code, thereby realizing a specific logic control or level conversion function. Among them, the checksum mechanism is an important means to ensure the reliability of instructions in OC instruction output control. By calculating and comparing the checksum, errors in the instruction code can be effectively detected and the output of erroneous instructions can be avoided. OC instruction output control has the characteristics of real-time response. After the processor outputs the instruction code, the instruction control module will immediately respond and perform the corresponding operation to ensure the timeliness and accuracy of instruction output.

[0004] Traditional instruction code design includes instruction encoding, instruction value and cyclic redundancy check (CRC). Among them, instruction encoding is a key component of the computer instruction system, which is used to uniquely identify each instruction. The instruction value is usually closely related to the instruction encoding, which represents the specific operation or function when the instruction is executed. In the instruction system, each instruction has a corresponding instruction value, which determines the impact of the instruction on the computer hardware and software when it is executed. CRC check is a technology used to verify the integrity of data transmission. In instruction code design, CRC is a commonly used error detection mechanism. It calculates a checksum (ie, CRC value) by performing polynomial division on the data and appends it to the end of the data. At the receiving end, the same CRC calculation is performed on the data again, and the result is compared with the appended CRC value. If the two are consistent, there is no error in the data transmission process; if they are inconsistent, the data may have an error.

[0005] A traditional instruction encoding is shown in Table 1: Table 1 Traditional instruction encoding

[0006] Among them, D15~D10 represent instruction numbers, 1 represents CK1, 2 represents CK2, and so on... The design of instruction numbers enables the computer system to distinguish and execute different instructions, thereby realizing rich functions; D9~D4 represent the instruction value. "000000" means the instruction with the corresponding number outputs a low level; "111111" means the instruction with the corresponding number outputs a high level; other values ​​mean the instruction with the corresponding number outputs a negative pulse with a certain width. The pulse width can be calculated by the value of the time base register. The design of the instruction value enables the instruction to control the hardware output of the computer system and realize various complex operations. D3~D0 represents CRC and stores the CRC value of D15~D4.

[0007] This instruction code design distinguishes different instructions through instruction encoding, specifies the specific output behavior of the instruction (low level, high level or negative pulse) through instruction value, and ensures the accuracy of the instruction during transmission through CRC. This design makes the instruction encoding concise and flexible, which can meet the needs of different application scenarios. At the same time, the introduction of CRC also greatly improves the reliability of instruction transmission.

[0008] However, according to the current flight control mission execution of low-orbit satellites, the flight control cycle of an orbital satellite is about 90 minutes. During the orbit, the instructions can be sent in time within the territory, and the time window is about 25 minutes. The flight attitude outside the territory can only be controlled by the main program of the satellite service. Therefore, in the previous OC command output function design, the flight control system of low-orbit satellites does not have the function of delayed command output. All commands sent to the satellite are sent in real time, that is, the ground control center sends commands to the satellite immediately when needed, that is, the ground control center must send all necessary commands within the time window when the satellite is visible or communicable, which limits the flexibility and intelligence of command sending. In addition, the command sending process follows a strict verification mechanism: the command code will be verified before sending. If the verification passes, the command will be output and executed; if the verification fails, the command will be discarded and will not be sent to the satellite for execution. That is, the encoding method of the command may be relatively simple and does not have the ability to correct single-bit errors. This means that if a single-bit error occurs during the transmission of the command, the command may be executed incorrectly or discarded because the verification fails, which reduces the reliability and accuracy of command transmission. Therefore, the existing design of command output function has the problems of low flexibility and intelligence of command sending, and poor reliability and accuracy of command transmission. Summary of the invention

[0009] In view of the problems existing in the prior art, the present invention provides a low-orbit near-Earth satellite flight control system execution method and module, thereby solving the technical problems in the prior art that the design flexibility and intelligence of the command output function of the low-orbit near-Earth satellite flight control system are low, and the reliability and accuracy of command transmission are poor.

[0010] The present invention is achieved through the following technical solutions: In a first aspect, the present invention provides a method for executing a low-orbit near-Earth satellite flight control system, comprising: Determine the instruction code according to the requirements of the low-orbit near-Earth satellite flight control system, wherein the instruction code includes an instruction channel, an instruction value, a check instruction, a delayed output instruction, and an output enable error correction instruction; The command channel and the command value are sent to a low-orbit near-earth satellite, so that after the low-orbit near-earth satellite receives the command channel and the command value, the command channel and the command value are checked by using the check instruction to detect whether there is a transmission error. If the check passes, a specific command is parsed according to the content of the command channel and the command value; if the check fails, error correction and recovery are performed through the command encoding to obtain the original command code, and whether the original command code is executed and output is determined through the configuration information of the output enable error correction instruction; The low-orbit near-earth satellite is enabled to perform corresponding tasks according to the parsed instructions and the delayed output instructions.

[0011] Preferably, the instruction code is 32 bits, wherein the instruction channel is 6 bits, the instruction value is 6 bits, the delayed output instruction is 10 bits, and the output enable error correction instruction is 2 bits.

[0012] Preferably, the delay time set by the delayed output instruction is greater than the flight control time of one orbit of the satellite.

[0013] Preferably, the delay time set by the delayed output instruction is 1023*delay time base; the delay time base is configured through a measurement and control channel; preferably, the delay time base is configured to 6s.

[0014] Preferably, if the verification fails, error correction and recovery are performed through the instruction encoding to obtain the original instruction code, specifically: The verification instruction is used to perform error correction and recovery on the instruction code of single-bit erroneous data and obtain the original instruction code; while for the instruction code of multi-bit erroneous data, the instruction code is discarded.

[0015] Preferably, the verification instruction is 8 bits, and the verification instruction is encoded using Hamming code.

[0016] In a second aspect, the present invention provides a low-orbit near-Earth satellite flight control system execution module, comprising: An instruction generation module, wherein the instruction generation module is used to determine an instruction code according to the requirements of a low-orbit near-Earth satellite flight control system, wherein the instruction code includes an instruction channel, an instruction value, a check instruction, a delayed output instruction, and an output enable error correction instruction; An instruction sending verification and parsing module, the instruction sending verification and parsing module is used to send the instruction channel and the instruction value to the low-orbit low-earth satellite, so that after the low-orbit low-earth satellite receives the instruction channel and the instruction value, the instruction channel and the instruction value are verified by using the verification instruction to detect whether there is a transmission error. If the verification passes, the specific instruction is parsed according to the content of the instruction channel and the instruction value; if the verification fails, error correction recovery is performed through the instruction encoding to obtain the original instruction code, and the configuration information of the output enable error correction instruction is used to determine whether the original instruction code is executed and outputted; An instruction execution module is used to enable the low-orbit near-earth satellite to perform corresponding tasks according to the parsed instructions and the delayed output instructions; if an abnormality occurs during the execution process, the error correction mechanism is triggered according to the output enable error correction instruction, and the corresponding error correction instruction is output to correct the error.

[0017] In a third aspect, the present invention provides a computer device, comprising a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the above method.

[0018] In a fourth aspect, the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and the computer program / instructions implement the steps of the above method when executed by a processor.

[0019] In a fifth aspect, the present invention provides a computer program product, comprising a computer program / instruction, characterized in that the computer program / instruction implements the steps of the above method when executed by a processor.

[0020] Compared with the prior art, the present invention has the following beneficial technical effects: The present invention discloses an execution method of a low-orbit near-earth satellite flight control system. The execution method first determines an instruction code according to the requirements of the low-orbit near-earth satellite flight control system. The instruction code includes an instruction channel, an instruction value, a check instruction, a delayed output instruction, and an output enable error correction instruction. The instruction channel is used to identify different instruction numbers; the instruction value is used to set a specific output value of the instruction; the check instruction is used to check the instruction code and the instruction value; the delayed output instruction is used to set the delay time of the instruction after sending; the output enable error correction instruction is used to control the output of the error correction instruction; the instruction delayed output instruction makes the processor send the instruction after delaying to a configured time after completing the instruction output. The instruction code can be sent to effectively control the working state of some single machines of the satellite when it is abroad, and the instruction code can be output once in the country. The satellite responds to the preset instruction according to the set time when it is abroad, which greatly increases the intelligent control of the satellite; the output enable error correction instruction realizes that when the instruction code is overturned by a single particle, the instruction code is corrected and restored to the correct instruction code according to the error correction verification formula, and when multiple bits are overturned, the instruction is discarded and regarded as invalid. At the same time, the current erroneous instruction code is corrected and restored to the normal instruction code state, and whether to output the instruction is determined according to the importance of the instruction, so as to ensure that some instructions can be output at critical moments, thereby increasing reliability. Therefore, the present invention improves the flexibility and intelligence of the control system by adding the delayed output instruction, and can effectively control whether the instruction code after error correction is output by adding the output enable error correction instruction, which greatly improves the reliability and accuracy of the control system's anti-error instruction output.

[0021] Furthermore, the instruction code is 32 bits, which can make the instruction control more flexible and more secure and reliable. Among them, the output enable error correction instruction is 2 bits, which can prevent the unit data from being overturned and the entire instruction from being output, and can effectively prevent the output of erroneous instructions.

[0022] Furthermore, the delay time set by the delayed output instruction is greater than the flight control time of a low-orbit, near-Earth satellite, so that the system can judge the status of the satellite based on the downlink data. If the flight control status is normal, the satellite can be autonomously controlled in orbit, and closed-loop control between the satellite and the ground can also be achieved. The entry device can continue to execute the last configured instruction, realizing control measures without time blind spots.

[0023] Furthermore, the delay time set by the delayed output instruction is 1023*delay time base, so that the aircraft can configure the control granularity according to its management requirements. In addition, the delay time base is configured to 6s. The configuration of the delay time base makes the delay time 102.3min, which can enable the aircraft to have the ability of autonomous management.

[0024] Furthermore, if the check fails, error correction and recovery are performed through the instruction code to obtain the original instruction code. Specifically, the check instruction is used to perform error correction and recovery on the instruction code of single-bit erroneous data and obtain the original instruction code; and for the instruction code of multi-bit erroneous data, the instruction code is discarded, ensuring the correctness and reliability of the instruction code and instruction value.

[0025] Furthermore, the check instruction is 8 bits, and the check instruction is encoded using Hamming code, which fully ensures and implements the check instruction to correct and recover the instruction code of single-bit erroneous data and obtain the original instruction code. For the instruction code of multi-bit erroneous data, the instruction code discarding process is implemented. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0027] Figure 1 A schematic diagram of a flow chart of a method for executing a low-orbit near-Earth satellite flight control system in the present invention; Figure 2 The present invention is a schematic diagram of the structure of an execution module of a low-orbit near-Earth satellite flight control system. DETAILED DESCRIPTION

[0028] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0029] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0030] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0031] The present invention is further described in detail below in conjunction with the accompanying drawings: Example 1 like Figure 1 As shown, the present invention discloses a method for executing a low-orbit near-earth satellite flight control system, comprising: Determine the instruction code according to the requirements of the low-orbit near-Earth satellite flight control system, wherein the instruction code includes an instruction channel, an instruction value, a check instruction, a delayed output instruction, and an output enable error correction instruction; The command channel and the command value are sent to a low-orbit near-earth satellite, so that after the low-orbit near-earth satellite receives the command channel and the command value, the command channel and the command value are verified by using the verification instruction. If the verification passes, a specific instruction is parsed according to the contents of the command channel and the command value; if the verification fails, error correction and recovery are performed through the instruction encoding to obtain the original instruction code, and whether the original instruction code is executed and outputted is determined through the configuration information of the output enabling error correction instruction; The low-orbit near-earth satellite is enabled to perform the corresponding task according to the parsed instructions and the delayed output instructions; if an abnormality occurs during the execution process, the error correction mechanism is triggered according to the output enable error correction instruction, and the corresponding error correction instruction is output to correct the error.

[0032] In this method, the instruction code is first determined according to the requirements of the low-orbit near-Earth satellite flight control system. The instruction code includes multiple parts: instruction channel, instruction value, check instruction, delayed output instruction, and output enable error correction instruction. The instruction channel is used to identify different instruction numbers in order to distinguish different control instructions. The instruction value is used to set the specific output value of the instruction, that is, the specific operation performed by the control satellite. The check instruction is used to check the instruction code and instruction value to ensure the correctness of the instruction. The delayed output instruction is used to set the delay time after the instruction is sent, allowing the instruction to be executed after a specific time. The output enable error correction instruction is used to control the output of the error correction instruction to ensure that the error can be corrected or the erroneous instruction can be discarded when the instruction code is wrong. The delayed output instruction enables the processor to delay to the configured time after completing the instruction output and then send the instruction code, which can effectively control the working status of some single machines of the satellite during the period of being abroad, allowing the instruction code to be output once in the country, and the low-orbit near-Earth satellite responds to the preset instruction at the set time abroad, increasing the intelligent control of the satellite. The output enable error correction instruction can make the instruction code be corrected and restored to the correct instruction code according to the error correction formula when one bit of the instruction code is overturned by a single particle. In the case that multiple bits are overturned, the instruction is discarded and regarded as invalid. At the same time, the current erroneous instruction code is corrected and restored to the normal instruction code state. In addition, it can also decide whether to output the instruction based on the importance of the instruction, ensuring that some instructions can be output at critical moments, thereby increasing reliability.

[0033] The method improves the flexibility and intelligence of the control system by adding delayed output instructions. At the same time, by adding output enable error correction instructions, it effectively controls whether the instruction code after error correction is output, greatly improving the reliability and accuracy of the control system's anti-error instruction output.

[0034] Preferably, the delay time set by the delay output instruction is greater than the flight control time of a low-orbit satellite. Preferably, the delay time set by the delay output instruction is 1023*delay time base; the delay time base is configured through the measurement and control channel. In a more preferred solution, the delay time base is configured to 6s.

[0035] Example 2 In order to further explain the scheme of the present invention, it is described by the following examples: The present invention discloses an execution method for a low-orbit near-Earth satellite flight control system, aiming to improve the flexibility, intelligence and reliability and accuracy of instruction transmission of the satellite flight control system. Specifically, in the execution method, firstly, according to the requirements of the low-orbit near-Earth satellite flight control system, an instruction code is determined, and the instruction code includes an instruction channel, an instruction value, a check instruction, a delayed output instruction and an output enable error correction instruction.

[0036] The delayed output instruction is used to set the delay time of the instruction after it is sent; the output enable error correction instruction is used to control the output of the error correction instruction; the instruction channel is used to identify different instruction numbers; the instruction value is used to set the specific output value of the instruction; the verification instruction is used to verify the instruction code and instruction value.

[0037] The delayed output instruction is one of the cores of the instruction coding. It allows users to set the delay time after the instruction is sent according to actual needs. This function is particularly important for low-orbit satellites. By setting the delay time, it can ensure that the instruction is received and executed when the low-orbit satellite is in the best receiving state, thereby improving the success rate of instruction transmission. The delayed output instruction can use a counter or timer to implement the delay function. The user can specify the delay time by setting the initial value of the counter or the duration of the timer. Once the instruction is sent, the counter or timer starts working, and the instruction will be actually output to the satellite's execution system only when the set delay time is reached.

[0038] The output enable error correction instruction is used to control the output of the error correction instruction. In the low-orbit near-Earth satellite flight control system, due to the unreliability of the communication link, the instruction may be disturbed or damaged during the transmission process. To cope with this situation, the output enable error correction instruction allows the system to send an error correction instruction to correct or resend the damaged instruction. By enabling or disabling the output of the error correction instruction, the system can flexibly cope with different communication environments. The output enable error correction instruction can be implemented by setting a flag bit or a switch. When the error correction instruction needs to be sent, the system will set the corresponding flag bit to the enabled state, thereby allowing the output of the error correction instruction. Conversely, when the communication environment is stable and the instruction transmission success rate is high, the output of the error correction instruction can be disabled to reduce system overhead.

[0039] The command channel is used to identify different command numbers to ensure that the commands are not confused or lost during transmission. In the low-orbit near-Earth satellite flight control system, there may be multiple commands transmitted at the same time, so each command needs to be uniquely identified. The command channel can use a fixed-length binary code to identify the command number. Each command number is unique and is associated with a specific command type or function. By parsing the command number, the system can determine the type of command to be executed and take appropriate actions.

[0040] The command value is used to set the specific output value of the command. In the low-orbit near-Earth satellite flight control system, the command usually contains some specific parameters or values, which are used to guide the satellite to perform specific operations or adjust its state. The command value can set the corresponding output value according to the specific type and function of the command. For example, for the command to adjust the satellite attitude, the command value can include parameters such as the angle or speed of the attitude adjustment. For the command to control the satellite camera, the command value can include parameters such as the focal length and exposure time of the camera.

[0041] The verification instruction is used to verify the instruction code and instruction value to ensure that the instruction has not been tampered with or damaged during the transmission process. In the low-orbit near-Earth satellite flight control system, the integrity and accuracy of the instruction are crucial, because any slight error may cause the satellite to perform an incorrect operation or enter a dangerous state. The verification instruction can use a cyclic redundancy check (CRC) or other similar verification algorithms to generate a verification code. Before the instruction is sent, the system calculates the verification code of the instruction code and the instruction value and appends it to the end of the instruction. When the receiving end receives the instruction, it recalculates the verification code and compares it with the received verification code. If the two are consistent, it means that the instruction has not been tampered with or damaged during the transmission process; if they are inconsistent, it means that there may be a problem with the instruction and corresponding processing is required. The present invention preferably uses Hamming code for verification. Hamming Code is a coding method that can detect and correct single-bit errors during data transmission or storage. In satellite flight control systems, the integrity and accuracy of instructions are crucial. Hamming codes are preferred for instruction verification because of their ability to detect and correct single-bit errors. By using Hamming codes for verification, it can be ensured that instructions have not been tampered with or damaged during transmission, thereby improving the reliability and safety of satellite flight control systems.

[0042] Therefore, the instruction encoding determined in the present invention provides an efficient, reliable and flexible instruction transmission method for the low-orbit near-Earth satellite flight control system by integrating multiple functions such as instruction delayed output, error correction instruction output enable, instruction channel identification, instruction value setting and verification.

[0043] Specifically preferably, the instruction output encoding is 32 bits.

[0044] Among them, the delay output instruction is 10 bits; the delay time is 1023*delay time base, and the delay time base is configured through the measurement and control channel. In a preferred solution, the delay time is greater than the flight control time of a low-orbit satellite. In a more preferred solution, the delay time base is configured to 6s.

[0045] During the verification process, if the verification fails, the error correction and recovery are performed through the instruction code to obtain the original instruction code, specifically: for the instruction code of single-bit error data, the verification instruction performs error correction and recovery on it, and obtains the original instruction code; and for the instruction code of multi-bit error data, the instruction code is discarded. In addition, preferably, in order to achieve the above function, the verification instruction is 8 bits, and the verification instruction is encoded using Hamming code.

[0046] The output enable error correction instruction is 2 bits, and the output enable error correction instruction includes an error correction checksum and whether to output after error correction.

[0047] The instruction channel is 6 bits, the instruction value is 6 bits, and the output value includes a low level, a high level or a negative pulse; the negative pulse width is obtained by calculating the value of the time base register.

[0048] Example 3 In order to further explain the technical solution of the present invention in detail, it is described by the following examples: A command output encoding for a low-orbit near-Earth satellite flight control system expands the bit width of the existing command code to 32 bits. The command code includes delayed output (DELAY), command code, command value, checksum (CRC) and output enable (EN). The command encoding is shown in Table 2: Table 2 Instruction encoding

[0049] D31~D22 represent the delayed output of the command, i.e. the delayed output command, with a total of 10 bits, which can delay 1023*delay time base, i.e. the delay time is determined by multiplying the basic time unit (time base) by the coefficient (1023). The system can send the command according to the configured time after the command code is sent, and the sending resolution of the command is the minimum delay time base. The delay time base is a basic time unit, and its specific value can be configured through the measurement and control channel. The measurement and control channel usually refers to a communication channel used to receive and send control commands and monitor the status of equipment.

[0050] D21~D20 are error correction instruction output enable, that is, output enable error correction instruction. Setting two bits can prevent the unit data from being overturned and the entire instruction from being output, which can effectively prevent the output of erroneous instructions. When the data is "11", the output is enabled, and when the data is "10", "01", or "00", the output is disabled. D19~D14 represent the instruction number, that is, the instruction channel part, 1 represents CK1, 2 represents CK2, and so on...

[0051] D13~D8 represent the instruction value. "000000" means the instruction with the corresponding number outputs a low level; "111111" means the instruction with the corresponding number outputs a high level; other values ​​mean the instruction with the corresponding number outputs a negative pulse with a certain width. The pulse width can be calculated by the value of the time base register.

[0052] D7~D0 represent the Hamming code CRC (Hamming Code), which is the check part. The check only checks the instruction code and instruction value. The Hamming code can correct a single bit error. The Hamming code is a check code that can detect and correct single-bit errors. Its working principle is to add multiple check bits on the basis of the original data. Each check bit is responsible for checking the bit value at a specific position. Through the combination of check bits, the error bit can be located and corrected. The design of the Hamming code makes it possible for at least three bits to differ between any two legal codewords, which helps to detect and correct errors.

[0053] The present invention adds a delayed instruction output, which can effectively control the working status of some single machines of the satellite when it is abroad, and can realize the one-time output of the instruction code in the country. The satellite responds to the preset instruction according to the set time abroad, which greatly increases the intelligent control of the satellite. If the delay time base is configured to be 6s, the maximum configurable delay time is 102.3min. The delay time is greater than the flight control time of one orbit. The state of the satellite can be judged according to the downlink data. If the flight control state is normal, the autonomous control of the satellite in orbit can be realized, and the closed-loop control of the satellite and the ground can also be realized. The entry device can continue to execute the last configured instruction, so as to achieve control measures without time blind spots.

[0054] Among them, the flight control time for one orbit refers specifically to the time period required for flight control during the period when the satellite orbits one circle (i.e., one orbital cycle). This length of time is usually related to the orbital characteristics of the satellite (such as orbital altitude, speed, earth shape and gravity, etc.) and the nature of the flight control mission. The function of adding delayed command output allows the satellite to autonomously respond and execute commands according to a preset schedule while it is outside the country (i.e., far away from the ground control station). This capability not only improves the intelligence level of the satellite, but also ensures that the satellite can perform tasks according to the predetermined plan even if it cannot receive ground commands in real time. The delay time here is greater than the flight control time for one orbit, which means that the satellite has enough autonomous control time to complete all scheduled tasks within an orbital cycle, and to make status judgments and adjustments based on downlink data when necessary. This design not only enhances the autonomy of the satellite, but also improves the efficiency and reliability of satellite-ground closed-loop control.

[0055] For some current spacecraft that need to output command sequences during flight, this module design provides a possibility. The module cooperates with application software control. When it is necessary to output a command sequence with a coupling relationship, the space service software can configure a suitable command output delay time according to the command characteristics of the coupling relationship. The command code set with a coupling relationship is written once, and the command output module can accurately output the command sequence.

[0056] The present invention can improve the intelligence of instruction control, improve control efficiency and control accuracy, reduce the pressure of processor computing power and simplify the workflow of the processor; the Hamming code is used, and the function of correcting one bit error is added, which can effectively protect the output of the sent instruction; the error correction output enable bit is added, and a control is added after error correction, which increases reliability and flexibility. At the same time, the acceptance output is added to cooperate with the software to realize the output of the instruction sequence and add new functions. The present invention uses the intelligent design of the instruction output module, which has been integrated on the FPGA of multiple satellites. Through ground joint testing and verification, it can effectively reduce the task processing of the processor and increase the intelligent control of the computer.

[0057] Therefore, in view of the function of non-delayed instruction output in previous designs, all instructions are sent in real time, and the instruction is output when the instruction code verification passes, and the instruction is discarded if the verification fails. As a result, only real-time instruction sending is possible, but intelligent instruction sending is not possible, and ordinary encoding is used, which has no ability to correct a single bit error. The present invention expands the data bit width, increases the instruction code content, has the function of delayed output, and changes the encoding method to Hamming code, which has the function of correcting a single bit error. Specifically, the present invention increases the ability of delayed instruction output, and can support the control system to perform intelligent control; increases output enable, which can effectively control whether the instruction code after error correction is output, and greatly improves the reliability of anti-error instruction output; uses Hamming code encoding, which can effectively restore the instruction code in the case of a single bit error.

[0058] Example 4 In addition, if Figure 2 As shown, the present invention also discloses an execution module of a low-orbit near-earth satellite flight control system, comprising: An instruction generation module, wherein the instruction generation module is used to determine an instruction code according to the requirements of a low-orbit near-Earth satellite flight control system, wherein the instruction code includes an instruction channel, an instruction value, a check instruction, a delayed output instruction, and an output enable error correction instruction; An instruction sending verification and parsing module, the instruction sending verification and parsing module is used to send the instruction channel and the instruction value to the low-orbit low-earth satellite, so that after the low-orbit low-earth satellite receives the instruction channel and the instruction value, the instruction channel and the instruction value are verified by using the verification instruction to detect whether there is a transmission error. If the verification passes, the specific instruction is parsed according to the content of the instruction channel and the instruction value; if the verification fails, error correction recovery is performed through the instruction encoding to obtain the original instruction code, and the configuration information of the output enable error correction instruction is used to determine whether the original instruction code is executed and outputted; An instruction execution module is used to enable the low-orbit near-earth satellite to perform corresponding tasks according to the parsed instructions and the delayed output instructions; if an abnormality occurs during the execution process, the error correction mechanism is triggered according to the output enable error correction instruction, and the corresponding error correction instruction is output to correct the error.

[0059] In addition, a schematic diagram of a terminal device is provided in an embodiment of the present invention. The terminal device of this embodiment includes: a processor, a memory, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the steps in the above-mentioned method embodiments are implemented. Alternatively, when the processor executes the computer program, the functions of each module / unit in the above-mentioned device embodiments are implemented.

[0060] The computer program may be divided into one or more modules / units, and the one or more modules / units are stored in the memory and executed by the processor to accomplish the present invention.

[0061] The terminal device may be a computing device such as a desktop computer, a notebook, a PDA, a cloud server, etc. The terminal device may include, but is not limited to, a processor and a memory.

[0062] The processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.

[0063] The memory may be used to store the computer programs and / or modules, and the processor implements various functions of the terminal device by running or executing the computer programs and / or modules stored in the memory and calling the data stored in the memory.

[0064] If the module / unit integrated in the terminal device is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present invention implements all or part of the processes in the above-mentioned embodiment method, and can also be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium. When the computer program is executed by the processor, the steps of the above-mentioned various method embodiments can be implemented. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, U disk, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signal, telecommunication signal and software distribution medium. It should be noted that the content contained in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electric carrier signals and telecommunication signals.

[0065] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for executing a low-orbit near-Earth satellite flight control system, characterized in that: include: Determine the instruction code according to the requirements of the low-orbit near-Earth satellite flight control system, wherein the instruction code includes an instruction channel, an instruction value, a check instruction, a delayed output instruction, and an output enable error correction instruction; The command channel and the command value are sent to a low-orbit near-earth satellite, so that after the low-orbit near-earth satellite receives the command channel and the command value, the command channel and the command value are verified by using the verification instruction. If the verification passes, a specific instruction is parsed according to the contents of the command channel and the command value; if the verification fails, error correction and recovery are performed through the instruction encoding to obtain the original instruction code, and whether the original instruction code is executed and outputted is determined through the configuration information of the output enabling error correction instruction; The low-orbit near-earth satellite is enabled to perform corresponding tasks according to the parsed instructions and the delayed output instructions; If an exception occurs during the execution process, the error correction mechanism is triggered according to the output enable error correction instruction, and the corresponding error correction instruction is output to correct the error.

2. The method for executing a low-orbit near-Earth satellite flight control system according to claim 1, characterized in that: The instruction code is 32 bits, wherein the instruction channel is 6 bits, the instruction value is 6 bits, the delayed output instruction is 10 bits, and the output enable error correction instruction is 2 bits.

3. The method for executing a low-orbit near-Earth satellite flight control system according to claim 1, characterized in that: The delay time set by the delay output instruction is greater than the flight control time of one orbit of the low-orbit near-earth satellite.

4. The method for executing a low-orbit near-Earth satellite flight control system according to claim 1, characterized in that: The delay time set by the delayed output instruction is 1023*delay time base; the delay time base is configured to be 6s.

5. The method for executing a low-orbit near-Earth satellite flight control system according to claim 1, characterized in that: If the verification fails, error correction and recovery are performed through the instruction code to obtain the original instruction code, specifically: The verification instruction is used to perform error correction and recovery on the instruction code of single-bit erroneous data and obtain the original instruction code; while for the instruction code of multi-bit erroneous data, the instruction code is discarded.

6. The method for executing a low-orbit near-Earth satellite flight control system according to claim 5, characterized in that: The verification instruction is 8 bits, and the verification instruction is encoded using Hamming code.

7. A low-orbit near-Earth satellite flight control system execution module, characterized in that: include: An instruction generation module, wherein the instruction generation module is used to determine an instruction code according to the requirements of a low-orbit near-Earth satellite flight control system, wherein the instruction code includes an instruction channel, an instruction value, a check instruction, a delayed output instruction, and an output enable error correction instruction; An instruction sending verification and parsing module, the instruction sending verification and parsing module is used to send the instruction channel and the instruction value to the low-orbit low-earth satellite, so that after the low-orbit low-earth satellite receives the instruction channel and the instruction value, the instruction channel and the instruction value are verified by using the verification instruction. If the verification passes, the specific instruction is parsed according to the content of the instruction channel and the instruction value; if the verification fails, error correction and recovery are performed through the instruction encoding to obtain the original instruction code, and whether the original instruction code is executed and output is determined through the configuration information of the output enable error correction instruction; An instruction execution module is used to enable the low-orbit near-earth satellite to execute corresponding tasks according to the parsed instructions and the delayed output instructions.

8. A computer device comprising a memory, a processor and a computer program stored in the memory, characterized in that: The processor executes the computer program to implement the steps of the method according to any one of claims 1 to 6.

9. A computer-readable storage medium storing a computer program, characterized in that: When the computer program / instructions are executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

10. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instructions are executed by a processor, the steps of the method as described in any one of claims 1 to 6 are implemented.

Images