Memory management method, device and system based on LwIP protocol, and electronic equipment

Abstract

The invention discloses a memory management method, device and system based on an LwIP protocol, and electronic equipment, and belongs to the field of memory management. When a task instruction sent by an upper system is received, the task instruction is analyzed, task content and a task type corresponding to the task instruction are obtained, response data are obtained based on the task content, a memory allocation strategy is determined based on the task type, space is allocated for the response data based on the memory allocation strategy, and the response data are sent to the upper system. According to the scheme, different memory allocation strategies are adopted based on different task types, the limitation of a default memory management mechanism of the LwIP is solved, memory fragmentation is reduced, and the response speed and stability of a system are improved when a large amount of data is processed.

Description

Technical Field

[0001] The present application relates to the field of memory management, and in particular, to a memory management method, device, electronic device and system based on the LwIP protocol. Background Art

[0002] LwIP (Lightweight IP) is a lightweight TCP / IP protocol stack that is widely used in embedded systems, including servo systems, due to its low resource consumption and portability. However, the default memory management mechanism of LwIP has certain limitations when facing the high real-time requirements of servo systems. Summary of the invention

[0003] In order to overcome the deficiencies of the prior art, the present application provides a memory management method, device, electronic device and system based on the LwIP protocol to solve the problem that the default memory management mechanism of LwIP has certain limitations when facing the high real-time requirements of the servo system.

[0004] The technical solution adopted by this application to solve its technical problem is:

[0005] In a first aspect, a memory management method based on the LwIP protocol is provided, comprising:

[0006] Receive task instructions sent by the host system;

[0007] Parsing the task instruction to obtain the task content and task type corresponding to the task instruction, wherein the task type is used to indicate whether the size of the response data for completing the task instruction is fixed;

[0008] Acquire response data based on the task content, and determine a memory allocation strategy based on the task type;

[0009] Allocate space for the response data based on the memory allocation strategy and send the response data to the host system.

[0010] Further, determining the memory allocation strategy based on the task type includes:

[0011] When the size of the response data for completing the task instruction is fixed, determining that the task type is a first task type;

[0012] When the task type is the first task type, obtaining the size of the response data;

[0013] Adjusting the number and size of elements in the memory pool based on the size of the response data so that a target storage space having a size consistent with the size of the response data exists in the memory pool;

[0014] Allocate the target storage space of the memory pool to the response data.

[0015] Further, determining the memory allocation strategy based on the task type includes:

[0016] When the size of the response data for completing the task instruction is not fixed, determining that the task type is a second task type;

[0017] When the task type is the second task type, dynamic memory allocation is performed in the memory heap.

[0018] Furthermore, it also includes:

[0019] When the memory usage rate in the memory heap is greater than a preset usage rate;

[0020] Dynamically allocate in the cache area, and simultaneously obtain the usage status and order of each memory block in the memory heap, wherein the usage status includes used and unused;

[0021] Move the data of the used memory block in the latter order to the unused memory block in the former order, and update the corresponding pointer and status;

[0022] The buffer area is released and dynamically allocated in the updated memory heap.

[0023] Further, the parsing of the task instruction to obtain the task content and task type corresponding to the task instruction includes:

[0024] Parsing the task instruction to obtain a function code of the task instruction;

[0025] Determine the task content of the task instruction based on the function code;

[0026] The task type is determined based on the task content.

[0027] In a second aspect, a memory management device based on the LwIP protocol is provided, comprising:

[0028] A task instruction receiving module is used to receive task instructions sent by the upper system;

[0029] A task instruction parsing module, used for parsing the task instruction to obtain the task content and task type corresponding to the task instruction, wherein the task type is used to indicate whether the size of the response data for completing the task instruction is fixed;

[0030] A memory strategy allocation module, used to obtain response data based on the task content and determine a memory allocation strategy based on the task type;

[0031] A response data sending module is used to allocate space for the response data based on the memory allocation strategy and send the response data to the host system.

[0032] According to a third aspect, an electronic device is provided, including:

[0033] at least one processor and at least one memory;

[0034] The memory stores executable instructions of the processor;

[0035] The processor is configured to execute the above memory management method.

[0036] In a fourth aspect, a memory management system based on the LwIP protocol is provided, including a kernel;

[0037] The kernel is used to execute the above memory management method.

[0038] Further, the kernel includes a first kernel and a second kernel;

[0039] The first core is used to communicate with the host system through the LwIP protocol, and the first core and the second core perform inter-core communication;

[0040] The first core is used for sending the task instruction to the second core upon receiving the task instruction, parsing the task instruction to obtain the task type, determining the memory allocation strategy according to the task type, allocating space for the response data sent by the second core and sending the response data to the upper system;

[0041] The second kernel is used for parsing the task instruction to obtain the task content, and obtaining the response data according to the task content.

[0042] In a fifth aspect, a servo system is provided, comprising the above-mentioned memory management system.

[0043] Beneficial effects:

[0044] The technical solution of the present application provides a memory management method, device, electronic device and system based on the LwIP protocol. When receiving a task instruction sent by a host system, the task instruction is parsed and the task content and task type corresponding to the task instruction are obtained, response data is obtained based on the task content, and a memory allocation strategy is determined based on the task type. Finally, space is allocated for the response data based on the memory allocation strategy and the response data is sent to the host system. The present application solution adopts different memory allocation strategies based on different task types, which solves the limitations of the default memory management mechanism of LwIP, reduces memory fragmentation, and improves the response speed and stability of the system when processing large amounts of data. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0046] Figure 1 It is a flow chart of a memory management method based on the LwIP protocol provided in an embodiment of the present application;

[0047] Figure 2 It is a schematic diagram of the structure of a memory management device based on the LwIP protocol provided in an embodiment of the present application;

[0048] Figure 3 It is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application;

[0049] Figure 4 It is a schematic diagram of the structure of a memory management system based on the LwIP protocol provided in an embodiment of the present application;

[0050] Figure 5 This is a schematic diagram of a memory pool allocation method provided in an embodiment of the present application;

[0051] Figure 6 This is a schematic diagram of a memory heap defragmentation method provided in an embodiment of the present application;

[0052] Figure 7 This is a flow chart of a monitoring module provided by an embodiment of the present application;

[0053] Figure 8 This is a flow chart of a defragmentation module provided in an embodiment of the present application. DETAILED DESCRIPTION

[0054] In order to make the purpose, technical scheme and advantages of the present application clearer, the technical scheme of the present application is described in detail below in conjunction with the accompanying drawings and embodiments. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other implementation methods obtained by ordinary technicians in the field without making creative work belong to the scope of protection of the present application.

[0055] The limitations of LwIP's default memory management mechanism are mainly reflected in the following aspects: static memory allocation method easily leads to memory fragmentation, or leads to a large amount of free memory that cannot be fully utilized, which reduces the system's response speed and stability when processing large amounts of data.

[0056] To solve this problem, refer to Figure 1 , the embodiment of the present application provides a memory management method based on the LwIP protocol, including:

[0057] S11: receiving a task instruction sent by a host system; the host system may be a host computer, a remote control center, a cloud platform, etc.;

[0058] S12: parsing the task instruction to obtain the task content and task type corresponding to the task instruction, wherein the task type is used to indicate whether the size of the response data for completing the task instruction is fixed;

[0059] As a preferred implementation method of the embodiment of the present application, parsing the task instruction to obtain the task content and task type corresponding to the task instruction includes: parsing the task instruction to obtain a function code of the task instruction; determining the task content of the task instruction based on the function code; and determining the task type based on the task content.

[0060] Taking the servo system as an example, the task instruction sent by the host computer will contain a function code. After parsing the task instruction data packet, the function code can be obtained. According to the function code, the data that the host computer wants to obtain, that is, the task content, can be known, such as sending a fixed 200 bytes of data to the host computer every 500ms. Or, for example, sending the current parameters in real time. The task type can be known according to the task content. The corresponding relationship can be set.

[0061] In practice, the corresponding relationship can be directly set according to the function code, so that the task content and task type can be directly determined according to the function code, without the need to obtain the task type according to the task content.

[0062] S13: Acquire response data based on the task content, and determine a memory allocation strategy based on the task type;

[0063] The content allocation strategy of the LwIP protocol includes a memory pool and a memory heap. The memory pool is a memory space of a fixed size set in advance, while the memory heap is a memory space that is flexibly selected according to needs.

[0064] Therefore, in one embodiment, determining a memory allocation strategy based on the task type includes:

[0065] When the size of the response data for completing the task instruction is fixed, determining that the task type is a first task type;

[0066] When the task type is the first task type, obtaining the size of the response data;

[0067] Adjusting the number and size of elements in the memory pool based on the size of the response data so that a target storage space having a size consistent with the size of the response data exists in the memory pool;

[0068] Allocate the target storage space of the memory pool to the response data.

[0069] That is, when the data size is fixed, the size of the space in the memory pool can be directly set so that each space used in the memory pool can just store the response data. In order to increase efficiency, two cores can be used for parallel processing, that is, after obtaining the size of the response data, one core builds the space in the memory pool, and the other core obtains the response data.

[0070] In another embodiment, determining a memory allocation strategy based on the task type includes:

[0071] When the size of the response data for completing the task instruction is not fixed, determining that the task type is a second task type;

[0072] When the task type is the second task type, dynamic memory allocation is performed in the memory heap. Dynamic memory allocation means that the size of the response data is directly allocated according to the address for storage.

[0073] However, the existing memory heap is allocated in sequence according to the address. For example, if the existing memory heap stores 10 data in sequence, and then releases the third and fifth data, the size of the third space can only store 1024 bytes, and the size of the fifth space can also store 1024 bytes of data. When the second, fourth and sixth data are not released, if there is a data of 2048 bytes, since it is one data, the data cannot be stored separately in the third space and the fifth space. This will cause a waste of memory.

[0074] Therefore, as a preferred implementation of the present application, it also includes: when the memory usage rate in the memory heap is greater than the preset usage rate;

[0075] Dynamically allocate in the cache area, and simultaneously obtain the usage status and order of each memory block in the memory heap, wherein the usage status includes used and unused;

[0076] Move the data of the used memory block in the latter order to the unused memory block in the former order, and update the corresponding pointer and status;

[0077] The buffer area is released and dynamically allocated in the updated memory heap.

[0078] As in the above example, after adopting the scheme of the present application, the present application can store the data after the 3rd space into the 3rd space, and then store the data after the 5th space into the 5th space, to ensure that there is no space that does not store data before each space for storing data in the memory heap. The free space at the back can be synthesized into a larger storage block, such as in the above example, if the size of each space is 1024. In this way, the subsequent data is stored in the front (it can be directly moving the data of the 9th space to the 3rd space, the data of the 10th space to the 5th space, or the 4th space to the 3rd space, and then the 6th space moves forward in sequence), so that after the 9th space and the 10th space are merged, a 2048-byte memory block can be obtained, and memory blocks smaller than 2048 bytes can be stored in this space.

[0079] In order not to affect normal work, this application solution can be executed during idle time.

[0080] S14: Allocate space for the response data based on the memory allocation strategy and send the response data to the host system.

[0081] The memory management method provided in the embodiment of the present application, when receiving a task instruction sent by the upper system, parses the task instruction and obtains the task content and task type corresponding to the task instruction, obtains the response data based on the task content, and determines the memory allocation strategy based on the task type, and finally allocates space for the response data based on the memory allocation strategy and sends the response data to the upper system. The present application scheme adopts different memory allocation strategies based on different task types, solves the limitations of the default memory management mechanism of LwIP, reduces memory fragmentation, and improves the response speed and stability of the system when processing large amounts of data.

[0082] Based on the same inventive concept, Figure 2 As shown, the present application also provides a memory management device 20 based on the LwIP protocol, comprising:

[0083] The task instruction receiving module 21 is used to receive the task instruction sent by the upper system.

[0084] A task instruction parsing module 22 is used to parse the task instruction to obtain the task content and task type corresponding to the task instruction, wherein the task type is used to indicate whether the size of the response data for completing the task instruction is fixed;

[0085] Preferably, parsing the task instruction to obtain the task content and task type corresponding to the task instruction includes:

[0086] Parsing the task instruction to obtain a function code of the task instruction;

[0087] Determine the task content of the task instruction based on the function code;

[0088] The task type is determined based on the task content.

[0089] The memory strategy allocation module 23 is used to obtain response data based on the task content and determine the memory allocation strategy based on the task type.

[0090] In one embodiment, determining the memory allocation strategy based on the task type includes:

[0091] When the size of the response data for completing the task instruction is fixed, determining that the task type is a first task type;

[0092] When the task type is the first task type, obtaining the size of the response data;

[0093] Adjusting the number and size of elements in the memory pool based on the size of the response data so that a target storage space having a size consistent with the size of the response data exists in the memory pool;

[0094] Allocate the target storage space of the memory pool to the response data.

[0095] In another embodiment, determining the memory allocation strategy based on the task type includes:

[0096] When the size of the response data for completing the task instruction is not fixed, determining that the task type is a second task type;

[0097] When the task type is the second task type, dynamic memory allocation is performed in the memory heap.

[0098] Also includes:

[0099] When the memory usage rate in the memory heap is greater than a preset usage rate;

[0100] Dynamically allocate in the cache area, and simultaneously obtain the usage status and order of each memory block in the memory heap, wherein the usage status includes used and unused;

[0101] Move the data of the used memory block in the latter order to the unused memory block in the former order, and update the corresponding pointer and status;

[0102] The buffer area is released and dynamically allocated in the updated memory heap.

[0103] The response data sending module 24 is used to allocate space for the response data based on the memory allocation strategy and send the response data to the host system.

[0104] When receiving a task instruction sent by a host system, the memory management device provided in the embodiment of the present application parses the task instruction and obtains the task content and task type corresponding to the task instruction, obtains the response data based on the task content, determines the memory allocation strategy based on the task type, and finally allocates space for the response data based on the memory allocation strategy and sends the response data to the host system. The present application scheme adopts different memory allocation strategies based on different task types, solves the limitations of the default memory management mechanism of LwIP, reduces memory fragmentation, and improves the response speed and stability of the system when processing large amounts of data.

[0105] Based on the same inventive concept, Figure 3 As shown, the present application also provides an electronic device 30, including:

[0106] at least one processor 31 and at least one memory 32;

[0107] The memory stores executable instructions of the processor;

[0108] The processor is configured to execute the memory management system method based on the LwIP protocol provided in the above embodiment.

[0109] The electronic device provided by the embodiment of the present application stores the executable instructions of the processor through the memory. When the executable instructions are executed, the processor can parse the task instructions and obtain the task content and task type corresponding to the task instructions when receiving the task instructions sent by the upper system, obtain the response data based on the task content, and determine the memory allocation strategy based on the task type, and finally allocate space for the response data based on the memory allocation strategy and send the response data to the upper system. The present application scheme adopts different memory allocation strategies based on different task types, solves the limitations of the default memory management mechanism of LwIP, reduces memory fragmentation, and improves the response speed and stability of the system when processing large amounts of data.

[0110] Based on the same inventive concept, the embodiment of the present application also provides a memory management system based on the LwIP protocol, including a kernel;

[0111] The kernel is used to execute the memory management method provided in the above embodiment.

[0112] As a preferred implementation scheme of the embodiment of the present application, the kernel includes a first kernel and a second kernel;

[0113] The first core is used to communicate with the host system through the LwIP protocol, and the first core and the second core perform inter-core communication;

[0114] The first core is used for sending the task instruction to the second core upon receiving the task instruction, parsing the task instruction to obtain the task type, determining the memory allocation strategy according to the task type, allocating space for the response data sent by the second core and sending the response data to the upper system;

[0115] The second kernel is used for parsing the task instruction to obtain the task content, and obtaining the response data according to the task content.

[0116] That is, the first kernel is used for memory allocation, and the second kernel obtains response data.

[0117] In order to more clearly illustrate the present application scheme, a specific implementation method is provided below. When the kernel communicates with the host computer debugging software via Ethernet, it can be roughly divided into real-time monitoring of multi-axis basic parameters, parameter writing or multi-parameter import of single-axis or multi-axis, and real-time waveform acquisition of multi-axis virtual oscilloscope according to the data processing task type. The data processing type of the servo system is detected in real time by the monitoring module, and then different memory allocation methods are selected through the parameter adjustment module, and the number of elements in the memory pool and the size of the space occupied by the elements are dynamically adjusted. In order to avoid scrambling for communication resources, the parameter adjustment module will adjust the parameters in advance according to the instructions issued by the host computer. The servo system will calculate the memory usage rate in real time during the communication process. When the usage rate exceeds the preset threshold, the defragmentation module is started to actively organize multiple discontinuous memory fragments into larger memory blocks, thereby improving the overall performance and reliability of the servo system.

[0118] In order to further illustrate the method of the present invention, the present invention is further illustrated below in combination with the optimal implementation case. This embodiment proposes a servo system memory management method based on the LwIP protocol. Now, a 6-axis dedicated servo driver using a dual-core main control chip and a host computer debugging software are used as an example for illustration. The two are briefly described as a driver and a host computer below.

[0119] The driver is connected to the host computer via Ethernet communication, using the UDP communication protocol in the LwIP protocol. Figure 5 As shown, the memory allocation strategies of the LwIP protocol are mainly memory pool and memory heap.

[0120] The memory pool needs to accurately estimate the memory size and the memory pool parameters cannot be adjusted after the code is compiled; the memory heap can dynamically allocate the required memory, but for tasks that require frequent memory allocation, the memory heap will generate more memory fragments, resulting in memory allocation failure and affecting communication efficiency.

[0121] The driver main control chip in the present invention is a dual-core chip, such as Figure 4As shown, core 1 (i.e., the first core) has a monitoring module, a parameter adjustment module, a defragmentation module, and a cache management module, which is responsible for receiving the task instructions of the host computer and sending the instructions to core 2 (i.e., the second core) through the inter-core communication protocol; core 2 analyzes the task instructions through the data packet parsing module, and the data processing module responds to the task instructions and sends the response data to core 1 through the inter-core communication bus. Core 1 reasonably allocates memory according to the size of the response data, and then sends it to the host computer through the Ethernet bus. The two cores are executed in parallel, and the memory allocation task can be executed in parallel, which greatly improves the efficiency.

[0122] Furthermore, if Figure 7 As shown, when kernel 1 receives the task instruction data packet from the host computer, it starts to parse the data packet and extract the function code in the data segment. The function code is used to identify different task types. For example, function code 01 represents that the host computer needs to perform axis status parameter monitoring, function code 02 represents the execution of the host computer virtual oscilloscope real-time waveform acquisition function, and function code 03 represents the need to execute axis parameter batch reading, etc.

[0123] Different function code instructions have different response data sizes in kernel 2, that is, the response data is determined according to the function code sent by the host computer. If the function code of the host computer is to read status monitoring data, then the response data contains the monitoring parameters of each axis. If the function code is to read a parameter, then the response data contains the value of this parameter. For example, function code 02 needs to send a fixed 480 bytes of data to the host computer every 62.5us, and function code 01 needs to send a fixed 200 bytes of data to the host computer every 500ms. In this case, the lwip memory in kernel 1 must allocate at least 480 bytes or more than 200 bytes of space to send the response data to the host computer.

[0124] Therefore, for tasks with fixed byte data, the monitoring module and parameter adjustment module in kernel 1 adjust the number and size of elements in the wave memory pool in advance according to the task types of function code 02 and function code 03, and the fixed byte numbers of different function codes. When kernel 1 receives the response data from kernel 2, the memory pool just meets the required memory space when applying for memory space in the wave memory pool, and will not cause free memory or memory fragmentation. For other task types such as function code 03, since the response data size of kernel 2 is not fixed, dynamic memory allocation is adopted in the memory heap.

[0125] For the above dynamic memory allocation, such as Figure 8 As shown, kernel 1 calculates the memory usage rate in the idle time period according to the usage status in the memory heap. When the usage rate is greater than 80% of the memory heap size in two consecutive calculation cycles, the defragmentation module and cache management module of kernel 1 are started. Figure 6During the defragmentation process, if the kernel 1 has a new memory allocation task, the cache area is dynamically allocated as a temporary memory heap through the cache management module, and the memory fragments in the original memory heap are merged into a large unused memory block. The memory fragments refer to unused memory blocks in the memory heap that cannot meet the memory size required for the application. The used memory blocks are copied to the new location one by one, and then the corresponding pointers and states are updated. These unused memory blocks are merged into one unused memory block and moved to the end of the memory heap, and then the corresponding pointers and states are updated. Finally, the cache management module releases the temporary memory heap of the cache area and re-enables the dynamic allocation of the original memory heap.

[0126] It should be noted that the entire memory block is fixed. Memory merging is equivalent to transferring the data in the used memory block to the head of the memory block, merging the unused memory blocks into a large memory block, and the entire blank memory block address is continuous. The entire memory block is fixed, which means that the size of a large memory block implemented by the memory heap is fixed. The reason for merging is that when the user applies for memory, this large memory block may have many small memory blocks. When the user releases these small memory blocks after use, these memory blocks will still exist in the entire large memory block in the form of small memory blocks, but the status of these small memory blocks becomes unused.

[0127] In the LwIP protocol, the default memory allocation strategy of the memory heap is that if the adjacent small memory blocks of the small memory blocks released by the user are also unused, then the adjacent memory blocks will be merged into a large memory block. However, if the user frequently applies for and releases small memory blocks, a lot of memory fragments will be generated over time. At this time, a major adjustment is needed to merge the unused small memory blocks in the fixed-size memory block of the memory heap into a large memory block, and this large memory block still belongs to the fixed-size memory block of the memory heap.

[0128] In addition, because the memory heap allocation strategy in the LwIP protocol is to search from the beginning of the memory heap memory block, that is, from the first address of the memory heap memory block downward, when the first unused memory block is retrieved, the memory block of the required memory size is allocated. These small memory blocks mentioned here are all in the fixed-size large memory block of the memory heap.

[0129] Exemplarily, the address of the memory heap memory block starts from 0 and ends at 65535, then address 0 is the first address of the memory heap memory block, each address can store 16 bytes of data, then the fixed size of the memory heap memory block is 65536*16=1048560 bytes, if the user applies for a memory block of 160 bytes, assuming that the memory heap memory blocks are not used, the allocation strategy is to divide the range from address 0 to address 9 into a small memory block, if the memory blocks from address 0 to address 9 have been used, then address 10 to address 19 will be divided into a small memory block for the user to use.

[0130] Through the implementation of the above technical solutions, the present invention can specifically solve the problem of insufficient memory management of the LwIP protocol in the servo system application, monitor the type of current data processing tasks of the servo system in real time, and dynamically adjust the memory allocation parameters in the LwIP protocol stack according to the monitored task type. When it is detected that the memory usage rate exceeds the preset threshold, the memory defragmentation algorithm is started to reduce memory fragmentation, improve memory usage, and enhance the communication efficiency and stability of the system.

[0131] Based on the same inventive concept, an embodiment of the present application provides a servo system, including the memory management system provided by the above embodiment.

[0132] The servo system provided by the embodiment of the present application includes the memory management system provided by the above embodiment, which can parse the task instruction and obtain the task content and task type corresponding to the task instruction when receiving the task instruction sent by the upper system, obtain the response data based on the task content, and determine the memory allocation strategy based on the task type, and finally allocate space for the response data based on the memory allocation strategy and send the response data to the upper system. The solution of the present application adopts different memory allocation strategies based on different task types, solves the limitations of the default memory management mechanism of LwIP, reduces memory fragmentation, and improves the response speed and stability of the system when processing large amounts of data.

[0133] It should be noted that, in the description of this application, the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In addition, in the description of this application, unless otherwise specified, the meaning of "plurality" refers to at least two.

[0134] It can be understood that the same or similar parts of the above embodiments can be referenced to each other, and the contents not described in detail in some embodiments can refer to the same or similar contents in other embodiments.

Claims

1. A memory management method based on LwIP protocol, characterized in that: include: Receive task instructions sent by the host system; Parsing the task instruction to obtain the task content and task type corresponding to the task instruction, wherein the task type is used to indicate whether the size of the response data for completing the task instruction is fixed; Acquire response data based on the task content, and determine a memory allocation strategy based on the task type; Allocate space for the response data based on the memory allocation strategy and send the response data to the host system.

2. The method according to claim 1, characterized in that: The determining of the memory allocation strategy based on the task type includes: When the size of the response data for completing the task instruction is fixed, determining that the task type is a first task type; When the task type is the first task type, obtaining the size of the response data; Adjusting the number and size of elements in the memory pool based on the size of the response data so that a target storage space having a size consistent with the size of the response data exists in the memory pool; Allocate the target storage space of the memory pool to the response data.

3. The method according to claim 1, characterized in that: The determining of the memory allocation strategy based on the task type includes: When the size of the response data for completing the task instruction is not fixed, determining that the task type is a second task type; When the task type is the second task type, dynamic memory allocation is performed in the memory heap.

4. The method according to claim 3, characterized in that: Also includes: When the memory usage rate in the memory heap is greater than a preset usage rate; Dynamically allocate in the cache area, and simultaneously obtain the usage status and order of each memory block in the memory heap, wherein the usage status includes used and unused; Move the data of the used memory block in the latter order to the unused memory block in the former order, and update the corresponding pointer and status; The buffer area is released and dynamically allocated in the updated memory heap.

5. The method according to claim 1, characterized in that: The step of parsing the task instruction to obtain the task content and task type corresponding to the task instruction includes: Parsing the task instruction to obtain a function code of the task instruction; Determine the task content of the task instruction based on the function code; The task type is determined based on the task content.

6. A memory management device based on the LwIP protocol, characterized in that: include: A task instruction receiving module is used to receive task instructions sent by the upper system; A task instruction parsing module, used for parsing the task instruction to obtain the task content and task type corresponding to the task instruction, wherein the task type is used to indicate whether the size of the response data for completing the task instruction is fixed; A memory strategy allocation module, used to obtain response data based on the task content and determine a memory allocation strategy based on the task type; A response data sending module is used to allocate space for the response data based on the memory allocation strategy and send the response data to the host system.

7. An electronic device, characterized in that: include: at least one processor and at least one memory; The memory stores executable instructions of the processor; The processor is configured to execute the method according to any one of claims 1 to 5.

8. A memory management system based on the LwIP protocol, characterized in that: Including the kernel; The kernel is used to execute the method according to any one of claims 1 to 5.

9. The memory management system according to claim 8, characterized in that: The kernel includes a first kernel and a second kernel; The first core is used to communicate with the host system through the LwIP protocol, and the first core and the second core perform inter-core communication; The first core is used for sending the task instruction to the second core upon receiving the task instruction, parsing the task instruction to obtain the task type, determining the memory allocation strategy according to the task type, allocating space for the response data sent by the second core and sending the response data to the upper system; The second kernel is used for parsing the task instruction to obtain the task content, and obtaining the response data according to the task content.

10. A servo system, characterized in that: Includes the memory management system described in claim 8 or 9.

Images